iPXE
Data Structures | Defines | Functions
exanic.h File Reference

Exablaze ExaNIC driver. More...

#include <stdint.h>
#include <ipxe/pci.h>
#include <ipxe/ethernet.h>
#include <ipxe/uaccess.h>
#include <ipxe/retry.h>
#include <ipxe/i2c.h>
#include <ipxe/bitbash.h>

Go to the source code of this file.

Data Structures

struct  exanic_tx_descriptor
 An ExaNIC transmit chunk descriptor. More...
struct  exanic_tx_chunk
 An ExaNIC transmit chunk. More...
struct  exanic_rx_descriptor
 An ExaNIC receive chunk descriptor. More...
struct  exanic_rx_chunk
 An ExaNIC receive chunk. More...
struct  exanic_i2c_config
 An ExaNIC I2C bus configuration. More...
struct  exanic_port
 An ExaNIC port. More...
struct  exanic
 An ExaNIC. More...

Defines

#define EXANIC_MAX_PORTS   8
 Maximum number of ports.
#define EXANIC_REGS_BAR   PCI_BASE_ADDRESS_0
 Register BAR.
#define EXANIC_TX_BAR   PCI_BASE_ADDRESS_2
 Transmit region BAR.
#define EXANIC_ALIGN   0x1000
 Alignment for DMA regions.
#define EXANIC_DMA_32_BIT   0x00000001UL
 Flag for 32-bit DMA addresses.
#define EXANIC_REGS_LEN   0x2000
 Register set length.
#define EXANIC_TXF_LEN   0x1000
 Transmit feedback region length.
#define EXANIC_TXF_SLOT(index)   ( 0x40 * (index) )
 Transmit feedback slot.
#define EXANIC_RX_LEN   0x200000
 Receive region length.
#define EXANIC_TXF_BASE   0x0014
 Transmit feedback base address register.
#define EXANIC_CAPS   0x0038
 Capabilities register.
#define EXANIC_CAPS_100M   0x01000000UL
 100Mbps supported
#define EXANIC_CAPS_1G   0x02000000UL
 1Gbps supported
#define EXANIC_CAPS_10G   0x04000000UL
 10Gbps supported
#define EXANIC_CAPS_40G   0x08000000UL
 40Gbps supported
#define EXANIC_CAPS_100G   0x10000000UL
 100Gbps supported
#define EXANIC_CAPS_SPEED_MASK   0x1f000000UL
 Supported speeds mask.
#define EXANIC_I2C   0x012c
 I2C GPIO register.
#define EXANIC_POWER   0x0138
 Power control register.
#define EXANIC_POWER_ON   0x000000f0UL
 Power on PHYs.
#define EXANIC_PORT_REGS(index)   ( 0x0200 + ( 0x40 * (index) ) )
 Port register offset.
#define EXANIC_PORT_ENABLE   0x0000
 Port enable register.
#define EXANIC_PORT_ENABLE_ENABLED   0x00000001UL
 Port is enabled.
#define EXANIC_PORT_SPEED   0x0004
 Port speed register.
#define EXANIC_PORT_STATUS   0x0008
 Port status register.
#define EXANIC_PORT_STATUS_LINK   0x00000008UL
 Link is up.
#define EXANIC_PORT_STATUS_ABSENT   0x80000000UL
 Port is not present.
#define EXANIC_PORT_MAC   0x000c
 Port MAC address (second half) register.
#define EXANIC_PORT_FLAGS   0x0010
 Port flags register.
#define EXANIC_PORT_FLAGS_PROMISC   0x00000001UL
 Promiscuous mode.
#define EXANIC_PORT_RX_BASE   0x0014
 Port receive chunk base address register.
#define EXANIC_PORT_TX_COMMAND   0x0020
 Port transmit command register.
#define EXANIC_PORT_TX_OFFSET   0x0024
 Port transmit region offset register.
#define EXANIC_PORT_TX_LEN   0x0028
 Port transmit region length register.
#define EXANIC_PORT_OUI   0x0030
 Port MAC address (first half) register.
#define EXANIC_PORT_IRQ   0x0034
 Port interrupt configuration register.
#define EXANIC_TYPE_RAW   0x01
 Raw Ethernet frame type.
#define EXANIC_STATUS_ERROR_MASK   0x0f
 Receive status error mask.
#define EXANIC_EEPROM_ADDRESS   0x50
 EEPROM address.
#define EXANIC_MAX_TX_LEN   ( 256 * sizeof ( struct exanic_tx_chunk ) )
 Maximum used length of transmit region.
#define EXANIC_MAX_RX_LEN   ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )
 Maximum length of received packet.
#define EXANIC_LINK_INTERVAL   ( 1 * TICKS_PER_SEC )
 Interval between link state checks.

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)

Detailed Description

Exablaze ExaNIC driver.

Definition in file exanic.h.


Define Documentation

#define EXANIC_MAX_PORTS   8

Maximum number of ports.

Definition at line 21 of file exanic.h.

Referenced by exanic_probe(), exanic_remove(), and exanic_reset().

Register BAR.

Definition at line 24 of file exanic.h.

Referenced by exanic_probe().

Transmit region BAR.

Definition at line 27 of file exanic.h.

Referenced by exanic_probe().

#define EXANIC_ALIGN   0x1000

Alignment for DMA regions.

Definition at line 30 of file exanic.h.

Referenced by exanic_probe().

#define EXANIC_DMA_32_BIT   0x00000001UL

Flag for 32-bit DMA addresses.

Definition at line 33 of file exanic.h.

Referenced by exanic_write_base().

#define EXANIC_REGS_LEN   0x2000

Register set length.

Definition at line 36 of file exanic.h.

Referenced by exanic_probe().

#define EXANIC_TXF_LEN   0x1000

Transmit feedback region length.

Definition at line 39 of file exanic.h.

Referenced by exanic_probe(), and exanic_remove().

#define EXANIC_TXF_SLOT (   index)    ( 0x40 * (index) )

Transmit feedback slot.

This is a policy decision.

Definition at line 45 of file exanic.h.

Referenced by exanic_probe_port().

#define EXANIC_RX_LEN   0x200000

Receive region length.

Definition at line 48 of file exanic.h.

Referenced by exanic_open(), exanic_poll_rx(), and exanic_probe_port().

#define EXANIC_TXF_BASE   0x0014

Transmit feedback base address register.

Definition at line 51 of file exanic.h.

Referenced by exanic_probe(), and exanic_reset().

#define EXANIC_CAPS   0x0038

Capabilities register.

Definition at line 54 of file exanic.h.

Referenced by exanic_probe().

#define EXANIC_CAPS_100M   0x01000000UL

100Mbps supported

Definition at line 55 of file exanic.h.

#define EXANIC_CAPS_1G   0x02000000UL

1Gbps supported

Definition at line 56 of file exanic.h.

#define EXANIC_CAPS_10G   0x04000000UL

10Gbps supported

Definition at line 57 of file exanic.h.

#define EXANIC_CAPS_40G   0x08000000UL

40Gbps supported

Definition at line 58 of file exanic.h.

#define EXANIC_CAPS_100G   0x10000000UL

100Gbps supported

Definition at line 59 of file exanic.h.

#define EXANIC_CAPS_SPEED_MASK   0x1f000000UL

Supported speeds mask.

Definition at line 60 of file exanic.h.

Referenced by exanic_expired(), and exanic_probe_port().

#define EXANIC_I2C   0x012c

I2C GPIO register.

Definition at line 63 of file exanic.h.

Referenced by exanic_i2c_read_bit(), and exanic_i2c_write_bit().

#define EXANIC_POWER   0x0138

Power control register.

Definition at line 66 of file exanic.h.

Referenced by exanic_probe().

#define EXANIC_POWER_ON   0x000000f0UL

Power on PHYs.

Definition at line 67 of file exanic.h.

Referenced by exanic_probe().

#define EXANIC_PORT_REGS (   index)    ( 0x0200 + ( 0x40 * (index) ) )

Port register offset.

Definition at line 70 of file exanic.h.

Referenced by exanic_probe_port(), and exanic_reset().

#define EXANIC_PORT_ENABLE   0x0000

Port enable register.

Definition at line 73 of file exanic.h.

Referenced by exanic_close(), exanic_open(), and exanic_reset().

#define EXANIC_PORT_ENABLE_ENABLED   0x00000001UL

Port is enabled.

Definition at line 74 of file exanic.h.

Referenced by exanic_open().

#define EXANIC_PORT_SPEED   0x0004

Port speed register.

Definition at line 77 of file exanic.h.

Referenced by exanic_check_link(), exanic_expired(), exanic_open(), and exanic_probe_port().

#define EXANIC_PORT_STATUS   0x0008

Port status register.

Definition at line 80 of file exanic.h.

Referenced by exanic_check_link(), and exanic_probe_port().

#define EXANIC_PORT_STATUS_LINK   0x00000008UL

Link is up.

Definition at line 81 of file exanic.h.

Referenced by exanic_check_link().

#define EXANIC_PORT_STATUS_ABSENT   0x80000000UL

Port is not present.

Definition at line 82 of file exanic.h.

Referenced by exanic_probe_port().

#define EXANIC_PORT_MAC   0x000c

Port MAC address (second half) register.

Definition at line 85 of file exanic.h.

#define EXANIC_PORT_FLAGS   0x0010

Port flags register.

Definition at line 88 of file exanic.h.

Referenced by exanic_open().

#define EXANIC_PORT_FLAGS_PROMISC   0x00000001UL

Promiscuous mode.

Definition at line 89 of file exanic.h.

Referenced by exanic_open().

#define EXANIC_PORT_RX_BASE   0x0014

Port receive chunk base address register.

Definition at line 92 of file exanic.h.

Referenced by exanic_close(), exanic_open(), and exanic_reset().

#define EXANIC_PORT_TX_COMMAND   0x0020

Port transmit command register.

Definition at line 95 of file exanic.h.

Referenced by exanic_transmit().

#define EXANIC_PORT_TX_OFFSET   0x0024

Port transmit region offset register.

Definition at line 98 of file exanic.h.

Referenced by exanic_probe_port().

#define EXANIC_PORT_TX_LEN   0x0028

Port transmit region length register.

Definition at line 101 of file exanic.h.

Referenced by exanic_probe_port().

#define EXANIC_PORT_OUI   0x0030

Port MAC address (first half) register.

Definition at line 104 of file exanic.h.

#define EXANIC_PORT_IRQ   0x0034

Port interrupt configuration register.

Definition at line 107 of file exanic.h.

Referenced by exanic_reset().

#define EXANIC_TYPE_RAW   0x01

Raw Ethernet frame type.

Definition at line 134 of file exanic.h.

Referenced by exanic_open().

#define EXANIC_STATUS_ERROR_MASK   0x0f

Receive status error mask.

Definition at line 159 of file exanic.h.

Referenced by exanic_poll_rx().

#define EXANIC_EEPROM_ADDRESS   0x50

EEPROM address.

Definition at line 172 of file exanic.h.

Referenced by exanic_try_init_eeprom().

#define EXANIC_MAX_TX_LEN   ( 256 * sizeof ( struct exanic_tx_chunk ) )

Maximum used length of transmit region.

This is a policy decision to avoid overflowing the 16-bit transmit producer and consumer counters.

Definition at line 247 of file exanic.h.

Referenced by exanic_probe_port().

#define EXANIC_MAX_RX_LEN   ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )

Maximum length of received packet.

This is a policy decision.

Definition at line 253 of file exanic.h.

Referenced by exanic_poll_rx().

#define EXANIC_LINK_INTERVAL   ( 1 * TICKS_PER_SEC )

Interval between link state checks.

This is a policy decision.

Definition at line 259 of file exanic.h.

Referenced by exanic_expired(), and exanic_open().


Function Documentation

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL  )