iPXE
Data Structures | Macros | Enumerations | Functions
forcedeth.h File Reference

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Data Structures

struct  ring_desc
 
struct  ring_desc_ex
 
struct  forcedeth_private
 

Macros

#define _FORCEDETH_H_
 
#define DESC_VER_1   1
 
#define DESC_VER_2   2
 
#define DESC_VER_3   3
 
#define RX_RING_SIZE   16
 
#define TX_RING_SIZE   32
 
#define RXTX_RING_SIZE   ( ( RX_RING_SIZE ) + ( TX_RING_SIZE ) )
 
#define RX_RING_MIN   128
 
#define TX_RING_MIN   64
 
#define RING_MAX_DESC_VER_1   1024
 
#define RING_MAX_DESC_VER_2_3   16384
 
#define NV_RX_ALLOC_PAD   (64)
 
#define NV_RX_HEADERS   (64)
 
#define RX_BUF_SZ   ( ( ETH_FRAME_LEN ) + ( NV_RX_HEADERS ) )
 
#define NV_PKTLIMIT_1   1500
 
#define NV_PKTLIMIT_2   9100
 
#define NV_LINK_POLL_FREQUENCY   128
 
#define PHY_OUI_MARVELL   0x5043
 
#define PHY_OUI_CICADA   0x03f1
 
#define PHY_OUI_VITESSE   0x01c1
 
#define PHY_OUI_REALTEK   0x0732
 
#define PHY_OUI_REALTEK2   0x0020
 
#define PHYID1_OUI_MASK   0x03ff
 
#define PHYID1_OUI_SHFT   6
 
#define PHYID2_OUI_MASK   0xfc00
 
#define PHYID2_OUI_SHFT   10
 
#define PHYID2_MODEL_MASK   0x03f0
 
#define PHY_MODEL_REALTEK_8211   0x0110
 
#define PHY_REV_MASK   0x0001
 
#define PHY_REV_REALTEK_8211B   0x0000
 
#define PHY_REV_REALTEK_8211C   0x0001
 
#define PHY_MODEL_REALTEK_8201   0x0200
 
#define PHY_MODEL_MARVELL_E3016   0x0220
 
#define PHY_MARVELL_E3016_INITMASK   0x0300
 
#define PHY_CICADA_INIT1   0x0f000
 
#define PHY_CICADA_INIT2   0x0e00
 
#define PHY_CICADA_INIT3   0x01000
 
#define PHY_CICADA_INIT4   0x0200
 
#define PHY_CICADA_INIT5   0x0004
 
#define PHY_CICADA_INIT6   0x02000
 
#define PHY_VITESSE_INIT_REG1   0x1f
 
#define PHY_VITESSE_INIT_REG2   0x10
 
#define PHY_VITESSE_INIT_REG3   0x11
 
#define PHY_VITESSE_INIT_REG4   0x12
 
#define PHY_VITESSE_INIT_MSK1   0xc
 
#define PHY_VITESSE_INIT_MSK2   0x0180
 
#define PHY_VITESSE_INIT1   0x52b5
 
#define PHY_VITESSE_INIT2   0xaf8a
 
#define PHY_VITESSE_INIT3   0x8
 
#define PHY_VITESSE_INIT4   0x8f8a
 
#define PHY_VITESSE_INIT5   0xaf86
 
#define PHY_VITESSE_INIT6   0x8f86
 
#define PHY_VITESSE_INIT7   0xaf82
 
#define PHY_VITESSE_INIT8   0x0100
 
#define PHY_VITESSE_INIT9   0x8f82
 
#define PHY_VITESSE_INIT10   0x0
 
#define PHY_REALTEK_INIT_REG1   0x1f
 
#define PHY_REALTEK_INIT_REG2   0x19
 
#define PHY_REALTEK_INIT_REG3   0x13
 
#define PHY_REALTEK_INIT_REG4   0x14
 
#define PHY_REALTEK_INIT_REG5   0x18
 
#define PHY_REALTEK_INIT_REG6   0x11
 
#define PHY_REALTEK_INIT_REG7   0x01
 
#define PHY_REALTEK_INIT1   0x0000
 
#define PHY_REALTEK_INIT2   0x8e00
 
#define PHY_REALTEK_INIT3   0x0001
 
#define PHY_REALTEK_INIT4   0xad17
 
#define PHY_REALTEK_INIT5   0xfb54
 
#define PHY_REALTEK_INIT6   0xf5c7
 
#define PHY_REALTEK_INIT7   0x1000
 
#define PHY_REALTEK_INIT8   0x0003
 
#define PHY_REALTEK_INIT9   0x0008
 
#define PHY_REALTEK_INIT10   0x0005
 
#define PHY_REALTEK_INIT11   0x0200
 
#define PHY_REALTEK_INIT_MSK1   0x0003
 
#define PHY_GIGABIT   0x0100
 
#define PHY_TIMEOUT   0x1
 
#define PHY_ERROR   0x2
 
#define PHY_100   0x1
 
#define PHY_1000   0x2
 
#define PHY_HALF   0x100
 
#define NV_PAUSEFRAME_RX_CAPABLE   0x0001
 
#define NV_PAUSEFRAME_TX_CAPABLE   0x0002
 
#define NV_PAUSEFRAME_RX_ENABLE   0x0004
 
#define NV_PAUSEFRAME_TX_ENABLE   0x0008
 
#define NV_PAUSEFRAME_RX_REQ   0x0010
 
#define NV_PAUSEFRAME_TX_REQ   0x0020
 
#define NV_PAUSEFRAME_AUTONEG   0x0040
 
#define NV_MSI_X_MAX_VECTORS   8
 
#define NV_MSI_X_VECTORS_MASK   0x000f
 
#define NV_MSI_CAPABLE   0x0010
 
#define NV_MSI_X_CAPABLE   0x0020
 
#define NV_MSI_ENABLED   0x0040
 
#define NV_MSI_X_ENABLED   0x0080
 
#define NV_MSI_X_VECTOR_ALL   0x0
 
#define NV_MSI_X_VECTOR_RX   0x0
 
#define NV_MSI_X_VECTOR_TX   0x1
 
#define NV_MSI_X_VECTOR_OTHER   0x2
 
#define NV_MSI_PRIV_OFFSET   0x68
 
#define NV_MSI_PRIV_VALUE   0xffffffff
 
#define NV_MIIBUSY_DELAY   50
 
#define NV_MIIPHY_DELAY   10
 
#define NV_MIIPHY_DELAYMAX   10000
 
#define DEV_NEED_TIMERIRQ   0x0000001 /* set the timer irq flag in the irq mask */
 
#define DEV_NEED_LINKTIMER   0x0000002 /* poll link settings. Relies on the timer irq */
 
#define DEV_HAS_LARGEDESC   0x0000004 /* device supports jumbo frames and needs packet format 2 */
 
#define DEV_HAS_HIGH_DMA   0x0000008 /* device supports 64bit dma */
 
#define DEV_HAS_CHECKSUM   0x0000010 /* device supports tx and rx checksum offloads */
 
#define DEV_HAS_VLAN   0x0000020 /* device supports vlan tagging and striping */
 
#define DEV_HAS_MSI   0x0000040 /* device supports MSI */
 
#define DEV_HAS_MSI_X   0x0000080 /* device supports MSI-X */
 
#define DEV_HAS_POWER_CNTRL   0x0000100 /* device supports power savings */
 
#define DEV_HAS_STATISTICS_V1   0x0000200 /* device supports hw statistics version 1 */
 
#define DEV_HAS_STATISTICS_V2   0x0000600 /* device supports hw statistics version 2 */
 
#define DEV_HAS_STATISTICS_V3   0x0000e00 /* device supports hw statistics version 3 */
 
#define DEV_HAS_TEST_EXTENDED   0x0001000 /* device supports extended diagnostic test */
 
#define DEV_HAS_MGMT_UNIT   0x0002000 /* device supports management unit */
 
#define DEV_HAS_CORRECT_MACADDR   0x0004000 /* device supports correct mac address order */
 
#define DEV_HAS_COLLISION_FIX   0x0008000 /* device supports tx collision fix */
 
#define DEV_HAS_PAUSEFRAME_TX_V1   0x0010000 /* device supports tx pause frames version 1 */
 
#define DEV_HAS_PAUSEFRAME_TX_V2   0x0020000 /* device supports tx pause frames version 2 */
 
#define DEV_HAS_PAUSEFRAME_TX_V3   0x0040000 /* device supports tx pause frames version 3 */
 
#define DEV_NEED_TX_LIMIT   0x0080000 /* device needs to limit tx */
 
#define DEV_NEED_TX_LIMIT2   0x0180000 /* device needs to limit tx, expect for some revs */
 
#define DEV_HAS_GEAR_MODE   0x0200000 /* device supports gear mode */
 
#define DEV_NEED_PHY_INIT_FIX   0x0400000 /* device needs specific phy workaround */
 
#define DEV_NEED_LOW_POWER_FIX   0x0800000 /* device needs special power up workaround */
 
#define DEV_NEED_MSI_FIX   0x1000000 /* device needs msi workaround */
 
#define FLAG_MASK_V1   0xffff0000
 
#define FLAG_MASK_V2   0xffffc000
 
#define LEN_MASK_V1   (0xffffffff ^ FLAG_MASK_V1)
 
#define LEN_MASK_V2   (0xffffffff ^ FLAG_MASK_V2)
 
#define NV_TX_LASTPACKET   (1<<16)
 
#define NV_TX_RETRYERROR   (1<<19)
 
#define NV_TX_RETRYCOUNT_MASK   (0xF<<20)
 
#define NV_TX_FORCED_INTERRUPT   (1<<24)
 
#define NV_TX_DEFERRED   (1<<26)
 
#define NV_TX_CARRIERLOST   (1<<27)
 
#define NV_TX_LATECOLLISION   (1<<28)
 
#define NV_TX_UNDERFLOW   (1<<29)
 
#define NV_TX_ERROR   (1<<30)
 
#define NV_TX_VALID   (1<<31)
 
#define NV_TX2_LASTPACKET   (1<<29)
 
#define NV_TX2_RETRYERROR   (1<<18)
 
#define NV_TX2_RETRYCOUNT_MASK   (0xF<<19)
 
#define NV_TX2_FORCED_INTERRUPT   (1<<30)
 
#define NV_TX2_DEFERRED   (1<<25)
 
#define NV_TX2_CARRIERLOST   (1<<26)
 
#define NV_TX2_LATECOLLISION   (1<<27)
 
#define NV_TX2_UNDERFLOW   (1<<28)
 
#define NV_TX2_ERROR   (1<<30)
 
#define NV_TX2_VALID   (1<<31)
 
#define NV_TX2_TSO   (1<<28)
 
#define NV_TX2_TSO_SHIFT   14
 
#define NV_TX2_TSO_MAX_SHIFT   14
 
#define NV_TX2_TSO_MAX_SIZE   (1<<NV_TX2_TSO_MAX_SHIFT)
 
#define NV_TX2_CHECKSUM_L3   (1<<27)
 
#define NV_TX2_CHECKSUM_L4   (1<<26)
 
#define NV_TX3_VLAN_TAG_PRESENT   (1<<18)
 
#define NV_RX_DESCRIPTORVALID   (1<<16)
 
#define NV_RX_MISSEDFRAME   (1<<17)
 
#define NV_RX_SUBSTRACT1   (1<<18)
 
#define NV_RX_ERROR1   (1<<23)
 
#define NV_RX_ERROR2   (1<<24)
 
#define NV_RX_ERROR3   (1<<25)
 
#define NV_RX_ERROR4   (1<<26)
 
#define NV_RX_CRCERR   (1<<27)
 
#define NV_RX_OVERFLOW   (1<<28)
 
#define NV_RX_FRAMINGERR   (1<<29)
 
#define NV_RX_ERROR   (1<<30)
 
#define NV_RX_AVAIL   (1<<31)
 
#define NV_RX_ERROR_MASK   (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3|NV_RX_ERROR4|NV_RX_CRCERR|NV_RX_OVERFLOW|NV_RX_FRAMINGERR)
 
#define NV_RX2_CHECKSUMMASK   (0x1C000000)
 
#define NV_RX2_CHECKSUM_IP   (0x10000000)
 
#define NV_RX2_CHECKSUM_IP_TCP   (0x14000000)
 
#define NV_RX2_CHECKSUM_IP_UDP   (0x18000000)
 
#define NV_RX2_DESCRIPTORVALID   (1<<29)
 
#define NV_RX2_SUBSTRACT1   (1<<25)
 
#define NV_RX2_ERROR1   (1<<18)
 
#define NV_RX2_ERROR2   (1<<19)
 
#define NV_RX2_ERROR3   (1<<20)
 
#define NV_RX2_ERROR4   (1<<21)
 
#define NV_RX2_CRCERR   (1<<22)
 
#define NV_RX2_OVERFLOW   (1<<23)
 
#define NV_RX2_FRAMINGERR   (1<<24)
 
#define NV_RX2_ERROR   (1<<30)
 
#define NV_RX2_AVAIL   (1<<31)
 
#define NV_RX2_ERROR_MASK   (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3|NV_RX2_ERROR4|NV_RX2_CRCERR|NV_RX2_OVERFLOW|NV_RX2_FRAMINGERR)
 
#define NV_RX3_VLAN_TAG_PRESENT   (1<<16)
 
#define NV_RX3_VLAN_TAG_MASK   (0x0000FFFF)
 
#define NV_PCI_REGSZ_VER1   0x270
 
#define NV_PCI_REGSZ_VER2   0x2d4
 
#define NV_PCI_REGSZ_VER3   0x604
 
#define NV_PCI_REGSZ_MAX   0x604
 
#define NV_TXRX_RESET_DELAY   4
 
#define NV_TXSTOP_DELAY1   10
 
#define NV_TXSTOP_DELAY1MAX   500000
 
#define NV_TXSTOP_DELAY2   100
 
#define NV_RXSTOP_DELAY1   10
 
#define NV_RXSTOP_DELAY1MAX   500000
 
#define NV_RXSTOP_DELAY2   100
 
#define NV_SETUP5_DELAY   5
 
#define NV_SETUP5_DELAYMAX   50000
 
#define NV_POWERUP_DELAY   5
 
#define NV_POWERUP_DELAYMAX   5000
 
#define NV_MIIBUSY_DELAY   50
 
#define NV_MIIPHY_DELAY   10
 
#define NV_MIIPHY_DELAYMAX   10000
 
#define NV_MAC_RESET_DELAY   64
 
#define NV_MSI_X_CAPABLE   0x0020
 
#define MII_READ   (-1)
 
#define NVREG_IRQSTAT_MIIEVENT   0x040
 
#define NVREG_IRQSTAT_MASK   0x83ff
 
#define NVREG_IRQ_RX_ERROR   0x0001
 
#define NVREG_IRQ_RX   0x0002
 
#define NVREG_IRQ_RX_NOBUF   0x0004
 
#define NVREG_IRQ_TX_ERR   0x0008
 
#define NVREG_IRQ_TX_OK   0x0010
 
#define NVREG_IRQ_TIMER   0x0020
 
#define NVREG_IRQ_LINK   0x0040
 
#define NVREG_IRQ_RX_FORCED   0x0080
 
#define NVREG_IRQ_TX_FORCED   0x0100
 
#define NVREG_IRQ_RECOVER_ERROR   0x8200
 
#define NVREG_IRQMASK_THROUGHPUT   0x00df
 
#define NVREG_IRQMASK_CPU   0x0060
 
#define NVREG_IRQ_TX_ALL   (NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
 
#define NVREG_IRQ_RX_ALL   (NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED)
 
#define NVREG_IRQ_OTHER   (NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RECOVER_ERROR)
 
#define NVREG_UNKSETUP6_VAL   3
 
#define NVREG_POLL_DEFAULT_THROUGHPUT   65535 /* backup tx cleanup if loop max reached */
 
#define NVREG_POLL_DEFAULT_CPU   13
 
#define NVREG_MSI_VECTOR_0_ENABLED   0x01
 
#define NVREG_MISC1_PAUSE_TX   0x01
 
#define NVREG_MISC1_HD   0x02
 
#define NVREG_MISC1_FORCE   0x3b0f3c
 
#define NVREG_MAC_RESET_ASSERT   0x0F3
 
#define NVREG_XMITCTL_START   0x01
 
#define NVREG_XMITCTL_MGMT_ST   0x40000000
 
#define NVREG_XMITCTL_SYNC_MASK   0x000f0000
 
#define NVREG_XMITCTL_SYNC_NOT_READY   0x0
 
#define NVREG_XMITCTL_SYNC_PHY_INIT   0x00040000
 
#define NVREG_XMITCTL_MGMT_SEMA_MASK   0x00000f00
 
#define NVREG_XMITCTL_MGMT_SEMA_FREE   0x0
 
#define NVREG_XMITCTL_HOST_SEMA_MASK   0x0000f000
 
#define NVREG_XMITCTL_HOST_SEMA_ACQ   0x0000f000
 
#define NVREG_XMITCTL_HOST_LOADED   0x00004000
 
#define NVREG_XMITCTL_TX_PATH_EN   0x01000000
 
#define NVREG_XMITCTL_DATA_START   0x00100000
 
#define NVREG_XMITCTL_DATA_READY   0x00010000
 
#define NVREG_XMITCTL_DATA_ERROR   0x00020000
 
#define NVREG_XMITSTAT_BUSY   0x01
 
#define NVREG_PFF_PAUSE_RX   0x08
 
#define NVREG_PFF_ALWAYS   0x7F0000
 
#define NVREG_PFF_PROMISC   0x80
 
#define NVREG_PFF_MYADDR   0x20
 
#define NVREG_PFF_LOOPBACK   0x10
 
#define NVREG_OFFLOAD_HOMEPHY   0x601
 
#define NVREG_OFFLOAD_NORMAL   RX_NIC_BUFSIZE
 
#define NVREG_RCVCTL_START   0x01
 
#define NVREG_RCVCTL_RX_PATH_EN   0x01000000
 
#define NVREG_RCVSTAT_BUSY   0x01
 
#define NVREG_SLOTTIME_LEGBF_ENABLED   0x80000000
 
#define NVREG_SLOTTIME_10_100_FULL   0x00007f00
 
#define NVREG_SLOTTIME_1000_FULL   0x0003ff00
 
#define NVREG_SLOTTIME_HALF   0x0000ff00
 
#define NVREG_SLOTTIME_DEFAULT   0x00007f00
 
#define NVREG_SLOTTIME_MASK   0x000000ff
 
#define NVREG_TX_DEFERRAL_DEFAULT   0x15050f
 
#define NVREG_TX_DEFERRAL_RGMII_10_100   0x16070f
 
#define NVREG_TX_DEFERRAL_RGMII_1000   0x14050f
 
#define NVREG_TX_DEFERRAL_RGMII_STRETCH_10   0x16190f
 
#define NVREG_TX_DEFERRAL_RGMII_STRETCH_100   0x16300f
 
#define NVREG_TX_DEFERRAL_MII_STRETCH   0x152000
 
#define NVREG_RX_DEFERRAL_DEFAULT   0x16
 
#define NVREG_MCASTADDRA_FORCE   0x01
 
#define NVREG_MCASTMASKA_NONE   0xffffffff
 
#define NVREG_MCASTMASKB_NONE   0xffff
 
#define PHY_RGMII   0x10000000
 
#define NVREG_BKOFFCTRL_DEFAULT   0x70000000
 
#define NVREG_BKOFFCTRL_SEED_MASK   0x000003ff
 
#define NVREG_BKOFFCTRL_SELECT   24
 
#define NVREG_BKOFFCTRL_GEAR   12
 
#define NVREG_RINGSZ_TXSHIFT   0
 
#define NVREG_RINGSZ_RXSHIFT   16
 
#define NVREG_TRANSMITPOLL_MAC_ADDR_REV   0x00008000
 
#define NVREG_LINKSPEED_FORCE   0x10000
 
#define NVREG_LINKSPEED_10   1000
 
#define NVREG_LINKSPEED_100   100
 
#define NVREG_LINKSPEED_1000   50
 
#define NVREG_LINKSPEED_MASK   (0xFFF)
 
#define NVREG_UNKSETUP5_BIT31   (1<<31)
 
#define NVREG_TX_WM_DESC1_DEFAULT   0x0200010
 
#define NVREG_TX_WM_DESC2_3_DEFAULT   0x1e08000
 
#define NVREG_TX_WM_DESC2_3_1000   0xfe08000
 
#define NVREG_TXRXCTL_KICK   0x0001
 
#define NVREG_TXRXCTL_BIT1   0x0002
 
#define NVREG_TXRXCTL_BIT2   0x0004
 
#define NVREG_TXRXCTL_IDLE   0x0008
 
#define NVREG_TXRXCTL_RESET   0x0010
 
#define NVREG_TXRXCTL_RXCHECK   0x0400
 
#define NVREG_TXRXCTL_DESC_1   0
 
#define NVREG_TXRXCTL_DESC_2   0x002100
 
#define NVREG_TXRXCTL_DESC_3   0xc02200
 
#define NVREG_TXRXCTL_VLANSTRIP   0x00040
 
#define NVREG_TXRXCTL_VLANINS   0x00080
 
#define NVREG_TX_PAUSEFRAME_DISABLE   0x0fff0080
 
#define NVREG_TX_PAUSEFRAME_ENABLE_V1   0x01800010
 
#define NVREG_TX_PAUSEFRAME_ENABLE_V2   0x056003f0
 
#define NVREG_TX_PAUSEFRAME_ENABLE_V3   0x09f00880
 
#define NVREG_TX_PAUSEFRAMELIMIT_ENABLE   0x00010000
 
#define NVREG_MIISTAT_ERROR   0x0001
 
#define NVREG_MIISTAT_LINKCHANGE   0x0008
 
#define NVREG_MIISTAT_MASK_RW   0x0007
 
#define NVREG_MIISTAT_MASK_ALL   0x000f
 
#define NVREG_MII_LINKCHANGE   0x0008
 
#define NVREG_ADAPTCTL_START   0x02
 
#define NVREG_ADAPTCTL_LINKUP   0x04
 
#define NVREG_ADAPTCTL_PHYVALID   0x40000
 
#define NVREG_ADAPTCTL_RUNNING   0x100000
 
#define NVREG_ADAPTCTL_PHYSHIFT   24
 
#define NVREG_MIISPEED_BIT8   (1<<8)
 
#define NVREG_MIIDELAY   5
 
#define NVREG_MIICTL_INUSE   0x08000
 
#define NVREG_MIICTL_WRITE   0x00400
 
#define NVREG_MIICTL_ADDRSHIFT   5
 
#define NVREG_WAKEUPFLAGS_VAL   0x7770
 
#define NVREG_WAKEUPFLAGS_BUSYSHIFT   24
 
#define NVREG_WAKEUPFLAGS_ENABLESHIFT   16
 
#define NVREG_WAKEUPFLAGS_D3SHIFT   12
 
#define NVREG_WAKEUPFLAGS_D2SHIFT   8
 
#define NVREG_WAKEUPFLAGS_D1SHIFT   4
 
#define NVREG_WAKEUPFLAGS_D0SHIFT   0
 
#define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT   0x01
 
#define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT   0x02
 
#define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE   0x04
 
#define NVREG_WAKEUPFLAGS_ENABLE   0x1111
 
#define NVREG_MGMTUNITGETVERSION   0x01
 
#define NVREG_MGMTUNITVERSION   0x08
 
#define NVREG_POWERCAP_D3SUPP   (1<<30)
 
#define NVREG_POWERCAP_D2SUPP   (1<<26)
 
#define NVREG_POWERCAP_D1SUPP   (1<<25)
 
#define NVREG_POWERSTATE_POWEREDUP   0x8000
 
#define NVREG_POWERSTATE_VALID   0x0100
 
#define NVREG_POWERSTATE_MASK   0x0003
 
#define NVREG_POWERSTATE_D0   0x0000
 
#define NVREG_POWERSTATE_D1   0x0001
 
#define NVREG_POWERSTATE_D2   0x0002
 
#define NVREG_POWERSTATE_D3   0x0003
 
#define NVREG_MGMTUNITCONTROL_INUSE   0x20000
 
#define NVREG_VLANCONTROL_ENABLE   0x2000
 
#define NVREG_POWERSTATE2_POWERUP_MASK   0x0F15
 
#define NVREG_POWERSTATE2_POWERUP_REV_A3   0x0001
 
#define NVREG_POWERSTATE2_PHY_RESET   0x0004
 
#define NVREG_POWERSTATE2_GATE_CLOCKS   0x0F00
 
#define NV_SETUP_RX_RING   0x01
 
#define NV_SETUP_TX_RING   0x02
 
#define NV_RESTART_TX   0x1
 
#define NV_RESTART_RX   0x2
 

Enumerations

enum  {
  NvRegIrqStatus = 0x000, NvRegIrqMask = 0x004, NvRegUnknownSetupReg6 = 0x008, NvRegPollingInterval = 0x00c,
  NvRegMSIMap0 = 0x020, NvRegMSIMap1 = 0x024, NvRegMSIIrqMask = 0x030, NvRegMisc1 = 0x080,
  NvRegMacReset = 0x34, NvRegTransmitterControl = 0x084, NvRegTransmitterStatus = 0x088, NvRegPacketFilterFlags = 0x8c,
  NvRegOffloadConfig = 0x90, NvRegReceiverControl = 0x094, NvRegReceiverStatus = 0x98, NvRegSlotTime = 0x9c,
  NvRegTxDeferral = 0xA0, NvRegRxDeferral = 0xA4, NvRegMacAddrA = 0xA8, NvRegMacAddrB = 0xAC,
  NvRegMulticastAddrA = 0xB0, NvRegMulticastAddrB = 0xB4, NvRegMulticastMaskA = 0xB8, NvRegMulticastMaskB = 0xBC,
  NvRegPhyInterface = 0xC0, NvRegBackOffControl = 0xC4, NvRegTxRingPhysAddr = 0x100, NvRegRxRingPhysAddr = 0x104,
  NvRegRingSizes = 0x108, NvRegTransmitPoll = 0x10c, NvRegLinkSpeed = 0x110, NvRegUnknownSetupReg5 = 0x130,
  NvRegTxWatermark = 0x13c, NvRegTxRxControl = 0x144, NvRegTxRingPhysAddrHigh = 0x148, NvRegRxRingPhysAddrHigh = 0x14C,
  NvRegTxPauseFrame = 0x170, NvRegTxPauseFrameLimit = 0x174, NvRegMIIStatus = 0x180, NvRegMIIMask = 0x184,
  NvRegAdapterControl = 0x188, NvRegMIISpeed = 0x18c, NvRegMIIControl = 0x190, NvRegMIIData = 0x194,
  NvRegTxUnicast = 0x1a0, NvRegTxMulticast = 0x1a4, NvRegTxBroadcast = 0x1a8, NvRegWakeUpFlags = 0x200,
  NvRegMgmtUnitGetVersion = 0x204, NvRegMgmtUnitVersion = 0x208, NvRegPowerCap = 0x268, NvRegPowerState = 0x26c,
  NvRegMgmtUnitControl = 0x278, NvRegTxCnt = 0x280, NvRegTxZeroReXmt = 0x284, NvRegTxOneReXmt = 0x288,
  NvRegTxManyReXmt = 0x28c, NvRegTxLateCol = 0x290, NvRegTxUnderflow = 0x294, NvRegTxLossCarrier = 0x298,
  NvRegTxExcessDef = 0x29c, NvRegTxRetryErr = 0x2a0, NvRegRxFrameErr = 0x2a4, NvRegRxExtraByte = 0x2a8,
  NvRegRxLateCol = 0x2ac, NvRegRxRunt = 0x2b0, NvRegRxFrameTooLong = 0x2b4, NvRegRxOverflow = 0x2b8,
  NvRegRxFCSErr = 0x2bc, NvRegRxFrameAlignErr = 0x2c0, NvRegRxLenErr = 0x2c4, NvRegRxUnicast = 0x2c8,
  NvRegRxMulticast = 0x2cc, NvRegRxBroadcast = 0x2d0, NvRegTxDef = 0x2d4, NvRegTxFrame = 0x2d8,
  NvRegRxCnt = 0x2dc, NvRegTxPause = 0x2e0, NvRegRxPause = 0x2e4, NvRegRxDropFrame = 0x2e8,
  NvRegVlanControl = 0x300, NvRegMSIXMap0 = 0x3e0, NvRegMSIXMap1 = 0x3e4, NvRegMSIXIrqStatus = 0x3f0,
  NvRegPowerState2 = 0x600
}
 
enum  { NV_OPTIMIZATION_MODE_THROUGHPUT, NV_OPTIMIZATION_MODE_CPU, NV_OPTIMIZATION_MODE_DYNAMIC }
 
enum  { NV_CROSSOVER_DETECTION_DISABLED, NV_CROSSOVER_DETECTION_ENABLED }
 

Functions

 FILE_LICENCE (GPL2_OR_LATER)
 

Macro Definition Documentation

◆ _FORCEDETH_H_

#define _FORCEDETH_H_

Definition at line 37 of file forcedeth.h.

◆ DESC_VER_1

#define DESC_VER_1   1

Definition at line 51 of file forcedeth.h.

◆ DESC_VER_2

#define DESC_VER_2   2

Definition at line 52 of file forcedeth.h.

◆ DESC_VER_3

#define DESC_VER_3   3

Definition at line 53 of file forcedeth.h.

◆ RX_RING_SIZE

#define RX_RING_SIZE   16

Definition at line 55 of file forcedeth.h.

◆ TX_RING_SIZE

#define TX_RING_SIZE   32

Definition at line 56 of file forcedeth.h.

◆ RXTX_RING_SIZE

#define RXTX_RING_SIZE   ( ( RX_RING_SIZE ) + ( TX_RING_SIZE ) )

Definition at line 57 of file forcedeth.h.

◆ RX_RING_MIN

#define RX_RING_MIN   128

Definition at line 58 of file forcedeth.h.

◆ TX_RING_MIN

#define TX_RING_MIN   64

Definition at line 59 of file forcedeth.h.

◆ RING_MAX_DESC_VER_1

#define RING_MAX_DESC_VER_1   1024

Definition at line 60 of file forcedeth.h.

◆ RING_MAX_DESC_VER_2_3

#define RING_MAX_DESC_VER_2_3   16384

Definition at line 61 of file forcedeth.h.

◆ NV_RX_ALLOC_PAD

#define NV_RX_ALLOC_PAD   (64)

Definition at line 63 of file forcedeth.h.

◆ NV_RX_HEADERS

#define NV_RX_HEADERS   (64)

Definition at line 65 of file forcedeth.h.

◆ RX_BUF_SZ

#define RX_BUF_SZ   ( ( ETH_FRAME_LEN ) + ( NV_RX_HEADERS ) )

Definition at line 67 of file forcedeth.h.

◆ NV_PKTLIMIT_1

#define NV_PKTLIMIT_1   1500

Definition at line 69 of file forcedeth.h.

◆ NV_PKTLIMIT_2

#define NV_PKTLIMIT_2   9100

Definition at line 70 of file forcedeth.h.

◆ NV_LINK_POLL_FREQUENCY

#define NV_LINK_POLL_FREQUENCY   128

Definition at line 72 of file forcedeth.h.

◆ PHY_OUI_MARVELL

#define PHY_OUI_MARVELL   0x5043

Definition at line 75 of file forcedeth.h.

◆ PHY_OUI_CICADA

#define PHY_OUI_CICADA   0x03f1

Definition at line 76 of file forcedeth.h.

◆ PHY_OUI_VITESSE

#define PHY_OUI_VITESSE   0x01c1

Definition at line 77 of file forcedeth.h.

◆ PHY_OUI_REALTEK

#define PHY_OUI_REALTEK   0x0732

Definition at line 78 of file forcedeth.h.

◆ PHY_OUI_REALTEK2

#define PHY_OUI_REALTEK2   0x0020

Definition at line 79 of file forcedeth.h.

◆ PHYID1_OUI_MASK

#define PHYID1_OUI_MASK   0x03ff

Definition at line 80 of file forcedeth.h.

◆ PHYID1_OUI_SHFT

#define PHYID1_OUI_SHFT   6

Definition at line 81 of file forcedeth.h.

◆ PHYID2_OUI_MASK

#define PHYID2_OUI_MASK   0xfc00

Definition at line 82 of file forcedeth.h.

◆ PHYID2_OUI_SHFT

#define PHYID2_OUI_SHFT   10

Definition at line 83 of file forcedeth.h.

◆ PHYID2_MODEL_MASK

#define PHYID2_MODEL_MASK   0x03f0

Definition at line 84 of file forcedeth.h.

◆ PHY_MODEL_REALTEK_8211

#define PHY_MODEL_REALTEK_8211   0x0110

Definition at line 85 of file forcedeth.h.

◆ PHY_REV_MASK

#define PHY_REV_MASK   0x0001

Definition at line 86 of file forcedeth.h.

◆ PHY_REV_REALTEK_8211B

#define PHY_REV_REALTEK_8211B   0x0000

Definition at line 87 of file forcedeth.h.

◆ PHY_REV_REALTEK_8211C

#define PHY_REV_REALTEK_8211C   0x0001

Definition at line 88 of file forcedeth.h.

◆ PHY_MODEL_REALTEK_8201

#define PHY_MODEL_REALTEK_8201   0x0200

Definition at line 89 of file forcedeth.h.

◆ PHY_MODEL_MARVELL_E3016

#define PHY_MODEL_MARVELL_E3016   0x0220

Definition at line 90 of file forcedeth.h.

◆ PHY_MARVELL_E3016_INITMASK

#define PHY_MARVELL_E3016_INITMASK   0x0300

Definition at line 91 of file forcedeth.h.

◆ PHY_CICADA_INIT1

#define PHY_CICADA_INIT1   0x0f000

Definition at line 92 of file forcedeth.h.

◆ PHY_CICADA_INIT2

#define PHY_CICADA_INIT2   0x0e00

Definition at line 93 of file forcedeth.h.

◆ PHY_CICADA_INIT3

#define PHY_CICADA_INIT3   0x01000

Definition at line 94 of file forcedeth.h.

◆ PHY_CICADA_INIT4

#define PHY_CICADA_INIT4   0x0200

Definition at line 95 of file forcedeth.h.

◆ PHY_CICADA_INIT5

#define PHY_CICADA_INIT5   0x0004

Definition at line 96 of file forcedeth.h.

◆ PHY_CICADA_INIT6

#define PHY_CICADA_INIT6   0x02000

Definition at line 97 of file forcedeth.h.

◆ PHY_VITESSE_INIT_REG1

#define PHY_VITESSE_INIT_REG1   0x1f

Definition at line 98 of file forcedeth.h.

◆ PHY_VITESSE_INIT_REG2

#define PHY_VITESSE_INIT_REG2   0x10

Definition at line 99 of file forcedeth.h.

◆ PHY_VITESSE_INIT_REG3

#define PHY_VITESSE_INIT_REG3   0x11

Definition at line 100 of file forcedeth.h.

◆ PHY_VITESSE_INIT_REG4

#define PHY_VITESSE_INIT_REG4   0x12

Definition at line 101 of file forcedeth.h.

◆ PHY_VITESSE_INIT_MSK1

#define PHY_VITESSE_INIT_MSK1   0xc

Definition at line 102 of file forcedeth.h.

◆ PHY_VITESSE_INIT_MSK2

#define PHY_VITESSE_INIT_MSK2   0x0180

Definition at line 103 of file forcedeth.h.

◆ PHY_VITESSE_INIT1

#define PHY_VITESSE_INIT1   0x52b5

Definition at line 104 of file forcedeth.h.

◆ PHY_VITESSE_INIT2

#define PHY_VITESSE_INIT2   0xaf8a

Definition at line 105 of file forcedeth.h.

◆ PHY_VITESSE_INIT3

#define PHY_VITESSE_INIT3   0x8

Definition at line 106 of file forcedeth.h.

◆ PHY_VITESSE_INIT4

#define PHY_VITESSE_INIT4   0x8f8a

Definition at line 107 of file forcedeth.h.

◆ PHY_VITESSE_INIT5

#define PHY_VITESSE_INIT5   0xaf86

Definition at line 108 of file forcedeth.h.

◆ PHY_VITESSE_INIT6

#define PHY_VITESSE_INIT6   0x8f86

Definition at line 109 of file forcedeth.h.

◆ PHY_VITESSE_INIT7

#define PHY_VITESSE_INIT7   0xaf82

Definition at line 110 of file forcedeth.h.

◆ PHY_VITESSE_INIT8

#define PHY_VITESSE_INIT8   0x0100

Definition at line 111 of file forcedeth.h.

◆ PHY_VITESSE_INIT9

#define PHY_VITESSE_INIT9   0x8f82

Definition at line 112 of file forcedeth.h.

◆ PHY_VITESSE_INIT10

#define PHY_VITESSE_INIT10   0x0

Definition at line 113 of file forcedeth.h.

◆ PHY_REALTEK_INIT_REG1

#define PHY_REALTEK_INIT_REG1   0x1f

Definition at line 114 of file forcedeth.h.

◆ PHY_REALTEK_INIT_REG2

#define PHY_REALTEK_INIT_REG2   0x19

Definition at line 115 of file forcedeth.h.

◆ PHY_REALTEK_INIT_REG3

#define PHY_REALTEK_INIT_REG3   0x13

Definition at line 116 of file forcedeth.h.

◆ PHY_REALTEK_INIT_REG4

#define PHY_REALTEK_INIT_REG4   0x14

Definition at line 117 of file forcedeth.h.

◆ PHY_REALTEK_INIT_REG5

#define PHY_REALTEK_INIT_REG5   0x18

Definition at line 118 of file forcedeth.h.

◆ PHY_REALTEK_INIT_REG6

#define PHY_REALTEK_INIT_REG6   0x11

Definition at line 119 of file forcedeth.h.

◆ PHY_REALTEK_INIT_REG7

#define PHY_REALTEK_INIT_REG7   0x01

Definition at line 120 of file forcedeth.h.

◆ PHY_REALTEK_INIT1

#define PHY_REALTEK_INIT1   0x0000

Definition at line 121 of file forcedeth.h.

◆ PHY_REALTEK_INIT2

#define PHY_REALTEK_INIT2   0x8e00

Definition at line 122 of file forcedeth.h.

◆ PHY_REALTEK_INIT3

#define PHY_REALTEK_INIT3   0x0001

Definition at line 123 of file forcedeth.h.

◆ PHY_REALTEK_INIT4

#define PHY_REALTEK_INIT4   0xad17

Definition at line 124 of file forcedeth.h.

◆ PHY_REALTEK_INIT5

#define PHY_REALTEK_INIT5   0xfb54

Definition at line 125 of file forcedeth.h.

◆ PHY_REALTEK_INIT6

#define PHY_REALTEK_INIT6   0xf5c7

Definition at line 126 of file forcedeth.h.

◆ PHY_REALTEK_INIT7

#define PHY_REALTEK_INIT7   0x1000

Definition at line 127 of file forcedeth.h.

◆ PHY_REALTEK_INIT8

#define PHY_REALTEK_INIT8   0x0003

Definition at line 128 of file forcedeth.h.

◆ PHY_REALTEK_INIT9

#define PHY_REALTEK_INIT9   0x0008

Definition at line 129 of file forcedeth.h.

◆ PHY_REALTEK_INIT10

#define PHY_REALTEK_INIT10   0x0005

Definition at line 130 of file forcedeth.h.

◆ PHY_REALTEK_INIT11

#define PHY_REALTEK_INIT11   0x0200

Definition at line 131 of file forcedeth.h.

◆ PHY_REALTEK_INIT_MSK1

#define PHY_REALTEK_INIT_MSK1   0x0003

Definition at line 132 of file forcedeth.h.

◆ PHY_GIGABIT

#define PHY_GIGABIT   0x0100

Definition at line 134 of file forcedeth.h.

◆ PHY_TIMEOUT

#define PHY_TIMEOUT   0x1

Definition at line 136 of file forcedeth.h.

◆ PHY_ERROR

#define PHY_ERROR   0x2

Definition at line 137 of file forcedeth.h.

◆ PHY_100

#define PHY_100   0x1

Definition at line 139 of file forcedeth.h.

◆ PHY_1000

#define PHY_1000   0x2

Definition at line 140 of file forcedeth.h.

◆ PHY_HALF

#define PHY_HALF   0x100

Definition at line 141 of file forcedeth.h.

◆ NV_PAUSEFRAME_RX_CAPABLE

#define NV_PAUSEFRAME_RX_CAPABLE   0x0001

Definition at line 144 of file forcedeth.h.

◆ NV_PAUSEFRAME_TX_CAPABLE

#define NV_PAUSEFRAME_TX_CAPABLE   0x0002

Definition at line 145 of file forcedeth.h.

◆ NV_PAUSEFRAME_RX_ENABLE

#define NV_PAUSEFRAME_RX_ENABLE   0x0004

Definition at line 146 of file forcedeth.h.

◆ NV_PAUSEFRAME_TX_ENABLE

#define NV_PAUSEFRAME_TX_ENABLE   0x0008

Definition at line 147 of file forcedeth.h.

◆ NV_PAUSEFRAME_RX_REQ

#define NV_PAUSEFRAME_RX_REQ   0x0010

Definition at line 148 of file forcedeth.h.

◆ NV_PAUSEFRAME_TX_REQ

#define NV_PAUSEFRAME_TX_REQ   0x0020

Definition at line 149 of file forcedeth.h.

◆ NV_PAUSEFRAME_AUTONEG

#define NV_PAUSEFRAME_AUTONEG   0x0040

Definition at line 150 of file forcedeth.h.

◆ NV_MSI_X_MAX_VECTORS

#define NV_MSI_X_MAX_VECTORS   8

Definition at line 153 of file forcedeth.h.

◆ NV_MSI_X_VECTORS_MASK

#define NV_MSI_X_VECTORS_MASK   0x000f

Definition at line 154 of file forcedeth.h.

◆ NV_MSI_CAPABLE

#define NV_MSI_CAPABLE   0x0010

Definition at line 155 of file forcedeth.h.

◆ NV_MSI_X_CAPABLE [1/2]

#define NV_MSI_X_CAPABLE   0x0020

Definition at line 294 of file forcedeth.h.

◆ NV_MSI_ENABLED

#define NV_MSI_ENABLED   0x0040

Definition at line 157 of file forcedeth.h.

◆ NV_MSI_X_ENABLED

#define NV_MSI_X_ENABLED   0x0080

Definition at line 158 of file forcedeth.h.

◆ NV_MSI_X_VECTOR_ALL

#define NV_MSI_X_VECTOR_ALL   0x0

Definition at line 160 of file forcedeth.h.

◆ NV_MSI_X_VECTOR_RX

#define NV_MSI_X_VECTOR_RX   0x0

Definition at line 161 of file forcedeth.h.

◆ NV_MSI_X_VECTOR_TX

#define NV_MSI_X_VECTOR_TX   0x1

Definition at line 162 of file forcedeth.h.

◆ NV_MSI_X_VECTOR_OTHER

#define NV_MSI_X_VECTOR_OTHER   0x2

Definition at line 163 of file forcedeth.h.

◆ NV_MSI_PRIV_OFFSET

#define NV_MSI_PRIV_OFFSET   0x68

Definition at line 165 of file forcedeth.h.

◆ NV_MSI_PRIV_VALUE

#define NV_MSI_PRIV_VALUE   0xffffffff

Definition at line 166 of file forcedeth.h.

◆ NV_MIIBUSY_DELAY [1/2]

#define NV_MIIBUSY_DELAY   50

Definition at line 289 of file forcedeth.h.

◆ NV_MIIPHY_DELAY [1/2]

#define NV_MIIPHY_DELAY   10

Definition at line 290 of file forcedeth.h.

◆ NV_MIIPHY_DELAYMAX [1/2]

#define NV_MIIPHY_DELAYMAX   10000

Definition at line 291 of file forcedeth.h.

◆ DEV_NEED_TIMERIRQ

#define DEV_NEED_TIMERIRQ   0x0000001 /* set the timer irq flag in the irq mask */

Definition at line 174 of file forcedeth.h.

◆ DEV_NEED_LINKTIMER

#define DEV_NEED_LINKTIMER   0x0000002 /* poll link settings. Relies on the timer irq */

Definition at line 175 of file forcedeth.h.

◆ DEV_HAS_LARGEDESC

#define DEV_HAS_LARGEDESC   0x0000004 /* device supports jumbo frames and needs packet format 2 */

Definition at line 176 of file forcedeth.h.

◆ DEV_HAS_HIGH_DMA

#define DEV_HAS_HIGH_DMA   0x0000008 /* device supports 64bit dma */

Definition at line 177 of file forcedeth.h.

◆ DEV_HAS_CHECKSUM

#define DEV_HAS_CHECKSUM   0x0000010 /* device supports tx and rx checksum offloads */

Definition at line 178 of file forcedeth.h.

◆ DEV_HAS_VLAN

#define DEV_HAS_VLAN   0x0000020 /* device supports vlan tagging and striping */

Definition at line 179 of file forcedeth.h.

◆ DEV_HAS_MSI

#define DEV_HAS_MSI   0x0000040 /* device supports MSI */

Definition at line 180 of file forcedeth.h.

◆ DEV_HAS_MSI_X

#define DEV_HAS_MSI_X   0x0000080 /* device supports MSI-X */

Definition at line 181 of file forcedeth.h.

◆ DEV_HAS_POWER_CNTRL

#define DEV_HAS_POWER_CNTRL   0x0000100 /* device supports power savings */

Definition at line 182 of file forcedeth.h.

◆ DEV_HAS_STATISTICS_V1

#define DEV_HAS_STATISTICS_V1   0x0000200 /* device supports hw statistics version 1 */

Definition at line 183 of file forcedeth.h.

◆ DEV_HAS_STATISTICS_V2

#define DEV_HAS_STATISTICS_V2   0x0000600 /* device supports hw statistics version 2 */

Definition at line 184 of file forcedeth.h.

◆ DEV_HAS_STATISTICS_V3

#define DEV_HAS_STATISTICS_V3   0x0000e00 /* device supports hw statistics version 3 */

Definition at line 185 of file forcedeth.h.

◆ DEV_HAS_TEST_EXTENDED

#define DEV_HAS_TEST_EXTENDED   0x0001000 /* device supports extended diagnostic test */

Definition at line 186 of file forcedeth.h.

◆ DEV_HAS_MGMT_UNIT

#define DEV_HAS_MGMT_UNIT   0x0002000 /* device supports management unit */

Definition at line 187 of file forcedeth.h.

◆ DEV_HAS_CORRECT_MACADDR

#define DEV_HAS_CORRECT_MACADDR   0x0004000 /* device supports correct mac address order */

Definition at line 188 of file forcedeth.h.

◆ DEV_HAS_COLLISION_FIX

#define DEV_HAS_COLLISION_FIX   0x0008000 /* device supports tx collision fix */

Definition at line 189 of file forcedeth.h.

◆ DEV_HAS_PAUSEFRAME_TX_V1

#define DEV_HAS_PAUSEFRAME_TX_V1   0x0010000 /* device supports tx pause frames version 1 */

Definition at line 190 of file forcedeth.h.

◆ DEV_HAS_PAUSEFRAME_TX_V2

#define DEV_HAS_PAUSEFRAME_TX_V2   0x0020000 /* device supports tx pause frames version 2 */

Definition at line 191 of file forcedeth.h.

◆ DEV_HAS_PAUSEFRAME_TX_V3

#define DEV_HAS_PAUSEFRAME_TX_V3   0x0040000 /* device supports tx pause frames version 3 */

Definition at line 192 of file forcedeth.h.

◆ DEV_NEED_TX_LIMIT

#define DEV_NEED_TX_LIMIT   0x0080000 /* device needs to limit tx */

Definition at line 193 of file forcedeth.h.

◆ DEV_NEED_TX_LIMIT2

#define DEV_NEED_TX_LIMIT2   0x0180000 /* device needs to limit tx, expect for some revs */

Definition at line 194 of file forcedeth.h.

◆ DEV_HAS_GEAR_MODE

#define DEV_HAS_GEAR_MODE   0x0200000 /* device supports gear mode */

Definition at line 195 of file forcedeth.h.

◆ DEV_NEED_PHY_INIT_FIX

#define DEV_NEED_PHY_INIT_FIX   0x0400000 /* device needs specific phy workaround */

Definition at line 196 of file forcedeth.h.

◆ DEV_NEED_LOW_POWER_FIX

#define DEV_NEED_LOW_POWER_FIX   0x0800000 /* device needs special power up workaround */

Definition at line 197 of file forcedeth.h.

◆ DEV_NEED_MSI_FIX

#define DEV_NEED_MSI_FIX   0x1000000 /* device needs msi workaround */

Definition at line 198 of file forcedeth.h.

◆ FLAG_MASK_V1

#define FLAG_MASK_V1   0xffff0000

Definition at line 200 of file forcedeth.h.

◆ FLAG_MASK_V2

#define FLAG_MASK_V2   0xffffc000

Definition at line 201 of file forcedeth.h.

◆ LEN_MASK_V1

#define LEN_MASK_V1   (0xffffffff ^ FLAG_MASK_V1)

Definition at line 202 of file forcedeth.h.

◆ LEN_MASK_V2

#define LEN_MASK_V2   (0xffffffff ^ FLAG_MASK_V2)

Definition at line 203 of file forcedeth.h.

◆ NV_TX_LASTPACKET

#define NV_TX_LASTPACKET   (1<<16)

Definition at line 205 of file forcedeth.h.

◆ NV_TX_RETRYERROR

#define NV_TX_RETRYERROR   (1<<19)

Definition at line 206 of file forcedeth.h.

◆ NV_TX_RETRYCOUNT_MASK

#define NV_TX_RETRYCOUNT_MASK   (0xF<<20)

Definition at line 207 of file forcedeth.h.

◆ NV_TX_FORCED_INTERRUPT

#define NV_TX_FORCED_INTERRUPT   (1<<24)

Definition at line 208 of file forcedeth.h.

◆ NV_TX_DEFERRED

#define NV_TX_DEFERRED   (1<<26)

Definition at line 209 of file forcedeth.h.

◆ NV_TX_CARRIERLOST

#define NV_TX_CARRIERLOST   (1<<27)

Definition at line 210 of file forcedeth.h.

◆ NV_TX_LATECOLLISION

#define NV_TX_LATECOLLISION   (1<<28)

Definition at line 211 of file forcedeth.h.

◆ NV_TX_UNDERFLOW

#define NV_TX_UNDERFLOW   (1<<29)

Definition at line 212 of file forcedeth.h.

◆ NV_TX_ERROR

#define NV_TX_ERROR   (1<<30)

Definition at line 213 of file forcedeth.h.

◆ NV_TX_VALID

#define NV_TX_VALID   (1<<31)

Definition at line 214 of file forcedeth.h.

◆ NV_TX2_LASTPACKET

#define NV_TX2_LASTPACKET   (1<<29)

Definition at line 216 of file forcedeth.h.

◆ NV_TX2_RETRYERROR

#define NV_TX2_RETRYERROR   (1<<18)

Definition at line 217 of file forcedeth.h.

◆ NV_TX2_RETRYCOUNT_MASK

#define NV_TX2_RETRYCOUNT_MASK   (0xF<<19)

Definition at line 218 of file forcedeth.h.

◆ NV_TX2_FORCED_INTERRUPT

#define NV_TX2_FORCED_INTERRUPT   (1<<30)

Definition at line 219 of file forcedeth.h.

◆ NV_TX2_DEFERRED

#define NV_TX2_DEFERRED   (1<<25)

Definition at line 220 of file forcedeth.h.

◆ NV_TX2_CARRIERLOST

#define NV_TX2_CARRIERLOST   (1<<26)

Definition at line 221 of file forcedeth.h.

◆ NV_TX2_LATECOLLISION

#define NV_TX2_LATECOLLISION   (1<<27)

Definition at line 222 of file forcedeth.h.

◆ NV_TX2_UNDERFLOW

#define NV_TX2_UNDERFLOW   (1<<28)

Definition at line 223 of file forcedeth.h.

◆ NV_TX2_ERROR

#define NV_TX2_ERROR   (1<<30)

Definition at line 225 of file forcedeth.h.

◆ NV_TX2_VALID

#define NV_TX2_VALID   (1<<31)

Definition at line 226 of file forcedeth.h.

◆ NV_TX2_TSO

#define NV_TX2_TSO   (1<<28)

Definition at line 227 of file forcedeth.h.

◆ NV_TX2_TSO_SHIFT

#define NV_TX2_TSO_SHIFT   14

Definition at line 228 of file forcedeth.h.

◆ NV_TX2_TSO_MAX_SHIFT

#define NV_TX2_TSO_MAX_SHIFT   14

Definition at line 229 of file forcedeth.h.

◆ NV_TX2_TSO_MAX_SIZE

#define NV_TX2_TSO_MAX_SIZE   (1<<NV_TX2_TSO_MAX_SHIFT)

Definition at line 230 of file forcedeth.h.

◆ NV_TX2_CHECKSUM_L3

#define NV_TX2_CHECKSUM_L3   (1<<27)

Definition at line 231 of file forcedeth.h.

◆ NV_TX2_CHECKSUM_L4

#define NV_TX2_CHECKSUM_L4   (1<<26)

Definition at line 232 of file forcedeth.h.

◆ NV_TX3_VLAN_TAG_PRESENT

#define NV_TX3_VLAN_TAG_PRESENT   (1<<18)

Definition at line 234 of file forcedeth.h.

◆ NV_RX_DESCRIPTORVALID

#define NV_RX_DESCRIPTORVALID   (1<<16)

Definition at line 236 of file forcedeth.h.

◆ NV_RX_MISSEDFRAME

#define NV_RX_MISSEDFRAME   (1<<17)

Definition at line 237 of file forcedeth.h.

◆ NV_RX_SUBSTRACT1

#define NV_RX_SUBSTRACT1   (1<<18)

Definition at line 238 of file forcedeth.h.

◆ NV_RX_ERROR1

#define NV_RX_ERROR1   (1<<23)

Definition at line 239 of file forcedeth.h.

◆ NV_RX_ERROR2

#define NV_RX_ERROR2   (1<<24)

Definition at line 240 of file forcedeth.h.

◆ NV_RX_ERROR3

#define NV_RX_ERROR3   (1<<25)

Definition at line 241 of file forcedeth.h.

◆ NV_RX_ERROR4

#define NV_RX_ERROR4   (1<<26)

Definition at line 242 of file forcedeth.h.

◆ NV_RX_CRCERR

#define NV_RX_CRCERR   (1<<27)

Definition at line 243 of file forcedeth.h.

◆ NV_RX_OVERFLOW

#define NV_RX_OVERFLOW   (1<<28)

Definition at line 244 of file forcedeth.h.

◆ NV_RX_FRAMINGERR

#define NV_RX_FRAMINGERR   (1<<29)

Definition at line 245 of file forcedeth.h.

◆ NV_RX_ERROR

#define NV_RX_ERROR   (1<<30)

Definition at line 246 of file forcedeth.h.

◆ NV_RX_AVAIL

#define NV_RX_AVAIL   (1<<31)

Definition at line 247 of file forcedeth.h.

◆ NV_RX_ERROR_MASK

#define NV_RX_ERROR_MASK   (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3|NV_RX_ERROR4|NV_RX_CRCERR|NV_RX_OVERFLOW|NV_RX_FRAMINGERR)

Definition at line 248 of file forcedeth.h.

◆ NV_RX2_CHECKSUMMASK

#define NV_RX2_CHECKSUMMASK   (0x1C000000)

Definition at line 250 of file forcedeth.h.

◆ NV_RX2_CHECKSUM_IP

#define NV_RX2_CHECKSUM_IP   (0x10000000)

Definition at line 251 of file forcedeth.h.

◆ NV_RX2_CHECKSUM_IP_TCP

#define NV_RX2_CHECKSUM_IP_TCP   (0x14000000)

Definition at line 252 of file forcedeth.h.

◆ NV_RX2_CHECKSUM_IP_UDP

#define NV_RX2_CHECKSUM_IP_UDP   (0x18000000)

Definition at line 253 of file forcedeth.h.

◆ NV_RX2_DESCRIPTORVALID

#define NV_RX2_DESCRIPTORVALID   (1<<29)

Definition at line 254 of file forcedeth.h.

◆ NV_RX2_SUBSTRACT1

#define NV_RX2_SUBSTRACT1   (1<<25)

Definition at line 255 of file forcedeth.h.

◆ NV_RX2_ERROR1

#define NV_RX2_ERROR1   (1<<18)

Definition at line 256 of file forcedeth.h.

◆ NV_RX2_ERROR2

#define NV_RX2_ERROR2   (1<<19)

Definition at line 257 of file forcedeth.h.

◆ NV_RX2_ERROR3

#define NV_RX2_ERROR3   (1<<20)

Definition at line 258 of file forcedeth.h.

◆ NV_RX2_ERROR4

#define NV_RX2_ERROR4   (1<<21)

Definition at line 259 of file forcedeth.h.

◆ NV_RX2_CRCERR

#define NV_RX2_CRCERR   (1<<22)

Definition at line 260 of file forcedeth.h.

◆ NV_RX2_OVERFLOW

#define NV_RX2_OVERFLOW   (1<<23)

Definition at line 261 of file forcedeth.h.

◆ NV_RX2_FRAMINGERR

#define NV_RX2_FRAMINGERR   (1<<24)

Definition at line 262 of file forcedeth.h.

◆ NV_RX2_ERROR

#define NV_RX2_ERROR   (1<<30)

Definition at line 264 of file forcedeth.h.

◆ NV_RX2_AVAIL

#define NV_RX2_AVAIL   (1<<31)

Definition at line 265 of file forcedeth.h.

◆ NV_RX2_ERROR_MASK

#define NV_RX2_ERROR_MASK   (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3|NV_RX2_ERROR4|NV_RX2_CRCERR|NV_RX2_OVERFLOW|NV_RX2_FRAMINGERR)

Definition at line 266 of file forcedeth.h.

◆ NV_RX3_VLAN_TAG_PRESENT

#define NV_RX3_VLAN_TAG_PRESENT   (1<<16)

Definition at line 268 of file forcedeth.h.

◆ NV_RX3_VLAN_TAG_MASK

#define NV_RX3_VLAN_TAG_MASK   (0x0000FFFF)

Definition at line 269 of file forcedeth.h.

◆ NV_PCI_REGSZ_VER1

#define NV_PCI_REGSZ_VER1   0x270

Definition at line 272 of file forcedeth.h.

◆ NV_PCI_REGSZ_VER2

#define NV_PCI_REGSZ_VER2   0x2d4

Definition at line 273 of file forcedeth.h.

◆ NV_PCI_REGSZ_VER3

#define NV_PCI_REGSZ_VER3   0x604

Definition at line 274 of file forcedeth.h.

◆ NV_PCI_REGSZ_MAX

#define NV_PCI_REGSZ_MAX   0x604

Definition at line 275 of file forcedeth.h.

◆ NV_TXRX_RESET_DELAY

#define NV_TXRX_RESET_DELAY   4

Definition at line 278 of file forcedeth.h.

◆ NV_TXSTOP_DELAY1

#define NV_TXSTOP_DELAY1   10

Definition at line 279 of file forcedeth.h.

◆ NV_TXSTOP_DELAY1MAX

#define NV_TXSTOP_DELAY1MAX   500000

Definition at line 280 of file forcedeth.h.

◆ NV_TXSTOP_DELAY2

#define NV_TXSTOP_DELAY2   100

Definition at line 281 of file forcedeth.h.

◆ NV_RXSTOP_DELAY1

#define NV_RXSTOP_DELAY1   10

Definition at line 282 of file forcedeth.h.

◆ NV_RXSTOP_DELAY1MAX

#define NV_RXSTOP_DELAY1MAX   500000

Definition at line 283 of file forcedeth.h.

◆ NV_RXSTOP_DELAY2

#define NV_RXSTOP_DELAY2   100

Definition at line 284 of file forcedeth.h.

◆ NV_SETUP5_DELAY

#define NV_SETUP5_DELAY   5

Definition at line 285 of file forcedeth.h.

◆ NV_SETUP5_DELAYMAX

#define NV_SETUP5_DELAYMAX   50000

Definition at line 286 of file forcedeth.h.

◆ NV_POWERUP_DELAY

#define NV_POWERUP_DELAY   5

Definition at line 287 of file forcedeth.h.

◆ NV_POWERUP_DELAYMAX

#define NV_POWERUP_DELAYMAX   5000

Definition at line 288 of file forcedeth.h.

◆ NV_MIIBUSY_DELAY [2/2]

#define NV_MIIBUSY_DELAY   50

Definition at line 289 of file forcedeth.h.

◆ NV_MIIPHY_DELAY [2/2]

#define NV_MIIPHY_DELAY   10

Definition at line 290 of file forcedeth.h.

◆ NV_MIIPHY_DELAYMAX [2/2]

#define NV_MIIPHY_DELAYMAX   10000

Definition at line 291 of file forcedeth.h.

◆ NV_MAC_RESET_DELAY

#define NV_MAC_RESET_DELAY   64

Definition at line 292 of file forcedeth.h.

◆ NV_MSI_X_CAPABLE [2/2]

#define NV_MSI_X_CAPABLE   0x0020

Definition at line 294 of file forcedeth.h.

◆ MII_READ

#define MII_READ   (-1)

Definition at line 296 of file forcedeth.h.

◆ NVREG_IRQSTAT_MIIEVENT

#define NVREG_IRQSTAT_MIIEVENT   0x040

Definition at line 337 of file forcedeth.h.

◆ NVREG_IRQSTAT_MASK

#define NVREG_IRQSTAT_MASK   0x83ff

Definition at line 338 of file forcedeth.h.

◆ NVREG_IRQ_RX_ERROR

#define NVREG_IRQ_RX_ERROR   0x0001

Definition at line 340 of file forcedeth.h.

◆ NVREG_IRQ_RX

#define NVREG_IRQ_RX   0x0002

Definition at line 341 of file forcedeth.h.

◆ NVREG_IRQ_RX_NOBUF

#define NVREG_IRQ_RX_NOBUF   0x0004

Definition at line 342 of file forcedeth.h.

◆ NVREG_IRQ_TX_ERR

#define NVREG_IRQ_TX_ERR   0x0008

Definition at line 343 of file forcedeth.h.

◆ NVREG_IRQ_TX_OK

#define NVREG_IRQ_TX_OK   0x0010

Definition at line 344 of file forcedeth.h.

◆ NVREG_IRQ_TIMER

#define NVREG_IRQ_TIMER   0x0020

Definition at line 345 of file forcedeth.h.

◆ NVREG_IRQ_LINK

#define NVREG_IRQ_LINK   0x0040

Definition at line 346 of file forcedeth.h.

◆ NVREG_IRQ_RX_FORCED

#define NVREG_IRQ_RX_FORCED   0x0080

Definition at line 347 of file forcedeth.h.

◆ NVREG_IRQ_TX_FORCED

#define NVREG_IRQ_TX_FORCED   0x0100

Definition at line 348 of file forcedeth.h.

◆ NVREG_IRQ_RECOVER_ERROR

#define NVREG_IRQ_RECOVER_ERROR   0x8200

Definition at line 349 of file forcedeth.h.

◆ NVREG_IRQMASK_THROUGHPUT

#define NVREG_IRQMASK_THROUGHPUT   0x00df

Definition at line 350 of file forcedeth.h.

◆ NVREG_IRQMASK_CPU

#define NVREG_IRQMASK_CPU   0x0060

Definition at line 351 of file forcedeth.h.

◆ NVREG_IRQ_TX_ALL

#define NVREG_IRQ_TX_ALL   (NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)

Definition at line 352 of file forcedeth.h.

◆ NVREG_IRQ_RX_ALL

#define NVREG_IRQ_RX_ALL   (NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED)

Definition at line 353 of file forcedeth.h.

◆ NVREG_IRQ_OTHER

#define NVREG_IRQ_OTHER   (NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RECOVER_ERROR)

Definition at line 354 of file forcedeth.h.

◆ NVREG_UNKSETUP6_VAL

#define NVREG_UNKSETUP6_VAL   3

Definition at line 357 of file forcedeth.h.

◆ NVREG_POLL_DEFAULT_THROUGHPUT

#define NVREG_POLL_DEFAULT_THROUGHPUT   65535 /* backup tx cleanup if loop max reached */

Definition at line 364 of file forcedeth.h.

◆ NVREG_POLL_DEFAULT_CPU

#define NVREG_POLL_DEFAULT_CPU   13

Definition at line 365 of file forcedeth.h.

◆ NVREG_MSI_VECTOR_0_ENABLED

#define NVREG_MSI_VECTOR_0_ENABLED   0x01

Definition at line 369 of file forcedeth.h.

◆ NVREG_MISC1_PAUSE_TX

#define NVREG_MISC1_PAUSE_TX   0x01

Definition at line 371 of file forcedeth.h.

◆ NVREG_MISC1_HD

#define NVREG_MISC1_HD   0x02

Definition at line 372 of file forcedeth.h.

◆ NVREG_MISC1_FORCE

#define NVREG_MISC1_FORCE   0x3b0f3c

Definition at line 373 of file forcedeth.h.

◆ NVREG_MAC_RESET_ASSERT

#define NVREG_MAC_RESET_ASSERT   0x0F3

Definition at line 376 of file forcedeth.h.

◆ NVREG_XMITCTL_START

#define NVREG_XMITCTL_START   0x01

Definition at line 378 of file forcedeth.h.

◆ NVREG_XMITCTL_MGMT_ST

#define NVREG_XMITCTL_MGMT_ST   0x40000000

Definition at line 379 of file forcedeth.h.

◆ NVREG_XMITCTL_SYNC_MASK

#define NVREG_XMITCTL_SYNC_MASK   0x000f0000

Definition at line 380 of file forcedeth.h.

◆ NVREG_XMITCTL_SYNC_NOT_READY

#define NVREG_XMITCTL_SYNC_NOT_READY   0x0

Definition at line 381 of file forcedeth.h.

◆ NVREG_XMITCTL_SYNC_PHY_INIT

#define NVREG_XMITCTL_SYNC_PHY_INIT   0x00040000

Definition at line 382 of file forcedeth.h.

◆ NVREG_XMITCTL_MGMT_SEMA_MASK

#define NVREG_XMITCTL_MGMT_SEMA_MASK   0x00000f00

Definition at line 383 of file forcedeth.h.

◆ NVREG_XMITCTL_MGMT_SEMA_FREE

#define NVREG_XMITCTL_MGMT_SEMA_FREE   0x0

Definition at line 384 of file forcedeth.h.

◆ NVREG_XMITCTL_HOST_SEMA_MASK

#define NVREG_XMITCTL_HOST_SEMA_MASK   0x0000f000

Definition at line 385 of file forcedeth.h.

◆ NVREG_XMITCTL_HOST_SEMA_ACQ

#define NVREG_XMITCTL_HOST_SEMA_ACQ   0x0000f000

Definition at line 386 of file forcedeth.h.

◆ NVREG_XMITCTL_HOST_LOADED

#define NVREG_XMITCTL_HOST_LOADED   0x00004000

Definition at line 387 of file forcedeth.h.

◆ NVREG_XMITCTL_TX_PATH_EN

#define NVREG_XMITCTL_TX_PATH_EN   0x01000000

Definition at line 388 of file forcedeth.h.

◆ NVREG_XMITCTL_DATA_START

#define NVREG_XMITCTL_DATA_START   0x00100000

Definition at line 389 of file forcedeth.h.

◆ NVREG_XMITCTL_DATA_READY

#define NVREG_XMITCTL_DATA_READY   0x00010000

Definition at line 390 of file forcedeth.h.

◆ NVREG_XMITCTL_DATA_ERROR

#define NVREG_XMITCTL_DATA_ERROR   0x00020000

Definition at line 391 of file forcedeth.h.

◆ NVREG_XMITSTAT_BUSY

#define NVREG_XMITSTAT_BUSY   0x01

Definition at line 393 of file forcedeth.h.

◆ NVREG_PFF_PAUSE_RX

#define NVREG_PFF_PAUSE_RX   0x08

Definition at line 396 of file forcedeth.h.

◆ NVREG_PFF_ALWAYS

#define NVREG_PFF_ALWAYS   0x7F0000

Definition at line 397 of file forcedeth.h.

◆ NVREG_PFF_PROMISC

#define NVREG_PFF_PROMISC   0x80

Definition at line 398 of file forcedeth.h.

◆ NVREG_PFF_MYADDR

#define NVREG_PFF_MYADDR   0x20

Definition at line 399 of file forcedeth.h.

◆ NVREG_PFF_LOOPBACK

#define NVREG_PFF_LOOPBACK   0x10

Definition at line 400 of file forcedeth.h.

◆ NVREG_OFFLOAD_HOMEPHY

#define NVREG_OFFLOAD_HOMEPHY   0x601

Definition at line 403 of file forcedeth.h.

◆ NVREG_OFFLOAD_NORMAL

#define NVREG_OFFLOAD_NORMAL   RX_NIC_BUFSIZE

Definition at line 404 of file forcedeth.h.

◆ NVREG_RCVCTL_START

#define NVREG_RCVCTL_START   0x01

Definition at line 406 of file forcedeth.h.

◆ NVREG_RCVCTL_RX_PATH_EN

#define NVREG_RCVCTL_RX_PATH_EN   0x01000000

Definition at line 407 of file forcedeth.h.

◆ NVREG_RCVSTAT_BUSY

#define NVREG_RCVSTAT_BUSY   0x01

Definition at line 409 of file forcedeth.h.

◆ NVREG_SLOTTIME_LEGBF_ENABLED

#define NVREG_SLOTTIME_LEGBF_ENABLED   0x80000000

Definition at line 412 of file forcedeth.h.

◆ NVREG_SLOTTIME_10_100_FULL

#define NVREG_SLOTTIME_10_100_FULL   0x00007f00

Definition at line 413 of file forcedeth.h.

◆ NVREG_SLOTTIME_1000_FULL

#define NVREG_SLOTTIME_1000_FULL   0x0003ff00

Definition at line 414 of file forcedeth.h.

◆ NVREG_SLOTTIME_HALF

#define NVREG_SLOTTIME_HALF   0x0000ff00

Definition at line 415 of file forcedeth.h.

◆ NVREG_SLOTTIME_DEFAULT

#define NVREG_SLOTTIME_DEFAULT   0x00007f00

Definition at line 416 of file forcedeth.h.

◆ NVREG_SLOTTIME_MASK

#define NVREG_SLOTTIME_MASK   0x000000ff

Definition at line 417 of file forcedeth.h.

◆ NVREG_TX_DEFERRAL_DEFAULT

#define NVREG_TX_DEFERRAL_DEFAULT   0x15050f

Definition at line 420 of file forcedeth.h.

◆ NVREG_TX_DEFERRAL_RGMII_10_100

#define NVREG_TX_DEFERRAL_RGMII_10_100   0x16070f

Definition at line 421 of file forcedeth.h.

◆ NVREG_TX_DEFERRAL_RGMII_1000

#define NVREG_TX_DEFERRAL_RGMII_1000   0x14050f

Definition at line 422 of file forcedeth.h.

◆ NVREG_TX_DEFERRAL_RGMII_STRETCH_10

#define NVREG_TX_DEFERRAL_RGMII_STRETCH_10   0x16190f

Definition at line 423 of file forcedeth.h.

◆ NVREG_TX_DEFERRAL_RGMII_STRETCH_100

#define NVREG_TX_DEFERRAL_RGMII_STRETCH_100   0x16300f

Definition at line 424 of file forcedeth.h.

◆ NVREG_TX_DEFERRAL_MII_STRETCH

#define NVREG_TX_DEFERRAL_MII_STRETCH   0x152000

Definition at line 425 of file forcedeth.h.

◆ NVREG_RX_DEFERRAL_DEFAULT

#define NVREG_RX_DEFERRAL_DEFAULT   0x16

Definition at line 427 of file forcedeth.h.

◆ NVREG_MCASTADDRA_FORCE

#define NVREG_MCASTADDRA_FORCE   0x01

Definition at line 431 of file forcedeth.h.

◆ NVREG_MCASTMASKA_NONE

#define NVREG_MCASTMASKA_NONE   0xffffffff

Definition at line 434 of file forcedeth.h.

◆ NVREG_MCASTMASKB_NONE

#define NVREG_MCASTMASKB_NONE   0xffff

Definition at line 436 of file forcedeth.h.

◆ PHY_RGMII

#define PHY_RGMII   0x10000000

Definition at line 439 of file forcedeth.h.

◆ NVREG_BKOFFCTRL_DEFAULT

#define NVREG_BKOFFCTRL_DEFAULT   0x70000000

Definition at line 441 of file forcedeth.h.

◆ NVREG_BKOFFCTRL_SEED_MASK

#define NVREG_BKOFFCTRL_SEED_MASK   0x000003ff

Definition at line 442 of file forcedeth.h.

◆ NVREG_BKOFFCTRL_SELECT

#define NVREG_BKOFFCTRL_SELECT   24

Definition at line 443 of file forcedeth.h.

◆ NVREG_BKOFFCTRL_GEAR

#define NVREG_BKOFFCTRL_GEAR   12

Definition at line 444 of file forcedeth.h.

◆ NVREG_RINGSZ_TXSHIFT

#define NVREG_RINGSZ_TXSHIFT   0

Definition at line 449 of file forcedeth.h.

◆ NVREG_RINGSZ_RXSHIFT

#define NVREG_RINGSZ_RXSHIFT   16

Definition at line 450 of file forcedeth.h.

◆ NVREG_TRANSMITPOLL_MAC_ADDR_REV

#define NVREG_TRANSMITPOLL_MAC_ADDR_REV   0x00008000

Definition at line 452 of file forcedeth.h.

◆ NVREG_LINKSPEED_FORCE

#define NVREG_LINKSPEED_FORCE   0x10000

Definition at line 454 of file forcedeth.h.

◆ NVREG_LINKSPEED_10

#define NVREG_LINKSPEED_10   1000

Definition at line 455 of file forcedeth.h.

◆ NVREG_LINKSPEED_100

#define NVREG_LINKSPEED_100   100

Definition at line 456 of file forcedeth.h.

◆ NVREG_LINKSPEED_1000

#define NVREG_LINKSPEED_1000   50

Definition at line 457 of file forcedeth.h.

◆ NVREG_LINKSPEED_MASK

#define NVREG_LINKSPEED_MASK   (0xFFF)

Definition at line 458 of file forcedeth.h.

◆ NVREG_UNKSETUP5_BIT31

#define NVREG_UNKSETUP5_BIT31   (1<<31)

Definition at line 460 of file forcedeth.h.

◆ NVREG_TX_WM_DESC1_DEFAULT

#define NVREG_TX_WM_DESC1_DEFAULT   0x0200010

Definition at line 462 of file forcedeth.h.

◆ NVREG_TX_WM_DESC2_3_DEFAULT

#define NVREG_TX_WM_DESC2_3_DEFAULT   0x1e08000

Definition at line 463 of file forcedeth.h.

◆ NVREG_TX_WM_DESC2_3_1000

#define NVREG_TX_WM_DESC2_3_1000   0xfe08000

Definition at line 464 of file forcedeth.h.

◆ NVREG_TXRXCTL_KICK

#define NVREG_TXRXCTL_KICK   0x0001

Definition at line 466 of file forcedeth.h.

◆ NVREG_TXRXCTL_BIT1

#define NVREG_TXRXCTL_BIT1   0x0002

Definition at line 467 of file forcedeth.h.

◆ NVREG_TXRXCTL_BIT2

#define NVREG_TXRXCTL_BIT2   0x0004

Definition at line 468 of file forcedeth.h.

◆ NVREG_TXRXCTL_IDLE

#define NVREG_TXRXCTL_IDLE   0x0008

Definition at line 469 of file forcedeth.h.

◆ NVREG_TXRXCTL_RESET

#define NVREG_TXRXCTL_RESET   0x0010

Definition at line 470 of file forcedeth.h.

◆ NVREG_TXRXCTL_RXCHECK

#define NVREG_TXRXCTL_RXCHECK   0x0400

Definition at line 471 of file forcedeth.h.

◆ NVREG_TXRXCTL_DESC_1

#define NVREG_TXRXCTL_DESC_1   0

Definition at line 472 of file forcedeth.h.

◆ NVREG_TXRXCTL_DESC_2

#define NVREG_TXRXCTL_DESC_2   0x002100

Definition at line 473 of file forcedeth.h.

◆ NVREG_TXRXCTL_DESC_3

#define NVREG_TXRXCTL_DESC_3   0xc02200

Definition at line 474 of file forcedeth.h.

◆ NVREG_TXRXCTL_VLANSTRIP

#define NVREG_TXRXCTL_VLANSTRIP   0x00040

Definition at line 475 of file forcedeth.h.

◆ NVREG_TXRXCTL_VLANINS

#define NVREG_TXRXCTL_VLANINS   0x00080

Definition at line 476 of file forcedeth.h.

◆ NVREG_TX_PAUSEFRAME_DISABLE

#define NVREG_TX_PAUSEFRAME_DISABLE   0x0fff0080

Definition at line 480 of file forcedeth.h.

◆ NVREG_TX_PAUSEFRAME_ENABLE_V1

#define NVREG_TX_PAUSEFRAME_ENABLE_V1   0x01800010

Definition at line 481 of file forcedeth.h.

◆ NVREG_TX_PAUSEFRAME_ENABLE_V2

#define NVREG_TX_PAUSEFRAME_ENABLE_V2   0x056003f0

Definition at line 482 of file forcedeth.h.

◆ NVREG_TX_PAUSEFRAME_ENABLE_V3

#define NVREG_TX_PAUSEFRAME_ENABLE_V3   0x09f00880

Definition at line 483 of file forcedeth.h.

◆ NVREG_TX_PAUSEFRAMELIMIT_ENABLE

#define NVREG_TX_PAUSEFRAMELIMIT_ENABLE   0x00010000

Definition at line 485 of file forcedeth.h.

◆ NVREG_MIISTAT_ERROR

#define NVREG_MIISTAT_ERROR   0x0001

Definition at line 487 of file forcedeth.h.

◆ NVREG_MIISTAT_LINKCHANGE

#define NVREG_MIISTAT_LINKCHANGE   0x0008

Definition at line 488 of file forcedeth.h.

◆ NVREG_MIISTAT_MASK_RW

#define NVREG_MIISTAT_MASK_RW   0x0007

Definition at line 489 of file forcedeth.h.

◆ NVREG_MIISTAT_MASK_ALL

#define NVREG_MIISTAT_MASK_ALL   0x000f

Definition at line 490 of file forcedeth.h.

◆ NVREG_MII_LINKCHANGE

#define NVREG_MII_LINKCHANGE   0x0008

Definition at line 492 of file forcedeth.h.

◆ NVREG_ADAPTCTL_START

#define NVREG_ADAPTCTL_START   0x02

Definition at line 495 of file forcedeth.h.

◆ NVREG_ADAPTCTL_LINKUP

#define NVREG_ADAPTCTL_LINKUP   0x04

Definition at line 496 of file forcedeth.h.

◆ NVREG_ADAPTCTL_PHYVALID

#define NVREG_ADAPTCTL_PHYVALID   0x40000

Definition at line 497 of file forcedeth.h.

◆ NVREG_ADAPTCTL_RUNNING

#define NVREG_ADAPTCTL_RUNNING   0x100000

Definition at line 498 of file forcedeth.h.

◆ NVREG_ADAPTCTL_PHYSHIFT

#define NVREG_ADAPTCTL_PHYSHIFT   24

Definition at line 499 of file forcedeth.h.

◆ NVREG_MIISPEED_BIT8

#define NVREG_MIISPEED_BIT8   (1<<8)

Definition at line 501 of file forcedeth.h.

◆ NVREG_MIIDELAY

#define NVREG_MIIDELAY   5

Definition at line 502 of file forcedeth.h.

◆ NVREG_MIICTL_INUSE

#define NVREG_MIICTL_INUSE   0x08000

Definition at line 504 of file forcedeth.h.

◆ NVREG_MIICTL_WRITE

#define NVREG_MIICTL_WRITE   0x00400

Definition at line 505 of file forcedeth.h.

◆ NVREG_MIICTL_ADDRSHIFT

#define NVREG_MIICTL_ADDRSHIFT   5

Definition at line 506 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_VAL

#define NVREG_WAKEUPFLAGS_VAL   0x7770

Definition at line 512 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_BUSYSHIFT

#define NVREG_WAKEUPFLAGS_BUSYSHIFT   24

Definition at line 513 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_ENABLESHIFT

#define NVREG_WAKEUPFLAGS_ENABLESHIFT   16

Definition at line 514 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_D3SHIFT

#define NVREG_WAKEUPFLAGS_D3SHIFT   12

Definition at line 515 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_D2SHIFT

#define NVREG_WAKEUPFLAGS_D2SHIFT   8

Definition at line 516 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_D1SHIFT

#define NVREG_WAKEUPFLAGS_D1SHIFT   4

Definition at line 517 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_D0SHIFT

#define NVREG_WAKEUPFLAGS_D0SHIFT   0

Definition at line 518 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT

#define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT   0x01

Definition at line 519 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT

#define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT   0x02

Definition at line 520 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE

#define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE   0x04

Definition at line 521 of file forcedeth.h.

◆ NVREG_WAKEUPFLAGS_ENABLE

#define NVREG_WAKEUPFLAGS_ENABLE   0x1111

Definition at line 522 of file forcedeth.h.

◆ NVREG_MGMTUNITGETVERSION

#define NVREG_MGMTUNITGETVERSION   0x01

Definition at line 525 of file forcedeth.h.

◆ NVREG_MGMTUNITVERSION

#define NVREG_MGMTUNITVERSION   0x08

Definition at line 527 of file forcedeth.h.

◆ NVREG_POWERCAP_D3SUPP

#define NVREG_POWERCAP_D3SUPP   (1<<30)

Definition at line 529 of file forcedeth.h.

◆ NVREG_POWERCAP_D2SUPP

#define NVREG_POWERCAP_D2SUPP   (1<<26)

Definition at line 530 of file forcedeth.h.

◆ NVREG_POWERCAP_D1SUPP

#define NVREG_POWERCAP_D1SUPP   (1<<25)

Definition at line 531 of file forcedeth.h.

◆ NVREG_POWERSTATE_POWEREDUP

#define NVREG_POWERSTATE_POWEREDUP   0x8000

Definition at line 533 of file forcedeth.h.

◆ NVREG_POWERSTATE_VALID

#define NVREG_POWERSTATE_VALID   0x0100

Definition at line 534 of file forcedeth.h.

◆ NVREG_POWERSTATE_MASK

#define NVREG_POWERSTATE_MASK   0x0003

Definition at line 535 of file forcedeth.h.

◆ NVREG_POWERSTATE_D0

#define NVREG_POWERSTATE_D0   0x0000

Definition at line 536 of file forcedeth.h.

◆ NVREG_POWERSTATE_D1

#define NVREG_POWERSTATE_D1   0x0001

Definition at line 537 of file forcedeth.h.

◆ NVREG_POWERSTATE_D2

#define NVREG_POWERSTATE_D2   0x0002

Definition at line 538 of file forcedeth.h.

◆ NVREG_POWERSTATE_D3

#define NVREG_POWERSTATE_D3   0x0003

Definition at line 539 of file forcedeth.h.

◆ NVREG_MGMTUNITCONTROL_INUSE

#define NVREG_MGMTUNITCONTROL_INUSE   0x20000

Definition at line 541 of file forcedeth.h.

◆ NVREG_VLANCONTROL_ENABLE

#define NVREG_VLANCONTROL_ENABLE   0x2000

Definition at line 570 of file forcedeth.h.

◆ NVREG_POWERSTATE2_POWERUP_MASK

#define NVREG_POWERSTATE2_POWERUP_MASK   0x0F15

Definition at line 576 of file forcedeth.h.

◆ NVREG_POWERSTATE2_POWERUP_REV_A3

#define NVREG_POWERSTATE2_POWERUP_REV_A3   0x0001

Definition at line 577 of file forcedeth.h.

◆ NVREG_POWERSTATE2_PHY_RESET

#define NVREG_POWERSTATE2_PHY_RESET   0x0004

Definition at line 578 of file forcedeth.h.

◆ NVREG_POWERSTATE2_GATE_CLOCKS

#define NVREG_POWERSTATE2_GATE_CLOCKS   0x0F00

Definition at line 579 of file forcedeth.h.

◆ NV_SETUP_RX_RING

#define NV_SETUP_RX_RING   0x01

Definition at line 594 of file forcedeth.h.

◆ NV_SETUP_TX_RING

#define NV_SETUP_TX_RING   0x02

Definition at line 595 of file forcedeth.h.

◆ NV_RESTART_TX

#define NV_RESTART_TX   0x1

Definition at line 597 of file forcedeth.h.

◆ NV_RESTART_RX

#define NV_RESTART_RX   0x2

Definition at line 598 of file forcedeth.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
NvRegIrqStatus 
NvRegIrqMask 
NvRegUnknownSetupReg6 
NvRegPollingInterval 
NvRegMSIMap0 
NvRegMSIMap1 
NvRegMSIIrqMask 
NvRegMisc1 
NvRegMacReset 
NvRegTransmitterControl 
NvRegTransmitterStatus 
NvRegPacketFilterFlags 
NvRegOffloadConfig 
NvRegReceiverControl 
NvRegReceiverStatus 
NvRegSlotTime 
NvRegTxDeferral 
NvRegRxDeferral 
NvRegMacAddrA 
NvRegMacAddrB 
NvRegMulticastAddrA 
NvRegMulticastAddrB 
NvRegMulticastMaskA 
NvRegMulticastMaskB 
NvRegPhyInterface 
NvRegBackOffControl 
NvRegTxRingPhysAddr 
NvRegRxRingPhysAddr 
NvRegRingSizes 
NvRegTransmitPoll 
NvRegLinkSpeed 
NvRegUnknownSetupReg5 
NvRegTxWatermark 
NvRegTxRxControl 
NvRegTxRingPhysAddrHigh 
NvRegRxRingPhysAddrHigh 
NvRegTxPauseFrame 
NvRegTxPauseFrameLimit 
NvRegMIIStatus 
NvRegMIIMask 
NvRegAdapterControl 
NvRegMIISpeed 
NvRegMIIControl 
NvRegMIIData 
NvRegTxUnicast 
NvRegTxMulticast 
NvRegTxBroadcast 
NvRegWakeUpFlags 
NvRegMgmtUnitGetVersion 
NvRegMgmtUnitVersion 
NvRegPowerCap 
NvRegPowerState 
NvRegMgmtUnitControl 
NvRegTxCnt 
NvRegTxZeroReXmt 
NvRegTxOneReXmt 
NvRegTxManyReXmt 
NvRegTxLateCol 
NvRegTxUnderflow 
NvRegTxLossCarrier 
NvRegTxExcessDef 
NvRegTxRetryErr 
NvRegRxFrameErr 
NvRegRxExtraByte 
NvRegRxLateCol 
NvRegRxRunt 
NvRegRxFrameTooLong 
NvRegRxOverflow 
NvRegRxFCSErr 
NvRegRxFrameAlignErr 
NvRegRxLenErr 
NvRegRxUnicast 
NvRegRxMulticast 
NvRegRxBroadcast 
NvRegTxDef 
NvRegTxFrame 
NvRegRxCnt 
NvRegTxPause 
NvRegRxPause 
NvRegRxDropFrame 
NvRegVlanControl 
NvRegMSIXMap0 
NvRegMSIXMap1 
NvRegMSIXIrqStatus 
NvRegPowerState2 

Definition at line 335 of file forcedeth.h.

335  {
336  NvRegIrqStatus = 0x000,
337 #define NVREG_IRQSTAT_MIIEVENT 0x040
338 #define NVREG_IRQSTAT_MASK 0x83ff
339  NvRegIrqMask = 0x004,
340 #define NVREG_IRQ_RX_ERROR 0x0001
341 #define NVREG_IRQ_RX 0x0002
342 #define NVREG_IRQ_RX_NOBUF 0x0004
343 #define NVREG_IRQ_TX_ERR 0x0008
344 #define NVREG_IRQ_TX_OK 0x0010
345 #define NVREG_IRQ_TIMER 0x0020
346 #define NVREG_IRQ_LINK 0x0040
347 #define NVREG_IRQ_RX_FORCED 0x0080
348 #define NVREG_IRQ_TX_FORCED 0x0100
349 #define NVREG_IRQ_RECOVER_ERROR 0x8200
350 #define NVREG_IRQMASK_THROUGHPUT 0x00df
351 #define NVREG_IRQMASK_CPU 0x0060
352 #define NVREG_IRQ_TX_ALL (NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
353 #define NVREG_IRQ_RX_ALL (NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED)
354 #define NVREG_IRQ_OTHER (NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RECOVER_ERROR)
355 
356  NvRegUnknownSetupReg6 = 0x008,
357 #define NVREG_UNKSETUP6_VAL 3
358 
359 /*
360  * NVREG_POLL_DEFAULT is the interval length of the timer source on the nic
361  * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms
362  */
363  NvRegPollingInterval = 0x00c,
364 #define NVREG_POLL_DEFAULT_THROUGHPUT 65535 /* backup tx cleanup if loop max reached */
365 #define NVREG_POLL_DEFAULT_CPU 13
366  NvRegMSIMap0 = 0x020,
367  NvRegMSIMap1 = 0x024,
368  NvRegMSIIrqMask = 0x030,
369 #define NVREG_MSI_VECTOR_0_ENABLED 0x01
370  NvRegMisc1 = 0x080,
371 #define NVREG_MISC1_PAUSE_TX 0x01
372 #define NVREG_MISC1_HD 0x02
373 #define NVREG_MISC1_FORCE 0x3b0f3c
374 
375  NvRegMacReset = 0x34,
376 #define NVREG_MAC_RESET_ASSERT 0x0F3
377  NvRegTransmitterControl = 0x084,
378 #define NVREG_XMITCTL_START 0x01
379 #define NVREG_XMITCTL_MGMT_ST 0x40000000
380 #define NVREG_XMITCTL_SYNC_MASK 0x000f0000
381 #define NVREG_XMITCTL_SYNC_NOT_READY 0x0
382 #define NVREG_XMITCTL_SYNC_PHY_INIT 0x00040000
383 #define NVREG_XMITCTL_MGMT_SEMA_MASK 0x00000f00
384 #define NVREG_XMITCTL_MGMT_SEMA_FREE 0x0
385 #define NVREG_XMITCTL_HOST_SEMA_MASK 0x0000f000
386 #define NVREG_XMITCTL_HOST_SEMA_ACQ 0x0000f000
387 #define NVREG_XMITCTL_HOST_LOADED 0x00004000
388 #define NVREG_XMITCTL_TX_PATH_EN 0x01000000
389 #define NVREG_XMITCTL_DATA_START 0x00100000
390 #define NVREG_XMITCTL_DATA_READY 0x00010000
391 #define NVREG_XMITCTL_DATA_ERROR 0x00020000
392  NvRegTransmitterStatus = 0x088,
393 #define NVREG_XMITSTAT_BUSY 0x01
394 
395  NvRegPacketFilterFlags = 0x8c,
396 #define NVREG_PFF_PAUSE_RX 0x08
397 #define NVREG_PFF_ALWAYS 0x7F0000
398 #define NVREG_PFF_PROMISC 0x80
399 #define NVREG_PFF_MYADDR 0x20
400 #define NVREG_PFF_LOOPBACK 0x10
401 
402  NvRegOffloadConfig = 0x90,
403 #define NVREG_OFFLOAD_HOMEPHY 0x601
404 #define NVREG_OFFLOAD_NORMAL RX_NIC_BUFSIZE
405  NvRegReceiverControl = 0x094,
406 #define NVREG_RCVCTL_START 0x01
407 #define NVREG_RCVCTL_RX_PATH_EN 0x01000000
408  NvRegReceiverStatus = 0x98,
409 #define NVREG_RCVSTAT_BUSY 0x01
410 
411  NvRegSlotTime = 0x9c,
412 #define NVREG_SLOTTIME_LEGBF_ENABLED 0x80000000
413 #define NVREG_SLOTTIME_10_100_FULL 0x00007f00
414 #define NVREG_SLOTTIME_1000_FULL 0x0003ff00
415 #define NVREG_SLOTTIME_HALF 0x0000ff00
416 #define NVREG_SLOTTIME_DEFAULT 0x00007f00
417 #define NVREG_SLOTTIME_MASK 0x000000ff
418 
419  NvRegTxDeferral = 0xA0,
420 #define NVREG_TX_DEFERRAL_DEFAULT 0x15050f
421 #define NVREG_TX_DEFERRAL_RGMII_10_100 0x16070f
422 #define NVREG_TX_DEFERRAL_RGMII_1000 0x14050f
423 #define NVREG_TX_DEFERRAL_RGMII_STRETCH_10 0x16190f
424 #define NVREG_TX_DEFERRAL_RGMII_STRETCH_100 0x16300f
425 #define NVREG_TX_DEFERRAL_MII_STRETCH 0x152000
426  NvRegRxDeferral = 0xA4,
427 #define NVREG_RX_DEFERRAL_DEFAULT 0x16
428  NvRegMacAddrA = 0xA8,
429  NvRegMacAddrB = 0xAC,
430  NvRegMulticastAddrA = 0xB0,
431 #define NVREG_MCASTADDRA_FORCE 0x01
432  NvRegMulticastAddrB = 0xB4,
433  NvRegMulticastMaskA = 0xB8,
434 #define NVREG_MCASTMASKA_NONE 0xffffffff
435  NvRegMulticastMaskB = 0xBC,
436 #define NVREG_MCASTMASKB_NONE 0xffff
437 
438  NvRegPhyInterface = 0xC0,
439 #define PHY_RGMII 0x10000000
440  NvRegBackOffControl = 0xC4,
441 #define NVREG_BKOFFCTRL_DEFAULT 0x70000000
442 #define NVREG_BKOFFCTRL_SEED_MASK 0x000003ff
443 #define NVREG_BKOFFCTRL_SELECT 24
444 #define NVREG_BKOFFCTRL_GEAR 12
445 
446  NvRegTxRingPhysAddr = 0x100,
447  NvRegRxRingPhysAddr = 0x104,
448  NvRegRingSizes = 0x108,
449 #define NVREG_RINGSZ_TXSHIFT 0
450 #define NVREG_RINGSZ_RXSHIFT 16
451  NvRegTransmitPoll = 0x10c,
452 #define NVREG_TRANSMITPOLL_MAC_ADDR_REV 0x00008000
453  NvRegLinkSpeed = 0x110,
454 #define NVREG_LINKSPEED_FORCE 0x10000
455 #define NVREG_LINKSPEED_10 1000
456 #define NVREG_LINKSPEED_100 100
457 #define NVREG_LINKSPEED_1000 50
458 #define NVREG_LINKSPEED_MASK (0xFFF)
459  NvRegUnknownSetupReg5 = 0x130,
460 #define NVREG_UNKSETUP5_BIT31 (1<<31)
461  NvRegTxWatermark = 0x13c,
462 #define NVREG_TX_WM_DESC1_DEFAULT 0x0200010
463 #define NVREG_TX_WM_DESC2_3_DEFAULT 0x1e08000
464 #define NVREG_TX_WM_DESC2_3_1000 0xfe08000
465  NvRegTxRxControl = 0x144,
466 #define NVREG_TXRXCTL_KICK 0x0001
467 #define NVREG_TXRXCTL_BIT1 0x0002
468 #define NVREG_TXRXCTL_BIT2 0x0004
469 #define NVREG_TXRXCTL_IDLE 0x0008
470 #define NVREG_TXRXCTL_RESET 0x0010
471 #define NVREG_TXRXCTL_RXCHECK 0x0400
472 #define NVREG_TXRXCTL_DESC_1 0
473 #define NVREG_TXRXCTL_DESC_2 0x002100
474 #define NVREG_TXRXCTL_DESC_3 0xc02200
475 #define NVREG_TXRXCTL_VLANSTRIP 0x00040
476 #define NVREG_TXRXCTL_VLANINS 0x00080
477  NvRegTxRingPhysAddrHigh = 0x148,
478  NvRegRxRingPhysAddrHigh = 0x14C,
479  NvRegTxPauseFrame = 0x170,
480 #define NVREG_TX_PAUSEFRAME_DISABLE 0x0fff0080
481 #define NVREG_TX_PAUSEFRAME_ENABLE_V1 0x01800010
482 #define NVREG_TX_PAUSEFRAME_ENABLE_V2 0x056003f0
483 #define NVREG_TX_PAUSEFRAME_ENABLE_V3 0x09f00880
484  NvRegTxPauseFrameLimit = 0x174,
485 #define NVREG_TX_PAUSEFRAMELIMIT_ENABLE 0x00010000
486  NvRegMIIStatus = 0x180,
487 #define NVREG_MIISTAT_ERROR 0x0001
488 #define NVREG_MIISTAT_LINKCHANGE 0x0008
489 #define NVREG_MIISTAT_MASK_RW 0x0007
490 #define NVREG_MIISTAT_MASK_ALL 0x000f
491  NvRegMIIMask = 0x184,
492 #define NVREG_MII_LINKCHANGE 0x0008
493 
494  NvRegAdapterControl = 0x188,
495 #define NVREG_ADAPTCTL_START 0x02
496 #define NVREG_ADAPTCTL_LINKUP 0x04
497 #define NVREG_ADAPTCTL_PHYVALID 0x40000
498 #define NVREG_ADAPTCTL_RUNNING 0x100000
499 #define NVREG_ADAPTCTL_PHYSHIFT 24
500  NvRegMIISpeed = 0x18c,
501 #define NVREG_MIISPEED_BIT8 (1<<8)
502 #define NVREG_MIIDELAY 5
503  NvRegMIIControl = 0x190,
504 #define NVREG_MIICTL_INUSE 0x08000
505 #define NVREG_MIICTL_WRITE 0x00400
506 #define NVREG_MIICTL_ADDRSHIFT 5
507  NvRegMIIData = 0x194,
508  NvRegTxUnicast = 0x1a0,
509  NvRegTxMulticast = 0x1a4,
510  NvRegTxBroadcast = 0x1a8,
511  NvRegWakeUpFlags = 0x200,
512 #define NVREG_WAKEUPFLAGS_VAL 0x7770
513 #define NVREG_WAKEUPFLAGS_BUSYSHIFT 24
514 #define NVREG_WAKEUPFLAGS_ENABLESHIFT 16
515 #define NVREG_WAKEUPFLAGS_D3SHIFT 12
516 #define NVREG_WAKEUPFLAGS_D2SHIFT 8
517 #define NVREG_WAKEUPFLAGS_D1SHIFT 4
518 #define NVREG_WAKEUPFLAGS_D0SHIFT 0
519 #define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT 0x01
520 #define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT 0x02
521 #define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE 0x04
522 #define NVREG_WAKEUPFLAGS_ENABLE 0x1111
523 
524  NvRegMgmtUnitGetVersion = 0x204,
525 #define NVREG_MGMTUNITGETVERSION 0x01
526  NvRegMgmtUnitVersion = 0x208,
527 #define NVREG_MGMTUNITVERSION 0x08
528  NvRegPowerCap = 0x268,
529 #define NVREG_POWERCAP_D3SUPP (1<<30)
530 #define NVREG_POWERCAP_D2SUPP (1<<26)
531 #define NVREG_POWERCAP_D1SUPP (1<<25)
532  NvRegPowerState = 0x26c,
533 #define NVREG_POWERSTATE_POWEREDUP 0x8000
534 #define NVREG_POWERSTATE_VALID 0x0100
535 #define NVREG_POWERSTATE_MASK 0x0003
536 #define NVREG_POWERSTATE_D0 0x0000
537 #define NVREG_POWERSTATE_D1 0x0001
538 #define NVREG_POWERSTATE_D2 0x0002
539 #define NVREG_POWERSTATE_D3 0x0003
540  NvRegMgmtUnitControl = 0x278,
541 #define NVREG_MGMTUNITCONTROL_INUSE 0x20000
542  NvRegTxCnt = 0x280,
543  NvRegTxZeroReXmt = 0x284,
544  NvRegTxOneReXmt = 0x288,
545  NvRegTxManyReXmt = 0x28c,
546  NvRegTxLateCol = 0x290,
547  NvRegTxUnderflow = 0x294,
548  NvRegTxLossCarrier = 0x298,
549  NvRegTxExcessDef = 0x29c,
550  NvRegTxRetryErr = 0x2a0,
551  NvRegRxFrameErr = 0x2a4,
552  NvRegRxExtraByte = 0x2a8,
553  NvRegRxLateCol = 0x2ac,
554  NvRegRxRunt = 0x2b0,
555  NvRegRxFrameTooLong = 0x2b4,
556  NvRegRxOverflow = 0x2b8,
557  NvRegRxFCSErr = 0x2bc,
558  NvRegRxFrameAlignErr = 0x2c0,
559  NvRegRxLenErr = 0x2c4,
560  NvRegRxUnicast = 0x2c8,
561  NvRegRxMulticast = 0x2cc,
562  NvRegRxBroadcast = 0x2d0,
563  NvRegTxDef = 0x2d4,
564  NvRegTxFrame = 0x2d8,
565  NvRegRxCnt = 0x2dc,
566  NvRegTxPause = 0x2e0,
567  NvRegRxPause = 0x2e4,
568  NvRegRxDropFrame = 0x2e8,
569  NvRegVlanControl = 0x300,
570 #define NVREG_VLANCONTROL_ENABLE 0x2000
571  NvRegMSIXMap0 = 0x3e0,
572  NvRegMSIXMap1 = 0x3e4,
573  NvRegMSIXIrqStatus = 0x3f0,
574 
575  NvRegPowerState2 = 0x600,
576 #define NVREG_POWERSTATE2_POWERUP_MASK 0x0F15
577 #define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001
578 #define NVREG_POWERSTATE2_PHY_RESET 0x0004
579 #define NVREG_POWERSTATE2_GATE_CLOCKS 0x0F00
580 };

◆ anonymous enum

anonymous enum
Enumerator
NV_OPTIMIZATION_MODE_THROUGHPUT 
NV_OPTIMIZATION_MODE_CPU 
NV_OPTIMIZATION_MODE_DYNAMIC 

Definition at line 582 of file forcedeth.h.

582  {
583  NV_OPTIMIZATION_MODE_THROUGHPUT,
584  NV_OPTIMIZATION_MODE_CPU,
585  NV_OPTIMIZATION_MODE_DYNAMIC
586 };

◆ anonymous enum

anonymous enum
Enumerator
NV_CROSSOVER_DETECTION_DISABLED 
NV_CROSSOVER_DETECTION_ENABLED 

Definition at line 588 of file forcedeth.h.

588  {
589  NV_CROSSOVER_DETECTION_DISABLED,
590  NV_CROSSOVER_DETECTION_ENABLED
591 };

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER  )
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