iPXE
w89c840.c File Reference
#include "etherboot.h"
#include "nic.h"
#include <ipxe/pci.h>
#include <ipxe/ethernet.h>

Go to the source code of this file.

Data Structures

struct  w840_rx_desc
struct  w840_tx_desc
struct  winbond_private
struct  w89c840_bss

Macros

#define USE_IO_OPS
#define virt_to_le32desc(addr)
#define le32desc_to_virt(addr)
#define TX_RING_SIZE   2
#define RX_RING_SIZE   2
#define TX_FIFO_SIZE   (2048)
#define TX_BUG_FIFO_LIMIT   (TX_FIFO_SIZE-1514-16)
#define TX_TIMEOUT   (10*1000)
#define PKT_BUF_SZ   1536 /* Size of each temporary Rx buffer.*/
#define W840_FLAGS   (PCI_USES_IO | PCI_ADDR0 | PCI_USES_MASTER)
#define readb   inb
#define readw   inw
#define readl   inl
#define writeb   outb
#define writew   outw
#define writel   outl
#define PRIV_ALIGN   15 /* Required alignment mask */
#define PRIV_ALIGN_BYTES   32
#define w89c840_buf   NIC_FAKE_BSS ( struct w89c840_bss )
#define PCI_VENDOR_ID_WINBOND2   0x1050
#define PCI_DEVICE_ID_WINBOND2_89C840   0x0840
#define PCI_VENDOR_ID_COMPEX   0x11f6
#define PCI_DEVICE_ID_COMPEX_RL100ATX   0x2011
#define eeprom_delay(ee_addr)
#define mdio_delay(mdio_addr)
#define MDIO_WRITE0   (MDIO_EnbOutput)
#define MDIO_WRITE1   (MDIO_DataOut | MDIO_EnbOutput)

Enumerations

enum  chip_capability_flags { CanHaveMII =1 , HasBrokenTx =2 }
enum  w840_offsets {
  PCIBusCfg =0x00 , TxStartDemand =0x04 , RxStartDemand =0x08 , RxRingPtr =0x0C ,
  TxRingPtr =0x10 , IntrStatus =0x14 , NetworkConfig =0x18 , IntrEnable =0x1C ,
  RxMissed =0x20 , EECtrl =0x24 , MIICtrl =0x24 , BootRom =0x28 ,
  GPTimer =0x2C , CurRxDescAddr =0x30 , CurRxBufAddr =0x34 , MulticastFilter0 =0x38 ,
  MulticastFilter1 =0x3C , StationAddr =0x40 , CurTxDescAddr =0x4C , CurTxBufAddr =0x50
}
enum  intr_status_bits {
  NormalIntr =0x10000 , AbnormalIntr =0x8000 , IntrPCIErr =0x2000 , TimerInt =0x800 ,
  IntrRxDied =0x100 , RxNoBuf =0x80 , IntrRxDone =0x40 , TxFIFOUnderflow =0x20 ,
  RxErrIntr =0x10 , TxIdle =0x04 , IntrTxStopped =0x02 , IntrTxDone =0x01
}
enum  rx_mode_bits {
  AcceptErr =0x80 , AcceptRunt =0x40 , AcceptBroadcast =0x20 , AcceptMulticast =0x10 ,
  AcceptAllPhys =0x08 , AcceptMyPhys =0x02
}
enum  mii_reg_bits {
  MDIO_ShiftClk =0x10000 , MDIO_DataIn =0x80000 , MDIO_DataOut =0x20000 , MDIO_EnbOutput =0x40000 ,
  MDIO_EnbIn = 0x00000
}
enum  desc_status_bits {
  DescOwn =0x80000000 , DescEndRing =0x02000000 , DescUseLink =0x01000000 , DescWholePkt =0x60000000 ,
  DescStartPkt =0x20000000 , DescEndPkt =0x40000000 , DescIntr =0x80000000
}
enum  EEPROM_Ctrl_Bits {
  EE_ShiftClk =0x02 , EE_Write0 =0x801 , EE_Write1 =0x805 , EE_ChipSelect =0x801 ,
  EE_DataIn =0x08
}
enum  EEPROM_Cmds { EE_WriteCmd =(5 << 6) , EE_ReadCmd =(6 << 6) , EE_EraseCmd =(7 << 6) }

Functions

 FILE_LICENCE (GPL2_OR_LATER)
static int eeprom_read (long ioaddr, int location)
static int mdio_read (int base_address, int phy_id, int location)
static void check_duplex (void)
static void set_rx_mode (void)
static void init_ring (void)
static void w89c840_reset (struct nic *nic)
static int w89c840_poll (struct nic *nic, int retrieve)
static void w89c840_transmit (struct nic *nic, const char *d, unsigned int t, unsigned int s, const char *p)
static void w89c840_disable (struct nic *nic, void *hwdev __unused)
static void w89c840_irq (struct nic *nic __unused, irq_action_t action __unused)
 PCI_DRIVER (w89c840_driver, w89c840_nics, PCI_NO_CLASS)
static int w89c840_probe (struct nic *nic, struct pci_device *p)
static void mdio_sync (long mdio_addr)
 DRIVER ("W89C840F", nic_driver, pci_driver, w89c840_driver, w89c840_probe, w89c840_disable, w89c840_buf)

Variables

static const char * w89c840_version = "driver Version 0.94 - December 12, 2003"
static u32 driver_flags = CanHaveMII | HasBrokenTx
static struct winbond_private w840private
static int ioaddr
static unsigned short eeprom [0x40]
static struct nic_operations w89c840_operations
static struct pci_device_id w89c840_nics []
static char mii_preamble_required = 1

Macro Definition Documentation

◆ USE_IO_OPS

#define USE_IO_OPS

Definition at line 81 of file w89c840.c.

◆ virt_to_le32desc

#define virt_to_le32desc ( addr)
Value:
uint32_t addr
Buffer address.
Definition dwmac.h:9
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition io.h:184

Definition at line 91 of file w89c840.c.

Referenced by init_ring(), and w89c840_transmit().

◆ le32desc_to_virt

#define le32desc_to_virt ( addr)
Value:
static __always_inline void * bus_to_virt(unsigned long bus_addr)
Convert bus address to a virtual address.
Definition io.h:196

Definition at line 92 of file w89c840.c.

◆ TX_RING_SIZE

#define TX_RING_SIZE   2

Definition at line 106 of file w89c840.c.

◆ RX_RING_SIZE

#define RX_RING_SIZE   2

Definition at line 107 of file w89c840.c.

◆ TX_FIFO_SIZE

#define TX_FIFO_SIZE   (2048)

Definition at line 113 of file w89c840.c.

◆ TX_BUG_FIFO_LIMIT

#define TX_BUG_FIFO_LIMIT   (TX_FIFO_SIZE-1514-16)

Definition at line 114 of file w89c840.c.

Referenced by w89c840_transmit().

◆ TX_TIMEOUT

#define TX_TIMEOUT   (10*1000)

Definition at line 118 of file w89c840.c.

◆ PKT_BUF_SZ

#define PKT_BUF_SZ   1536 /* Size of each temporary Rx buffer.*/

Definition at line 120 of file w89c840.c.

◆ W840_FLAGS

#define W840_FLAGS   (PCI_USES_IO | PCI_ADDR0 | PCI_USES_MASTER)

Definition at line 137 of file w89c840.c.

◆ readb

◆ readw

◆ readl

#define readl   inl

Definition at line 157 of file w89c840.c.

Referenced by __er32(), _efx_readl(), amd8111e_disable_interrupt(), amd8111e_enable_interrupt(), amd8111e_force_interrupt(), amd8111e_init_hw_default(), amd8111e_poll(), amd8111e_poll_link(), amd8111e_read_phy(), amd8111e_start(), amd8111e_transmit(), amd8111e_wait_link(), arbel_cmd(), arbel_cmd_wait(), ath5k_hw_reg_read(), ath9k_ioread32(), ath9k_reg_rmw(), bflush(), bnxt_er_get_reg_val(), bnxt_er_reg_read(), br32(), cgem_mii_read(), cgem_mii_wait(), cgem_probe(), cmdif_rev(), dwgpio_config(), dwgpio_dump(), dwgpio_in(), dwgpio_out(), dwgpio_probe(), dwmac_check_link(), dwmac_dump_dma(), dwmac_dump_mac(), dwmac_poll(), dwmac_probe(), dwmac_reset(), dwusb_probe(), ecam_read(), eeprom_read(), ehci_async_del(), ehci_bus_poll(), ehci_dump(), ehci_init(), ehci_reset(), ehci_root_disable(), ehci_root_enable(), ehci_root_open(), ehci_root_poll(), ehci_root_speed(), ehci_run(), ehci_stop(), ena_reset_wait(), exanic_check_link(), exanic_i2c_read_bit(), exanic_i2c_write_bit(), exanic_probe(), exanic_probe_port(), forcedeth_link_status(), forcedeth_open(), forcedeth_poll(), fw_rev_maj(), fw_rev_min(), fw_rev_sub(), golan_cmd_init(), gve_admin_wait(), gve_reset(), gve_watchdog(), hermon_cmd(), hermon_cmd_wait(), hvm_map_shared_info(), ice_dump_rx(), ice_dump_tx(), ice_probe(), icplus_init_phy(), icplus_poll(), icplus_reset(), intel_check_link(), intel_create_ring(), intel_diag(), intel_disable_ring(), intel_fetch_mac(), intel_init_eeprom(), intel_open(), intel_poll(), intel_read_eeprom(), intel_reset(), intelvf_mbox_msg(), intelvf_mbox_poll(), intelvf_mbox_read(), intelx_check_link(), intelx_close(), intelx_open(), intelx_poll(), intelx_reset(), intelx_try_fetch_mac(), intelxl_context_dump(), intelxl_context_line(), intelxl_disable_ring(), intelxl_enable_ring(), intelxl_probe(), intelxlvf_reset_wait_active(), intelxlvf_reset_wait_teardown(), intelxvf_check_link(), intelxvf_open(), intelxvf_poll(), intelxvf_stats(), jread32(), jwrite32f(), mdio_read(), mii_rw(), mlx_pci_mem_read_priv(), myson_poll(), myson_probe(), myson_reload_config(), myson_soft_reset(), myson_wait_idle(), natsemi_check_link(), natsemi_pmatch(), natsemi_poll(), natsemi_reload_config(), natsemi_reset(), natsemi_soft_reset(), natsemi_spi_read_bit(), natsemi_spi_write_bit(), nv_mac_reset(), nv_mgmt_acquire_sema(), nv_mgmt_get_version(), nv_mgmt_release_sema(), nv_setup_mac_addr(), nv_setup_phy(), nv_start_rx(), nv_start_tx(), nv_stop_rx(), nv_stop_tx(), nv_txrx_gate(), nv_update_linkspeed(), nv_update_pause(), pci_msix_control(), pci_msix_dump(), pci_push(), phantom_crb_access_128m(), phantom_crb_access_2m(), phantom_crb_access_32m(), phantom_readl(), phy_init(), PROVIDE_IOAPI_INLINE(), realtek_init_eeprom(), realtek_mii_read(), realtek_mii_write(), realtek_open(), realtek_poll_tx(), reg_delay(), skge_read32(), sky2_read32(), tg3_get_invariants(), tg3_read32_mbox_5906(), vmxnet3_check_version(), vmxnet3_command(), vpm_ioread32(), w89c840_poll(), X86_READX(), xenstore_recv(), xenstore_send(), xhci_abort(), xhci_command_free(), xhci_dump(), xhci_dump_port(), xhci_extended_capability(), xhci_init(), xhci_legacy_claim(), xhci_port_protocol(), xhci_port_psiv(), xhci_port_slot_type(), xhci_port_speed(), xhci_port_status(), xhci_reset(), xhci_root_disable(), xhci_root_enable(), xhci_root_open(), xhci_root_speed(), xhci_run(), xhci_stop(), and xhci_supported_protocol().

◆ writeb

◆ writew

◆ writel

#define writel   outl

Definition at line 160 of file w89c840.c.

Referenced by __ew32(), __vxge_hw_pio_mem_write32_lower(), __vxge_hw_pio_mem_write32_upper(), _efx_writel(), amd8111e_disable_interrupt(), amd8111e_enable_interrupt(), amd8111e_force_interrupt(), amd8111e_init_hw_default(), amd8111e_poll(), amd8111e_read_phy(), amd8111e_start(), amd8111e_transmit(), arbel_cmd(), arbel_poll_eq(), arbel_reset(), arbel_ring_doorbell(), ath5k_hw_reg_write(), ath9k_iowrite32(), ath9k_reg_rmw(), bios_mp_ipi(), bnxt_db_cq(), bnxt_db_nq(), bnxt_db_rx(), bnxt_db_tx(), bnxt_er_reg_read(), bnxt_er_reg_write(), bnxt_rst_reg_val(), bw32(), cgem_create_ring(), cgem_destroy_ring(), cgem_mii_read(), cgem_mii_write(), cgem_open(), cgem_reset(), cgem_transmit(), dwgpio_config(), dwgpio_out(), dwgpio_remove(), dwmac_create_ring(), dwmac_destroy_ring(), dwmac_dump_dma(), dwmac_open(), dwmac_refill_rx(), dwmac_reset(), dwmac_transmit(), dwusb_probe(), ecam_write(), eeprom_read(), ehci_async_del(), ehci_bus_open(), ehci_bus_poll(), ehci_reset(), ehci_root_close(), ehci_root_disable(), ehci_root_enable(), ehci_root_open(), ehci_root_poll(), ehci_root_speed(), ehci_run(), ehci_stop(), ena_admin(), ena_clear_caps(), ena_refill_rx(), ena_reset(), ena_set_base(), ena_set_caps(), ena_transmit(), exanic_clear_base(), exanic_close(), exanic_expired(), exanic_i2c_write_bit(), exanic_open(), exanic_probe(), exanic_reset(), exanic_transmit(), exanic_write_base(), forcedeth_link_status(), forcedeth_open(), forcedeth_poll(), forcedeth_probe(), forcedeth_transmit(), golan_cmd_init(), golan_eq_update_ci(), gve_admin(), gve_admin_enable(), gve_configure(), gve_create_queue(), gve_poll(), gve_refill_rx(), gve_reset(), gve_transmit(), gve_watchdog(), hermon_cmd(), hermon_poll_eq(), hermon_post_send(), hermon_reset(), hwrm_write_req(), ice_context_rx(), ice_dump_tx(), ice_probe(), icplus_open(), icplus_reset(), icplus_set_base(), if(), intel_close(), intel_create_ring(), intel_disable_ring(), intel_init_eeprom(), intel_irq(), intel_open(), intel_read_eeprom(), intel_refill_rx(), intel_reset(), intel_reset_ring(), intel_transmit(), intelvf_mbox_msg(), intelvf_mbox_poll(), intelvf_mbox_write(), intelx_close(), intelx_irq(), intelx_open(), intelx_reset(), intelxl_admin_command(), intelxl_alloc_ring(), intelxl_close(), intelxl_context_dump(), intelxl_context_line(), intelxl_disable_admin(), intelxl_disable_ring(), intelxl_enable_admin(), intelxl_enable_ring(), intelxl_open(), intelxl_poll(), intelxl_probe(), intelxl_refill_admin(), intelxl_refill_rx(), intelxl_transmit(), intelxvf_irq(), intelxvf_open(), intelxvf_reset(), jwrite32(), jwrite32f(), linda_writel(), mdio_read(), mdio_sync(), mii_rw(), mlx_pci_mem_write_priv(), myson_close(), myson_create_ring(), myson_destroy_ring(), myson_irq(), myson_open(), myson_poll(), myson_refill_rx(), myson_reload_config(), myson_reset(), myson_soft_reset(), myson_transmit(), natsemi_check_link(), natsemi_close(), natsemi_create_ring(), natsemi_destroy_ring(), natsemi_irq(), natsemi_open(), natsemi_pmatch(), natsemi_refill_rx(), natsemi_reload_config(), natsemi_reset(), natsemi_soft_reset(), natsemi_spi_write_bit(), natsemi_transmit(), nv_disable_hw_interrupts(), nv_enable_hw_interrupts(), nv_init_rings(), nv_mac_reset(), nv_mgmt_acquire_sema(), nv_mgmt_get_version(), nv_mgmt_release_sema(), nv_setup_phy(), nv_start_rx(), nv_start_tx(), nv_stop_rx(), nv_stop_tx(), nv_txrx_gate(), nv_txrx_reset(), nv_update_linkspeed(), nv_update_pause(), pci_msix_control(), pci_msix_map(), phantom_crb_access_128m(), phantom_crb_access_2m(), phantom_crb_access_32m(), phantom_writel(), phy_init(), PROVIDE_IOAPI_INLINE(), qib7322_writel(), realtek_create_buffer(), realtek_create_ring(), realtek_destroy_buffer(), realtek_destroy_ring(), realtek_mii_read(), realtek_mii_write(), realtek_open(), realtek_transmit(), rhine_create_ring(), rhine_destroy_ring(), send_command(), set_rx_mode(), skge_write32(), sky2_write32(), tg3_get_invariants(), tg3_write32_mbox_5906(), velocity_alloc_rings(), velocity_close(), vmxnet3_check_version(), vmxnet3_command(), vmxnet3_open(), vmxnet3_poll_events(), vmxnet3_refill_rx(), vmxnet3_set_ll_addr(), vmxnet3_transmit(), vpm_iowrite32(), w89c840_disable(), w89c840_probe(), w89c840_reset(), w89c840_transmit(), X86_WRITEX(), xengrant_zero(), xenstore_recv(), xenstore_send(), xhci_doorbell(), xhci_event_alloc(), xhci_event_free(), xhci_legacy_claim(), xhci_port_status(), xhci_reset(), xhci_root_disable(), xhci_root_enable(), xhci_root_open(), xhci_root_speed(), xhci_run(), xhci_stop(), and xhci_writeq().

◆ PRIV_ALIGN

#define PRIV_ALIGN   15 /* Required alignment mask */

Definition at line 221 of file w89c840.c.

◆ PRIV_ALIGN_BYTES

#define PRIV_ALIGN_BYTES   32

Definition at line 222 of file w89c840.c.

◆ w89c840_buf

#define w89c840_buf   NIC_FAKE_BSS ( struct w89c840_bss )

Definition at line 261 of file w89c840.c.

Referenced by DRIVER(), init_ring(), and w89c840_transmit().

◆ PCI_VENDOR_ID_WINBOND2

#define PCI_VENDOR_ID_WINBOND2   0x1050

Referenced by w89c840_probe().

◆ PCI_DEVICE_ID_WINBOND2_89C840

#define PCI_DEVICE_ID_WINBOND2_89C840   0x0840

Referenced by w89c840_probe().

◆ PCI_VENDOR_ID_COMPEX

#define PCI_VENDOR_ID_COMPEX   0x11f6

Referenced by w89c840_probe().

◆ PCI_DEVICE_ID_COMPEX_RL100ATX

#define PCI_DEVICE_ID_COMPEX_RL100ATX   0x2011

Referenced by w89c840_probe().

◆ eeprom_delay

#define eeprom_delay ( ee_addr)
Value:
readl(ee_addr)
#define readl
Definition w89c840.c:157

Definition at line 735 of file w89c840.c.

Referenced by eeprom_read().

◆ mdio_delay

#define mdio_delay ( mdio_addr)
Value:
readl(mdio_addr)

Definition at line 785 of file w89c840.c.

Referenced by mdio_read(), and mdio_sync().

◆ MDIO_WRITE0

#define MDIO_WRITE0   (MDIO_EnbOutput)

Definition at line 792 of file w89c840.c.

◆ MDIO_WRITE1

#define MDIO_WRITE1   (MDIO_DataOut | MDIO_EnbOutput)

Definition at line 793 of file w89c840.c.

Enumeration Type Documentation

◆ chip_capability_flags

Enumerator
CanHaveMII 
HasBrokenTx 

Definition at line 134 of file w89c840.c.

@ CanHaveMII
Definition sundance.c:254
@ HasBrokenTx
Definition w89c840.c:134

◆ w840_offsets

Enumerator
PCIBusCfg 
TxStartDemand 
RxStartDemand 
RxRingPtr 
TxRingPtr 
IntrStatus 
NetworkConfig 
IntrEnable 
RxMissed 
EECtrl 
MIICtrl 
BootRom 
GPTimer 
CurRxDescAddr 
CurRxBufAddr 
MulticastFilter0 
MulticastFilter1 
StationAddr 
CurTxDescAddr 
CurTxBufAddr 

Definition at line 169 of file w89c840.c.

169 {
170 PCIBusCfg=0x00, TxStartDemand=0x04, RxStartDemand=0x08,
171 RxRingPtr=0x0C, TxRingPtr=0x10,
172 IntrStatus=0x14, NetworkConfig=0x18, IntrEnable=0x1C,
173 RxMissed=0x20, EECtrl=0x24, MIICtrl=0x24, BootRom=0x28, GPTimer=0x2C,
174 CurRxDescAddr=0x30, CurRxBufAddr=0x34, /* Debug use */
176 CurTxDescAddr=0x4C, CurTxBufAddr=0x50,
177};
@ IntrStatus
Definition sis190.h:77
@ IntrEnable
Definition sundance.c:135
@ MIICtrl
Definition sundance.c:142
@ MulticastFilter0
Definition sundance.c:143
@ MulticastFilter1
Definition sundance.c:144
@ StationAddr
Definition sundance.c:139
@ EECtrl
Definition sundance.c:126
@ RxMissed
Definition sundance.c:156
@ CurRxBufAddr
Definition w89c840.c:174
@ BootRom
Definition w89c840.c:173
@ NetworkConfig
Definition w89c840.c:172
@ TxStartDemand
Definition w89c840.c:170
@ GPTimer
Definition w89c840.c:173
@ CurRxDescAddr
Definition w89c840.c:174
@ RxRingPtr
Definition w89c840.c:171
@ TxRingPtr
Definition w89c840.c:171
@ RxStartDemand
Definition w89c840.c:170
@ PCIBusCfg
Definition w89c840.c:170
@ CurTxDescAddr
Definition w89c840.c:176
@ CurTxBufAddr
Definition w89c840.c:176

◆ intr_status_bits

Enumerator
NormalIntr 
AbnormalIntr 
IntrPCIErr 
TimerInt 
IntrRxDied 
RxNoBuf 
IntrRxDone 
TxFIFOUnderflow 
RxErrIntr 
TxIdle 
IntrTxStopped 
IntrTxDone 

Definition at line 181 of file w89c840.c.

181 {
182 NormalIntr=0x10000, AbnormalIntr=0x8000,
183 IntrPCIErr=0x2000, TimerInt=0x800,
184 IntrRxDied=0x100, RxNoBuf=0x80, IntrRxDone=0x40,
185 TxFIFOUnderflow=0x20, RxErrIntr=0x10,
186 TxIdle=0x04, IntrTxStopped=0x02, IntrTxDone=0x01,
187};
@ IntrTxDone
Definition sundance.c:180
@ IntrRxDone
Definition sundance.c:180
@ IntrPCIErr
Definition sundance.c:179
@ RxNoBuf
Definition tulip.c:304
@ AbnormalIntr
Definition tulip.c:303
@ TxFIFOUnderflow
Definition tulip.c:305
@ NormalIntr
Definition tulip.c:303
@ TimerInt
Definition tulip.c:302
@ IntrTxStopped
Definition w89c840.c:186
@ RxErrIntr
Definition w89c840.c:185
@ IntrRxDied
Definition w89c840.c:184
@ TxIdle
Definition w89c840.c:186

◆ rx_mode_bits

Enumerator
AcceptErr 
AcceptRunt 
AcceptBroadcast 
AcceptMulticast 
AcceptAllPhys 
AcceptMyPhys 

Definition at line 190 of file w89c840.c.

190 {
191 AcceptErr=0x80, AcceptRunt=0x40,
193 AcceptAllPhys=0x08, AcceptMyPhys=0x02,
194};
@ AcceptMulticast
Definition sis190.h:134
@ AcceptRunt
Definition sis190.h:132
@ AcceptAllPhys
Definition sis190.h:136
@ AcceptMyPhys
Definition sis190.h:135
@ AcceptErr
Definition sis190.h:131
@ AcceptBroadcast
Definition sis190.h:133

◆ mii_reg_bits

Enumerator
MDIO_ShiftClk 
MDIO_DataIn 
MDIO_DataOut 
MDIO_EnbOutput 
MDIO_EnbIn 

Definition at line 196 of file w89c840.c.

196 {
197 MDIO_ShiftClk=0x10000, MDIO_DataIn=0x80000, MDIO_DataOut=0x20000,
198 MDIO_EnbOutput=0x40000, MDIO_EnbIn = 0x00000,
199};
@ MDIO_EnbOutput
Definition sundance.c:781
@ MDIO_ShiftClk
Definition sundance.c:781
#define MDIO_EnbIn
Definition sundance.c:784
@ MDIO_DataIn
Definition w89c840.c:197
@ MDIO_DataOut
Definition w89c840.c:197

◆ desc_status_bits

Enumerator
DescOwn 
DescEndRing 
DescUseLink 
DescWholePkt 
DescStartPkt 
DescEndPkt 
DescIntr 

Definition at line 216 of file w89c840.c.

216 {
217 DescOwn=0x80000000, DescEndRing=0x02000000, DescUseLink=0x01000000,
218 DescWholePkt=0x60000000, DescStartPkt=0x20000000, DescEndPkt=0x40000000,
219 DescIntr=0x80000000,
220};
@ DescOwn
Definition pcnet32.h:153
@ DescEndRing
Definition sundance.c:218
@ DescEndPkt
Definition w89c840.c:218
@ DescUseLink
Definition w89c840.c:217
@ DescIntr
Definition w89c840.c:219
@ DescWholePkt
Definition w89c840.c:218
@ DescStartPkt
Definition w89c840.c:218

◆ EEPROM_Ctrl_Bits

Enumerator
EE_ShiftClk 
EE_Write0 
EE_Write1 
EE_ChipSelect 
EE_DataIn 

Definition at line 737 of file w89c840.c.

737 {
738 EE_ShiftClk=0x02, EE_Write0=0x801, EE_Write1=0x805,
739 EE_ChipSelect=0x801, EE_DataIn=0x08,
740};
@ EE_DataIn
Definition w89c840.c:739
@ EE_ChipSelect
Definition w89c840.c:739
@ EE_Write0
Definition w89c840.c:738
@ EE_Write1
Definition w89c840.c:738
@ EE_ShiftClk
Definition w89c840.c:738

◆ EEPROM_Cmds

Enumerator
EE_WriteCmd 
EE_ReadCmd 
EE_EraseCmd 

Definition at line 743 of file w89c840.c.

743 {
744 EE_WriteCmd=(5 << 6), EE_ReadCmd=(6 << 6), EE_EraseCmd=(7 << 6),
745};
@ EE_ReadCmd
Definition w89c840.c:744
@ EE_WriteCmd
Definition w89c840.c:744
@ EE_EraseCmd
Definition w89c840.c:744

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER )

◆ eeprom_read()

int eeprom_read ( long ioaddr,
int location )
static

Definition at line 747 of file w89c840.c.

748{
749 int i;
750 int retval = 0;
751 int ee_addr = addr + EECtrl;
752 int read_cmd = location | EE_ReadCmd;
753 writel(EE_ChipSelect, ee_addr);
754
755 /* Shift the read command bits out. */
756 for (i = 10; i >= 0; i--) {
757 short dataval = (read_cmd & (1 << i)) ? EE_Write1 : EE_Write0;
758 writel(dataval, ee_addr);
759 eeprom_delay(ee_addr);
760 writel(dataval | EE_ShiftClk, ee_addr);
761 eeprom_delay(ee_addr);
762 }
763 writel(EE_ChipSelect, ee_addr);
764
765 for (i = 16; i > 0; i--) {
766 writel(EE_ChipSelect | EE_ShiftClk, ee_addr);
767 eeprom_delay(ee_addr);
768 retval = (retval << 1) | ((readl(ee_addr) & EE_DataIn) ? 1 : 0);
769 writel(EE_ChipSelect, ee_addr);
770 eeprom_delay(ee_addr);
771 }
772
773 /* Terminate the EEPROM access. */
774 writel(0, ee_addr);
775 return retval;
776}
unsigned long retval
Definition xen.h:46
static struct command_descriptor read_cmd
"read" command descriptor
Definition nvo_cmd.c:135
#define eeprom_delay(ee_addr)
Definition w89c840.c:735
#define writel
Definition w89c840.c:160

References addr, EE_ChipSelect, EE_DataIn, EE_ReadCmd, EE_ShiftClk, EE_Write0, EE_Write1, EECtrl, eeprom_delay, read_cmd, readl, retval, and writel.

Referenced by w89c840_probe().

◆ mdio_read()

int mdio_read ( int base_address,
int phy_id,
int location )
static

Definition at line 810 of file w89c840.c.

811{
812 long mdio_addr = base_address + MIICtrl;
813 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
814 int i, retval = 0;
815
817 mdio_sync(mdio_addr);
818
819 /* Shift the read command bits out. */
820 for (i = 15; i >= 0; i--) {
821 int dataval = (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
822
823 writel(dataval, mdio_addr);
824 mdio_delay(mdio_addr);
825 writel(dataval | MDIO_ShiftClk, mdio_addr);
826 mdio_delay(mdio_addr);
827 }
828 /* Read the two transition, 16 data, and wire-idle bits. */
829 for (i = 20; i > 0; i--) {
830 writel(MDIO_EnbIn, mdio_addr);
831 mdio_delay(mdio_addr);
832 retval = (retval << 1) | ((readl(mdio_addr) & MDIO_DataIn) ? 1 : 0);
833 writel(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);
834 mdio_delay(mdio_addr);
835 }
836 return (retval>>1) & 0xffff;
837}
#define MDIO_WRITE0
Definition sundance.c:785
#define MDIO_WRITE1
Definition sundance.c:786
static char mii_preamble_required
Definition w89c840.c:790
static void mdio_sync(long mdio_addr)
Definition w89c840.c:797
#define mdio_delay(mdio_addr)
Definition w89c840.c:785

References MDIO_DataIn, mdio_delay, MDIO_EnbIn, MDIO_ShiftClk, mdio_sync(), MDIO_WRITE0, MDIO_WRITE1, mii_preamble_required, MIICtrl, readl, retval, and writel.

Referenced by check_duplex(), and w89c840_probe().

◆ check_duplex()

void check_duplex ( void )
static

Definition at line 872 of file w89c840.c.

873{
874 int mii_reg5 = mdio_read(ioaddr, w840private.phys[0], 5);
875 int negotiated = mii_reg5 & w840private.advertising;
876 int duplex;
877
878 if (w840private.duplex_lock || mii_reg5 == 0xffff)
879 return;
880
881 duplex = (negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040;
882 if (w840private.full_duplex != duplex) {
883 w840private.full_duplex = duplex;
884
885#if defined(W89C840_DEBUG)
886 printf("winbond-840 : Setting %s-duplex based on MII # %d negotiated capability %X\n",
887 duplex ? "full" : "half", w840private.phys[0], negotiated);
888#endif
889
890 w840private.csr6 &= ~0x200;
891 w840private.csr6 |= duplex ? 0x200 : 0;
892 }
893}
static unsigned long ioaddr
Definition davicom.c:129
duplex
Definition nic.h:40
int printf(const char *fmt,...)
Write a formatted string to the console.
Definition vsprintf.c:465
static int mdio_read(int base_address, int phy_id, int location)
Definition w89c840.c:810
static struct winbond_private w840private

References ioaddr, mdio_read(), printf(), and w840private.

Referenced by sundance_probe(), and w89c840_reset().

◆ set_rx_mode()

void set_rx_mode ( void )
static

Definition at line 895 of file w89c840.c.

896{
897 u32 mc_filter[2]; /* Multicast hash filter */
898 u32 rx_mode;
899
900 /* Accept all multicasts from now on. */
901 memset(mc_filter, 0xff, sizeof(mc_filter));
902
903/*
904 * works OK with multicast enabled.
905 */
906
908
909 writel(mc_filter[0], ioaddr + MulticastFilter0);
910 writel(mc_filter[1], ioaddr + MulticastFilter1);
911 w840private.csr6 &= ~0x00F8;
912 w840private.csr6 |= rx_mode;
914
915#if defined(W89C840_DEBUG)
916 printf("winbond-840 : Done setting RX mode.\n");
917#endif
918}
void * memset(void *dest, int character, size_t len) __nonnull
#define u32
Definition vga.h:21

References AcceptBroadcast, AcceptMulticast, AcceptMyPhys, ioaddr, memset(), MulticastFilter0, MulticastFilter1, NetworkConfig, printf(), u32, w840private, and writel.

Referenced by w89c840_reset().

◆ init_ring()

void init_ring ( void )
static

Definition at line 921 of file w89c840.c.

922{
923 int i;
924 char * p;
925
926 w840private.tx_full = 0;
927 w840private.tx_q_bytes = w840private.cur_rx = w840private.cur_tx = 0;
928 w840private.dirty_rx = w840private.dirty_tx = 0;
929
930 w840private.rx_buf_sz = PKT_BUF_SZ;
931 w840private.rx_head_desc = &w840private.rx_ring[0];
932
933 /* Initial all Rx descriptors. Fill in the Rx buffers. */
934
935 p = &w89c840_buf.rx_packet[0];
936
937 for (i = 0; i < RX_RING_SIZE; i++) {
938 w840private.rx_ring[i].length = w840private.rx_buf_sz;
939 w840private.rx_ring[i].status = 0;
940 w840private.rx_ring[i].next_desc = virt_to_le32desc(&w840private.rx_ring[i+1]);
941
942 w840private.rx_ring[i].buffer1 = virt_to_le32desc(p + (PKT_BUF_SZ * i));
943 w840private.rx_ring[i].status = DescOwn | DescIntr;
944 }
945
946 /* Mark the last entry as wrapping the ring. */
947 w840private.rx_ring[i-1].length |= DescEndRing;
948 w840private.rx_ring[i-1].next_desc = virt_to_le32desc(&w840private.rx_ring[0]);
949
950 w840private.dirty_rx = (unsigned int)(i - RX_RING_SIZE);
951
952 for (i = 0; i < TX_RING_SIZE; i++) {
953 w840private.tx_ring[i].status = 0;
954 }
955 return;
956}
#define PKT_BUF_SZ
Definition 3c515.c:87
#define TX_RING_SIZE
Definition 3c515.c:85
#define RX_RING_SIZE
Definition 3c515.c:86
#define virt_to_le32desc(addr)
Definition w89c840.c:91
#define w89c840_buf
Definition w89c840.c:261

References DescEndRing, DescIntr, DescOwn, PKT_BUF_SZ, RX_RING_SIZE, TX_RING_SIZE, virt_to_le32desc, w840private, and w89c840_buf.

Referenced by sundance_reset(), and w89c840_reset().

◆ w89c840_reset()

void w89c840_reset ( struct nic * nic)
static

Definition at line 302 of file w89c840.c.

303{
304 int i;
305
306 /* Reset the chip to erase previous misconfiguration.
307 No hold time required! */
308 writel(0x00000001, ioaddr + PCIBusCfg);
309
310 init_ring();
311
314
315 for (i = 0; i < ETH_ALEN; i++)
317
318 /* Initialize other registers. */
319 /* Configure the PCI bus bursts and FIFO thresholds.
320 486: Set 8 longword cache alignment, 8 longword burst.
321 586: Set 16 longword cache alignment, no burst limit.
322 Cache alignment bits 15:14 Burst length 13:8
323 0000 <not allowed> 0000 align to cache 0800 8 longwords
324 4000 8 longwords 0100 1 longword 1000 16 longwords
325 8000 16 longwords 0200 2 longwords 2000 32 longwords
326 C000 32 longwords 0400 4 longwords
327 Wait the specified 50 PCI cycles after a reset by initializing
328 Tx and Rx queues and the address filter list. */
329
330 writel(0xE010, ioaddr + PCIBusCfg);
331
333 w840private.csr6 = 0x20022002;
334 check_duplex();
335 set_rx_mode();
336
337 /* Do not enable the interrupts Etherboot doesn't need them */
338/*
339 writel(0x1A0F5, ioaddr + IntrStatus);
340 writel(0x1A0F5, ioaddr + IntrEnable);
341*/
342#if defined(W89C840_DEBUG)
343 printf("winbond-840 : Done reset.\n");
344#endif
345}
#define ETH_ALEN
Definition if_ether.h:9
Definition nic.h:49
unsigned char * node_addr
Definition nic.h:52
static void check_duplex(void)
Definition w89c840.c:872
static void init_ring(void)
Definition w89c840.c:921
static void set_rx_mode(void)
Definition w89c840.c:895
#define writeb
Definition w89c840.c:158

References check_duplex(), ETH_ALEN, init_ring(), ioaddr, nic::node_addr, PCIBusCfg, printf(), RxRingPtr, RxStartDemand, set_rx_mode(), StationAddr, TxRingPtr, virt_to_bus(), w840private, writeb, and writel.

Referenced by w89c840_disable(), w89c840_poll(), and w89c840_probe().

◆ w89c840_poll()

int w89c840_poll ( struct nic * nic,
int retrieve )
static

Definition at line 378 of file w89c840.c.

379{
380 /* return true if there's an ethernet packet ready to read */
381 /* nic->packet should contain data on return */
382 /* nic->packetlen should contain length of data */
383 int packet_received = 0;
384
385#if defined(W89C840_DEBUG)
386 u32 intr_status = readl(ioaddr + IntrStatus);
387#endif
388
389 do {
390 /* Code from netdev_rx(dev) */
391
392 int entry = w840private.cur_rx % RX_RING_SIZE;
393
394 struct w840_rx_desc *desc = w840private.rx_head_desc;
395 s32 status = desc->status;
396
397 if (status & DescOwn) {
398 /* DescOwn bit is still set, we should wait for RX to complete */
399 packet_received = 0;
400 break;
401 }
402
403 if ( !retrieve ) {
404 packet_received = 1;
405 break;
406 }
407
408 if ((status & 0x38008300) != 0x0300) {
409 if ((status & 0x38000300) != 0x0300) {
410 /* Ingore earlier buffers. */
411 if ((status & 0xffff) != 0x7fff) {
412 printf("winbond-840 : Oversized Ethernet frame spanned "
413 "multiple buffers, entry %d status %X !\n",
414 w840private.cur_rx, (unsigned int) status);
415 }
416 } else if (status & 0x8000) {
417 /* There was a fatal error. */
418#if defined(W89C840_DEBUG)
419 printf("winbond-840 : Receive error, Rx status %X :", status);
420 if (status & 0x0890) {
421 printf(" RXLEN_ERROR");
422 }
423 if (status & 0x004C) {
424 printf(", FRAME_ERROR");
425 }
426 if (status & 0x0002) {
427 printf(", CRC_ERROR");
428 }
429 printf("\n");
430#endif
431
432 /* Simpy do a reset now... */
434
435 packet_received = 0;
436 break;
437 }
438 } else {
439 /* Omit the four octet CRC from the length. */
440 int pkt_len = ((status >> 16) & 0x7ff) - 4;
441
442#if defined(W89C840_DEBUG)
443 printf(" netdev_rx() normal Rx pkt ring %d length %d status %X\n", entry, pkt_len, status);
444#endif
445
447
448 /* Check if the packet is long enough to accept without copying
449 to a minimally-sized skbuff. */
450
451 memcpy(nic->packet, le32desc_to_virt(w840private.rx_ring[entry].buffer1), pkt_len);
452 packet_received = 1;
453
454 /* Release buffer to NIC */
455 w840private.rx_ring[entry].status = DescOwn;
456
457#if defined(W89C840_DEBUG)
458 /* You will want this info for the initial debug. */
459 printf(" Rx data %hhX:%hhX:%hhX:%hhX:%hhX:"
460 "%hhX %hhX:%hhX:%hhX:%hhX:%hhX:%hhX %hhX%hhX "
461 "%hhX.%hhX.%hhX.%hhX.\n",
462 nic->packet[0], nic->packet[1], nic->packet[2], nic->packet[3],
463 nic->packet[4], nic->packet[5], nic->packet[6], nic->packet[7],
464 nic->packet[8], nic->packet[9], nic->packet[10],
465 nic->packet[11], nic->packet[12], nic->packet[13],
466 nic->packet[14], nic->packet[15], nic->packet[16],
467 nic->packet[17]);
468#endif
469
470 }
471
472 entry = (++w840private.cur_rx) % RX_RING_SIZE;
473 w840private.rx_head_desc = &w840private.rx_ring[entry];
474 } while (0);
475
476 return packet_received;
477}
uint16_t pkt_len
Definition aqc1xx.h:2
#define le32desc_to_virt(addr)
Definition dmfe.c:59
uint8_t status
Status.
Definition ena.h:5
struct ena_llq_option desc
Descriptor counts.
Definition ena.h:9
int32_t s32
Definition stdint.h:23
void * memcpy(void *dest, const void *src, size_t len) __nonnull
unsigned char * packet
Definition nic.h:53
unsigned int packetlen
Definition nic.h:54
static void w89c840_reset(struct nic *nic)
Definition w89c840.c:302

References desc, DescOwn, IntrStatus, ioaddr, le32desc_to_virt, memcpy(), nic::packet, nic::packetlen, pkt_len, printf(), readl, RX_RING_SIZE, status, u32, w840private, and w89c840_reset().

◆ w89c840_transmit()

void w89c840_transmit ( struct nic * nic,
const char * d,
unsigned int t,
unsigned int s,
const char * p )
static

Definition at line 483 of file w89c840.c.

489{
490 /* send the packet to destination */
491 unsigned entry;
492 int transmit_status;
493 unsigned long ct;
494
495 /* Caution: the write order is important here, set the field
496 with the "ownership" bits last. */
497
498 /* Fill in our transmit buffer */
499 entry = w840private.cur_tx % TX_RING_SIZE;
500
501 memcpy (w89c840_buf.tx_packet, d, ETH_ALEN); /* dst */
502 memcpy (w89c840_buf.tx_packet + ETH_ALEN, nic->node_addr, ETH_ALEN);/*src*/
503
504 *((char *) w89c840_buf.tx_packet + 12) = t >> 8; /* type */
505 *((char *) w89c840_buf.tx_packet + 13) = t;
506
507 memcpy (w89c840_buf.tx_packet + ETH_HLEN, p, s);
508 s += ETH_HLEN;
509
510 while (s < ETH_ZLEN)
511 *((char *) w89c840_buf.tx_packet + ETH_HLEN + (s++)) = 0;
512
513 w840private.tx_ring[entry].buffer1
514 = virt_to_le32desc(w89c840_buf.tx_packet);
515
516 w840private.tx_ring[entry].length = (DescWholePkt | (u32) s);
517 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
518 w840private.tx_ring[entry].length |= (DescIntr | DescEndRing);
519 w840private.tx_ring[entry].status = (DescOwn);
520 w840private.cur_tx++;
521
522 w840private.tx_q_bytes = (u16) s;
524
525 /* Work around horrible bug in the chip by marking the queue as full
526 when we do not have FIFO room for a maximum sized packet. */
527
528 if ((w840private.drv_flags & HasBrokenTx) && w840private.tx_q_bytes > TX_BUG_FIFO_LIMIT) {
529 /* Actually this is left to help finding error tails later in debugging...
530 * See Linux kernel driver in winbond-840.c for details.
531 */
532 w840private.tx_full = 1;
533 }
534
535#if defined(W89C840_DEBUG)
536 printf("winbond-840 : Transmit frame # %d size %d queued in slot %d.\n", w840private.cur_tx, s, entry);
537#endif
538
539 /* Now wait for TX to complete. */
540 transmit_status = w840private.tx_ring[entry].status;
541
542 ct = currticks();
543 {
544#if defined W89C840_DEBUG
545 u32 intr_stat = 0;
546#endif
547 while (1) {
548
549#if defined(W89C840_DEBUG)
550 decode_interrupt(intr_stat);
551#endif
552
553 while ( (transmit_status & DescOwn) && ct + TX_TIMEOUT < currticks()) {
554
555 transmit_status = w840private.tx_ring[entry].status;
556 }
557
558 break;
559 }
560 }
561
562 if ((transmit_status & DescOwn) == 0) {
563
564#if defined(W89C840_DEBUG)
565 printf("winbond-840 : transmission complete after wait loop iterations, status %X\n",
566 w840private.tx_ring[entry].status);
567#endif
568
569 return;
570 }
571
572 /* Transmit timed out... */
573
574 printf("winbond-840 : transmission TIMEOUT : status %X\n",
575 (unsigned int) w840private.tx_ring[entry].status);
576
577 return;
578}
#define TX_TIMEOUT
Definition amd8111e.c:57
#define ETH_ZLEN
Definition if_ether.h:11
#define ETH_HLEN
Definition if_ether.h:10
unsigned long currticks(void)
Get current system time in ticks.
Definition timer.c:43
#define u16
Definition vga.h:20
#define TX_BUG_FIFO_LIMIT
Definition w89c840.c:114

References currticks(), DescEndRing, DescIntr, DescOwn, DescWholePkt, ETH_ALEN, ETH_HLEN, ETH_ZLEN, HasBrokenTx, ioaddr, memcpy(), nic::node_addr, printf(), TX_BUG_FIFO_LIMIT, TX_RING_SIZE, TX_TIMEOUT, TxStartDemand, u16, u32, virt_to_le32desc, w840private, w89c840_buf, and writel.

◆ w89c840_disable()

void w89c840_disable ( struct nic * nic,
void *hwdev __unused )
static

Definition at line 583 of file w89c840.c.

583 {
584
586
587 /* Don't know what to do to disable the board. Is this needed at all? */
588 /* Yes, a live NIC can corrupt the loaded memory later [Ken] */
589 /* Stop the chip's Tx and Rx processes. */
590 writel(w840private.csr6 &= ~0x20FA, ioaddr + NetworkConfig);
591}

References __unused, ioaddr, NetworkConfig, w840private, w89c840_reset(), and writel.

Referenced by DRIVER().

◆ w89c840_irq()

void w89c840_irq ( struct nic *nic __unused,
irq_action_t action __unused )
static

Definition at line 596 of file w89c840.c.

597{
598 switch ( action ) {
599 case DISABLE :
600 break;
601 case ENABLE :
602 break;
603 case FORCE :
604 break;
605 }
606}
@ FORCE
Definition nic.h:37
@ ENABLE
Definition nic.h:36
@ DISABLE
Definition nic.h:35

References __unused, DISABLE, ENABLE, and FORCE.

◆ PCI_DRIVER()

PCI_DRIVER ( w89c840_driver ,
w89c840_nics ,
PCI_NO_CLASS  )

References w89c840_nics.

◆ w89c840_probe()

int w89c840_probe ( struct nic * nic,
struct pci_device * p )
static

Definition at line 626 of file w89c840.c.

626 {
627
628
629 u16 sum = 0;
630 int i;
631 unsigned short value;
632
633 if (p->ioaddr == 0)
634 return 0;
635
636 nic->ioaddr = p->ioaddr;
637 nic->irqno = 0;
638
639#if defined(W89C840_DEBUG)
640 printf("winbond-840: PCI bus %hhX device function %hhX: I/O address: %hX\n", p->bus, p->devfn, ioaddr);
641#endif
642
643 ioaddr = ioaddr & ~3; /* Mask the bit that says "this is an io addr" */
644
645#define PCI_VENDOR_ID_WINBOND2 0x1050
646#define PCI_DEVICE_ID_WINBOND2_89C840 0x0840
647#define PCI_VENDOR_ID_COMPEX 0x11f6
648#define PCI_DEVICE_ID_COMPEX_RL100ATX 0x2011
649
650 /* From Matt Hortman <mbhortman@acpthinclient.com> */
653
654 /* detected "Winbond W89c840 Fast Ethernet PCI NIC" */
655
656 } else if ( p->vendor == PCI_VENDOR_ID_COMPEX
658
659 /* detected "Compex RL100ATX Fast Ethernet PCI NIC" */
660
661 } else {
662 /* Gee, guess what? They missed again. */
663 printf("device ID : %X - is not a Compex RL100ATX NIC.\n",
664 p->device);
665 return 0;
666 }
667
668 printf(" %s\n", w89c840_version);
669
671
672 /* Ok. Got one. Read the eeprom. */
673 for (i = 0; i < 0x40; i++) {
675 eeprom[i] = value;
676 sum += value;
677 }
678
679 for (i=0;i<ETH_ALEN;i++) {
680 nic->node_addr[i] = (eeprom[i/2] >> (8*(i&1))) & 0xff;
681 }
682
683 DBG ( "Ethernet addr: %s\n", eth_ntoa ( nic->node_addr ) );
684
685#if defined(W89C840_DEBUG)
686 printf("winbond-840: EEPROM checksum %hX, got eeprom", sum);
687#endif
688
689 /* Reset the chip to erase previous misconfiguration.
690 No hold time required! */
691 writel(0x00000001, ioaddr + PCIBusCfg);
692
693 if (driver_flags & CanHaveMII) {
694 int phy, phy_idx = 0;
695 for (phy = 1; phy < 32 && phy_idx < 4; phy++) {
696 int mii_status = mdio_read(ioaddr, phy, 1);
697 if (mii_status != 0xffff && mii_status != 0x0000) {
698 w840private.phys[phy_idx++] = phy;
699 w840private.advertising = mdio_read(ioaddr, phy, 4);
700
701#if defined(W89C840_DEBUG)
702 printf("winbond-840 : MII PHY found at address %d, status "
703 "%X advertising %hX.\n", phy, mii_status, w840private.advertising);
704#endif
705
706 }
707 }
708
709 w840private.mii_cnt = phy_idx;
710
711 if (phy_idx == 0) {
712 printf("winbond-840 : MII PHY not found -- this device may not operate correctly.\n");
713 }
714 }
715
716 /* point to NIC specific routines */
718
720
721 return 1;
722}
eeprom
Definition 3c90x.h:232
pseudo_bit_t value[0x00020]
Definition arbel.h:2
const char * eth_ntoa(const void *ll_addr)
Transcribe Ethernet address.
Definition ethernet.c:176
#define DBG(...)
Print a debugging message.
Definition compiler.h:498
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition pci.c:241
unsigned char irqno
Definition nic.h:56
unsigned int ioaddr
Definition nic.h:55
struct nic_operations * nic_op
Definition nic.h:50
unsigned long ioaddr
I/O address.
Definition pci.h:226
uint16_t vendor
Vendor ID.
Definition pci.h:228
uint16_t device
Device ID.
Definition pci.h:230
static struct nic_operations w89c840_operations
Definition w89c840.c:608
#define PCI_DEVICE_ID_WINBOND2_89C840
#define PCI_DEVICE_ID_COMPEX_RL100ATX
static const char * w89c840_version
Definition w89c840.c:88
#define PCI_VENDOR_ID_WINBOND2
static u32 driver_flags
Definition w89c840.c:142
static int eeprom_read(long ioaddr, int location)
Definition w89c840.c:747
#define PCI_VENDOR_ID_COMPEX

References adjust_pci_device(), CanHaveMII, DBG, pci_device::device, driver_flags, eeprom_read(), ETH_ALEN, eth_ntoa(), ioaddr, nic::ioaddr, pci_device::ioaddr, nic::irqno, mdio_read(), nic::nic_op, nic::node_addr, PCI_DEVICE_ID_COMPEX_RL100ATX, PCI_DEVICE_ID_WINBOND2_89C840, PCI_VENDOR_ID_COMPEX, PCI_VENDOR_ID_WINBOND2, PCIBusCfg, printf(), u16, value, pci_device::vendor, w840private, w89c840_operations, w89c840_reset(), w89c840_version, and writel.

Referenced by DRIVER().

◆ mdio_sync()

void mdio_sync ( long mdio_addr)
static

Definition at line 797 of file w89c840.c.

798{
799 int bits = 32;
800
801 /* Establish sync by sending at least 32 logic ones. */
802 while (--bits >= 0) {
803 writel(MDIO_WRITE1, mdio_addr);
804 mdio_delay(mdio_addr);
805 writel(MDIO_WRITE1 | MDIO_ShiftClk, mdio_addr);
806 mdio_delay(mdio_addr);
807 }
808}
static volatile void * bits
Definition bitops.h:28

References bits, mdio_delay, MDIO_ShiftClk, MDIO_WRITE1, and writel.

Referenced by mdio_read().

◆ DRIVER()

DRIVER ( "W89C840F" ,
nic_driver ,
pci_driver ,
w89c840_driver ,
w89c840_probe ,
w89c840_disable ,
w89c840_buf  )

Variable Documentation

◆ w89c840_version

const char* w89c840_version = "driver Version 0.94 - December 12, 2003"
static

Definition at line 88 of file w89c840.c.

Referenced by w89c840_probe().

◆ driver_flags

u32 driver_flags = CanHaveMII | HasBrokenTx
static

Definition at line 142 of file w89c840.c.

Referenced by w89c840_probe().

◆ w840private

◆ ioaddr

int ioaddr
static

Definition at line 255 of file w89c840.c.

◆ eeprom

unsigned short eeprom[0x40]
static

Definition at line 256 of file w89c840.c.

◆ w89c840_operations

struct nic_operations w89c840_operations
static
Initial value:
= {
.connect = dummy_connect,
.poll = w89c840_poll,
.transmit = w89c840_transmit,
.irq = w89c840_irq,
}
int dummy_connect(struct nic *nic __unused)
Definition legacy.c:175
static void w89c840_irq(struct nic *nic __unused, irq_action_t action __unused)
Definition w89c840.c:596
static void w89c840_transmit(struct nic *nic, const char *d, unsigned int t, unsigned int s, const char *p)
Definition w89c840.c:483
static int w89c840_poll(struct nic *nic, int retrieve)
Definition w89c840.c:378

Definition at line 608 of file w89c840.c.

608 {
609 .connect = dummy_connect,
610 .poll = w89c840_poll,
611 .transmit = w89c840_transmit,
612 .irq = w89c840_irq,
613
614};

Referenced by w89c840_probe().

◆ w89c840_nics

struct pci_device_id w89c840_nics[]
static
Initial value:
= {
PCI_ROM(0x1050, 0x0840, "winbond840", "Winbond W89C840F", 0),
PCI_ROM(0x11f6, 0x2011, "compexrl100atx", "Compex RL100ATX", 0),
}
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition pci.h:308

Definition at line 616 of file w89c840.c.

616 {
617PCI_ROM(0x1050, 0x0840, "winbond840", "Winbond W89C840F", 0),
618PCI_ROM(0x11f6, 0x2011, "compexrl100atx", "Compex RL100ATX", 0),
619};

Referenced by PCI_DRIVER().

◆ mii_preamble_required

char mii_preamble_required = 1
static

Definition at line 790 of file w89c840.c.

Referenced by mdio_read().