42 #define GVE_PAGE_SIZE 0x1000 51 #define GVE_ALIGN GVE_PAGE_SIZE 54 #define GVE_CFG_BAR PCI_BASE_ADDRESS_0 61 #define GVE_CFG_SIZE 0x1000 64 #define GVE_CFG_DEVSTAT 0x0000 65 #define GVE_CFG_DEVSTAT_RESET 0x00000010UL 68 #define GVE_CFG_DRVSTAT 0x0004 69 #define GVE_CFG_DRVSTAT_RUN 0x00000001UL 72 #define GVE_RESET_MAX_WAIT_MS 500 75 #define GVE_CFG_ADMIN_PFN 0x0010 78 #define GVE_CFG_ADMIN_DB 0x0014 81 #define GVE_CFG_ADMIN_EVT 0x0018 84 #define GVE_CFG_VERSION 0x001f 87 #define GVE_CFG_ADMIN_BASE_HI 0x0020 90 #define GVE_CFG_ADMIN_BASE_LO 0x0024 93 #define GVE_CFG_ADMIN_LEN 0x0028 96 #define GVE_DB_BAR PCI_BASE_ADDRESS_2 113 #define GVE_ADMIN_STATUS_OK 0x00000001 124 #define GVE_ADMIN_DESCRIBE 0x0001 139 #define GVE_ADMIN_DESCRIBE_VER 1 164 #define GVE_ADMIN_CONFIGURE 0x0002 183 #define GVE_ADMIN_REGISTER 0x0003 205 #define GVE_QPL_MAX 32 214 #define GVE_ADMIN_UNREGISTER 0x0004 217 #define GVE_ADMIN_CREATE_TX 0x0005 238 #define GVE_ADMIN_CREATE_RX 0x0006 267 #define GVE_ADMIN_DESTROY_TX 0x0007 270 #define GVE_ADMIN_DESTROY_RX 0x0008 273 #define GVE_ADMIN_DECONFIGURE 0x0009 307 #define GVE_ADMIN_COUNT ( GVE_PAGE_SIZE / sizeof ( union gve_admin_command ) ) 376 #define GVE_IRQ_COUNT 2 389 #define GVE_IRQ_DISABLE 0x40000000UL 421 #define GVE_BUF_SIZE ( GVE_PAGE_SIZE / 2 ) 424 #define GVE_BUF_PER_PAGE ( GVE_PAGE_SIZE / GVE_BUF_SIZE ) 476 #define GVE_TX_FILL 8 479 #define GVE_TX_QPL 0x18ae5458 513 #define GVE_TX_TYPE_START 0x00 516 #define GVE_TX_TYPE_CONT 0x20 525 #define GVE_RX_FILL 64 528 #define GVE_RX_QPL 0x18ae5258 550 #define GVE_RXF_ERROR 0x08 553 #define GVE_RXF_MORE 0x20 556 #define GVE_RX_SEQ_MASK 0x07 676 #define GVE_ADMIN_MAX_WAIT_MS 500 679 #define GVE_RESET_MAX_RETRY 5 682 #define GVE_WATCHDOG_TIMEOUT ( 1 * TICKS_PER_SEC ) uint8_t reserved_a[10]
Reserved.
struct gve_buffer buf
Buffer descriptor.
Register page list command.
struct dma_device * dma
DMA device.
struct dma_mapping res_map
Queue resources mapping.
struct gve_rx_packet pkt
Packet descriptor.
struct in_addr in
Local IPv4 address.
uint16_t rx_count
Number of receive queue entries.
uint8_t reserved_a[4]
Reserved.
uint8_t reserved[60]
Reserved.
uint32_t count
Number of pages.
Create receive queue command.
uint32_t evt_idx
Event counter index (within event counter array)
uint16_t bufsz
Packet buffer size.
userptr_t desc
Descriptor ring.
struct dma_mapping map
DMA mapping.
unsigned int fill
Maximum fill level (must be a power of two)
struct gve_event * event
Event counters.
union gve_scratch::@46 * buf
Buffer contents.
uint32_t qpl_id
Queue page list ID.
uint8_t reserved_a[2]
Reserved.
struct gve_device_descriptor desc
Device descriptor.
uint64_t res
Queue resources address.
struct gve_resources * res
Queue resources.
volatile uint32_t * db
Doorbell register.
Create transmit queue command.
uint32_t db_idx
Descriptor doorbell index (within doorbell BAR)
A transmit packet descriptor.
struct gve_tx_packet pkt
Packet descriptor.
uint64_t addr[GVE_QPL_MAX]
Page address.
unsigned long long uint64_t
A receive completion descriptor.
uint32_t qpl
Queue page list ID.
struct gve_qpl qpl
Queue page list.
A transmit or receive buffer descriptor.
struct gve_admin_create_rx create_rx
Create receive queue.
Access to external ("user") memory.
struct gve_admin_register reg
Register page list.
struct gve_queue rx
Receive queue.
struct gve_admin_header hdr
Header.
struct gve_queue tx
Transmit queue.
#define GVE_TX_FILL
Maximum number of transmit buffers.
uint8_t reserved[2]
Reserved.
uint8_t reserved_b[2]
Reserved.
uint8_t reserved_a[4]
Reserved.
struct gve_admin_create_tx create_tx
Create transmit queue.
struct dma_mapping map
Page mapping.
uint32_t activity
Reset recovery recorded activity counter.
void * db
Doorbell registers.
struct retry_timer watchdog
Reset recovery watchdog timer.
uint32_t userptr_t
A pointer to a user buffer.
struct dma_mapping map
DMA mapping.
struct process startup
Startup process.
uint8_t seq
Sequence number.
uint8_t fill
Maximum fill level.
uint32_t cons
Consumer counter.
A receive packet descriptor.
volatile uint32_t * db[GVE_IRQ_COUNT]
Interrupt doorbells.
uint32_t prod
Producer counter.
unsigned int count
Number of pages.
uint8_t reserved[56]
Reserved.
struct gve_irqs irqs
Interrupt channels.
struct gve_admin_header hdr
Header.
volatile uint32_t count
Number of events that have occurred.
void * cfg
Configuration registers.
uint16_t total
Total length of this packet.
struct google_mac mac
MAC address.
struct gve_admin_describe desc
Describe device.
struct gve_admin_header hdr
Header.
uint32_t ver
Descriptor version.
uint16_t tx_count
Number of transmit queue entries.
userptr_t cmplt
Completion ring.
A Google Virtual Ethernet NIC.
struct io_buffer * tx_iobuf[GVE_TX_FILL]
Transmit I/O buffers.
struct gve_pages pages
Page address list.
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
unsigned int seq
Receive sequence number.
uint8_t desc_len
Descriptor size.
uint8_t destroy
Command to destroy queue.
#define GVE_QPL_MAX
Maximum number of pages per queue.
uint8_t reserved_b[2]
Reserved.
uint32_t qpl_id
Queue page list ID.
unsigned int id
Queue page list ID.
uint64_t addr
Descriptor buffer address.
uint64_t desc
Descriptor ring address.
struct gve_admin_configure conf
Configure device resources.
unsigned int count
Number of descriptors (must be a power of two)
uint32_t notify_id
Notification channel ID.
struct gve_events events
Event counters.
#define GVE_IRQ_COUNT
Number of interrupt channels.
userptr_t data
Page addresses.
struct dma_mapping cmplt_map
Completion mapping.
uint64_t addr
Address (within queue page list address space)
struct gve_event * event
Event counter.
unsigned int retries
Startup process retry counter.
unsigned int count
Actual number of event counters.
struct gve_admin_header hdr
Header.
uint64_t desc
Descriptor ring address.
uint8_t revision
PCI revision.
struct gve_buffer buf
Buffer descriptor.
uint8_t reserved[60]
Reserved.
A Google Cloud MAC address.
uint32_t len
Descriptor maximum length.
uint64_t res
Queue resources address.
uint8_t count
Number of descriptors in this packet.
uint16_t len
Length of this descriptor.
uint32_t db_idx
Interrupt doorbell index (within doorbell BAR)
Scratch buffer for admin queue commands.
uint32_t notify_id
Notification channel ID.
struct net_device * netdev
Network device.
struct gve_admin_header hdr
Header.
struct dma_mapping map
DMA mapping.
struct gve_irq * irq
Interrupt channels.
union gve_admin_command * cmd
Commands.
struct dma_mapping desc_map
Descriptor mapping.
uint8_t cmplt_len
Completion size.
struct dma_mapping map
DMA mapping.
uint16_t counters
Number of event counters.
struct gve_admin_header hdr
Header.
const struct gve_queue_type * type
Queue type.
struct gve_admin admin
Admin queue.
uint32_t prod
Producer counter.
void(* param)(struct gve_queue *queue, union gve_admin_command *cmd)
Populate command parameters to create queue.
uint8_t create
Command to create queue.
uint8_t reserved_d[10]
Reserved.
uint8_t irq
Interrupt channel.
struct gve_scratch scratch
Scratch buffer.
uint8_t reserved_c[4]
Reserved.
uint64_t addr
Address list address.
uint64_t cmplt
Completion ring address.
struct gve_admin_simple simple
Simple command.
uint16_t mtu
Maximum transmit unit.