iPXE
Data Structures | Macros | Functions
pci.h File Reference

PCI bus. More...

#include <stdint.h>
#include <ipxe/device.h>
#include <ipxe/tables.h>
#include <ipxe/dma.h>
#include <ipxe/pci_io.h>

Go to the source code of this file.

Data Structures

struct  pci_device_id
 A PCI device ID list entry. More...
struct  pci_class_id
 A PCI class ID. More...
struct  pci_device
 A PCI device. More...
struct  pci_driver
 A PCI driver. More...

Macros

#define PCI_VENDOR_ID   0x00
 PCI vendor ID.
#define PCI_DEVICE_ID   0x02
 PCI device ID.
#define PCI_COMMAND   0x04
 PCI command.
#define PCI_COMMAND_IO   0x0001
 I/O space.
#define PCI_COMMAND_MEM   0x0002
 Memory space.
#define PCI_COMMAND_MASTER   0x0004
 Bus master.
#define PCI_COMMAND_INVALIDATE   0x0010
 Mem.
#define PCI_COMMAND_PARITY   0x0040
 Parity error response.
#define PCI_COMMAND_SERR   0x0100
 SERR# enable.
#define PCI_COMMAND_INTX_DISABLE   0x0400
 Interrupt disable.
#define PCI_STATUS   0x06
 PCI status.
#define PCI_STATUS_CAP_LIST   0x0010
 Capabilities list.
#define PCI_STATUS_PARITY   0x0100
 Master data parity error.
#define PCI_STATUS_REC_TARGET_ABORT   0x1000
 Received target abort.
#define PCI_STATUS_REC_MASTER_ABORT   0x2000
 Received master abort.
#define PCI_STATUS_SIG_SYSTEM_ERROR   0x4000
 Signalled system error.
#define PCI_STATUS_DETECTED_PARITY   0x8000
 Detected parity error.
#define PCI_REVISION   0x08
 PCI revision.
#define PCI_CACHE_LINE_SIZE   0x0c
 PCI cache line size.
#define PCI_LATENCY_TIMER   0x0d
 PCI latency timer.
#define PCI_HEADER_TYPE   0x0e
 PCI header type.
#define PCI_HEADER_TYPE_NORMAL   0x00
 Normal header.
#define PCI_HEADER_TYPE_BRIDGE   0x01
 PCI-to-PCI bridge header.
#define PCI_HEADER_TYPE_CARDBUS   0x02
 CardBus header.
#define PCI_HEADER_TYPE_MASK   0x7f
 Header type mask.
#define PCI_HEADER_TYPE_MULTI   0x80
 Multi-function device.
#define PCI_BASE_ADDRESS(n)
 PCI base address registers.
#define PCI_BASE_ADDRESS_0   PCI_BASE_ADDRESS ( 0 )
#define PCI_BASE_ADDRESS_1   PCI_BASE_ADDRESS ( 1 )
#define PCI_BASE_ADDRESS_2   PCI_BASE_ADDRESS ( 2 )
#define PCI_BASE_ADDRESS_3   PCI_BASE_ADDRESS ( 3 )
#define PCI_BASE_ADDRESS_4   PCI_BASE_ADDRESS ( 4 )
#define PCI_BASE_ADDRESS_5   PCI_BASE_ADDRESS ( 5 )
#define PCI_BASE_ADDRESS_SPACE_IO   0x00000001UL
 I/O BAR.
#define PCI_BASE_ADDRESS_IO_MASK   0x00000003UL
 I/O BAR mask.
#define PCI_BASE_ADDRESS_MEM_TYPE_64   0x00000004UL
 64-bit memory
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK   0x00000006UL
 Memory type mask.
#define PCI_BASE_ADDRESS_MEM_MASK   0x0000000fUL
 Memory BAR mask.
#define PCI_SUBSYSTEM_VENDOR_ID   0x2c
 PCI subsystem vendor ID.
#define PCI_SUBSYSTEM_ID   0x2e
 PCI subsystem ID.
#define PCI_ROM_ADDRESS   0x30
 PCI expansion ROM base address.
#define PCI_CAPABILITY_LIST   0x34
 PCI capabilities pointer.
#define PCI_CB_CAPABILITY_LIST   0x14
 CardBus capabilities pointer.
#define PCI_INTERRUPT_LINE   0x3c
 PCI interrupt line.
#define PCI_CAP_ID   0x00
 Capability ID.
#define PCI_CAP_ID_PM   0x01
 Power management.
#define PCI_CAP_ID_VPD   0x03
 Vital product data.
#define PCI_CAP_ID_VNDR   0x09
 Vendor-specific.
#define PCI_CAP_ID_EXP   0x10
 PCI Express.
#define PCI_CAP_ID_MSIX   0x11
 MSI-X.
#define PCI_CAP_ID_EA   0x14
 Enhanced Allocation.
#define PCI_CAP_NEXT   0x01
 Next capability.
#define PCI_PM_CTRL   0x04
 Power management control and status.
#define PCI_PM_CTRL_STATE_MASK   0x0003
 Current power state.
#define PCI_PM_CTRL_PME_ENABLE   0x0100
 PME pin enable.
#define PCI_PM_CTRL_PME_STATUS   0x8000
 PME pin status.
#define PCI_EXP_DEVCTL   0x08
 PCI Express.
#define PCI_EXP_DEVCTL_FLR   0x8000
 Function level reset.
#define PCI_MSIX_CTRL   0x02
 MSI-X interrupts.
#define PCI_MSIX_CTRL_ENABLE   0x8000
 Enable MSI-X.
#define PCI_MSIX_CTRL_MASK   0x4000
 Mask all interrupts.
#define PCI_MSIX_CTRL_SIZE(x)
 Table size.
#define PCI_MSIX_DESC_TABLE   0x04
#define PCI_MSIX_DESC_PBA   0x08
#define PCI_MSIX_DESC_BIR(x)
 BAR index.
#define PCI_MSIX_DESC_OFFSET(x)
 BAR offset.
#define PCI_ERR_UNCOR_STATUS   0x04
 Uncorrectable error status.
#define PCI_CLASS_NETWORK   0x02
 Network controller.
#define PCI_CLASS_BRIDGE   0x06
 Bridge device.
#define PCI_CLASS_BRIDGE_PCI   0x04
 PCI-to-PCI bridge.
#define PCI_CLASS_SERIAL   0x0c
 Serial bus controller.
#define PCI_CLASS_SERIAL_USB   0x03
 USB controller.
#define PCI_CLASS_SERIAL_USB_UHCI   0x00
 UHCI USB controller.
#define PCI_CLASS_SERIAL_USB_OHCI   0x10
 OHCI USB controller.
#define PCI_CLASS_SERIAL_USB_EHCI   0x20
 ECHI USB controller.
#define PCI_CLASS_SERIAL_USB_XHCI   0x30
 xHCI USB controller
#define PCI_PRIMARY   0x18
 Primary bus number.
#define PCI_SECONDARY   0x19
 Secondary bus number.
#define PCI_SUBORDINATE   0x1a
 Subordinate bus number.
#define PCI_MEM_BASE   0x20
 Memory base and limit.
#define PCI_MEM_LIMIT   0x22
#define PCI_MEM_MASK   0x000fUL
#define PCI_PREFMEM_BASE   0x24
#define PCI_PREFMEM_LIMIT   0x26
#define PCI_PREFMEM_BASE_HI   0x28
#define PCI_PREFMEM_LIMIT_HI   0x2c
#define PCI_CLASS(base, sub, progif)
 Construct PCI class.
#define PCI_EXP_FLR_DELAY_MS   100
 PCI Express function level reset delay (in ms)
#define PCI_ANY_ID   0xffff
 Match-anything ID.
#define PCI_CLASS_ID(base, sub, progif)
 Construct PCI class ID.
#define PCI_DRIVERS   __table ( struct pci_driver, "pci_drivers" )
 PCI driver table.
#define __pci_driver   __table_entry ( PCI_DRIVERS, 01 )
 Declare a PCI driver.
#define __pci_driver_fallback   __table_entry ( PCI_DRIVERS, 02 )
 Declare a fallback PCI driver.
#define PCI_SEG(busdevfn)
#define PCI_BUS(busdevfn)
#define PCI_SLOT(busdevfn)
#define PCI_FUNC(busdevfn)
#define PCI_FIRST_FUNC(busdevfn)
#define PCI_LAST_FUNC(busdevfn)
#define PCI_BASE_CLASS(class)
#define PCI_SUB_CLASS(class)
#define PCI_PROG_INTF(class)
#define PCI_ID(_vendor, _device, _name, _description, _data)
#define PCI_ROM(_vendor, _device, _name, _description, _data)
#define PCI_FMT   "%04x:%02x:%02x.%x"
 PCI device debug message format.
#define PCI_ARGS(pci)
 PCI device debug message arguments.

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)
 FILE_SECBOOT (PERMITTED)
void adjust_pci_device (struct pci_device *pci)
 Enable PCI device.
unsigned long pci_bar_start (struct pci_device *pci, unsigned int reg)
 Find the start of a PCI BAR.
void pci_bar_set (struct pci_device *pci, unsigned int reg, unsigned long start)
 Set the start of a PCI BAR.
unsigned long pci_bar_size (struct pci_device *pci, unsigned int reg)
 Get the size of a PCI BAR.
int pci_read_config (struct pci_device *pci)
 Read PCI device configuration.
int pci_find_next (struct pci_device *pci, uint32_t *busdevfn)
 Find next device on PCI bus.
int pci_find_driver (struct pci_device *pci)
 Find driver for PCI device.
int pci_probe (struct pci_device *pci)
 Probe a PCI device.
void pci_remove (struct pci_device *pci)
 Remove a PCI device.
int pci_find_capability (struct pci_device *pci, int capability)
 Look for a PCI capability.
int pci_find_next_capability (struct pci_device *pci, int pos, int capability)
 Look for another PCI capability.
void pci_reset (struct pci_device *pci, unsigned int exp)
 Perform PCI Express function-level reset (FLR)
static void pci_init (struct pci_device *pci, unsigned int busdevfn)
 Initialise PCI device.
static void pci_set_driver (struct pci_device *pci, struct pci_driver *driver, struct pci_device_id *id)
 Set PCI driver.
static void pci_set_drvdata (struct pci_device *pci, void *priv)
 Set PCI driver-private data.
static void * pci_get_drvdata (struct pci_device *pci)
 Get PCI driver-private data.

Detailed Description

PCI bus.

Definition in file pci.h.

Macro Definition Documentation

◆ PCI_VENDOR_ID

#define PCI_VENDOR_ID   0x00

PCI vendor ID.

Definition at line 20 of file pci.h.

Referenced by arbel_reset(), hermon_reset(), and pci_read_config().

◆ PCI_DEVICE_ID

#define PCI_DEVICE_ID   0x02

PCI device ID.

Definition at line 23 of file pci.h.

◆ PCI_COMMAND

#define PCI_COMMAND   0x04

PCI command.

Definition at line 26 of file pci.h.

Referenced by __vxge_hw_device_pci_e_init(), adjust_pci_device(), atl1e_reset_hw(), atl1e_setup_pcicmd(), bnx2_init_board(), bnxt_er_task(), bnxt_get_pci_info(), igbvf_sw_init(), myri10ge_net_irq(), pci_bar_set(), pci_bar_size(), tg3_chip_reset(), tg3_get_invariants(), tg3_restore_pci_state(), tg3_save_pci_state(), and xhci_remove().

◆ PCI_COMMAND_IO

#define PCI_COMMAND_IO   0x0001

I/O space.

Definition at line 27 of file pci.h.

Referenced by adjust_pci_device(), atl1e_reset_hw(), pci_bar_set(), and pci_bar_size().

◆ PCI_COMMAND_MEM

#define PCI_COMMAND_MEM   0x0002

Memory space.

Definition at line 28 of file pci.h.

Referenced by adjust_pci_device(), atl1e_reset_hw(), atl1e_setup_pcicmd(), pci_bar_set(), and pci_bar_size().

◆ PCI_COMMAND_MASTER

#define PCI_COMMAND_MASTER   0x0004

Bus master.

Definition at line 29 of file pci.h.

Referenced by adjust_pci_device(), atl1e_reset_hw(), atl1e_setup_pcicmd(), bnxt_er_task(), and xhci_remove().

◆ PCI_COMMAND_INVALIDATE

#define PCI_COMMAND_INVALIDATE   0x0010

Mem.

write & invalidate

Definition at line 30 of file pci.h.

Referenced by tg3_get_invariants().

◆ PCI_COMMAND_PARITY

#define PCI_COMMAND_PARITY   0x0040

Parity error response.

Definition at line 31 of file pci.h.

Referenced by bnx2_init_board(), and tg3_get_invariants().

◆ PCI_COMMAND_SERR

#define PCI_COMMAND_SERR   0x0100

SERR# enable.

Definition at line 32 of file pci.h.

Referenced by bnx2_init_board(), and tg3_get_invariants().

◆ PCI_COMMAND_INTX_DISABLE

#define PCI_COMMAND_INTX_DISABLE   0x0400

Interrupt disable.

Definition at line 33 of file pci.h.

Referenced by bnxt_get_pci_info(), and myri10ge_net_irq().

◆ PCI_STATUS

#define PCI_STATUS   0x06

PCI status.

Definition at line 36 of file pci.h.

Referenced by pci_find_capability(), skge_reset(), sky2_hw_intr(), and sky2_reset().

◆ PCI_STATUS_CAP_LIST

#define PCI_STATUS_CAP_LIST   0x0010

Capabilities list.

Definition at line 37 of file pci.h.

Referenced by pci_find_capability().

◆ PCI_STATUS_PARITY

#define PCI_STATUS_PARITY   0x0100

Master data parity error.

Definition at line 38 of file pci.h.

◆ PCI_STATUS_REC_TARGET_ABORT

#define PCI_STATUS_REC_TARGET_ABORT   0x1000

Received target abort.

Definition at line 39 of file pci.h.

◆ PCI_STATUS_REC_MASTER_ABORT

#define PCI_STATUS_REC_MASTER_ABORT   0x2000

Received master abort.

Definition at line 40 of file pci.h.

◆ PCI_STATUS_SIG_SYSTEM_ERROR

#define PCI_STATUS_SIG_SYSTEM_ERROR   0x4000

Signalled system error.

Definition at line 41 of file pci.h.

◆ PCI_STATUS_DETECTED_PARITY

#define PCI_STATUS_DETECTED_PARITY   0x8000

Detected parity error.

Definition at line 42 of file pci.h.

◆ PCI_REVISION

#define PCI_REVISION   0x08

PCI revision.

Definition at line 45 of file pci.h.

Referenced by atl1e_sw_init(), dmfe_probe(), falcon_probe_nic_variant(), gve_probe(), igbvf_sw_init(), pci_read_config(), rhine_probe(), sis900_probe(), sundance_probe(), tulip_probe(), and vxge_probe().

◆ PCI_CACHE_LINE_SIZE

#define PCI_CACHE_LINE_SIZE   0x0c

PCI cache line size.

Definition at line 48 of file pci.h.

Referenced by ath5k_probe(), ath_pci_probe(), ath_pci_read_cachesize(), tg3_get_invariants(), and tg3_restore_pci_state().

◆ PCI_LATENCY_TIMER

#define PCI_LATENCY_TIMER   0x0d

PCI latency timer.

Definition at line 51 of file pci.h.

Referenced by adjust_pci_device(), ath5k_probe(), ath_pci_probe(), tg3_get_invariants(), and tg3_restore_pci_state().

◆ PCI_HEADER_TYPE

#define PCI_HEADER_TYPE   0x0e

PCI header type.

Definition at line 54 of file pci.h.

Referenced by pci_find_capability(), pci_find_next(), and pci_read_config().

◆ PCI_HEADER_TYPE_NORMAL

#define PCI_HEADER_TYPE_NORMAL   0x00

Normal header.

Definition at line 55 of file pci.h.

Referenced by efipci_supported(), and pci_find_capability().

◆ PCI_HEADER_TYPE_BRIDGE

#define PCI_HEADER_TYPE_BRIDGE   0x01

PCI-to-PCI bridge header.

Definition at line 56 of file pci.h.

Referenced by pci_find_capability(), and pci_find_next().

◆ PCI_HEADER_TYPE_CARDBUS

#define PCI_HEADER_TYPE_CARDBUS   0x02

CardBus header.

Definition at line 57 of file pci.h.

Referenced by pci_find_capability().

◆ PCI_HEADER_TYPE_MASK

#define PCI_HEADER_TYPE_MASK   0x7f

Header type mask.

Definition at line 58 of file pci.h.

Referenced by efipci_supported(), pci_find_capability(), and pci_find_next().

◆ PCI_HEADER_TYPE_MULTI

#define PCI_HEADER_TYPE_MULTI   0x80

Multi-function device.

Definition at line 59 of file pci.h.

Referenced by pci_read_config().

◆ PCI_BASE_ADDRESS

#define PCI_BASE_ADDRESS ( n)
Value:
( 0x10 + ( 4 * (n) ) )

PCI base address registers.

Definition at line 62 of file pci.h.

Referenced by pci_msix_ioremap(), and virtio_pci_map_capability().

◆ PCI_BASE_ADDRESS_0

#define PCI_BASE_ADDRESS_0   PCI_BASE_ADDRESS ( 0 )

Definition at line 63 of file pci.h.

Referenced by __vxge_hw_device_get_legacy_reg(), amd8111e_probe(), bnx2_init_board(), bnxt_get_pci_info(), dmfe_probe(), efx_probe(), forcedeth_map_regs(), igbvf_probe(), mlx_pci_init_priv(), pci_read_bases(), phantom_map_crb(), skge_probe(), sky2_probe(), tg3_init_one(), and vxge_probe().

◆ PCI_BASE_ADDRESS_1

#define PCI_BASE_ADDRESS_1   PCI_BASE_ADDRESS ( 1 )

Definition at line 64 of file pci.h.

◆ PCI_BASE_ADDRESS_2

#define PCI_BASE_ADDRESS_2   PCI_BASE_ADDRESS ( 2 )

Definition at line 65 of file pci.h.

Referenced by bnxt_get_pci_info(), efab_probe(), and efx_probe().

◆ PCI_BASE_ADDRESS_3

#define PCI_BASE_ADDRESS_3   PCI_BASE_ADDRESS ( 3 )

Definition at line 66 of file pci.h.

◆ PCI_BASE_ADDRESS_4

#define PCI_BASE_ADDRESS_4   PCI_BASE_ADDRESS ( 4 )

Definition at line 67 of file pci.h.

Referenced by bnxt_get_pci_info().

◆ PCI_BASE_ADDRESS_5

#define PCI_BASE_ADDRESS_5   PCI_BASE_ADDRESS ( 5 )

Definition at line 68 of file pci.h.

Referenced by forcedeth_map_regs(), and pci_read_bases().

◆ PCI_BASE_ADDRESS_SPACE_IO

#define PCI_BASE_ADDRESS_SPACE_IO   0x00000001UL

I/O BAR.

Definition at line 69 of file pci.h.

Referenced by efx_probe(), forcedeth_map_regs(), pci_bar(), pci_bar_set(), pci_bar_start(), pci_read_bases(), and virtio_pci_map_capability().

◆ PCI_BASE_ADDRESS_IO_MASK

#define PCI_BASE_ADDRESS_IO_MASK   0x00000003UL

I/O BAR mask.

Definition at line 70 of file pci.h.

Referenced by efx_probe(), pci_bar_start(), pci_read_bases(), and prism2_find_plx().

◆ PCI_BASE_ADDRESS_MEM_TYPE_64

#define PCI_BASE_ADDRESS_MEM_TYPE_64   0x00000004UL

64-bit memory

Definition at line 71 of file pci.h.

Referenced by pci_bar(), pci_bar_set(), and pci_read_bases().

◆ PCI_BASE_ADDRESS_MEM_TYPE_MASK

#define PCI_BASE_ADDRESS_MEM_TYPE_MASK   0x00000006UL

Memory type mask.

Definition at line 72 of file pci.h.

Referenced by pci_bar(), and pci_bar_set().

◆ PCI_BASE_ADDRESS_MEM_MASK

#define PCI_BASE_ADDRESS_MEM_MASK   0x0000000fUL

Memory BAR mask.

Definition at line 73 of file pci.h.

Referenced by pci_bar_start(), and pci_read_bases().

◆ PCI_SUBSYSTEM_VENDOR_ID

#define PCI_SUBSYSTEM_VENDOR_ID   0x2c

PCI subsystem vendor ID.

Definition at line 76 of file pci.h.

Referenced by bnxt_get_pci_info(), pcnet32_setup_if_duplex(), tg3_init_one(), and undinet_irq_is_broken().

◆ PCI_SUBSYSTEM_ID

#define PCI_SUBSYSTEM_ID   0x2e

PCI subsystem ID.

Definition at line 79 of file pci.h.

Referenced by ath_pci_probe(), bnxt_get_pci_info(), pcnet32_setup_if_duplex(), tg3_init_one(), and undinet_irq_is_broken().

◆ PCI_ROM_ADDRESS

#define PCI_ROM_ADDRESS   0x30

PCI expansion ROM base address.

Definition at line 82 of file pci.h.

Referenced by undipci_find_rom().

◆ PCI_CAPABILITY_LIST

#define PCI_CAPABILITY_LIST   0x34

PCI capabilities pointer.

Definition at line 85 of file pci.h.

Referenced by pci_find_capability().

◆ PCI_CB_CAPABILITY_LIST

#define PCI_CB_CAPABILITY_LIST   0x14

CardBus capabilities pointer.

Definition at line 88 of file pci.h.

Referenced by pci_find_capability().

◆ PCI_INTERRUPT_LINE

#define PCI_INTERRUPT_LINE   0x3c

PCI interrupt line.

Definition at line 91 of file pci.h.

Referenced by pci_read_config().

◆ PCI_CAP_ID

#define PCI_CAP_ID   0x00

Capability ID.

Definition at line 94 of file pci.h.

Referenced by pci_find_capability_common().

◆ PCI_CAP_ID_PM

#define PCI_CAP_ID_PM   0x01

Power management.

Definition at line 95 of file pci.h.

Referenced by bnx2_init_board().

◆ PCI_CAP_ID_VPD

#define PCI_CAP_ID_VPD   0x03

Vital product data.

Definition at line 96 of file pci.h.

Referenced by pci_vpd_init().

◆ PCI_CAP_ID_VNDR

#define PCI_CAP_ID_VNDR   0x09

Vendor-specific.

Definition at line 97 of file pci.h.

Referenced by myri10ge_pci_probe(), and virtio_pci_find_capability().

◆ PCI_CAP_ID_EXP

#define PCI_CAP_ID_EXP   0x10

PCI Express.

Definition at line 98 of file pci.h.

Referenced by ath5k_hw_attach(), ath5k_hw_nic_wakeup(), ice_probe(), intelxl_probe(), intelxlvf_probe(), sky2_reset(), sky2_rx_start(), tg3_get_invariants(), and undinet_irq_is_broken().

◆ PCI_CAP_ID_MSIX

#define PCI_CAP_ID_MSIX   0x11

MSI-X.

Definition at line 99 of file pci.h.

Referenced by pci_msix_enable().

◆ PCI_CAP_ID_EA

#define PCI_CAP_ID_EA   0x14

Enhanced Allocation.

Definition at line 100 of file pci.h.

Referenced by pciea_offset().

◆ PCI_CAP_NEXT

#define PCI_CAP_NEXT   0x01

Next capability.

Definition at line 103 of file pci.h.

Referenced by pci_find_capability_common(), and pci_find_next_capability().

◆ PCI_PM_CTRL

#define PCI_PM_CTRL   0x04

Power management control and status.

Definition at line 106 of file pci.h.

Referenced by bnx2_set_power_state_0(), tg3_get_eeprom_hw_cfg(), tg3_get_invariants(), and tg3_set_power_state_0().

◆ PCI_PM_CTRL_STATE_MASK

#define PCI_PM_CTRL_STATE_MASK   0x0003

Current power state.

Definition at line 107 of file pci.h.

Referenced by bnx2_set_power_state_0(), tg3_get_eeprom_hw_cfg(), tg3_get_invariants(), and tg3_set_power_state_0().

◆ PCI_PM_CTRL_PME_ENABLE

#define PCI_PM_CTRL_PME_ENABLE   0x0100

PME pin enable.

Definition at line 108 of file pci.h.

Referenced by tg3_get_invariants().

◆ PCI_PM_CTRL_PME_STATUS

#define PCI_PM_CTRL_PME_STATUS   0x8000

PME pin status.

Definition at line 109 of file pci.h.

Referenced by bnx2_set_power_state_0(), and tg3_set_power_state_0().

◆ PCI_EXP_DEVCTL

#define PCI_EXP_DEVCTL   0x08

PCI Express.

Definition at line 112 of file pci.h.

Referenced by pci_reset(), and tg3_chip_reset().

◆ PCI_EXP_DEVCTL_FLR

#define PCI_EXP_DEVCTL_FLR   0x8000

Function level reset.

Definition at line 113 of file pci.h.

Referenced by pci_reset().

◆ PCI_MSIX_CTRL

#define PCI_MSIX_CTRL   0x02

MSI-X interrupts.

Definition at line 116 of file pci.h.

Referenced by pci_msix_disable(), and pci_msix_enable().

◆ PCI_MSIX_CTRL_ENABLE

#define PCI_MSIX_CTRL_ENABLE   0x8000

Enable MSI-X.

Definition at line 117 of file pci.h.

Referenced by pci_msix_disable(), and pci_msix_enable().

◆ PCI_MSIX_CTRL_MASK

#define PCI_MSIX_CTRL_MASK   0x4000

Mask all interrupts.

Definition at line 118 of file pci.h.

Referenced by pci_msix_enable().

◆ PCI_MSIX_CTRL_SIZE

#define PCI_MSIX_CTRL_SIZE ( x)
Value:
( (x) & 0x07ff )
x
static unsigned int x
Definition pixbuf.h:63

Table size.

Definition at line 119 of file pci.h.

Referenced by pci_msix_enable().

◆ PCI_MSIX_DESC_TABLE

#define PCI_MSIX_DESC_TABLE   0x04

Definition at line 120 of file pci.h.

Referenced by pci_msix_enable(), and pci_msix_name().

◆ PCI_MSIX_DESC_PBA

#define PCI_MSIX_DESC_PBA   0x08

Definition at line 121 of file pci.h.

Referenced by pci_msix_enable(), and pci_msix_name().

◆ PCI_MSIX_DESC_BIR

#define PCI_MSIX_DESC_BIR ( x)
Value:
( (x) & 0x00000007 )

BAR index.

Definition at line 122 of file pci.h.

Referenced by pci_msix_ioremap().

◆ PCI_MSIX_DESC_OFFSET

#define PCI_MSIX_DESC_OFFSET ( x)
Value:
( (x) & 0xfffffff8 )

BAR offset.

Definition at line 123 of file pci.h.

Referenced by pci_msix_ioremap().

◆ PCI_ERR_UNCOR_STATUS

#define PCI_ERR_UNCOR_STATUS   0x04

Uncorrectable error status.

Definition at line 126 of file pci.h.

Referenced by sky2_hw_intr(), and sky2_reset().

◆ PCI_CLASS_NETWORK

#define PCI_CLASS_NETWORK   0x02

Network controller.

Definition at line 129 of file pci.h.

◆ PCI_CLASS_BRIDGE

#define PCI_CLASS_BRIDGE   0x06

Bridge device.

Definition at line 132 of file pci.h.

◆ PCI_CLASS_BRIDGE_PCI

#define PCI_CLASS_BRIDGE_PCI   0x04

PCI-to-PCI bridge.

Definition at line 133 of file pci.h.

◆ PCI_CLASS_SERIAL

#define PCI_CLASS_SERIAL   0x0c

Serial bus controller.

Definition at line 136 of file pci.h.

◆ PCI_CLASS_SERIAL_USB

#define PCI_CLASS_SERIAL_USB   0x03

USB controller.

Definition at line 137 of file pci.h.

◆ PCI_CLASS_SERIAL_USB_UHCI

#define PCI_CLASS_SERIAL_USB_UHCI   0x00

UHCI USB controller.

Definition at line 138 of file pci.h.

Referenced by ehci_poll_companions().

◆ PCI_CLASS_SERIAL_USB_OHCI

#define PCI_CLASS_SERIAL_USB_OHCI   0x10

OHCI USB controller.

Definition at line 139 of file pci.h.

Referenced by ehci_poll_companions().

◆ PCI_CLASS_SERIAL_USB_EHCI

#define PCI_CLASS_SERIAL_USB_EHCI   0x20

ECHI USB controller.

Definition at line 140 of file pci.h.

Referenced by ehci_companion().

◆ PCI_CLASS_SERIAL_USB_XHCI

#define PCI_CLASS_SERIAL_USB_XHCI   0x30

xHCI USB controller

Definition at line 141 of file pci.h.

Referenced by efi_veto_hp_xhci().

◆ PCI_PRIMARY

#define PCI_PRIMARY   0x18

Primary bus number.

Definition at line 144 of file pci.h.

Referenced by pcibridge_probe().

◆ PCI_SECONDARY

#define PCI_SECONDARY   0x19

Secondary bus number.

Definition at line 147 of file pci.h.

◆ PCI_SUBORDINATE

#define PCI_SUBORDINATE   0x1a

Subordinate bus number.

Definition at line 150 of file pci.h.

Referenced by pci_find_next().

◆ PCI_MEM_BASE

#define PCI_MEM_BASE   0x20

Memory base and limit.

Definition at line 153 of file pci.h.

Referenced by pcibridge_probe().

◆ PCI_MEM_LIMIT

#define PCI_MEM_LIMIT   0x22

Definition at line 154 of file pci.h.

Referenced by pcibridge_probe().

◆ PCI_MEM_MASK

#define PCI_MEM_MASK   0x000fUL

Definition at line 155 of file pci.h.

Referenced by pcibridge_probe().

◆ PCI_PREFMEM_BASE

#define PCI_PREFMEM_BASE   0x24

Definition at line 156 of file pci.h.

Referenced by pcibridge_probe().

◆ PCI_PREFMEM_LIMIT

#define PCI_PREFMEM_LIMIT   0x26

Definition at line 157 of file pci.h.

Referenced by pcibridge_probe().

◆ PCI_PREFMEM_BASE_HI

#define PCI_PREFMEM_BASE_HI   0x28

Definition at line 158 of file pci.h.

Referenced by pcibridge_probe().

◆ PCI_PREFMEM_LIMIT_HI

#define PCI_PREFMEM_LIMIT_HI   0x2c

Definition at line 159 of file pci.h.

Referenced by pcibridge_probe().

◆ PCI_CLASS

#define PCI_CLASS ( base,
sub,
progif )
Value:
( ( ( (base) & 0xff ) << 16 ) | ( ( (sub) & 0xff ) << 8 ) | \
( ( (progif) & 0xff) << 0 ) )
base
uint32_t base
Base.
Definition librm.h:3

Construct PCI class.

Parameters
baseBase class (or PCI_ANY_ID)
subSubclass (or PCI_ANY_ID)
progifProgramming interface (or PCI_ANY_ID)

Definition at line 167 of file pci.h.

167#define PCI_CLASS( base, sub, progif ) \
168 ( ( ( (base) & 0xff ) << 16 ) | ( ( (sub) & 0xff ) << 8 ) | \
169 ( ( (progif) & 0xff) << 0 ) )

Referenced by efi_veto_hp_xhci(), ehci_companion(), and ehci_poll_companions().

◆ PCI_EXP_FLR_DELAY_MS

#define PCI_EXP_FLR_DELAY_MS   100

PCI Express function level reset delay (in ms)

Definition at line 172 of file pci.h.

Referenced by pci_reset().

◆ PCI_ANY_ID

#define PCI_ANY_ID   0xffff

Match-anything ID.

Definition at line 187 of file pci.h.

Referenced by pci_find_driver(), spcr_console(), and undinet_irq_is_broken().

◆ PCI_CLASS_ID

#define PCI_CLASS_ID ( base,
sub,
progif )
Value:
{ \
.class = PCI_CLASS ( base, sub, progif ), \
.mask = ( ( ( ( (base) == PCI_ANY_ID ) ? 0x00 : 0xff ) << 16 ) | \
( ( ( (sub) == PCI_ANY_ID ) ? 0x00 : 0xff ) << 8 ) | \
( ( ( (progif) == PCI_ANY_ID ) ? 0x00 : 0xff ) << 0 ) ), \
}
PCI_ANY_ID
#define PCI_ANY_ID
Match-anything ID.
Definition pci.h:187
PCI_CLASS
#define PCI_CLASS(base, sub, progif)
Construct PCI class.
Definition pci.h:167

Construct PCI class ID.

Parameters
baseBase class (or PCI_ANY_ID)
subSubclass (or PCI_ANY_ID)
progifProgramming interface (or PCI_ANY_ID)

Definition at line 203 of file pci.h.

203#define PCI_CLASS_ID( base, sub, progif ) { \
204 .class = PCI_CLASS ( base, sub, progif ), \
205 .mask = ( ( ( ( (base) == PCI_ANY_ID ) ? 0x00 : 0xff ) << 16 ) | \
206 ( ( ( (sub) == PCI_ANY_ID ) ? 0x00 : 0xff ) << 8 ) | \
207 ( ( ( (progif) == PCI_ANY_ID ) ? 0x00 : 0xff ) << 0 ) ), \
208 }

◆ PCI_DRIVERS

#define PCI_DRIVERS   __table ( struct pci_driver, "pci_drivers" )

PCI driver table.

Definition at line 275 of file pci.h.

Referenced by efi_veto_hp_xhci(), and pci_find_driver().

◆ __pci_driver

struct pci_driver txnic_bgx_driver __pci_driver   __table_entry ( PCI_DRIVERS, 01 )

Declare a PCI driver.

BGX PCI driver.

Definition at line 278 of file pci.h.

◆ __pci_driver_fallback

#define __pci_driver_fallback   __table_entry ( PCI_DRIVERS, 02 )

Declare a fallback PCI driver.

Definition at line 281 of file pci.h.

◆ PCI_SEG

#define PCI_SEG ( busdevfn)
Value:
( ( (busdevfn) >> 16 ) & 0xffff )
busdevfn
uint16_t busdevfn
PCI bus:dev.fn address.
Definition ena.h:17

Definition at line 283 of file pci.h.

Referenced by format_busdevfn_setting(), pci_find_next(), pci_read_config(), pcicloud_api(), pcicloud_find(), and phantom_probe().

◆ PCI_BUS

#define PCI_BUS ( busdevfn)
Value:
( ( (busdevfn) >> 8 ) & 0xff )

Definition at line 284 of file pci.h.

Referenced by bofm(), efipci_address(), efipci_discover_one(), format_busdevfn_setting(), int13_device_path_info(), pci_find_next(), pci_read_config(), pcibridge_find(), pcicloud_api(), pcicloud_find(), phantom_probe(), pxenv_undi_get_nic_type(), and undibus_probe().

◆ PCI_SLOT

#define PCI_SLOT ( busdevfn)
Value:
( ( (busdevfn) >> 3 ) & 0x1f )

Definition at line 285 of file pci.h.

Referenced by bofm(), efipci_address(), ena_membases(), format_busdevfn_setting(), int13_device_path_info(), pci_read_config(), pcicloud_api(), pcicloud_find(), phantom_probe(), pxenv_undi_get_nic_type(), undi_load(), and undibus_probe().

◆ PCI_FUNC

#define PCI_FUNC ( busdevfn)
Value:
( ( (busdevfn) >> 0 ) & 0x07 )

Definition at line 286 of file pci.h.

Referenced by bofm(), efipci_address(), ena_membases(), format_busdevfn_setting(), int13_device_path_info(), intel_probe(), intelx_probe(), pci_read_config(), pcicloud_api(), pcicloud_find(), phantom_probe(), pxenv_undi_get_nic_type(), tg3_get_device_address(), tg3_mdio_init(), undi_load(), and undibus_probe().

◆ PCI_FIRST_FUNC

#define PCI_FIRST_FUNC ( busdevfn)
Value:
( (busdevfn) & ~0x07 )

Definition at line 287 of file pci.h.

Referenced by ehci_poll_companions(), hunt_probe(), and pci_read_config().

◆ PCI_LAST_FUNC

#define PCI_LAST_FUNC ( busdevfn)
Value:
( (busdevfn) | 0x07 )

Definition at line 288 of file pci.h.

Referenced by ehci_companion().

◆ PCI_BASE_CLASS

#define PCI_BASE_CLASS ( class)
Value:
( (class) >> 16 )

Definition at line 290 of file pci.h.

Referenced by pxenv_undi_get_nic_type().

◆ PCI_SUB_CLASS

#define PCI_SUB_CLASS ( class)
Value:
( ( (class) >> 8 ) & 0xff )

Definition at line 291 of file pci.h.

Referenced by pxenv_undi_get_nic_type().

◆ PCI_PROG_INTF

#define PCI_PROG_INTF ( class)
Value:
( (class) & 0xff )

Definition at line 292 of file pci.h.

Referenced by pxenv_undi_get_nic_type().

◆ PCI_ID

#define PCI_ID ( _vendor,
_device,
_name,
_description,
_data )
Value:
{ \
.vendor = _vendor, \
.device = _device, \
.name = _name, \
.driver_data = _data \
}

Definition at line 302 of file pci.h.

302#define PCI_ID( _vendor, _device, _name, _description, _data ) { \
303 .vendor = _vendor, \
304 .device = _device, \
305 .name = _name, \
306 .driver_data = _data \
307}

◆ PCI_ROM

#define PCI_ROM ( _vendor,
_device,
_name,
_description,
_data )
Value:
PCI_ID( _vendor, _device, _name, _description, _data )
PCI_ID
#define PCI_ID(_vendor, _device, _name, _description, _data)
Definition pci.h:302

Definition at line 308 of file pci.h.

308#define PCI_ROM( _vendor, _device, _name, _description, _data ) \
309 PCI_ID( _vendor, _device, _name, _description, _data )

◆ PCI_FMT

#define PCI_FMT   "%04x:%02x:%02x.%x"

PCI device debug message format.

Definition at line 312 of file pci.h.

Referenced by adjust_pci_device(), bofm(), bofm_en(), bofm_probe(), bofm_register(), bofm_remove(), bofm_test(), bofm_test_init(), bofm_unregister(), ecam_access(), efipci_discover_any(), efipci_discover_one(), efipci_dma_alloc(), efipci_dma_map(), efipci_dma_set_mask(), efipci_info(), efipci_ioremap(), efipci_read(), efipci_root_open(), efipci_start(), efipci_supported(), efipci_write(), ena_membases(), hunt_probe(), nvs_vpd_init(), nvs_vpd_nvo_init(), nvs_vpd_read(), nvs_vpd_resize(), nvs_vpd_write(), pci_bar(), pci_find_next(), pci_msix_enable(), pci_probe(), pci_remove(), pci_settings_fetch(), pci_vpd_find(), pci_vpd_find_tag(), pci_vpd_init(), pci_vpd_read_dword(), pci_vpd_resize(), pci_vpd_write_dword(), pcibridge_probe(), pcibus_probe(), pcicloud_api(), pcicloud_find(), pciea_bar_value(), phantom_map_crb(), spcr_console(), uhci_root_speed(), and vxge_probe().

◆ PCI_ARGS

#define PCI_ARGS ( pci)
Value:
PCI_SEG ( (pci)->busdevfn ), PCI_BUS ( (pci)->busdevfn ), \
PCI_SLOT ( (pci)->busdevfn ), PCI_FUNC ( (pci)->busdevfn )
PCI_SEG
#define PCI_SEG(busdevfn)
Definition pci.h:283
PCI_FUNC
#define PCI_FUNC(busdevfn)
Definition pci.h:286
PCI_BUS
#define PCI_BUS(busdevfn)
Definition pci.h:284

PCI device debug message arguments.

Definition at line 315 of file pci.h.

315#define PCI_ARGS( pci ) \
316 PCI_SEG ( (pci)->busdevfn ), PCI_BUS ( (pci)->busdevfn ), \
317 PCI_SLOT ( (pci)->busdevfn ), PCI_FUNC ( (pci)->busdevfn )

Referenced by adjust_pci_device(), bofm(), bofm_en(), bofm_probe(), bofm_register(), bofm_remove(), bofm_test(), bofm_test_init(), bofm_unregister(), ecam_access(), efipci_discover_any(), efipci_discover_one(), efipci_dma_alloc(), efipci_dma_map(), efipci_dma_set_mask(), efipci_info(), efipci_ioremap(), efipci_read(), efipci_root_open(), efipci_start(), efipci_supported(), efipci_write(), ena_membases(), hunt_probe(), nvs_vpd_init(), nvs_vpd_nvo_init(), nvs_vpd_read(), nvs_vpd_resize(), nvs_vpd_write(), pci_bar(), pci_find_next(), pci_msix_enable(), pci_probe(), pci_remove(), pci_settings_fetch(), pci_vpd_find(), pci_vpd_find_tag(), pci_vpd_init(), pci_vpd_read_dword(), pci_vpd_resize(), pci_vpd_write_dword(), pcibridge_probe(), pcibus_probe(), pciea_bar_value(), phantom_map_crb(), uhci_root_speed(), and vxge_probe().

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )

◆ FILE_SECBOOT()

FILE_SECBOOT ( PERMITTED )

◆ adjust_pci_device()

void adjust_pci_device ( struct pci_device * pci)
extern

Enable PCI device.

Parameters
pciPCI device

Set device to be a busmaster in case BIOS neglected to do so. Also adjust PCI latency timer to a reasonable value, 32.

Definition at line 241 of file pci.c.

241 {
242 unsigned short new_command, pci_command;
243 unsigned char pci_latency;
244
245 pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
246 new_command = ( pci_command | PCI_COMMAND_MASTER |
247 PCI_COMMAND_MEM | PCI_COMMAND_IO );
248 if ( pci_command != new_command ) {
249 DBGC ( pci, PCI_FMT " device not enabled by BIOS! Updating "
250 "PCI command %04x->%04x\n",
251 PCI_ARGS ( pci ), pci_command, new_command );
252 pci_write_config_word ( pci, PCI_COMMAND, new_command );
253 }
254
255 pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
256 if ( pci_latency < 32 ) {
257 DBGC ( pci, PCI_FMT " latency timer is unreasonably low at "
258 "%d. Setting to 32.\n", PCI_ARGS ( pci ), pci_latency );
259 pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32);
260 }
261}
DBGC
#define DBGC(...)
Definition compiler.h:505
pci_read_config_word
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
pci_write_config_byte
int pci_write_config_byte(struct pci_device *pci, unsigned int where, uint8_t value)
Write byte to PCI configuration space.
pci_write_config_word
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
pci_read_config_byte
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.
PCI_FMT
#define PCI_FMT
PCI device debug message format.
Definition pci.h:312
PCI_COMMAND_MEM
#define PCI_COMMAND_MEM
Memory space.
Definition pci.h:28
PCI_ARGS
#define PCI_ARGS(pci)
PCI device debug message arguments.
Definition pci.h:315
PCI_COMMAND_IO
#define PCI_COMMAND_IO
I/O space.
Definition pci.h:27
PCI_COMMAND_MASTER
#define PCI_COMMAND_MASTER
Bus master.
Definition pci.h:29
PCI_COMMAND
#define PCI_COMMAND
PCI command.
Definition pci.h:26
PCI_LATENCY_TIMER
#define PCI_LATENCY_TIMER
PCI latency timer.
Definition pci.h:51

References DBGC, PCI_ARGS, PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MASTER, PCI_COMMAND_MEM, PCI_FMT, PCI_LATENCY_TIMER, pci_read_config_byte(), pci_read_config_word(), pci_write_config_byte(), and pci_write_config_word().

Referenced by a3c90x_probe(), amd8111e_probe(), arbel_probe(), ath5k_probe(), ath_pci_probe(), atl1e_probe(), atl_probe(), b44_probe(), bnx2_init_board(), bnxt_init_one(), dmfe_probe(), efab_probe(), efx_probe(), ehci_probe(), ena_probe(), exanic_probe(), forcedeth_probe(), golan_pci_init(), gve_probe(), hermon_bofm_probe(), hermon_probe(), hvm_probe(), ice_probe(), icplus_probe(), ifec_pci_probe(), igbvf_probe(), intel_probe(), intelx_probe(), intelxl_probe(), intelxlvf_probe(), intelxvf_probe(), jme_probe(), linda_probe(), mlx_pci_init_priv(), myri10ge_pci_probe(), myson_probe(), natsemi_probe(), pcnet32_probe(), phantom_probe(), pnic_probe(), qib7322_probe(), rdc_probe(), realtek_probe(), rhine_probe(), rtl818x_probe(), sis190_init_board(), sis900_probe(), skeleton_probe(), skge_probe(), sky2_probe(), sundance_probe(), tg3_init_one(), tlan_probe(), tulip_probe(), txnic_bgx_probe(), txnic_pf_probe(), uhci_probe(), velocity_probe(), virtnet_probe_legacy(), virtnet_probe_modern(), vmxnet3_probe(), vxge_probe(), w89c840_probe(), and xhci_probe().

◆ pci_bar_start()

unsigned long pci_bar_start ( struct pci_device * pci,
unsigned int reg )
extern

Find the start of a PCI BAR.

Parameters
pciPCI device
regPCI register number
Return values
startBAR start address

Reads the specified PCI base address register, and returns the address portion of the BAR (i.e. without the flags).

If the address exceeds the size of an unsigned long (i.e. if a 64-bit BAR has a non-zero high dword on a 32-bit machine), the return value will be zero.

Definition at line 97 of file pci.c.

97 {
98 unsigned long bar;
99
100 bar = pci_bar ( pci, reg );
101 if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
102 return ( bar & ~PCI_BASE_ADDRESS_IO_MASK );
103 } else {
104 return ( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
105 }
106}
reg
static unsigned int unsigned int reg
Definition myson.h:162
pci_bar
static unsigned long pci_bar(struct pci_device *pci, unsigned int reg)
Read PCI BAR.
Definition pci.c:61
PCI_BASE_ADDRESS_SPACE_IO
#define PCI_BASE_ADDRESS_SPACE_IO
I/O BAR.
Definition pci.h:69
PCI_BASE_ADDRESS_MEM_MASK
#define PCI_BASE_ADDRESS_MEM_MASK
Memory BAR mask.
Definition pci.h:73
PCI_BASE_ADDRESS_IO_MASK
#define PCI_BASE_ADDRESS_IO_MASK
I/O BAR mask.
Definition pci.h:70

References pci_bar(), PCI_BASE_ADDRESS_IO_MASK, PCI_BASE_ADDRESS_MEM_MASK, PCI_BASE_ADDRESS_SPACE_IO, and reg.

Referenced by amd8111e_probe(), arbel_probe(), bnx2_init_board(), bnxt_pci_base(), dmfe_probe(), efab_probe(), efx_probe(), ehci_probe(), ena_membases(), exanic_probe(), flexboot_nodnic_alloc_uar(), forcedeth_map_regs(), golan_alloc_uar(), golan_pci_init(), gve_probe(), hermon_bofm_probe(), hermon_probe(), hvm_probe(), igbvf_probe(), mlx_pci_init_priv(), pci_bar_size(), pci_msix_ioremap(), phantom_map_crb(), skge_probe(), sky2_probe(), tg3_init_one(), undipci_find_rom(), virtio_pci_map_capability(), vmxnet3_probe(), vxge_probe(), and xhci_probe().

◆ pci_bar_set()

void pci_bar_set ( struct pci_device * pci,
unsigned int reg,
unsigned long start )
extern

Set the start of a PCI BAR.

Parameters
pciPCI device
regPCI register number
startBAR start address

Definition at line 115 of file pci.c.

116 {
117 unsigned int type;
118 uint32_t low;
119 uint32_t high;
120 uint16_t cmd;
121
122 /* Save the original command register and disable decoding */
123 pci_read_config_word ( pci, PCI_COMMAND, &cmd );
124 pci_write_config_word ( pci, PCI_COMMAND,
125 ( cmd & ~( PCI_COMMAND_MEM |
126 PCI_COMMAND_IO ) ) );
127
128 /* Check for a 64-bit BAR */
129 pci_read_config_dword ( pci, reg, &low );
130 type = ( low & ( PCI_BASE_ADDRESS_SPACE_IO |
131 PCI_BASE_ADDRESS_MEM_TYPE_MASK ) );
132
133 /* Write low 32 bits */
134 low = start;
135 pci_write_config_dword ( pci, reg, low );
136
137 /* Write high 32 bits, if applicable */
138 if ( type == PCI_BASE_ADDRESS_MEM_TYPE_64 ) {
139 if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
140 high = ( ( ( uint64_t ) start ) >> 32 );
141 } else {
142 high = 0;
143 }
144 pci_write_config_dword ( pci, reg + 4, high );
145 }
146
147 /* Restore the original command register */
148 pci_write_config_word ( pci, PCI_COMMAND, cmd );
149}
cmd
struct golan_eqe_cmd cmd
Definition CIB_PRM.h:1
uint16_t
unsigned short uint16_t
Definition stdint.h:11
uint32_t
unsigned int uint32_t
Definition stdint.h:12
uint64_t
unsigned long long uint64_t
Definition stdint.h:13
type
uint32_t type
Operating system type.
Definition ena.h:1
start
uint32_t start
Starting offset.
Definition netvsc.h:1
pci_read_config_dword
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
pci_write_config_dword
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
high
uint32_t high
High 32 bits of address.
Definition myson.h:1
low
uint32_t low
Low 16 bits of address.
Definition myson.h:0
PCI_BASE_ADDRESS_MEM_TYPE_MASK
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK
Memory type mask.
Definition pci.h:72
PCI_BASE_ADDRESS_MEM_TYPE_64
#define PCI_BASE_ADDRESS_MEM_TYPE_64
64-bit memory
Definition pci.h:71

References cmd, high, low, PCI_BASE_ADDRESS_MEM_TYPE_64, PCI_BASE_ADDRESS_MEM_TYPE_MASK, PCI_BASE_ADDRESS_SPACE_IO, PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MEM, pci_read_config_dword(), pci_read_config_word(), pci_write_config_dword(), pci_write_config_word(), reg, start, and type.

Referenced by ena_membases(), and pci_bar_size().

◆ pci_bar_size()

unsigned long pci_bar_size ( struct pci_device * pci,
unsigned int reg )
extern

Get the size of a PCI BAR.

Parameters
pciPCI device
regPCI register number
Return values
sizeBAR size

Most drivers should not need to call this function. It is not necessary to map the whole PCI BAR, only the portion that will be used for register access. Since register offsets are almost always fixed by hardware design, the length of the mapped portion will almost always be a compile-time constant.

Definition at line 164 of file pci.c.

164 {
165 unsigned long start;
166 unsigned long size;
167 uint16_t cmd;
168
169 /* Save the original command register and disable decoding */
170 pci_read_config_word ( pci, PCI_COMMAND, &cmd );
171 pci_write_config_word ( pci, PCI_COMMAND,
172 ( cmd & ~( PCI_COMMAND_MEM |
173 PCI_COMMAND_IO ) ) );
174
175 /* Save the original start address */
176 start = pci_bar_start ( pci, reg );
177
178 /* Set all possible bits */
179 pci_bar_set ( pci, reg, -1UL );
180
181 /* Determine size by finding lowest set bit */
182 size = pci_bar_start ( pci, reg );
183 size &= ( -size );
184
185 /* Restore the original start address */
186 pci_bar_set ( pci, reg, start );
187
188 /* Restore the original command register */
189 pci_write_config_word ( pci, PCI_COMMAND, cmd );
190
191 return size;
192}
size
uint16_t size
Buffer size.
Definition dwmac.h:3
pci_bar_set
void pci_bar_set(struct pci_device *pci, unsigned int reg, unsigned long start)
Set the start of a PCI BAR.
Definition pci.c:115
pci_bar_start
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
Definition pci.c:97

References cmd, pci_bar_set(), pci_bar_start(), PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MEM, pci_read_config_word(), pci_write_config_word(), reg, size, and start.

Referenced by __vxge_hw_device_get_legacy_reg(), amd8111e_probe(), bnxt_pci_base(), efab_probe(), efx_probe(), ehci_probe(), ena_membases(), exanic_probe(), forcedeth_map_regs(), gve_probe(), hvm_probe(), igbvf_probe(), phantom_map_crb(), tg3_init_one(), virtio_pci_map_capability(), vxge_probe(), and xhci_probe().

◆ pci_read_config()

int pci_read_config ( struct pci_device * pci)
extern

Read PCI device configuration.

Parameters
pciPCI device
Return values
rcReturn status code

Definition at line 269 of file pci.c.

269 {
270 uint32_t busdevfn;
271 uint8_t hdrtype;
272 uint32_t tmp;
273
274 /* Ignore all but the first function on non-multifunction devices */
275 if ( PCI_FUNC ( pci->busdevfn ) != 0 ) {
276 busdevfn = pci->busdevfn;
277 pci->busdevfn = PCI_FIRST_FUNC ( pci->busdevfn );
278 pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
279 pci->busdevfn = busdevfn;
280 if ( ! ( hdrtype & PCI_HEADER_TYPE_MULTI ) )
281 return -ENODEV;
282 }
283
284 /* Check for physical device presence */
285 pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp );
286 if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
287 return -ENODEV;
288
289 /* Populate struct pci_device */
290 pci->vendor = ( tmp & 0xffff );
291 pci->device = ( tmp >> 16 );
292 pci_read_config_dword ( pci, PCI_REVISION, &tmp );
293 pci->class = ( tmp >> 8 );
294 pci_read_config_byte ( pci, PCI_INTERRUPT_LINE, &pci->irq );
295 pci_read_config_byte ( pci, PCI_HEADER_TYPE, &pci->hdrtype );
296 pci_read_bases ( pci );
297
298 /* Initialise generic device component */
299 snprintf ( pci->dev.name, sizeof ( pci->dev.name ), "%04x:%02x:%02x.%x",
300 PCI_SEG ( pci->busdevfn ), PCI_BUS ( pci->busdevfn ),
301 PCI_SLOT ( pci->busdevfn ), PCI_FUNC ( pci->busdevfn ) );
302 pci->dev.desc.bus_type = BUS_TYPE_PCI;
303 pci->dev.desc.location = pci->busdevfn;
304 pci->dev.desc.vendor = pci->vendor;
305 pci->dev.desc.device = pci->device;
306 pci->dev.desc.class = pci->class;
307 pci->dev.desc.ioaddr = pci->ioaddr;
308 pci->dev.desc.irq = pci->irq;
309 INIT_LIST_HEAD ( &pci->dev.siblings );
310 INIT_LIST_HEAD ( &pci->dev.children );
311
312 return 0;
313}
uint8_t
unsigned char uint8_t
Definition stdint.h:10
BUS_TYPE_PCI
#define BUS_TYPE_PCI
PCI bus type.
Definition device.h:44
ENODEV
#define ENODEV
No such device.
Definition errno.h:510
tmp
unsigned long tmp
Definition linux_pci.h:65
INIT_LIST_HEAD
#define INIT_LIST_HEAD(list)
Initialise a list head.
Definition list.h:46
pci_read_bases
static void pci_read_bases(struct pci_device *pci)
Read membase and ioaddr for a PCI device.
Definition pci.c:207
PCI_HEADER_TYPE
#define PCI_HEADER_TYPE
PCI header type.
Definition pci.h:54
PCI_FIRST_FUNC
#define PCI_FIRST_FUNC(busdevfn)
Definition pci.h:287
PCI_INTERRUPT_LINE
#define PCI_INTERRUPT_LINE
PCI interrupt line.
Definition pci.h:91
PCI_HEADER_TYPE_MULTI
#define PCI_HEADER_TYPE_MULTI
Multi-function device.
Definition pci.h:59
PCI_REVISION
#define PCI_REVISION
PCI revision.
Definition pci.h:45
PCI_SLOT
#define PCI_SLOT(busdevfn)
Definition pci.h:285
PCI_VENDOR_ID
#define PCI_VENDOR_ID
PCI vendor ID.
Definition pci.h:20
device_description::bus_type
unsigned int bus_type
Bus type.
Definition device.h:25
device_description::device
unsigned int device
Device ID.
Definition device.h:34
device_description::vendor
unsigned int vendor
Vendor ID.
Definition device.h:32
device_description::class
unsigned long class
Device class.
Definition device.h:36
device_description::location
unsigned int location
Location.
Definition device.h:30
device_description::irq
unsigned int irq
IRQ.
Definition device.h:40
device_description::ioaddr
unsigned long ioaddr
I/O address.
Definition device.h:38
device::desc
struct device_description desc
Device description.
Definition device.h:83
device::children
struct list_head children
Devices attached to this device.
Definition device.h:87
device::siblings
struct list_head siblings
Devices on the same bus.
Definition device.h:85
device::name
char name[40]
Name.
Definition device.h:79
pci_device::ioaddr
unsigned long ioaddr
I/O address.
Definition pci.h:226
pci_device::busdevfn
uint32_t busdevfn
Segment, bus, device, and function (bus:dev.fn) number.
Definition pci.h:238
pci_device::class
uint32_t class
Device class.
Definition pci.h:232
pci_device::hdrtype
uint8_t hdrtype
Header type.
Definition pci.h:236
pci_device::irq
uint8_t irq
Interrupt number.
Definition pci.h:234
pci_device::dev
struct device dev
Generic device.
Definition pci.h:213
pci_device::vendor
uint16_t vendor
Vendor ID.
Definition pci.h:228
pci_device::device
uint16_t device
Device ID.
Definition pci.h:230
snprintf
int snprintf(char *buf, size_t size, const char *fmt,...)
Write a formatted string to a buffer.
Definition vsprintf.c:383

References device_description::bus_type, BUS_TYPE_PCI, busdevfn, pci_device::busdevfn, device::children, device_description::class, pci_device::class, device::desc, pci_device::dev, device_description::device, pci_device::device, ENODEV, pci_device::hdrtype, INIT_LIST_HEAD, device_description::ioaddr, pci_device::ioaddr, device_description::irq, pci_device::irq, device_description::location, device::name, PCI_BUS, PCI_FIRST_FUNC, PCI_FUNC, PCI_HEADER_TYPE, PCI_HEADER_TYPE_MULTI, PCI_INTERRUPT_LINE, pci_read_bases(), pci_read_config_byte(), pci_read_config_dword(), PCI_REVISION, PCI_SEG, PCI_SLOT, PCI_VENDOR_ID, device::siblings, snprintf(), tmp, device_description::vendor, and pci_device::vendor.

Referenced by bofm_test_init(), efipci_info(), ehci_companion(), and pci_find_next().

◆ pci_find_next()

int pci_find_next ( struct pci_device * pci,
uint32_t * busdevfn )
extern

Find next device on PCI bus.

Parameters
pciPCI device to fill in
busdevfnStarting bus:dev.fn address
Return values
busdevfnBus:dev.fn address of next PCI device
rcReturn status code

Definition at line 323 of file pci.c.

323 {
324 static struct pci_range range;
325 uint8_t hdrtype;
326 uint8_t sub;
327 uint32_t end;
328 unsigned int count;
329 int rc;
330
331 /* Find next PCI device, if any */
332 do {
333 /* Find next PCI bus:dev.fn address range, if necessary */
334 if ( ( *busdevfn - range.start ) >= range.count ) {
335 pci_discover ( *busdevfn, &range );
336 if ( *busdevfn < range.start )
337 *busdevfn = range.start;
338 if ( ( *busdevfn - range.start ) >= range.count )
339 break;
340 }
341
342 /* Check for PCI device existence */
343 memset ( pci, 0, sizeof ( *pci ) );
344 pci_init ( pci, *busdevfn );
345 if ( ( rc = pci_read_config ( pci ) ) != 0 )
346 continue;
347
348 /* If device is a bridge, expand the PCI bus:dev.fn
349 * address range as needed.
350 */
351 pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
352 hdrtype &= PCI_HEADER_TYPE_MASK;
353 if ( hdrtype == PCI_HEADER_TYPE_BRIDGE ) {
354 pci_read_config_byte ( pci, PCI_SUBORDINATE, &sub );
355 if ( sub <= PCI_BUS ( *busdevfn ) ) {
356 DBGC ( pci, PCI_FMT " ignoring invalid "
357 "subordinate bus %#02x\n",
358 PCI_ARGS ( pci ), sub );
359 } else {
360 end = PCI_BUSDEVFN ( PCI_SEG ( *busdevfn ),
361 ( sub + 1 ), 0, 0 );
362 count = ( end - range.start );
363 if ( count > range.count ) {
364 DBGC ( pci, PCI_FMT " found "
365 "subordinate bus %#02x\n",
366 PCI_ARGS ( pci ), sub );
367 range.count = count;
368 }
369 }
370 }
371
372 /* Return this device */
373 return 0;
374
375 } while ( ++(*busdevfn) );
376
377 return -ENODEV;
378}
rc
struct arbelprm_rc_send_wqe rc
Definition arbel.h:3
count
static unsigned int count
Number of entries.
Definition dwmac.h:220
pci_discover
void pci_discover(uint32_t busdevfn, struct pci_range *range)
Find next PCI bus:dev.fn address range in system.
PCI_BUSDEVFN
#define PCI_BUSDEVFN(segment, bus, slot, func)
Definition pci_io.h:30
memset
void * memset(void *dest, int character, size_t len) __nonnull
end
uint32_t end
Ending offset.
Definition netvsc.h:7
pci_read_config
int pci_read_config(struct pci_device *pci)
Read PCI device configuration.
Definition pci.c:269
PCI_SUBORDINATE
#define PCI_SUBORDINATE
Subordinate bus number.
Definition pci.h:150
pci_init
static void pci_init(struct pci_device *pci, unsigned int busdevfn)
Initialise PCI device.
Definition pci.h:341
PCI_HEADER_TYPE_MASK
#define PCI_HEADER_TYPE_MASK
Header type mask.
Definition pci.h:58
PCI_HEADER_TYPE_BRIDGE
#define PCI_HEADER_TYPE_BRIDGE
PCI-to-PCI bridge header.
Definition pci.h:56
range
struct pci_range range
PCI bus:dev.fn address range.
Definition pcicloud.c:40
pci_range
A PCI bus:dev.fn address range.
Definition pci_io.h:23

References busdevfn, count, DBGC, end, ENODEV, memset(), PCI_ARGS, PCI_BUS, PCI_BUSDEVFN, pci_discover(), PCI_FMT, PCI_HEADER_TYPE, PCI_HEADER_TYPE_BRIDGE, PCI_HEADER_TYPE_MASK, pci_init(), pci_read_config(), pci_read_config_byte(), PCI_SEG, PCI_SUBORDINATE, range, and rc.

Referenced by pcibus_probe(), and pciscan_exec().

◆ pci_find_driver()

int pci_find_driver ( struct pci_device * pci)
extern

Find driver for PCI device.

Parameters
pciPCI device
Return values
rcReturn status code

Definition at line 386 of file pci.c.

386 {
387 struct pci_driver *driver;
388 struct pci_device_id *id;
389 unsigned int i;
390
391 for_each_table_entry ( driver, PCI_DRIVERS ) {
392 if ( ( driver->class.class ^ pci->class ) & driver->class.mask )
393 continue;
394 for ( i = 0 ; i < driver->id_count ; i++ ) {
395 id = &driver->ids[i];
396 if ( ( id->vendor != PCI_ANY_ID ) &&
397 ( id->vendor != pci->vendor ) )
398 continue;
399 if ( ( id->device != PCI_ANY_ID ) &&
400 ( id->device != pci->device ) )
401 continue;
402 pci_set_driver ( pci, driver, id );
403 return 0;
404 }
405 }
406 return -ENOENT;
407}
id
uint8_t id
Request identifier.
Definition ena.h:1
ENOENT
#define ENOENT
No such file or directory.
Definition errno.h:515
PCI_DRIVERS
#define PCI_DRIVERS
PCI driver table.
Definition pci.h:275
pci_set_driver
static void pci_set_driver(struct pci_device *pci, struct pci_driver *driver, struct pci_device_id *id)
Set PCI driver.
Definition pci.h:352
pci_class_id::class
uint32_t class
Class.
Definition pci.h:192
pci_class_id::mask
uint32_t mask
Class mask.
Definition pci.h:194
pci_device_id
A PCI device ID list entry.
Definition pci.h:175
pci_driver
A PCI driver.
Definition pci.h:252
pci_driver::class
struct pci_class_id class
PCI class ID.
Definition pci.h:258
pci_driver::ids
struct pci_device_id * ids
PCI ID table.
Definition pci.h:254
pci_driver::id_count
unsigned int id_count
Number of entries in PCI ID table.
Definition pci.h:256
for_each_table_entry
#define for_each_table_entry(pointer, table)
Iterate through all entries within a linker table.
Definition tables.h:386

References pci_class_id::class, pci_device::class, pci_driver::class, pci_device::device, ENOENT, for_each_table_entry, id, pci_driver::id_count, pci_driver::ids, pci_class_id::mask, PCI_ANY_ID, PCI_DRIVERS, pci_set_driver(), and pci_device::vendor.

Referenced by efipci_start(), efipci_supported(), and pcibus_probe().

◆ pci_probe()

int pci_probe ( struct pci_device * pci)
extern

Probe a PCI device.

Parameters
pciPCI device
Return values
rcReturn status code

Searches for a driver for the PCI device. If a driver is found, its probe() routine is called.

Definition at line 418 of file pci.c.

418 {
419 int rc;
420
421 DBGC ( pci, PCI_FMT " (%04x:%04x) has driver \"%s\"\n",
422 PCI_ARGS ( pci ), pci->vendor, pci->device, pci->id->name );
423 DBGC ( pci, PCI_FMT " has mem %lx io %lx irq %d\n",
424 PCI_ARGS ( pci ), pci->membase, pci->ioaddr, pci->irq );
425
426 if ( ( rc = pci->driver->probe ( pci ) ) != 0 ) {
427 DBGC ( pci, PCI_FMT " probe failed: %s\n",
428 PCI_ARGS ( pci ), strerror ( rc ) );
429 return rc;
430 }
431
432 return 0;
433}
strerror
char * strerror(int errno)
Retrieve string representation of error number.
Definition strerror.c:79
pci_device_id::name
const char * name
Name.
Definition pci.h:177
pci_device::membase
unsigned long membase
Memory base.
Definition pci.h:220
pci_device::driver
struct pci_driver * driver
Driver for this device.
Definition pci.h:240
pci_device::id
struct pci_device_id * id
Driver device ID.
Definition pci.h:248
pci_driver::probe
int(* probe)(struct pci_device *pci)
Probe device.
Definition pci.h:265

References DBGC, pci_device::device, pci_device::driver, pci_device::id, pci_device::ioaddr, pci_device::irq, pci_device::membase, pci_device_id::name, PCI_ARGS, PCI_FMT, pci_driver::probe, rc, strerror(), and pci_device::vendor.

Referenced by bofm_probe(), efipci_start(), and pcibus_probe().

◆ pci_remove()

void pci_remove ( struct pci_device * pci)
extern

Remove a PCI device.

Parameters
pciPCI device

Definition at line 440 of file pci.c.

440 {
441 pci->driver->remove ( pci );
442 DBGC ( pci, PCI_FMT " removed\n", PCI_ARGS ( pci ) );
443}
pci_driver::remove
void(* remove)(struct pci_device *pci)
Remove device.
Definition pci.h:271

References DBGC, pci_device::driver, PCI_ARGS, PCI_FMT, and pci_driver::remove.

Referenced by bofm_remove(), efipci_start(), efipci_stop(), and pcibus_remove().

◆ pci_find_capability()

int pci_find_capability ( struct pci_device * pci,
int cap )
extern

Look for a PCI capability.

Parameters
pciPCI device to query
capCapability code
Return values
addressAddress of capability, or 0 if not found

Determine whether or not a device supports a given PCI capability. Returns the address of the requested capability structure within the device's PCI configuration space, or 0 if the device does not support it.

Definition at line 39 of file pciextra.c.

39 {
40 uint16_t status;
41 uint8_t pos;
42 uint8_t hdr_type;
43
44 pci_read_config_word ( pci, PCI_STATUS, &status );
45 if ( ! ( status & PCI_STATUS_CAP_LIST ) )
46 return 0;
47
48 pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdr_type );
49 switch ( hdr_type & PCI_HEADER_TYPE_MASK ) {
50 case PCI_HEADER_TYPE_NORMAL:
51 case PCI_HEADER_TYPE_BRIDGE:
52 default:
53 pci_read_config_byte ( pci, PCI_CAPABILITY_LIST, &pos );
54 break;
55 case PCI_HEADER_TYPE_CARDBUS:
56 pci_read_config_byte ( pci, PCI_CB_CAPABILITY_LIST, &pos );
57 break;
58 }
59 return pci_find_capability_common ( pci, pos, cap );
60}
status
uint8_t status
Status.
Definition ena.h:5
PCI_CB_CAPABILITY_LIST
#define PCI_CB_CAPABILITY_LIST
CardBus capabilities pointer.
Definition pci.h:88
PCI_STATUS
#define PCI_STATUS
PCI status.
Definition pci.h:36
PCI_HEADER_TYPE_CARDBUS
#define PCI_HEADER_TYPE_CARDBUS
CardBus header.
Definition pci.h:57
PCI_STATUS_CAP_LIST
#define PCI_STATUS_CAP_LIST
Capabilities list.
Definition pci.h:37
PCI_CAPABILITY_LIST
#define PCI_CAPABILITY_LIST
PCI capabilities pointer.
Definition pci.h:85
PCI_HEADER_TYPE_NORMAL
#define PCI_HEADER_TYPE_NORMAL
Normal header.
Definition pci.h:55
pci_find_capability_common
static int pci_find_capability_common(struct pci_device *pci, uint8_t pos, int cap)
Definition pciextra.c:9

References PCI_CAPABILITY_LIST, PCI_CB_CAPABILITY_LIST, pci_find_capability_common(), PCI_HEADER_TYPE, PCI_HEADER_TYPE_BRIDGE, PCI_HEADER_TYPE_CARDBUS, PCI_HEADER_TYPE_MASK, PCI_HEADER_TYPE_NORMAL, pci_read_config_byte(), pci_read_config_word(), PCI_STATUS, PCI_STATUS_CAP_LIST, and status.

Referenced by ath5k_hw_attach(), ath5k_hw_nic_wakeup(), bnx2_init_board(), ice_probe(), intelxl_probe(), intelxlvf_probe(), myri10ge_pci_probe(), pci_msix_enable(), pci_vpd_init(), pciea_offset(), sky2_reset(), sky2_rx_start(), tg3_get_invariants(), undinet_irq_is_broken(), and virtio_pci_find_capability().

◆ pci_find_next_capability()

int pci_find_next_capability ( struct pci_device * pci,
int pos,
int cap )
extern

Look for another PCI capability.

Parameters
pciPCI device to query
posAddress of the current capability
capCapability code
Return values
addressAddress of capability, or 0 if not found

Determine whether or not a device supports a given PCI capability starting the search at a given address within the device's PCI configuration space. Returns the address of the next capability structure within the device's PCI configuration space, or 0 if the device does not support another such capability.

Definition at line 76 of file pciextra.c.

76 {
77 uint8_t new_pos;
78
79 pci_read_config_byte ( pci, pos + PCI_CAP_NEXT, &new_pos );
80 return pci_find_capability_common ( pci, new_pos, cap );
81}
PCI_CAP_NEXT
#define PCI_CAP_NEXT
Next capability.
Definition pci.h:103

References PCI_CAP_NEXT, pci_find_capability_common(), and pci_read_config_byte().

Referenced by virtio_pci_find_capability().

◆ pci_reset()

void pci_reset ( struct pci_device * pci,
unsigned int exp )
extern

Perform PCI Express function-level reset (FLR)

Parameters
pciPCI device
expPCI Express Capability address

Definition at line 89 of file pciextra.c.

89 {
90 struct pci_config_backup backup;
91 uint16_t control;
92
93 /* Back up configuration space */
94 pci_backup ( pci, &backup, PCI_CONFIG_BACKUP_STANDARD, NULL );
95
96 /* Perform a PCIe function-level reset */
97 pci_read_config_word ( pci, ( exp + PCI_EXP_DEVCTL ), &control );
98 control |= PCI_EXP_DEVCTL_FLR;
99 pci_write_config_word ( pci, ( exp + PCI_EXP_DEVCTL ), control );
100
101 /* Allow time for reset to complete */
102 mdelay ( PCI_EXP_FLR_DELAY_MS );
103
104 /* Restore configuration */
105 pci_restore ( pci, &backup, PCI_CONFIG_BACKUP_STANDARD, NULL );
106}
NULL
#define NULL
NULL pointer (VOID *)
Definition Base.h:322
control
uint32_t control
Control.
Definition myson.h:3
PCI_EXP_DEVCTL_FLR
#define PCI_EXP_DEVCTL_FLR
Function level reset.
Definition pci.h:113
PCI_EXP_DEVCTL
#define PCI_EXP_DEVCTL
PCI Express.
Definition pci.h:112
PCI_EXP_FLR_DELAY_MS
#define PCI_EXP_FLR_DELAY_MS
PCI Express function level reset delay (in ms)
Definition pci.h:172
pci_restore
void pci_restore(struct pci_device *pci, struct pci_config_backup *backup, unsigned int limit, const uint8_t *exclude)
Restore PCI configuration space.
Definition pcibackup.c:88
pci_backup
void pci_backup(struct pci_device *pci, struct pci_config_backup *backup, unsigned int limit, const uint8_t *exclude)
Back up PCI configuration space.
Definition pcibackup.c:68
PCI_CONFIG_BACKUP_STANDARD
#define PCI_CONFIG_BACKUP_STANDARD
Limit of standard PCI configuration space.
Definition pcibackup.h:19
pci_config_backup
A PCI configuration space backup.
Definition pcibackup.h:22
mdelay
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
Definition timer.c:79

References control, mdelay(), NULL, pci_backup(), PCI_CONFIG_BACKUP_STANDARD, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_FLR, PCI_EXP_FLR_DELAY_MS, pci_read_config_word(), pci_restore(), and pci_write_config_word().

Referenced by ice_probe(), ice_remove(), intelxl_probe(), intelxl_remove(), intelxlvf_probe(), and intelxlvf_remove().

◆ pci_init()

void pci_init ( struct pci_device * pci,
unsigned int busdevfn )
inlinestatic

Initialise PCI device.

Parameters
pciPCI device
busdevfnPCI bus:dev.fn address

Definition at line 341 of file pci.h.

341 {
342 pci->busdevfn = busdevfn;
343}

References busdevfn, and pci_device::busdevfn.

Referenced by bofm_test_init(), efipci_discover(), efipci_info(), ehci_companion(), pci_find_next(), pci_settings_fetch(), uhci_root_speed(), and undinet_irq_is_broken().

◆ pci_set_driver()

void pci_set_driver ( struct pci_device * pci,
struct pci_driver * driver,
struct pci_device_id * id )
inlinestatic

Set PCI driver.

Parameters
pciPCI device
driverPCI driver
idPCI device ID

Definition at line 352 of file pci.h.

354 {
355 pci->driver = driver;
356 pci->id = id;
357 pci->dev.driver_name = id->name;
358}
device::driver_name
const char * driver_name
Driver name.
Definition device.h:81

References pci_device::dev, pci_device::driver, device::driver_name, id, and pci_device::id.

Referenced by bofm_find_driver(), and pci_find_driver().

◆ pci_set_drvdata()

void pci_set_drvdata ( struct pci_device * pci,
void * priv )
inlinestatic

Set PCI driver-private data.

Parameters
pciPCI device
privPrivate data

Definition at line 366 of file pci.h.

366 {
367 pci->priv = priv;
368}
pci_device::priv
void * priv
Driver-private data.
Definition pci.h:246
priv
static struct tlan_private * priv
Definition tlan.c:225

References pci_device::priv, and priv.

Referenced by a3c90x_probe(), arbel_probe(), ath5k_probe(), ath_pci_probe(), atl1e_init_netdev(), atl_probe(), b44_probe(), bnxt_init_one(), efab_probe(), ehci_probe(), ena_probe(), exanic_probe(), flexboot_nodnic_probe(), forcedeth_probe(), golan_probe_normal(), gve_probe(), hermon_bofm_probe(), hermon_probe(), hunt_probe(), hvm_probe(), ice_probe(), icplus_probe(), ifec_pci_probe(), igbvf_probe(), intel_probe(), intelx_probe(), intelxl_probe(), intelxlvf_probe(), intelxvf_probe(), jme_probe(), legacy_pci_set_drvdata(), linda_probe(), myri10ge_pci_probe(), myson_probe(), natsemi_probe(), pcibridge_probe(), pcnet32_probe(), phantom_probe(), pnic_probe(), qib7322_probe(), rdc_probe(), realtek_probe(), rhine_probe(), rtl818x_probe(), sis190_probe(), skeleton_probe(), skge_probe(), skge_remove(), sky2_probe(), sky2_remove(), tg3_init_one(), txnic_bgx_probe(), txnic_pf_probe(), uhci_probe(), undipci_probe(), undipci_remove(), velocity_probe(), virtnet_probe_legacy(), virtnet_probe_modern(), vmxnet3_probe(), vxge_probe(), vxge_remove(), and xhci_probe().

◆ pci_get_drvdata()

void * pci_get_drvdata ( struct pci_device * pci)
inlinestatic

Get PCI driver-private data.

Parameters
pciPCI device
Return values
privPrivate data

Definition at line 376 of file pci.h.

376 {
377 return pci->priv;
378}

References pci_device::priv.

Referenced by a3c90x_remove(), arbel_remove(), ath5k_remove(), ath_pci_remove(), atl1e_remove(), atl_remove(), b44_remove(), bnxt_remove_one(), efab_remove(), ehci_remove(), ena_remove(), exanic_remove(), flexboot_nodnic_remove(), forcedeth_remove(), golan_remove_normal(), gve_remove(), hermon_bofm_remove(), hermon_remove(), hunt_remove(), hvm_remove(), ice_remove(), icplus_remove(), ifec_pci_remove(), igbvf_remove(), intel_remove(), intelx_remove(), intelxl_remove(), intelxlvf_remove(), intelxvf_remove(), jme_remove(), legacy_pci_get_drvdata(), linda_remove(), myri10ge_pci_remove(), myson_remove(), natsemi_remove(), pcibridge_remove(), pcnet32_remove(), phantom_remove(), pnic_remove(), qib7322_remove(), rdc_remove(), realtek_remove(), rhine_remove(), rtl818x_remove(), sis190_remove(), skeleton_remove(), skge_remove(), sky2_remove(), tg3_remove_one(), txnic_bgx_remove(), txnic_pf_remove(), uhci_remove(), undipci_remove(), velocity_remove(), virtnet_remove(), vmxnet3_remove(), vxge_close(), vxge_irq(), vxge_open(), vxge_open_vpaths(), vxge_poll(), vxge_remove(), and xhci_remove().

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