iPXE
Data Structures | Macros | Functions | Variables
pci.h File Reference

PCI bus. More...

#include <stdint.h>
#include <ipxe/device.h>
#include <ipxe/tables.h>
#include <ipxe/dma.h>
#include <ipxe/pci_io.h>

Go to the source code of this file.

Data Structures

struct  pci_device_id
 A PCI device ID list entry. More...
 
struct  pci_class_id
 A PCI class ID. More...
 
struct  pci_device
 A PCI device. More...
 
struct  pci_driver
 A PCI driver. More...
 

Macros

#define PCI_VENDOR_ID   0x00
 PCI vendor ID. More...
 
#define PCI_DEVICE_ID   0x02
 PCI device ID. More...
 
#define PCI_COMMAND   0x04
 PCI command. More...
 
#define PCI_COMMAND_IO   0x0001
 I/O space. More...
 
#define PCI_COMMAND_MEM   0x0002
 Memory space. More...
 
#define PCI_COMMAND_MASTER   0x0004
 Bus master. More...
 
#define PCI_COMMAND_INVALIDATE   0x0010
 Mem. More...
 
#define PCI_COMMAND_PARITY   0x0040
 Parity error response. More...
 
#define PCI_COMMAND_SERR   0x0100
 SERR# enable. More...
 
#define PCI_COMMAND_INTX_DISABLE   0x0400
 Interrupt disable. More...
 
#define PCI_STATUS   0x06
 PCI status. More...
 
#define PCI_STATUS_CAP_LIST   0x0010
 Capabilities list. More...
 
#define PCI_STATUS_PARITY   0x0100
 Master data parity error. More...
 
#define PCI_STATUS_REC_TARGET_ABORT   0x1000
 Received target abort. More...
 
#define PCI_STATUS_REC_MASTER_ABORT   0x2000
 Received master abort. More...
 
#define PCI_STATUS_SIG_SYSTEM_ERROR   0x4000
 Signalled system error. More...
 
#define PCI_STATUS_DETECTED_PARITY   0x8000
 Detected parity error. More...
 
#define PCI_REVISION   0x08
 PCI revision. More...
 
#define PCI_CACHE_LINE_SIZE   0x0c
 PCI cache line size. More...
 
#define PCI_LATENCY_TIMER   0x0d
 PCI latency timer. More...
 
#define PCI_HEADER_TYPE   0x0e
 PCI header type. More...
 
#define PCI_HEADER_TYPE_NORMAL   0x00
 Normal header. More...
 
#define PCI_HEADER_TYPE_BRIDGE   0x01
 PCI-to-PCI bridge header. More...
 
#define PCI_HEADER_TYPE_CARDBUS   0x02
 CardBus header. More...
 
#define PCI_HEADER_TYPE_MASK   0x7f
 Header type mask. More...
 
#define PCI_HEADER_TYPE_MULTI   0x80
 Multi-function device. More...
 
#define PCI_BASE_ADDRESS(n)   ( 0x10 + ( 4 * (n) ) )
 PCI base address registers. More...
 
#define PCI_BASE_ADDRESS_0   PCI_BASE_ADDRESS ( 0 )
 
#define PCI_BASE_ADDRESS_1   PCI_BASE_ADDRESS ( 1 )
 
#define PCI_BASE_ADDRESS_2   PCI_BASE_ADDRESS ( 2 )
 
#define PCI_BASE_ADDRESS_3   PCI_BASE_ADDRESS ( 3 )
 
#define PCI_BASE_ADDRESS_4   PCI_BASE_ADDRESS ( 4 )
 
#define PCI_BASE_ADDRESS_5   PCI_BASE_ADDRESS ( 5 )
 
#define PCI_BASE_ADDRESS_SPACE_IO   0x00000001UL
 I/O BAR. More...
 
#define PCI_BASE_ADDRESS_IO_MASK   0x00000003UL
 I/O BAR mask. More...
 
#define PCI_BASE_ADDRESS_MEM_TYPE_64   0x00000004UL
 64-bit memory More...
 
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK   0x00000006UL
 Memory type mask. More...
 
#define PCI_BASE_ADDRESS_MEM_MASK   0x0000000fUL
 Memory BAR mask. More...
 
#define PCI_SUBSYSTEM_VENDOR_ID   0x2c
 PCI subsystem vendor ID. More...
 
#define PCI_SUBSYSTEM_ID   0x2e
 PCI subsystem ID. More...
 
#define PCI_ROM_ADDRESS   0x30
 PCI expansion ROM base address. More...
 
#define PCI_CAPABILITY_LIST   0x34
 PCI capabilities pointer. More...
 
#define PCI_CB_CAPABILITY_LIST   0x14
 CardBus capabilities pointer. More...
 
#define PCI_INTERRUPT_LINE   0x3c
 PCI interrupt line. More...
 
#define PCI_CAP_ID   0x00
 Capability ID. More...
 
#define PCI_CAP_ID_PM   0x01
 Power management. More...
 
#define PCI_CAP_ID_VPD   0x03
 Vital product data. More...
 
#define PCI_CAP_ID_VNDR   0x09
 Vendor-specific. More...
 
#define PCI_CAP_ID_EXP   0x10
 PCI Express. More...
 
#define PCI_CAP_ID_MSIX   0x11
 MSI-X. More...
 
#define PCI_CAP_ID_EA   0x14
 Enhanced Allocation. More...
 
#define PCI_CAP_NEXT   0x01
 Next capability. More...
 
#define PCI_PM_CTRL   0x04
 Power management control and status. More...
 
#define PCI_PM_CTRL_STATE_MASK   0x0003
 Current power state. More...
 
#define PCI_PM_CTRL_PME_ENABLE   0x0100
 PME pin enable. More...
 
#define PCI_PM_CTRL_PME_STATUS   0x8000
 PME pin status. More...
 
#define PCI_EXP_DEVCTL   0x08
 PCI Express. More...
 
#define PCI_EXP_DEVCTL_FLR   0x8000
 Function level reset. More...
 
#define PCI_MSIX_CTRL   0x02
 MSI-X interrupts. More...
 
#define PCI_MSIX_CTRL_ENABLE   0x8000
 Enable MSI-X. More...
 
#define PCI_MSIX_CTRL_MASK   0x4000
 Mask all interrupts. More...
 
#define PCI_MSIX_CTRL_SIZE(x)   ( (x) & 0x07ff )
 Table size. More...
 
#define PCI_MSIX_DESC_TABLE   0x04
 
#define PCI_MSIX_DESC_PBA   0x08
 
#define PCI_MSIX_DESC_BIR(x)   ( (x) & 0x00000007 )
 BAR index. More...
 
#define PCI_MSIX_DESC_OFFSET(x)   ( (x) & 0xfffffff8 )
 BAR offset. More...
 
#define PCI_ERR_UNCOR_STATUS   0x04
 Uncorrectable error status. More...
 
#define PCI_CLASS_NETWORK   0x02
 Network controller. More...
 
#define PCI_CLASS_SERIAL   0x0c
 Serial bus controller. More...
 
#define PCI_CLASS_SERIAL_USB   0x03
 USB controller. More...
 
#define PCI_CLASS_SERIAL_USB_UHCI   0x00
 UHCI USB controller. More...
 
#define PCI_CLASS_SERIAL_USB_OHCI   0x10
 OHCI USB controller. More...
 
#define PCI_CLASS_SERIAL_USB_EHCI   0x20
 ECHI USB controller. More...
 
#define PCI_CLASS_SERIAL_USB_XHCI   0x30
 xHCI USB controller More...
 
#define PCI_SUBORDINATE   0x1a
 Subordinate bus number. More...
 
#define PCI_CLASS(base, sub, progif)
 Construct PCI class. More...
 
#define PCI_EXP_FLR_DELAY_MS   100
 PCI Express function level reset delay (in ms) More...
 
#define PCI_ANY_ID   0xffff
 Match-anything ID. More...
 
#define PCI_CLASS_ID(base, sub, progif)
 Construct PCI class ID. More...
 
#define PCI_DRIVERS   __table ( struct pci_driver, "pci_drivers" )
 PCI driver table. More...
 
#define __pci_driver   __table_entry ( PCI_DRIVERS, 01 )
 Declare a PCI driver. More...
 
#define __pci_driver_fallback   __table_entry ( PCI_DRIVERS, 02 )
 Declare a fallback PCI driver. More...
 
#define PCI_SEG(busdevfn)   ( ( (busdevfn) >> 16 ) & 0xffff )
 
#define PCI_BUS(busdevfn)   ( ( (busdevfn) >> 8 ) & 0xff )
 
#define PCI_SLOT(busdevfn)   ( ( (busdevfn) >> 3 ) & 0x1f )
 
#define PCI_FUNC(busdevfn)   ( ( (busdevfn) >> 0 ) & 0x07 )
 
#define PCI_BUSDEVFN(segment, bus, slot, func)
 
#define PCI_FIRST_FUNC(busdevfn)   ( (busdevfn) & ~0x07 )
 
#define PCI_LAST_FUNC(busdevfn)   ( (busdevfn) | 0x07 )
 
#define PCI_BASE_CLASS(class)   ( (class) >> 16 )
 
#define PCI_SUB_CLASS(class)   ( ( (class) >> 8 ) & 0xff )
 
#define PCI_PROG_INTF(class)   ( (class) & 0xff )
 
#define PCI_ID(_vendor, _device, _name, _description, _data)
 
#define PCI_ROM(_vendor, _device, _name, _description, _data)   PCI_ID( _vendor, _device, _name, _description, _data )
 
#define PCI_FMT   "%04x:%02x:%02x.%x"
 PCI device debug message format. More...
 
#define PCI_ARGS(pci)
 PCI device debug message arguments. More...
 

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)
 
void adjust_pci_device (struct pci_device *pci)
 Enable PCI device. More...
 
unsigned long pci_bar_start (struct pci_device *pci, unsigned int reg)
 Find the start of a PCI BAR. More...
 
int pci_read_config (struct pci_device *pci)
 Read PCI device configuration. More...
 
int pci_find_next (struct pci_device *pci, unsigned int busdevfn)
 Find next device on PCI bus. More...
 
int pci_find_driver (struct pci_device *pci)
 Find driver for PCI device. More...
 
int pci_probe (struct pci_device *pci)
 Probe a PCI device. More...
 
void pci_remove (struct pci_device *pci)
 Remove a PCI device. More...
 
int pci_find_capability (struct pci_device *pci, int capability)
 Look for a PCI capability. More...
 
int pci_find_next_capability (struct pci_device *pci, int pos, int capability)
 Look for another PCI capability. More...
 
unsigned long pci_bar_size (struct pci_device *pci, unsigned int reg)
 Find the size of a PCI BAR. More...
 
void pci_reset (struct pci_device *pci, unsigned int exp)
 Perform PCI Express function-level reset (FLR) More...
 
static void pci_init (struct pci_device *pci, unsigned int busdevfn)
 Initialise PCI device. More...
 
static void pci_set_driver (struct pci_device *pci, struct pci_driver *driver, struct pci_device_id *id)
 Set PCI driver. More...
 
static void pci_set_drvdata (struct pci_device *pci, void *priv)
 Set PCI driver-private data. More...
 
static void * pci_get_drvdata (struct pci_device *pci)
 Get PCI driver-private data. More...
 

Variables

struct pci_device_id __attribute__
 

Detailed Description

PCI bus.

Definition in file pci.h.

Macro Definition Documentation

◆ PCI_VENDOR_ID

#define PCI_VENDOR_ID   0x00

PCI vendor ID.

Definition at line 19 of file pci.h.

◆ PCI_DEVICE_ID

#define PCI_DEVICE_ID   0x02

PCI device ID.

Definition at line 22 of file pci.h.

◆ PCI_COMMAND

#define PCI_COMMAND   0x04

PCI command.

Definition at line 25 of file pci.h.

◆ PCI_COMMAND_IO

#define PCI_COMMAND_IO   0x0001

I/O space.

Definition at line 26 of file pci.h.

◆ PCI_COMMAND_MEM

#define PCI_COMMAND_MEM   0x0002

Memory space.

Definition at line 27 of file pci.h.

◆ PCI_COMMAND_MASTER

#define PCI_COMMAND_MASTER   0x0004

Bus master.

Definition at line 28 of file pci.h.

◆ PCI_COMMAND_INVALIDATE

#define PCI_COMMAND_INVALIDATE   0x0010

Mem.

write & invalidate

Definition at line 29 of file pci.h.

◆ PCI_COMMAND_PARITY

#define PCI_COMMAND_PARITY   0x0040

Parity error response.

Definition at line 30 of file pci.h.

◆ PCI_COMMAND_SERR

#define PCI_COMMAND_SERR   0x0100

SERR# enable.

Definition at line 31 of file pci.h.

◆ PCI_COMMAND_INTX_DISABLE

#define PCI_COMMAND_INTX_DISABLE   0x0400

Interrupt disable.

Definition at line 32 of file pci.h.

◆ PCI_STATUS

#define PCI_STATUS   0x06

PCI status.

Definition at line 35 of file pci.h.

◆ PCI_STATUS_CAP_LIST

#define PCI_STATUS_CAP_LIST   0x0010

Capabilities list.

Definition at line 36 of file pci.h.

◆ PCI_STATUS_PARITY

#define PCI_STATUS_PARITY   0x0100

Master data parity error.

Definition at line 37 of file pci.h.

◆ PCI_STATUS_REC_TARGET_ABORT

#define PCI_STATUS_REC_TARGET_ABORT   0x1000

Received target abort.

Definition at line 38 of file pci.h.

◆ PCI_STATUS_REC_MASTER_ABORT

#define PCI_STATUS_REC_MASTER_ABORT   0x2000

Received master abort.

Definition at line 39 of file pci.h.

◆ PCI_STATUS_SIG_SYSTEM_ERROR

#define PCI_STATUS_SIG_SYSTEM_ERROR   0x4000

Signalled system error.

Definition at line 40 of file pci.h.

◆ PCI_STATUS_DETECTED_PARITY

#define PCI_STATUS_DETECTED_PARITY   0x8000

Detected parity error.

Definition at line 41 of file pci.h.

◆ PCI_REVISION

#define PCI_REVISION   0x08

PCI revision.

Definition at line 44 of file pci.h.

◆ PCI_CACHE_LINE_SIZE

#define PCI_CACHE_LINE_SIZE   0x0c

PCI cache line size.

Definition at line 47 of file pci.h.

◆ PCI_LATENCY_TIMER

#define PCI_LATENCY_TIMER   0x0d

PCI latency timer.

Definition at line 50 of file pci.h.

◆ PCI_HEADER_TYPE

#define PCI_HEADER_TYPE   0x0e

PCI header type.

Definition at line 53 of file pci.h.

◆ PCI_HEADER_TYPE_NORMAL

#define PCI_HEADER_TYPE_NORMAL   0x00

Normal header.

Definition at line 54 of file pci.h.

◆ PCI_HEADER_TYPE_BRIDGE

#define PCI_HEADER_TYPE_BRIDGE   0x01

PCI-to-PCI bridge header.

Definition at line 55 of file pci.h.

◆ PCI_HEADER_TYPE_CARDBUS

#define PCI_HEADER_TYPE_CARDBUS   0x02

CardBus header.

Definition at line 56 of file pci.h.

◆ PCI_HEADER_TYPE_MASK

#define PCI_HEADER_TYPE_MASK   0x7f

Header type mask.

Definition at line 57 of file pci.h.

◆ PCI_HEADER_TYPE_MULTI

#define PCI_HEADER_TYPE_MULTI   0x80

Multi-function device.

Definition at line 58 of file pci.h.

◆ PCI_BASE_ADDRESS

#define PCI_BASE_ADDRESS (   n)    ( 0x10 + ( 4 * (n) ) )

PCI base address registers.

Definition at line 61 of file pci.h.

◆ PCI_BASE_ADDRESS_0

#define PCI_BASE_ADDRESS_0   PCI_BASE_ADDRESS ( 0 )

Definition at line 62 of file pci.h.

◆ PCI_BASE_ADDRESS_1

#define PCI_BASE_ADDRESS_1   PCI_BASE_ADDRESS ( 1 )

Definition at line 63 of file pci.h.

◆ PCI_BASE_ADDRESS_2

#define PCI_BASE_ADDRESS_2   PCI_BASE_ADDRESS ( 2 )

Definition at line 64 of file pci.h.

◆ PCI_BASE_ADDRESS_3

#define PCI_BASE_ADDRESS_3   PCI_BASE_ADDRESS ( 3 )

Definition at line 65 of file pci.h.

◆ PCI_BASE_ADDRESS_4

#define PCI_BASE_ADDRESS_4   PCI_BASE_ADDRESS ( 4 )

Definition at line 66 of file pci.h.

◆ PCI_BASE_ADDRESS_5

#define PCI_BASE_ADDRESS_5   PCI_BASE_ADDRESS ( 5 )

Definition at line 67 of file pci.h.

◆ PCI_BASE_ADDRESS_SPACE_IO

#define PCI_BASE_ADDRESS_SPACE_IO   0x00000001UL

I/O BAR.

Definition at line 68 of file pci.h.

◆ PCI_BASE_ADDRESS_IO_MASK

#define PCI_BASE_ADDRESS_IO_MASK   0x00000003UL

I/O BAR mask.

Definition at line 69 of file pci.h.

◆ PCI_BASE_ADDRESS_MEM_TYPE_64

#define PCI_BASE_ADDRESS_MEM_TYPE_64   0x00000004UL

64-bit memory

Definition at line 70 of file pci.h.

◆ PCI_BASE_ADDRESS_MEM_TYPE_MASK

#define PCI_BASE_ADDRESS_MEM_TYPE_MASK   0x00000006UL

Memory type mask.

Definition at line 71 of file pci.h.

◆ PCI_BASE_ADDRESS_MEM_MASK

#define PCI_BASE_ADDRESS_MEM_MASK   0x0000000fUL

Memory BAR mask.

Definition at line 72 of file pci.h.

◆ PCI_SUBSYSTEM_VENDOR_ID

#define PCI_SUBSYSTEM_VENDOR_ID   0x2c

PCI subsystem vendor ID.

Definition at line 75 of file pci.h.

◆ PCI_SUBSYSTEM_ID

#define PCI_SUBSYSTEM_ID   0x2e

PCI subsystem ID.

Definition at line 78 of file pci.h.

◆ PCI_ROM_ADDRESS

#define PCI_ROM_ADDRESS   0x30

PCI expansion ROM base address.

Definition at line 81 of file pci.h.

◆ PCI_CAPABILITY_LIST

#define PCI_CAPABILITY_LIST   0x34

PCI capabilities pointer.

Definition at line 84 of file pci.h.

◆ PCI_CB_CAPABILITY_LIST

#define PCI_CB_CAPABILITY_LIST   0x14

CardBus capabilities pointer.

Definition at line 87 of file pci.h.

◆ PCI_INTERRUPT_LINE

#define PCI_INTERRUPT_LINE   0x3c

PCI interrupt line.

Definition at line 90 of file pci.h.

◆ PCI_CAP_ID

#define PCI_CAP_ID   0x00

Capability ID.

Definition at line 93 of file pci.h.

◆ PCI_CAP_ID_PM

#define PCI_CAP_ID_PM   0x01

Power management.

Definition at line 94 of file pci.h.

◆ PCI_CAP_ID_VPD

#define PCI_CAP_ID_VPD   0x03

Vital product data.

Definition at line 95 of file pci.h.

◆ PCI_CAP_ID_VNDR

#define PCI_CAP_ID_VNDR   0x09

Vendor-specific.

Definition at line 96 of file pci.h.

◆ PCI_CAP_ID_EXP

#define PCI_CAP_ID_EXP   0x10

PCI Express.

Definition at line 97 of file pci.h.

◆ PCI_CAP_ID_MSIX

#define PCI_CAP_ID_MSIX   0x11

MSI-X.

Definition at line 98 of file pci.h.

◆ PCI_CAP_ID_EA

#define PCI_CAP_ID_EA   0x14

Enhanced Allocation.

Definition at line 99 of file pci.h.

◆ PCI_CAP_NEXT

#define PCI_CAP_NEXT   0x01

Next capability.

Definition at line 102 of file pci.h.

◆ PCI_PM_CTRL

#define PCI_PM_CTRL   0x04

Power management control and status.

Definition at line 105 of file pci.h.

◆ PCI_PM_CTRL_STATE_MASK

#define PCI_PM_CTRL_STATE_MASK   0x0003

Current power state.

Definition at line 106 of file pci.h.

◆ PCI_PM_CTRL_PME_ENABLE

#define PCI_PM_CTRL_PME_ENABLE   0x0100

PME pin enable.

Definition at line 107 of file pci.h.

◆ PCI_PM_CTRL_PME_STATUS

#define PCI_PM_CTRL_PME_STATUS   0x8000

PME pin status.

Definition at line 108 of file pci.h.

◆ PCI_EXP_DEVCTL

#define PCI_EXP_DEVCTL   0x08

PCI Express.

Definition at line 111 of file pci.h.

◆ PCI_EXP_DEVCTL_FLR

#define PCI_EXP_DEVCTL_FLR   0x8000

Function level reset.

Definition at line 112 of file pci.h.

◆ PCI_MSIX_CTRL

#define PCI_MSIX_CTRL   0x02

MSI-X interrupts.

Definition at line 115 of file pci.h.

◆ PCI_MSIX_CTRL_ENABLE

#define PCI_MSIX_CTRL_ENABLE   0x8000

Enable MSI-X.

Definition at line 116 of file pci.h.

◆ PCI_MSIX_CTRL_MASK

#define PCI_MSIX_CTRL_MASK   0x4000

Mask all interrupts.

Definition at line 117 of file pci.h.

◆ PCI_MSIX_CTRL_SIZE

#define PCI_MSIX_CTRL_SIZE (   x)    ( (x) & 0x07ff )

Table size.

Definition at line 118 of file pci.h.

◆ PCI_MSIX_DESC_TABLE

#define PCI_MSIX_DESC_TABLE   0x04

Definition at line 119 of file pci.h.

◆ PCI_MSIX_DESC_PBA

#define PCI_MSIX_DESC_PBA   0x08

Definition at line 120 of file pci.h.

◆ PCI_MSIX_DESC_BIR

#define PCI_MSIX_DESC_BIR (   x)    ( (x) & 0x00000007 )

BAR index.

Definition at line 121 of file pci.h.

◆ PCI_MSIX_DESC_OFFSET

#define PCI_MSIX_DESC_OFFSET (   x)    ( (x) & 0xfffffff8 )

BAR offset.

Definition at line 122 of file pci.h.

◆ PCI_ERR_UNCOR_STATUS

#define PCI_ERR_UNCOR_STATUS   0x04

Uncorrectable error status.

Definition at line 125 of file pci.h.

◆ PCI_CLASS_NETWORK

#define PCI_CLASS_NETWORK   0x02

Network controller.

Definition at line 128 of file pci.h.

◆ PCI_CLASS_SERIAL

#define PCI_CLASS_SERIAL   0x0c

Serial bus controller.

Definition at line 131 of file pci.h.

◆ PCI_CLASS_SERIAL_USB

#define PCI_CLASS_SERIAL_USB   0x03

USB controller.

Definition at line 132 of file pci.h.

◆ PCI_CLASS_SERIAL_USB_UHCI

#define PCI_CLASS_SERIAL_USB_UHCI   0x00

UHCI USB controller.

Definition at line 133 of file pci.h.

◆ PCI_CLASS_SERIAL_USB_OHCI

#define PCI_CLASS_SERIAL_USB_OHCI   0x10

OHCI USB controller.

Definition at line 134 of file pci.h.

◆ PCI_CLASS_SERIAL_USB_EHCI

#define PCI_CLASS_SERIAL_USB_EHCI   0x20

ECHI USB controller.

Definition at line 135 of file pci.h.

◆ PCI_CLASS_SERIAL_USB_XHCI

#define PCI_CLASS_SERIAL_USB_XHCI   0x30

xHCI USB controller

Definition at line 136 of file pci.h.

◆ PCI_SUBORDINATE

#define PCI_SUBORDINATE   0x1a

Subordinate bus number.

Definition at line 139 of file pci.h.

◆ PCI_CLASS

#define PCI_CLASS (   base,
  sub,
  progif 
)
Value:
( ( ( (base) & 0xff ) << 16 ) | ( ( (sub) & 0xff ) << 8 ) | \
( ( (progif) & 0xff) << 0 ) )
uint16_t base
Base address.
Definition: edd.h:14

Construct PCI class.

Parameters
baseBase class (or PCI_ANY_ID)
subSubclass (or PCI_ANY_ID)
progifProgramming interface (or PCI_ANY_ID)

Definition at line 147 of file pci.h.

◆ PCI_EXP_FLR_DELAY_MS

#define PCI_EXP_FLR_DELAY_MS   100

PCI Express function level reset delay (in ms)

Definition at line 152 of file pci.h.

◆ PCI_ANY_ID

#define PCI_ANY_ID   0xffff

Match-anything ID.

Definition at line 167 of file pci.h.

◆ PCI_CLASS_ID

#define PCI_CLASS_ID (   base,
  sub,
  progif 
)
Value:
{ \
.class = PCI_CLASS ( base, sub, progif ), \
.mask = ( ( ( ( (base) == PCI_ANY_ID ) ? 0x00 : 0xff ) << 16 ) | \
( ( ( (sub) == PCI_ANY_ID ) ? 0x00 : 0xff ) << 8 ) | \
( ( ( (progif) == PCI_ANY_ID ) ? 0x00 : 0xff ) << 0 ) ), \
}
#define PCI_CLASS(base, sub, progif)
Construct PCI class.
Definition: pci.h:147
uint16_t base
Base address.
Definition: edd.h:14
#define PCI_ANY_ID
Match-anything ID.
Definition: pci.h:167

Construct PCI class ID.

Parameters
baseBase class (or PCI_ANY_ID)
subSubclass (or PCI_ANY_ID)
progifProgramming interface (or PCI_ANY_ID)

Definition at line 183 of file pci.h.

◆ PCI_DRIVERS

#define PCI_DRIVERS   __table ( struct pci_driver, "pci_drivers" )

PCI driver table.

Definition at line 253 of file pci.h.

◆ __pci_driver

struct pci_driver txnic_bgx_driver __pci_driver   __table_entry ( PCI_DRIVERS, 01 )

Declare a PCI driver.

BGX PCI driver.

Definition at line 256 of file pci.h.

◆ __pci_driver_fallback

#define __pci_driver_fallback   __table_entry ( PCI_DRIVERS, 02 )

Declare a fallback PCI driver.

Definition at line 259 of file pci.h.

◆ PCI_SEG

#define PCI_SEG (   busdevfn)    ( ( (busdevfn) >> 16 ) & 0xffff )

Definition at line 261 of file pci.h.

◆ PCI_BUS

#define PCI_BUS (   busdevfn)    ( ( (busdevfn) >> 8 ) & 0xff )

Definition at line 262 of file pci.h.

◆ PCI_SLOT

#define PCI_SLOT (   busdevfn)    ( ( (busdevfn) >> 3 ) & 0x1f )

Definition at line 263 of file pci.h.

◆ PCI_FUNC

#define PCI_FUNC (   busdevfn)    ( ( (busdevfn) >> 0 ) & 0x07 )

Definition at line 264 of file pci.h.

◆ PCI_BUSDEVFN

#define PCI_BUSDEVFN (   segment,
  bus,
  slot,
  func 
)
Value:
( ( (segment) << 16 ) | ( (bus) << 8 ) | \
( (slot) << 3 ) | ( (func) << 0 ) )
uint16_t segment
Code segment.
Definition: librm.h:252
uint8_t slot
Slot.
Definition: edd.h:16
uint8_t bus
Bus.
Definition: edd.h:14

Definition at line 265 of file pci.h.

◆ PCI_FIRST_FUNC

#define PCI_FIRST_FUNC (   busdevfn)    ( (busdevfn) & ~0x07 )

Definition at line 268 of file pci.h.

◆ PCI_LAST_FUNC

#define PCI_LAST_FUNC (   busdevfn)    ( (busdevfn) | 0x07 )

Definition at line 269 of file pci.h.

◆ PCI_BASE_CLASS

#define PCI_BASE_CLASS (   class)    ( (class) >> 16 )

Definition at line 271 of file pci.h.

◆ PCI_SUB_CLASS

#define PCI_SUB_CLASS (   class)    ( ( (class) >> 8 ) & 0xff )

Definition at line 272 of file pci.h.

◆ PCI_PROG_INTF

#define PCI_PROG_INTF (   class)    ( (class) & 0xff )

Definition at line 273 of file pci.h.

◆ PCI_ID

#define PCI_ID (   _vendor,
  _device,
  _name,
  _description,
  _data 
)
Value:
{ \
.vendor = _vendor, \
.device = _device, \
.name = _name, \
.driver_data = _data \
}

Definition at line 283 of file pci.h.

◆ PCI_ROM

#define PCI_ROM (   _vendor,
  _device,
  _name,
  _description,
  _data 
)    PCI_ID( _vendor, _device, _name, _description, _data )

Definition at line 289 of file pci.h.

◆ PCI_FMT

#define PCI_FMT   "%04x:%02x:%02x.%x"

PCI device debug message format.

Definition at line 293 of file pci.h.

◆ PCI_ARGS

#define PCI_ARGS (   pci)
Value:
PCI_SEG ( (pci)->busdevfn ), PCI_BUS ( (pci)->busdevfn ), \
PCI_SLOT ( (pci)->busdevfn ), PCI_FUNC ( (pci)->busdevfn )
#define PCI_FUNC(busdevfn)
Definition: pci.h:264
#define PCI_BUS(busdevfn)
Definition: pci.h:262
#define PCI_SEG(busdevfn)
Definition: pci.h:261

PCI device debug message arguments.

Definition at line 296 of file pci.h.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL  )

◆ adjust_pci_device()

void adjust_pci_device ( struct pci_device pci)

Enable PCI device.

Parameters
pciPCI device

Set device to be a busmaster in case BIOS neglected to do so. Also adjust PCI latency timer to a reasonable value, 32.

Definition at line 154 of file pci.c.

154  {
155  unsigned short new_command, pci_command;
156  unsigned char pci_latency;
157 
158  pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
159  new_command = ( pci_command | PCI_COMMAND_MASTER |
161  if ( pci_command != new_command ) {
162  DBGC ( pci, PCI_FMT " device not enabled by BIOS! Updating "
163  "PCI command %04x->%04x\n",
164  PCI_ARGS ( pci ), pci_command, new_command );
165  pci_write_config_word ( pci, PCI_COMMAND, new_command );
166  }
167 
168  pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
169  if ( pci_latency < 32 ) {
170  DBGC ( pci, PCI_FMT " latency timer is unreasonably low at "
171  "%d. Setting to 32.\n", PCI_ARGS ( pci ), pci_latency );
173  }
174 }
#define PCI_LATENCY_TIMER
PCI latency timer.
Definition: pci.h:50
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
#define DBGC(...)
Definition: compiler.h:505
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
#define PCI_COMMAND
PCI command.
Definition: pci.h:25
#define PCI_COMMAND_MASTER
Bus master.
Definition: pci.h:28
#define PCI_COMMAND_IO
I/O space.
Definition: pci.h:26
int pci_write_config_byte(struct pci_device *pci, unsigned int where, uint8_t value)
Write byte to PCI configuration space.
#define PCI_FMT
PCI device debug message format.
Definition: pci.h:293
#define PCI_ARGS(pci)
PCI device debug message arguments.
Definition: pci.h:296
#define PCI_COMMAND_MEM
Memory space.
Definition: pci.h:27
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.

References DBGC, PCI_ARGS, PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MASTER, PCI_COMMAND_MEM, PCI_FMT, PCI_LATENCY_TIMER, pci_read_config_byte(), pci_read_config_word(), pci_write_config_byte(), and pci_write_config_word().

Referenced by a3c90x_probe(), amd8111e_probe(), arbel_probe(), ath5k_probe(), ath_pci_probe(), atl1e_probe(), b44_probe(), bnx2_init_board(), bnxt_init_one(), dmfe_probe(), efab_probe(), efx_probe(), ehci_probe(), ena_probe(), exanic_probe(), forcedeth_probe(), golan_pci_init(), hermon_bofm_probe(), hermon_probe(), hvm_probe(), ice_probe(), icplus_probe(), ifec_pci_probe(), igbvf_probe(), intel_probe(), intelx_probe(), intelxl_probe(), intelxlvf_probe(), intelxvf_probe(), jme_probe(), linda_probe(), mlx_pci_init_priv(), myri10ge_pci_probe(), myson_probe(), natsemi_probe(), pci_reset(), pcnet32_probe(), phantom_probe(), pnic_probe(), qib7322_probe(), rdc_probe(), realtek_probe(), rhine_probe(), rtl818x_probe(), sis190_init_board(), sis900_probe(), skeleton_probe(), skge_probe(), sky2_probe(), sundance_probe(), tg3_init_one(), tlan_probe(), tulip_probe(), txnic_bgx_probe(), txnic_pf_probe(), uhci_probe(), velocity_probe(), virtnet_probe_legacy(), virtnet_probe_modern(), vmxnet3_probe(), vxge_probe(), w89c840_probe(), and xhci_probe().

◆ pci_bar_start()

unsigned long pci_bar_start ( struct pci_device pci,
unsigned int  reg 
)

Find the start of a PCI BAR.

Parameters
pciPCI device
regPCI register number
Return values
startBAR start address

Reads the specified PCI base address register, and returns the address portion of the BAR (i.e. without the flags).

If the address exceeds the size of an unsigned long (i.e. if a 64-bit BAR has a non-zero high dword on a 32-bit machine), the return value will be zero.

Definition at line 96 of file pci.c.

96  {
97  unsigned long bar;
98 
99  bar = pci_bar ( pci, reg );
100  if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
101  return ( bar & ~PCI_BASE_ADDRESS_IO_MASK );
102  } else {
103  return ( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
104  }
105 }
static unsigned int unsigned int reg
Definition: myson.h:162
#define PCI_BASE_ADDRESS_IO_MASK
I/O BAR mask.
Definition: pci.h:69
#define PCI_BASE_ADDRESS_MEM_MASK
Memory BAR mask.
Definition: pci.h:72
#define PCI_BASE_ADDRESS_SPACE_IO
I/O BAR.
Definition: pci.h:68
static unsigned long pci_bar(struct pci_device *pci, unsigned int reg)
Read PCI BAR.
Definition: pci.c:60

References pci_bar(), PCI_BASE_ADDRESS_IO_MASK, PCI_BASE_ADDRESS_MEM_MASK, PCI_BASE_ADDRESS_SPACE_IO, and reg.

Referenced by amd8111e_probe(), arbel_probe(), bnx2_init_board(), bnxt_pci_base(), dmfe_probe(), efab_probe(), efx_probe(), ehci_probe(), exanic_probe(), flexboot_nodnic_alloc_uar(), forcedeth_map_regs(), golan_alloc_uar(), golan_pci_init(), hermon_bofm_probe(), hermon_probe(), hvm_probe(), igbvf_probe(), mlx_pci_init_priv(), pci_msix_ioremap(), phantom_map_crb(), skge_probe(), sky2_probe(), tg3_init_one(), undipci_find_rom(), virtio_pci_map_capability(), vmxnet3_probe(), vxge_probe(), and xhci_probe().

◆ pci_read_config()

int pci_read_config ( struct pci_device pci)

Read PCI device configuration.

Parameters
pciPCI device
Return values
rcReturn status code

Definition at line 182 of file pci.c.

182  {
183  uint32_t busdevfn;
184  uint8_t hdrtype;
185  uint32_t tmp;
186 
187  /* Ignore all but the first function on non-multifunction devices */
188  if ( PCI_FUNC ( pci->busdevfn ) != 0 ) {
189  busdevfn = pci->busdevfn;
190  pci->busdevfn = PCI_FIRST_FUNC ( pci->busdevfn );
191  pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
192  pci->busdevfn = busdevfn;
193  if ( ! ( hdrtype & PCI_HEADER_TYPE_MULTI ) )
194  return -ENODEV;
195  }
196 
197  /* Check for physical device presence */
199  if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
200  return -ENODEV;
201 
202  /* Populate struct pci_device */
203  pci->vendor = ( tmp & 0xffff );
204  pci->device = ( tmp >> 16 );
206  pci->class = ( tmp >> 8 );
208  pci_read_bases ( pci );
209 
210  /* Initialise generic device component */
211  snprintf ( pci->dev.name, sizeof ( pci->dev.name ), "%04x:%02x:%02x.%x",
212  PCI_SEG ( pci->busdevfn ), PCI_BUS ( pci->busdevfn ),
213  PCI_SLOT ( pci->busdevfn ), PCI_FUNC ( pci->busdevfn ) );
214  pci->dev.desc.bus_type = BUS_TYPE_PCI;
215  pci->dev.desc.location = pci->busdevfn;
216  pci->dev.desc.vendor = pci->vendor;
217  pci->dev.desc.device = pci->device;
218  pci->dev.desc.class = pci->class;
219  pci->dev.desc.ioaddr = pci->ioaddr;
220  pci->dev.desc.irq = pci->irq;
221  INIT_LIST_HEAD ( &pci->dev.siblings );
222  INIT_LIST_HEAD ( &pci->dev.children );
223 
224  return 0;
225 }
#define PCI_FUNC(busdevfn)
Definition: pci.h:264
uint8_t irq
Interrupt number.
Definition: pci.h:214
#define PCI_BUS(busdevfn)
Definition: pci.h:262
uint32_t class
Device class.
Definition: pci.h:212
unsigned long ioaddr
I/O address.
Definition: pci.h:206
unsigned long ioaddr
I/O address.
Definition: device.h:37
#define PCI_INTERRUPT_LINE
PCI interrupt line.
Definition: pci.h:90
char name[40]
Name.
Definition: device.h:75
unsigned long class
Device class.
Definition: device.h:35
unsigned int vendor
Vendor ID.
Definition: device.h:31
struct device dev
Generic device.
Definition: pci.h:193
#define PCI_HEADER_TYPE
PCI header type.
Definition: pci.h:53
uint16_t device
Device ID.
Definition: pci.h:210
#define BUS_TYPE_PCI
PCI bus type.
Definition: device.h:43
static void pci_read_bases(struct pci_device *pci)
Read membase and ioaddr for a PCI device.
Definition: pci.c:120
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
unsigned int irq
IRQ.
Definition: device.h:39
#define PCI_FIRST_FUNC(busdevfn)
Definition: pci.h:268
unsigned int location
Location.
Definition: device.h:29
#define PCI_SLOT(busdevfn)
Definition: pci.h:263
struct list_head siblings
Devices on the same bus.
Definition: device.h:81
uint8_t * tmp
Definition: entropy.h:156
#define ENODEV
No such device.
Definition: errno.h:509
#define PCI_VENDOR_ID
PCI vendor ID.
Definition: pci.h:19
unsigned char uint8_t
Definition: stdint.h:10
unsigned int uint32_t
Definition: stdint.h:12
uint16_t vendor
Vendor ID.
Definition: pci.h:208
uint32_t busdevfn
Segment, bus, device, and function (bus:dev.fn) number.
Definition: pci.h:216
#define INIT_LIST_HEAD(list)
Initialise a list head.
Definition: list.h:45
unsigned int bus_type
Bus type.
Definition: device.h:24
unsigned int device
Device ID.
Definition: device.h:33
struct list_head children
Devices attached to this device.
Definition: device.h:83
#define PCI_REVISION
PCI revision.
Definition: pci.h:44
struct device_description desc
Device description.
Definition: device.h:79
int snprintf(char *buf, size_t size, const char *fmt,...)
Write a formatted string to a buffer.
Definition: vsprintf.c:382
#define PCI_SEG(busdevfn)
Definition: pci.h:261
#define PCI_HEADER_TYPE_MULTI
Multi-function device.
Definition: pci.h:58
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.

References device_description::bus_type, BUS_TYPE_PCI, pci_device::busdevfn, device::children, device_description::class, pci_device::class, device::desc, pci_device::dev, device_description::device, pci_device::device, ENODEV, INIT_LIST_HEAD, device_description::ioaddr, pci_device::ioaddr, device_description::irq, pci_device::irq, device_description::location, device::name, PCI_BUS, PCI_FIRST_FUNC, PCI_FUNC, PCI_HEADER_TYPE, PCI_HEADER_TYPE_MULTI, PCI_INTERRUPT_LINE, pci_read_bases(), pci_read_config_byte(), pci_read_config_dword(), PCI_REVISION, PCI_SEG, PCI_SLOT, PCI_VENDOR_ID, device::siblings, snprintf(), tmp, device_description::vendor, and pci_device::vendor.

Referenced by bofm_test_init(), efipci_open(), ehci_companion(), and pci_find_next().

◆ pci_find_next()

int pci_find_next ( struct pci_device pci,
unsigned int  busdevfn 
)

Find next device on PCI bus.

Parameters
pciPCI device to fill in
busdevfnStarting bus:dev.fn address
Return values
busdevfnBus:dev.fn address of next PCI device, or negative error

Definition at line 234 of file pci.c.

234  {
235  static unsigned int end;
236  unsigned int sub_end;
237  uint8_t hdrtype;
238  uint8_t sub;
239  int rc;
240 
241  /* Determine number of PCI buses */
242  if ( ! end )
243  end = PCI_BUSDEVFN ( 0, pci_num_bus(), 0, 0 );
244 
245  /* Find next PCI device, if any */
246  for ( ; busdevfn < end ; busdevfn++ ) {
247 
248  /* Check for PCI device existence */
249  memset ( pci, 0, sizeof ( *pci ) );
250  pci_init ( pci, busdevfn );
251  if ( ( rc = pci_read_config ( pci ) ) != 0 )
252  continue;
253 
254  /* If device is a bridge, expand the number of PCI
255  * buses as needed.
256  */
257  pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
258  hdrtype &= PCI_HEADER_TYPE_MASK;
259  if ( hdrtype == PCI_HEADER_TYPE_BRIDGE ) {
260  pci_read_config_byte ( pci, PCI_SUBORDINATE, &sub );
261  sub_end = PCI_BUSDEVFN ( 0, ( sub + 1 ), 0, 0 );
262  if ( end < sub_end ) {
263  DBGC ( pci, PCI_FMT " found subordinate bus "
264  "%#02x\n", PCI_ARGS ( pci ), sub );
265  end = sub_end;
266  }
267  }
268 
269  /* Return this device */
270  return busdevfn;
271  }
272 
273  return -ENODEV;
274 }
#define PCI_HEADER_TYPE_BRIDGE
PCI-to-PCI bridge header.
Definition: pci.h:55
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
#define PCI_HEADER_TYPE_MASK
Header type mask.
Definition: pci.h:57
#define DBGC(...)
Definition: compiler.h:505
#define PCI_BUSDEVFN(segment, bus, slot, func)
Definition: pci.h:265
#define PCI_HEADER_TYPE
PCI header type.
Definition: pci.h:53
#define PCI_FMT
PCI device debug message format.
Definition: pci.h:293
int pci_read_config(struct pci_device *pci)
Read PCI device configuration.
Definition: pci.c:182
#define ENODEV
No such device.
Definition: errno.h:509
unsigned char uint8_t
Definition: stdint.h:10
int pci_num_bus(void)
Determine number of PCI buses within system.
#define PCI_ARGS(pci)
PCI device debug message arguments.
Definition: pci.h:296
uint32_t end
Ending offset.
Definition: netvsc.h:18
#define PCI_SUBORDINATE
Subordinate bus number.
Definition: pci.h:139
static void pci_init(struct pci_device *pci, unsigned int busdevfn)
Initialise PCI device.
Definition: pci.h:320
void * memset(void *dest, int character, size_t len) __nonnull
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.

References DBGC, end, ENODEV, memset(), PCI_ARGS, PCI_BUSDEVFN, PCI_FMT, PCI_HEADER_TYPE, PCI_HEADER_TYPE_BRIDGE, PCI_HEADER_TYPE_MASK, pci_init(), pci_num_bus(), pci_read_config(), pci_read_config_byte(), PCI_SUBORDINATE, and rc.

Referenced by pcibus_probe(), and pciscan_exec().

◆ pci_find_driver()

int pci_find_driver ( struct pci_device pci)

Find driver for PCI device.

Parameters
pciPCI device
Return values
rcReturn status code

Definition at line 282 of file pci.c.

282  {
283  struct pci_driver *driver;
284  struct pci_device_id *id;
285  unsigned int i;
286 
287  for_each_table_entry ( driver, PCI_DRIVERS ) {
288  if ( ( driver->class.class ^ pci->class ) & driver->class.mask )
289  continue;
290  for ( i = 0 ; i < driver->id_count ; i++ ) {
291  id = &driver->ids[i];
292  if ( ( id->vendor != PCI_ANY_ID ) &&
293  ( id->vendor != pci->vendor ) )
294  continue;
295  if ( ( id->device != PCI_ANY_ID ) &&
296  ( id->device != pci->device ) )
297  continue;
298  pci_set_driver ( pci, driver, id );
299  return 0;
300  }
301  }
302  return -ENOENT;
303 }
struct pci_class_id class
PCI class ID.
Definition: pci.h:236
A PCI driver.
Definition: pci.h:230
uint32_t class
Device class.
Definition: pci.h:212
unsigned int id_count
Number of entries in PCI ID table.
Definition: pci.h:234
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:232
static void pci_set_driver(struct pci_device *pci, struct pci_driver *driver, struct pci_device_id *id)
Set PCI driver.
Definition: pci.h:331
#define ENOENT
No such file or directory.
Definition: errno.h:514
uint32_t mask
Class mask.
Definition: pci.h:174
uint32_t class
Class.
Definition: pci.h:172
uint16_t device
Device ID.
Definition: pci.h:210
uint8_t id
Request identifier.
Definition: ena.h:12
#define for_each_table_entry(pointer, table)
Iterate through all entries within a linker table.
Definition: tables.h:385
A PCI device ID list entry.
Definition: pci.h:155
uint16_t vendor
Vendor ID.
Definition: pci.h:208
#define PCI_ANY_ID
Match-anything ID.
Definition: pci.h:167
#define PCI_DRIVERS
PCI driver table.
Definition: pci.h:253

References pci_class_id::class, pci_device::class, pci_driver::class, pci_device::device, ENOENT, for_each_table_entry, id, pci_driver::id_count, pci_driver::ids, pci_class_id::mask, PCI_ANY_ID, PCI_DRIVERS, pci_set_driver(), and pci_device::vendor.

Referenced by efipci_start(), efipci_supported(), and pcibus_probe().

◆ pci_probe()

int pci_probe ( struct pci_device pci)

Probe a PCI device.

Parameters
pciPCI device
Return values
rcReturn status code

Searches for a driver for the PCI device. If a driver is found, its probe() routine is called.

Definition at line 314 of file pci.c.

314  {
315  int rc;
316 
317  DBGC ( pci, PCI_FMT " (%04x:%04x) has driver \"%s\"\n",
318  PCI_ARGS ( pci ), pci->vendor, pci->device, pci->id->name );
319  DBGC ( pci, PCI_FMT " has mem %lx io %lx irq %d\n",
320  PCI_ARGS ( pci ), pci->membase, pci->ioaddr, pci->irq );
321 
322  if ( ( rc = pci->driver->probe ( pci ) ) != 0 ) {
323  DBGC ( pci, PCI_FMT " probe failed: %s\n",
324  PCI_ARGS ( pci ), strerror ( rc ) );
325  return rc;
326  }
327 
328  return 0;
329 }
unsigned long membase
Memory base.
Definition: pci.h:200
uint8_t irq
Interrupt number.
Definition: pci.h:214
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
struct pci_driver * driver
Driver for this device.
Definition: pci.h:218
unsigned long ioaddr
I/O address.
Definition: pci.h:206
#define DBGC(...)
Definition: compiler.h:505
uint16_t device
Device ID.
Definition: pci.h:210
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:78
#define PCI_FMT
PCI device debug message format.
Definition: pci.h:293
const char * name
Name.
Definition: pci.h:157
uint16_t vendor
Vendor ID.
Definition: pci.h:208
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:243
#define PCI_ARGS(pci)
PCI device debug message arguments.
Definition: pci.h:296
struct pci_device_id * id
Driver device ID.
Definition: pci.h:226

References DBGC, pci_device::device, pci_device::driver, pci_device::id, pci_device::ioaddr, pci_device::irq, pci_device::membase, pci_device_id::name, PCI_ARGS, PCI_FMT, pci_driver::probe, rc, strerror(), and pci_device::vendor.

Referenced by bofm_probe(), efipci_start(), and pcibus_probe().

◆ pci_remove()

void pci_remove ( struct pci_device pci)

Remove a PCI device.

Parameters
pciPCI device

Definition at line 336 of file pci.c.

336  {
337  pci->driver->remove ( pci );
338  DBGC ( pci, PCI_FMT " removed\n", PCI_ARGS ( pci ) );
339 }
struct pci_driver * driver
Driver for this device.
Definition: pci.h:218
void(* remove)(struct pci_device *pci)
Remove device.
Definition: pci.h:249
#define DBGC(...)
Definition: compiler.h:505
#define PCI_FMT
PCI device debug message format.
Definition: pci.h:293
#define PCI_ARGS(pci)
PCI device debug message arguments.
Definition: pci.h:296

References DBGC, pci_device::driver, PCI_ARGS, PCI_FMT, and pci_driver::remove.

Referenced by bofm_remove(), efipci_start(), efipci_stop(), and pcibus_remove().

◆ pci_find_capability()

int pci_find_capability ( struct pci_device pci,
int  cap 
)

Look for a PCI capability.

Parameters
pciPCI device to query
capCapability code
Return values
addressAddress of capability, or 0 if not found

Determine whether or not a device supports a given PCI capability. Returns the address of the requested capability structure within the device's PCI configuration space, or 0 if the device does not support it.

Definition at line 37 of file pciextra.c.

37  {
39  uint8_t pos;
40  uint8_t hdr_type;
41 
43  if ( ! ( status & PCI_STATUS_CAP_LIST ) )
44  return 0;
45 
46  pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdr_type );
47  switch ( hdr_type & PCI_HEADER_TYPE_MASK ) {
50  default:
52  break;
55  break;
56  }
57  return pci_find_capability_common ( pci, pos, cap );
58 }
#define PCI_HEADER_TYPE_BRIDGE
PCI-to-PCI bridge header.
Definition: pci.h:55
unsigned short uint16_t
Definition: stdint.h:11
static int pci_find_capability_common(struct pci_device *pci, uint8_t pos, int cap)
Definition: pciextra.c:7
#define PCI_CAPABILITY_LIST
PCI capabilities pointer.
Definition: pci.h:84
#define PCI_HEADER_TYPE_MASK
Header type mask.
Definition: pci.h:57
#define PCI_HEADER_TYPE_CARDBUS
CardBus header.
Definition: pci.h:56
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
#define PCI_HEADER_TYPE
PCI header type.
Definition: pci.h:53
uint8_t status
Status.
Definition: ena.h:16
#define PCI_CB_CAPABILITY_LIST
CardBus capabilities pointer.
Definition: pci.h:87
#define PCI_HEADER_TYPE_NORMAL
Normal header.
Definition: pci.h:54
unsigned char uint8_t
Definition: stdint.h:10
#define PCI_STATUS
PCI status.
Definition: pci.h:35
#define PCI_STATUS_CAP_LIST
Capabilities list.
Definition: pci.h:36
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.

References PCI_CAPABILITY_LIST, PCI_CB_CAPABILITY_LIST, pci_find_capability_common(), PCI_HEADER_TYPE, PCI_HEADER_TYPE_BRIDGE, PCI_HEADER_TYPE_CARDBUS, PCI_HEADER_TYPE_MASK, PCI_HEADER_TYPE_NORMAL, pci_read_config_byte(), pci_read_config_word(), PCI_STATUS, PCI_STATUS_CAP_LIST, and status.

Referenced by ath5k_hw_attach(), ath5k_hw_nic_wakeup(), bnx2_init_board(), ice_probe(), intelxl_probe(), intelxlvf_probe(), myri10ge_pci_probe(), pci_msix_enable(), pci_vpd_init(), pciea_offset(), sky2_reset(), sky2_rx_start(), tg3_get_invariants(), and virtio_pci_find_capability().

◆ pci_find_next_capability()

int pci_find_next_capability ( struct pci_device pci,
int  pos,
int  cap 
)

Look for another PCI capability.

Parameters
pciPCI device to query
posAddress of the current capability
capCapability code
Return values
addressAddress of capability, or 0 if not found

Determine whether or not a device supports a given PCI capability starting the search at a given address within the device's PCI configuration space. Returns the address of the next capability structure within the device's PCI configuration space, or 0 if the device does not support another such capability.

Definition at line 74 of file pciextra.c.

74  {
75  uint8_t new_pos;
76 
77  pci_read_config_byte ( pci, pos + PCI_CAP_NEXT, &new_pos );
78  return pci_find_capability_common ( pci, new_pos, cap );
79 }
static int pci_find_capability_common(struct pci_device *pci, uint8_t pos, int cap)
Definition: pciextra.c:7
#define PCI_CAP_NEXT
Next capability.
Definition: pci.h:102
unsigned char uint8_t
Definition: stdint.h:10
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.

References PCI_CAP_NEXT, pci_find_capability_common(), and pci_read_config_byte().

Referenced by virtio_pci_find_capability().

◆ pci_bar_size()

unsigned long pci_bar_size ( struct pci_device pci,
unsigned int  reg 
)

Find the size of a PCI BAR.

Parameters
pciPCI device
regPCI register number
Return values
sizeBAR size

It should not be necessary for any Etherboot code to call this function.

Definition at line 91 of file pciextra.c.

91  {
92  uint16_t cmd;
94 
95  /* Save the original command register */
97  /* Save the original bar */
98  pci_read_config_dword ( pci, reg, &start );
99  /* Compute which bits can be set */
100  pci_write_config_dword ( pci, reg, ~0 );
101  pci_read_config_dword ( pci, reg, &size );
102  /* Restore the original size */
103  pci_write_config_dword ( pci, reg, start );
104  /* Find the significant bits */
105  /* Restore the original command register. This reenables decoding. */
109  } else {
111  }
112  /* Find the lowest bit set */
113  size = size & ~( size - 1 );
114  return size;
115 }
unsigned short uint16_t
Definition: stdint.h:11
static unsigned int unsigned int reg
Definition: myson.h:162
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
#define PCI_COMMAND
PCI command.
Definition: pci.h:25
uint32_t start
Starting offset.
Definition: netvsc.h:12
#define PCI_BASE_ADDRESS_IO_MASK
I/O BAR mask.
Definition: pci.h:69
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
#define PCI_BASE_ADDRESS_MEM_MASK
Memory BAR mask.
Definition: pci.h:72
unsigned int uint32_t
Definition: stdint.h:12
#define PCI_BASE_ADDRESS_SPACE_IO
I/O BAR.
Definition: pci.h:68
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:16
struct golan_eqe_cmd cmd
Definition: CIB_PRM.h:29

References cmd, PCI_BASE_ADDRESS_IO_MASK, PCI_BASE_ADDRESS_MEM_MASK, PCI_BASE_ADDRESS_SPACE_IO, PCI_COMMAND, pci_read_config_dword(), pci_read_config_word(), pci_write_config_dword(), pci_write_config_word(), reg, size, and start.

Referenced by __vxge_hw_device_get_legacy_reg(), amd8111e_probe(), bnxt_pci_base(), efab_probe(), efx_probe(), ehci_probe(), exanic_probe(), forcedeth_map_regs(), hvm_probe(), igbvf_probe(), phantom_map_crb(), tg3_init_one(), virtio_pci_map_capability(), vxge_probe(), and xhci_probe().

◆ pci_reset()

void pci_reset ( struct pci_device pci,
unsigned int  exp 
)

Perform PCI Express function-level reset (FLR)

Parameters
pciPCI device
expPCI Express Capability address

Definition at line 123 of file pciextra.c.

123  {
125 
126  /* Perform a PCIe function-level reset */
127  pci_read_config_word ( pci, ( exp + PCI_EXP_DEVCTL ), &control );
129  pci_write_config_word ( pci, ( exp + PCI_EXP_DEVCTL ), control );
130 
131  /* Allow time for reset to complete */
133 
134  /* Re-enable device */
135  adjust_pci_device ( pci );
136 }
unsigned short uint16_t
Definition: stdint.h:11
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
#define PCI_EXP_FLR_DELAY_MS
PCI Express function level reset delay (in ms)
Definition: pci.h:152
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:154
#define PCI_EXP_DEVCTL_FLR
Function level reset.
Definition: pci.h:112
uint32_t control
Control.
Definition: myson.h:14
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
Definition: timer.c:78
#define PCI_EXP_DEVCTL
PCI Express.
Definition: pci.h:111

References adjust_pci_device(), control, mdelay(), PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_FLR, PCI_EXP_FLR_DELAY_MS, pci_read_config_word(), and pci_write_config_word().

Referenced by ice_probe(), ice_remove(), intelxl_probe(), intelxl_remove(), intelxlvf_probe(), and intelxlvf_remove().

◆ pci_init()

static void pci_init ( struct pci_device pci,
unsigned int  busdevfn 
)
inlinestatic

Initialise PCI device.

Parameters
pciPCI device
busdevfnPCI bus:dev.fn address

Definition at line 320 of file pci.h.

320  {
321  pci->busdevfn = busdevfn;
322 }
uint32_t busdevfn
Segment, bus, device, and function (bus:dev.fn) number.
Definition: pci.h:216

References pci_device::busdevfn.

Referenced by bofm_test_init(), efipci_open(), ehci_companion(), pci_find_next(), pci_settings_fetch(), uhci_root_speed(), and undinet_irq_is_broken().

◆ pci_set_driver()

static void pci_set_driver ( struct pci_device pci,
struct pci_driver driver,
struct pci_device_id id 
)
inlinestatic

Set PCI driver.

Parameters
pciPCI device
driverPCI driver
idPCI device ID

Definition at line 331 of file pci.h.

333  {
334  pci->driver = driver;
335  pci->id = id;
336  pci->dev.driver_name = id->name;
337 }
struct pci_driver * driver
Driver for this device.
Definition: pci.h:218
struct device dev
Generic device.
Definition: pci.h:193
const char * driver_name
Driver name.
Definition: device.h:77
uint8_t id
Request identifier.
Definition: ena.h:12
struct pci_device_id * id
Driver device ID.
Definition: pci.h:226

References pci_device::dev, pci_device::driver, device::driver_name, id, and pci_device::id.

Referenced by bofm_find_driver(), and pci_find_driver().

◆ pci_set_drvdata()

static void pci_set_drvdata ( struct pci_device pci,
void *  priv 
)
inlinestatic

◆ pci_get_drvdata()

static void* pci_get_drvdata ( struct pci_device pci)
inlinestatic

Variable Documentation

◆ __attribute__