iPXE
nxhal_nic_interface.h
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1 FILE_LICENCE ( GPL2_ONLY );
2 
3 /*
4  * Data types and structure for HAL - NIC interface.
5  *
6  */
7 
8 #ifndef _NXHAL_NIC_INTERFACE_H_
9 #define _NXHAL_NIC_INTERFACE_H_
10 
11 /*****************************************************************************
12  * Simple Types
13  *****************************************************************************/
14 
16 
17 /*****************************************************************************
18  * Root crb-based firmware commands
19  *****************************************************************************/
20 
21 /* CRB Root Command
22 
23  A single set of crbs is used across all physical/virtual
24  functions for capability queries, initialization, and
25  context creation/destruction.
26 
27  There are 4 CRBS:
28  Command/Response CRB
29  Argument1 CRB
30  Argument2 CRB
31  Argument3 CRB
32  Signature CRB
33 
34  The cmd/rsp crb is always intiated by the host via
35  a command code and always responded by the card with
36  a response code. The cmd and rsp codes are disjoint.
37  The sequence of use is always CMD, RSP, CLEAR CMD.
38 
39  The arguments are for passing in command specific
40  and response specific parameters/data.
41 
42  The signature is composed of a magic value, the
43  pci function id, and a command sequence id:
44  [7:0] = pci function
45  [15:8] = version
46  [31:16] = magic of 0xcafe
47 
48  The pci function allows the card to take correct
49  action for the given particular commands.
50  The firmware will attempt to detect
51  an errant driver that has died while holding
52  the root crb hardware lock. Such an error condition
53  shows up as the cmd/rsp crb stuck in a non-clear state.
54 
55  Interface Sequence:
56  Host always makes requests and firmware always responds.
57  Note that data field is always set prior to command field.
58 
59  [READ] CMD/RSP CRB ARGUMENT FIELD
60  Host grab lock
61  Host -> CMD optional parameter
62  FW <- (Good) RSP-OK DATA
63  FW <- (Fail) RSP-FAIL optional failure code
64  Host -> CLEAR
65  Host release lock
66 
67  [WRITE] CMD/RSP CRB ARGUMENT FIELD
68  Host grab lock
69  Host -> CMD DATA
70  FW <- (Good) RSP-OK optional write status
71  FW <- (Write) RSP-FAIL optional failure code
72  Host -> CLEAR
73  Host release lock
74 
75 */
76 
77 
78 /*****************************************************************************
79  * CMD/RSP
80  *****************************************************************************/
81 
82 #define NX_CDRP_SIGNATURE_TO_PCIFN(sign) ((sign) & 0xff)
83 #define NX_CDRP_SIGNATURE_TO_VERSION(sign) (((sign)>>8) & 0xff)
84 #define NX_CDRP_SIGNATURE_TO_MAGIC(sign) (((sign)>>16) & 0xffff)
85 #define NX_CDRP_SIGNATURE_VALID(sign) \
86  ( NX_CDRP_SIGNATURE_TO_MAGIC(sign) == 0xcafe && \
87  NX_CDRP_SIGNATURE_TO_PCIFN(sign) < 8)
88 #define NX_CDRP_SIGNATURE_MAKE(pcifn,version) \
89  ( ((pcifn) & 0xff) | \
90  (((version) & 0xff) << 8) | \
91  (0xcafe << 16) )
92 
93 #define NX_CDRP_CLEAR 0x00000000
94 #define NX_CDRP_CMD_BIT 0x80000000
95 
96 /* All responses must have the NX_CDRP_CMD_BIT cleared
97  * in the crb NX_CDRP_CRB_OFFSET. */
98 #define NX_CDRP_FORM_RSP(rsp) (rsp)
99 #define NX_CDRP_IS_RSP(rsp) (((rsp) & NX_CDRP_CMD_BIT) == 0)
100 
101 #define NX_CDRP_RSP_OK 0x00000001
102 #define NX_CDRP_RSP_FAIL 0x00000002
103 #define NX_CDRP_RSP_TIMEOUT 0x00000003
104 
105 /* All commands must have the NX_CDRP_CMD_BIT set in
106  * the crb NX_CDRP_CRB_OFFSET.
107  * The macros below do not have it explicitly set to
108  * allow their use in lookup tables */
109 #define NX_CDRP_FORM_CMD(cmd) (NX_CDRP_CMD_BIT | (cmd))
110 #define NX_CDRP_IS_CMD(cmd) (((cmd) & NX_CDRP_CMD_BIT) != 0)
111 
112 /* [CMD] Capability Vector [RSP] Capability Vector */
113 #define NX_CDRP_CMD_SUBMIT_CAPABILITIES 0x00000001
114 
115 /* [CMD] - [RSP] Query Value */
116 #define NX_CDRP_CMD_READ_MAX_RDS_PER_CTX 0x00000002
117 
118 /* [CMD] - [RSP] Query Value */
119 #define NX_CDRP_CMD_READ_MAX_SDS_PER_CTX 0x00000003
120 
121 /* [CMD] - [RSP] Query Value */
122 #define NX_CDRP_CMD_READ_MAX_RULES_PER_CTX 0x00000004
123 
124 /* [CMD] - [RSP] Query Value */
125 #define NX_CDRP_CMD_READ_MAX_RX_CTX 0x00000005
126 
127 /* [CMD] - [RSP] Query Value */
128 #define NX_CDRP_CMD_READ_MAX_TX_CTX 0x00000006
129 
130 /* [CMD] Rx Config DMA Addr [RSP] rcode */
131 #define NX_CDRP_CMD_CREATE_RX_CTX 0x00000007
132 
133 /* [CMD] Rx Context Handle, Reset Kind [RSP] rcode */
134 #define NX_CDRP_CMD_DESTROY_RX_CTX 0x00000008
135 
136 /* [CMD] Tx Config DMA Addr [RSP] rcode */
137 #define NX_CDRP_CMD_CREATE_TX_CTX 0x00000009
138 
139 /* [CMD] Tx Context Handle, Reset Kind [RSP] rcode */
140 #define NX_CDRP_CMD_DESTROY_TX_CTX 0x0000000a
141 
142 /* [CMD] Stat setup dma addr - [RSP] Handle, rcode */
143 #define NX_CDRP_CMD_SETUP_STATISTICS 0x0000000e
144 
145 /* [CMD] Handle - [RSP] rcode */
146 #define NX_CDRP_CMD_GET_STATISTICS 0x0000000f
147 
148 /* [CMD] Handle - [RSP] rcode */
149 #define NX_CDRP_CMD_DELETE_STATISTICS 0x00000010
150 
151 #define NX_CDRP_CMD_MAX 0x00000011
152 
153 /*****************************************************************************
154  * Capabilities
155  *****************************************************************************/
156 
157 #define NX_CAP_BIT(class, bit) (1 << bit)
158 
159 /* Class 0 (i.e. ARGS 1)
160  */
161 #define NX_CAP0_LEGACY_CONTEXT NX_CAP_BIT(0, 0)
162 #define NX_CAP0_MULTI_CONTEXT NX_CAP_BIT(0, 1)
163 #define NX_CAP0_LEGACY_MN NX_CAP_BIT(0, 2)
164 #define NX_CAP0_LEGACY_MS NX_CAP_BIT(0, 3)
165 #define NX_CAP0_CUT_THROUGH NX_CAP_BIT(0, 4)
166 #define NX_CAP0_LRO NX_CAP_BIT(0, 5)
167 #define NX_CAP0_LSO NX_CAP_BIT(0, 6)
168 
169 /* Class 1 (i.e. ARGS 2)
170  */
171 #define NX_CAP1_NIC NX_CAP_BIT(1, 0)
172 #define NX_CAP1_PXE NX_CAP_BIT(1, 1)
173 #define NX_CAP1_CHIMNEY NX_CAP_BIT(1, 2)
174 #define NX_CAP1_LSA NX_CAP_BIT(1, 3)
175 #define NX_CAP1_RDMA NX_CAP_BIT(1, 4)
176 #define NX_CAP1_ISCSI NX_CAP_BIT(1, 5)
177 #define NX_CAP1_FCOE NX_CAP_BIT(1, 6)
178 
179 /* Class 2 (i.e. ARGS 3)
180  */
181 
182 /*****************************************************************************
183  * Rules
184  *****************************************************************************/
185 
187 
188 #define NX_RX_RULETYPE_DEFAULT 0
189 #define NX_RX_RULETYPE_MAC 1
190 #define NX_RX_RULETYPE_MAC_VLAN 2
191 #define NX_RX_RULETYPE_MAC_RSS 3
192 #define NX_RX_RULETYPE_MAC_VLAN_RSS 4
193 #define NX_RX_RULETYPE_MAX 5
194 
196 
197 #define NX_RX_RULECMD_ADD 0
198 #define NX_RX_RULECMD_REMOVE 1
199 #define NX_RX_RULECMD_MAX 2
200 
201 typedef struct nx_rx_rule_arg_s {
202  union {
203  struct {
204  char mac[6];
205  } m;
206  struct {
207  char mac[6];
208  char vlan;
209  } mv;
210  struct {
211  char mac[6];
212  } mr;
213  struct {
214  char mac[6];
215  char vlan;
216  } mvr;
217  };
218  /* will be union of all the different args for rules */
221 
222 typedef struct nx_rx_rule_s {
227 } nx_rx_rule_t;
228 
229 /* MSG - REQUIRES TX CONTEXT */
230 
231 /* The rules can be added/deleted from both the
232  * host and card sides so rq/rsp are similar.
233  */
234 typedef struct nx_hostmsg_rx_rule_s {
238 
239 typedef struct nx_cardmsg_rx_rule_s {
244 
245 
246 /*****************************************************************************
247  * Common to Rx/Tx contexts
248  *****************************************************************************/
249 
250 /*
251  * Context states
252  */
253 
255 
256 #define NX_HOST_CTX_STATE_FREED 0 /* Invalid state */
257 #define NX_HOST_CTX_STATE_ALLOCATED 1 /* Not committed */
258 /* The following states imply FW is aware of context */
259 #define NX_HOST_CTX_STATE_ACTIVE 2
260 #define NX_HOST_CTX_STATE_DISABLED 3
261 #define NX_HOST_CTX_STATE_QUIESCED 4
262 #define NX_HOST_CTX_STATE_MAX 5
263 
264 /*
265  * Interrupt mask crb use must be set identically on the Tx
266  * and Rx context configs across a pci function
267  */
268 
269 /* Rx and Tx have unique interrupt/crb */
270 #define NX_HOST_INT_CRB_MODE_UNIQUE 0
271 /* Rx and Tx share a common interrupt/crb */
272 #define NX_HOST_INT_CRB_MODE_SHARED 1 /* <= LEGACY */
273 /* Rx does not use a crb */
274 #define NX_HOST_INT_CRB_MODE_NORX 2
275 /* Tx does not use a crb */
276 #define NX_HOST_INT_CRB_MODE_NOTX 3
277 /* Neither Rx nor Tx use a crb */
278 #define NX_HOST_INT_CRB_MODE_NORXTX 4
279 
280 /*
281  * Destroy Rx/Tx
282  */
283 
284 #define NX_DESTROY_CTX_RESET 0
285 #define NX_DESTROY_CTX_D3_RESET 1
286 #define NX_DESTROY_CTX_MAX 2
287 
288 
289 /*****************************************************************************
290  * Tx
291  *****************************************************************************/
292 
293 /*
294  * Components of the host-request for Tx context creation.
295  * CRB - DOES NOT REQUIRE Rx/TX CONTEXT
296  */
297 
298 typedef struct nx_hostrq_cds_ring_s {
299  U64 host_phys_addr; /* Ring base addr */
300  U32 ring_size; /* Ring entries */
301  U32 rsvd; /* Padding */
303 
304 typedef struct nx_hostrq_tx_ctx_s {
305  U64 host_rsp_dma_addr; /* Response dma'd here */
308  U32 capabilities[4]; /* Flag bit vector */
309  U32 host_int_crb_mode; /* Interrupt crb usage */
310  U32 rsvd1; /* Padding */
311  U16 rsvd2; /* Padding */
314  U16 rsvd3; /* Padding */
315  nx_hostrq_cds_ring_t cds_ring; /* Desc of cds ring */
316  U8 reserved[128]; /* future expansion */
318 
319 typedef struct nx_cardrsp_cds_ring_s {
320  U32 host_producer_crb; /* Crb to use */
321  U32 interrupt_crb; /* Crb to use */
323 
324 typedef struct nx_cardrsp_tx_ctx_s {
325  U32 host_ctx_state; /* Starting state */
326  U16 context_id; /* Handle for context */
327  U8 phys_port; /* Physical id of port */
328  U8 virt_port; /* Virtual/Logical id of port */
329  nx_cardrsp_cds_ring_t cds_ring; /* Card cds settings */
330  U8 reserved[128]; /* future expansion */
332 
333 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) \
334  ( sizeof(HOSTRQ_TX))
335 
336 #define SIZEOF_CARDRSP_TX(CARDRSP_TX) \
337  ( sizeof(CARDRSP_TX))
338 
339 /*****************************************************************************
340  * Rx
341  *****************************************************************************/
342 
343 /*
344  * RDS ring mapping to producer crbs
345  */
346 
347 /* Each ring has a unique crb */
348 #define NX_HOST_RDS_CRB_MODE_UNIQUE 0 /* <= LEGACY */
349 
350 /* All configured RDS Rings share common crb:
351  1 Ring - same as unique
352  2 Rings - 16, 16
353  3 Rings - 10, 10, 10 */
354 #define NX_HOST_RDS_CRB_MODE_SHARED 1
355 
356 /* Bit usage is specified per-ring using the
357  ring's size. Sum of bit lengths must be <= 32.
358  Packing is [Ring N] ... [Ring 1][Ring 0] */
359 #define NX_HOST_RDS_CRB_MODE_CUSTOM 2
360 #define NX_HOST_RDS_CRB_MODE_MAX 3
361 
362 
363 /*
364  * RDS Ting Types
365  */
366 
367 #define NX_RDS_RING_TYPE_NORMAL 0
368 #define NX_RDS_RING_TYPE_JUMBO 1
369 #define NX_RDS_RING_TYPE_LRO 2
370 #define NX_RDS_RING_TYPE_MAX 3
371 
372 /*
373  * Components of the host-request for Rx context creation.
374  * CRB - DOES NOT REQUIRE Rx/TX CONTEXT
375  */
376 
377 typedef struct nx_hostrq_sds_ring_s {
378  U64 host_phys_addr; /* Ring base addr */
379  U32 ring_size; /* Ring entries */
381  U16 rsvd; /* Padding */
383 
384 typedef struct nx_hostrq_rds_ring_s {
385  U64 host_phys_addr; /* Ring base addr */
386  U64 buff_size; /* Packet buffer size */
387  U32 ring_size; /* Ring entries */
388  U32 ring_kind; /* Class of ring */
390 
391 typedef struct nx_hostrq_rx_ctx_s {
392  U64 host_rsp_dma_addr; /* Response dma'd here */
393  U32 capabilities[4]; /* Flag bit vector */
394  U32 host_int_crb_mode; /* Interrupt crb usage */
395  U32 host_rds_crb_mode; /* RDS crb usage */
396  /* These ring offsets are relative to data[0] below */
397  U32 rds_ring_offset; /* Offset to RDS config */
398  U32 sds_ring_offset; /* Offset to SDS config */
399  U16 num_rds_rings; /* Count of RDS rings */
400  U16 num_sds_rings; /* Count of SDS rings */
401  U16 rsvd1; /* Padding */
402  U16 rsvd2; /* Padding */
403  U8 reserved[128]; /* reserve space for future expansion*/
404  /* MUST BE 64-bit aligned.
405  The following is packed:
406  - N hostrq_rds_rings
407  - N hostrq_sds_rings */
408  char data[0];
410 
411 typedef struct nx_cardrsp_rds_ring_s {
412  U32 host_producer_crb; /* Crb to use */
413  U32 rsvd1; /* Padding */
415 
416 typedef struct nx_cardrsp_sds_ring_s {
417  U32 host_consumer_crb; /* Crb to use */
418  U32 interrupt_crb; /* Crb to use */
420 
421 typedef struct nx_cardrsp_rx_ctx_s {
422  /* These ring offsets are relative to data[0] below */
423  U32 rds_ring_offset; /* Offset to RDS config */
424  U32 sds_ring_offset; /* Offset to SDS config */
425  U32 host_ctx_state; /* Starting State */
426  U32 num_fn_per_port; /* How many PCI fn share the port */
427  U16 num_rds_rings; /* Count of RDS rings */
428  U16 num_sds_rings; /* Count of SDS rings */
429  U16 context_id; /* Handle for context */
430  U8 phys_port; /* Physical id of port */
431  U8 virt_port; /* Virtual/Logical id of port */
432  U8 reserved[128]; /* save space for future expansion */
433  /* MUST BE 64-bit aligned.
434  The following is packed:
435  - N cardrsp_rds_rings
436  - N cardrs_sds_rings */
437  char data[0];
439 
440 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) \
441  ( sizeof(HOSTRQ_RX) + \
442  (rds_rings)*(sizeof (nx_hostrq_rds_ring_t)) + \
443  (sds_rings)*(sizeof (nx_hostrq_sds_ring_t)) )
444 
445 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) \
446  ( sizeof(CARDRSP_RX) + \
447  (rds_rings)*(sizeof (nx_cardrsp_rds_ring_t)) + \
448  (sds_rings)*(sizeof (nx_cardrsp_sds_ring_t)) )
449 
450 
451 /*****************************************************************************
452  * Statistics
453  *****************************************************************************/
454 
455 /*
456  * The model of statistics update to use
457  */
458 
459 #define NX_STATISTICS_MODE_INVALID 0
460 
461 /* Permanent setup; Updates are only sent on explicit request
462  (NX_CDRP_CMD_GET_STATISTICS) */
463 #define NX_STATISTICS_MODE_PULL 1
464 
465 /* Permanent setup; Updates are sent automatically and on
466  explicit request (NX_CDRP_CMD_GET_STATISTICS) */
467 #define NX_STATISTICS_MODE_PUSH 2
468 
469 /* One time stat update. */
470 #define NX_STATISTICS_MODE_SINGLE_SHOT 3
471 
472 #define NX_STATISTICS_MODE_MAX 4
473 
474 /*
475  * What set of stats
476  */
477 #define NX_STATISTICS_TYPE_INVALID 0
478 #define NX_STATISTICS_TYPE_NIC_RX_CORE 1
479 #define NX_STATISTICS_TYPE_NIC_TX_CORE 2
480 #define NX_STATISTICS_TYPE_NIC_RX_ALL 3
481 #define NX_STATISTICS_TYPE_NIC_TX_ALL 4
482 #define NX_STATISTICS_TYPE_MAX 5
483 
484 
485 /*
486  * Request to setup statistics gathering.
487  * CRB - DOES NOT REQUIRE Rx/TX CONTEXT
488  */
489 
490 typedef struct nx_hostrq_stat_setup_s {
491  U64 host_stat_buffer; /* Where to dma stats */
492  U32 host_stat_size; /* Size of stat buffer */
493  U16 context_id; /* Which context */
494  U16 stat_type; /* What class of stats */
495  U16 stat_mode; /* When to update */
496  U16 stat_interval; /* Frequency of update */
498 
499 
500 
501 #endif /* _NXHAL_NIC_INTERFACE_H_ */
struct nx_hostrq_stat_setup_s nx_hostrq_stat_setup_t
struct nx_cardrsp_rds_ring_s nx_cardrsp_rds_ring_t
U32 nx_host_ctx_state_t
U32 nx_reg_addr_t
struct nx_rx_rule_arg_s::@79::@84 mvr
nx_cardrsp_cds_ring_t cds_ring
struct nx_hostrq_tx_ctx_s nx_hostrq_tx_ctx_t
struct nx_cardmsg_rx_rule_s nx_cardmsg_rx_rule_t
struct nx_hostrq_rx_ctx_s nx_hostrq_rx_ctx_t
uint32_t nx_rcode_t
Definition: phantom.h:51
struct nx_hostmsg_rx_rule_s nx_hostmsg_rx_rule_t
struct nx_hostrq_rds_ring_s nx_hostrq_rds_ring_t
uint16_t U16
Definition: phantom.h:48
FILE_LICENCE(GPL2_ONLY)
struct nx_cardrsp_sds_ring_s nx_cardrsp_sds_ring_t
struct nx_hostrq_cds_ring_s nx_hostrq_cds_ring_t
struct nx_cardrsp_tx_ctx_s nx_cardrsp_tx_ctx_t
nx_hostrq_cds_ring_t cds_ring
nx_rx_rule_arg_t arg
struct nx_hostrq_sds_ring_s nx_hostrq_sds_ring_t
struct nx_cardrsp_cds_ring_s nx_cardrsp_cds_ring_t
struct nx_rx_rule_arg_s nx_rx_rule_arg_t
uint64_t U64
Definition: phantom.h:50
struct nx_cardrsp_rx_ctx_s nx_cardrsp_rx_ctx_t
struct nx_rx_rule_arg_s::@79::@83 mr
nx_rx_rule_type_t type
U32 nx_rx_rule_type_t
uint32_t U32
Definition: phantom.h:49
U32 nx_rx_rule_cmd_t
struct nx_rx_rule_arg_s::@79::@81 m
struct nx_rx_rule_s nx_rx_rule_t
struct nx_rx_rule_arg_s::@79::@82 mv
uint8_t U8
Definition: phantom.h:47