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iPXE
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RDC R6040 network driver. More...
Go to the source code of this file.
Data Structures | |
| struct | rdc_descriptor |
| An RDC descriptor. More... | |
| union | rdc_mac |
| A MAC address. More... | |
| struct | rdc_ring |
| A descriptor ring. More... | |
| struct | rdc_nic |
| An RDC network card. More... | |
Macros | |
| #define | RDC_BAR_SIZE 256 |
| RDC BAR size. | |
| #define | RDC_FL_OWNED 0x8000 |
| Descriptor is owned by NIC. | |
| #define | RDC_FL_OK 0x4000 |
| Packet OK. | |
| #define | RDC_MCR0 0x00 |
| MAC control register 0. | |
| #define | RDC_MCR0_FD 0x8000 |
| Full duplex. | |
| #define | RDC_MCR0_TXEN 0x1000 |
| Transmit enable. | |
| #define | RDC_MCR0_PROMISC 0x0020 |
| Promiscuous mode. | |
| #define | RDC_MCR0_RXEN 0x0002 |
| Receive enable. | |
| #define | RDC_MCR1 0x04 |
| MAC control register 1. | |
| #define | RDC_MCR1_RST 0x0001 |
| MAC reset. | |
| #define | RDC_RESET_MAX_WAIT_MS 10 |
| Maximum time to wait for reset. | |
| #define | RDC_MTPR 0x14 |
| MAC transmit poll command register. | |
| #define | RDC_MTPR_TM2TX 0x0001 |
| Trigger MAC to transmit. | |
| #define | RDC_MRBSR 0x18 |
| MAC receive buffer size register. | |
| #define | RDC_MMDIO 0x20 |
| MAC MDIO control register. | |
| #define | RDC_MMDIO_MIIWR 0x4000 |
| MDIO write. | |
| #define | RDC_MMDIO_MIIRD 0x2000 |
| MDIO read. | |
| #define | RDC_MMDIO_PHYAD(x) |
| PHY address. | |
| #define | RDC_MMDIO_REGAD(x) |
| Register address. | |
| #define | RDC_MII_MAX_WAIT_US 2048 |
| Maximum time to wait for an MII read or write. | |
| #define | RDC_MMRD 0x24 |
| MAC MDIO read data register. | |
| #define | RDC_MMWD 0x28 |
| MAC MDIO write data register. | |
| #define | RDC_MTDSA 0x2c |
| MAC transmit descriptor start address. | |
| #define | RDC_MRDSA 0x34 |
| MAC receive descriptor start address. | |
| #define | RDC_MxDSA_LO 0x0 |
| MAC descriptor start address low half. | |
| #define | RDC_MxDSA_HI 0x4 |
| MAC descriptor start address low half. | |
| #define | RDC_MISR 0x3c |
| MAC interrupt status register. | |
| #define | RDC_MIRQ_LINK 0x0200 |
| Link status changed. | |
| #define | RDC_MIRQ_TX 0x0010 |
| Transmit complete. | |
| #define | RDC_MIRQ_RX_EARLY 0x0008 |
| Receive early interrupt. | |
| #define | RDC_MIRQ_RX_EMPTY 0x0002 |
| Receive descriptor unavailable. | |
| #define | RDC_MIRQ_RX 0x0001 |
| Receive complete. | |
| #define | RDC_MIER 0x40 |
| MAC interrupt enable register. | |
| #define | RDC_MID0 0x68 |
| MAC address word 0. | |
| #define | RDC_MID1 0x6a |
| MAC address word 1. | |
| #define | RDC_MID2 0x6c |
| MAC address word 2. | |
| #define | RDC_MPSCCR 0x88 |
| MAC PHY status change configuration register. | |
| #define | RDC_MPSCCR_EN 0x8000 |
| PHY status change enable. | |
| #define | RDC_MPSCCR_PHYAD(x) |
| PHY address. | |
| #define | RDC_MPSCCR_SLOW 0x0007 |
| Poll slowly. | |
| #define | RDC_MACSM 0xac |
| MAC state machine register. | |
| #define | RDC_MACSM_RST 0x0002 |
| Reset state machine. | |
| #define | RDC_MACSM_RESET_DELAY_MS 10 |
| Time to wait after resetting MAC state machine. | |
| #define | RDC_NUM_TX_DESC 16 |
| Number of transmit descriptors. | |
| #define | RDC_NUM_RX_DESC 8 |
| Number of receive descriptors. | |
| #define | RDC_RX_MAX_LEN ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ ) |
| Receive buffer length. | |
Functions | |
| FILE_LICENCE (GPL2_OR_LATER_OR_UBDL) | |
| static void | rdc_init_ring (struct rdc_ring *ring, unsigned int count, unsigned int reg) |
| Initialise descriptor ring. | |
RDC R6040 network driver.
Definition in file rdc.h.
| #define RDC_BAR_SIZE 256 |
| #define RDC_FL_OWNED 0x8000 |
Descriptor is owned by NIC.
Definition at line 34 of file rdc.h.
Referenced by rdc_poll_rx(), rdc_poll_tx(), rdc_refill_rx(), and rdc_transmit().
| #define RDC_FL_OK 0x4000 |
| #define RDC_MCR0 0x00 |
MAC control register 0.
Definition at line 40 of file rdc.h.
Referenced by rdc_close(), and rdc_open().
| #define RDC_MCR0_FD 0x8000 |
| #define RDC_MCR0_TXEN 0x1000 |
| #define RDC_MCR0_PROMISC 0x0020 |
| #define RDC_MCR0_RXEN 0x0002 |
| #define RDC_MCR1 0x04 |
| #define RDC_MCR1_RST 0x0001 |
| #define RDC_RESET_MAX_WAIT_MS 10 |
| #define RDC_MTPR 0x14 |
MAC transmit poll command register.
Definition at line 54 of file rdc.h.
Referenced by rdc_transmit().
| #define RDC_MTPR_TM2TX 0x0001 |
| #define RDC_MRBSR 0x18 |
| #define RDC_MMDIO 0x20 |
MAC MDIO control register.
Definition at line 61 of file rdc.h.
Referenced by rdc_mii_read(), and rdc_mii_write().
| #define RDC_MMDIO_MIIWR 0x4000 |
| #define RDC_MMDIO_MIIRD 0x2000 |
| #define RDC_MMDIO_PHYAD | ( | x | ) |
PHY address.
Definition at line 64 of file rdc.h.
Referenced by rdc_mii_read(), and rdc_mii_write().
| #define RDC_MMDIO_REGAD | ( | x | ) |
Register address.
Definition at line 65 of file rdc.h.
Referenced by rdc_mii_read(), and rdc_mii_write().
| #define RDC_MII_MAX_WAIT_US 2048 |
Maximum time to wait for an MII read or write.
Definition at line 68 of file rdc.h.
Referenced by rdc_mii_read(), and rdc_mii_write().
| #define RDC_MMRD 0x24 |
| #define RDC_MMWD 0x28 |
| #define RDC_MTDSA 0x2c |
MAC transmit descriptor start address.
Definition at line 77 of file rdc.h.
Referenced by rdc_probe().
| #define RDC_MRDSA 0x34 |
MAC receive descriptor start address.
Definition at line 80 of file rdc.h.
Referenced by rdc_probe().
| #define RDC_MxDSA_LO 0x0 |
MAC descriptor start address low half.
Definition at line 83 of file rdc.h.
Referenced by rdc_create_ring(), and rdc_destroy_ring().
| #define RDC_MxDSA_HI 0x4 |
MAC descriptor start address low half.
Definition at line 86 of file rdc.h.
Referenced by rdc_create_ring(), and rdc_destroy_ring().
| #define RDC_MISR 0x3c |
| #define RDC_MIRQ_LINK 0x0200 |
| #define RDC_MIRQ_TX 0x0010 |
| #define RDC_MIRQ_RX_EARLY 0x0008 |
| #define RDC_MIRQ_RX_EMPTY 0x0002 |
| #define RDC_MIRQ_RX 0x0001 |
| #define RDC_MIER 0x40 |
| #define RDC_MID0 0x68 |
| #define RDC_MID1 0x6a |
| #define RDC_MID2 0x6c |
| #define RDC_MPSCCR 0x88 |
MAC PHY status change configuration register.
Definition at line 109 of file rdc.h.
Referenced by rdc_open().
| #define RDC_MPSCCR_EN 0x8000 |
| #define RDC_MPSCCR_PHYAD | ( | x | ) |
| #define RDC_MPSCCR_SLOW 0x0007 |
| #define RDC_MACSM 0xac |
| #define RDC_MACSM_RST 0x0002 |
| #define RDC_MACSM_RESET_DELAY_MS 10 |
Time to wait after resetting MAC state machine.
Definition at line 119 of file rdc.h.
Referenced by rdc_reset().
| #define RDC_NUM_TX_DESC 16 |
Number of transmit descriptors.
This is a policy decision.
Definition at line 164 of file rdc.h.
Referenced by rdc_poll_tx(), rdc_probe(), and rdc_transmit().
| #define RDC_NUM_RX_DESC 8 |
Number of receive descriptors.
This is a policy decision.
Definition at line 170 of file rdc.h.
Referenced by rdc_close(), rdc_poll_rx(), rdc_probe(), and rdc_refill_rx().
| #define RDC_RX_MAX_LEN ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ ) |
Receive buffer length.
Definition at line 173 of file rdc.h.
Referenced by rdc_open(), and rdc_refill_rx().
| FILE_LICENCE | ( | GPL2_OR_LATER_OR_UBDL | ) |
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inlinestatic |
Initialise descriptor ring.
| ring | Descriptor ring |
| count | Number of descriptors |
| reg | Start address register 0 |
Definition at line 154 of file rdc.h.
References count, rdc_ring::count, rdc_ring::reg, and reg.
Referenced by rdc_probe().