Data Structures | Macros | Functions | Variables
myson.h File Reference

Myson Technology network card driver. More...

#include <stdint.h>
#include <ipxe/if_ether.h>

Go to the source code of this file.

Data Structures

struct  myson_descriptor
 A packet descriptor. More...
union  myson_physical_address
 Physical address. More...
struct  myson_ring
 A Myson descriptor ring. More...
struct  myson_nic
 A myson network card. More...


#define MYSON_BAR_SIZE   256
 BAR size. More...
#define MYSON_TX_STAT_OWN   0x80000000UL
 Owner. More...
#define MYSON_TX_STAT_ABORT   0x00002000UL
 Abort. More...
#define MYSON_TX_STAT_CSL   0x00001000UL
 Carrier sense lost. More...
#define MYSON_TX_CTRL_IC   0x80000000UL
 Interrupt control. More...
#define MYSON_TX_CTRL_LD   0x20000000UL
 Last descriptor. More...
#define MYSON_TX_CTRL_FD   0x10000000UL
 First descriptor. More...
#define MYSON_TX_CTRL_CRC   0x08000000UL
 CRC append. More...
#define MYSON_TX_CTRL_PAD   0x04000000UL
 Pad control. More...
#define MYSON_TX_CTRL_RTLC   0x02000000UL
 Retry late collision. More...
#define MYSON_TX_CTRL_PKTS(x)   ( (x) << 11 )
 Packet size. More...
#define MYSON_TX_CTRL_TBS(x)   ( (x) << 0 )
 Transmit buffer size. More...
#define MYSON_RX_STAT_OWN   0x80000000UL
 Owner. More...
#define MYSON_RX_STAT_FLNG(status)   ( ( (status) >> 16 ) & 0xfff )
#define MYSON_RX_STAT_ES   0x00000080UL
 Error summary. More...
#define MYSON_RX_CTRL_RBS(x)   ( (x) << 0 )
 Receive buffer size. More...
#define MYSON_RING_ALIGN   4
 Descriptor ring alignment. More...
#define MYSON_PAR0   0x00
 Physical Address Register 0. More...
#define MYSON_PAR4   0x04
 Physical Address Register 4. More...
#define MYSON_TCR_RCR   0x18
 Transmit and Receive Configuration Register. More...
#define MYSON_TCR_TXS   0x80000000UL
 Transmit status. More...
#define MYSON_TCR_TE   0x00040000UL
 Transmit enable. More...
#define MYSON_RCR_RXS   0x00008000UL
 Receive status. More...
#define MYSON_RCR_PROM   0x00000080UL
 Promiscuous mode. More...
#define MYSON_RCR_AB   0x00000040UL
 Accept broadcast. More...
#define MYSON_RCR_AM   0x00000020UL
 Accept multicast. More...
#define MYSON_RCR_ARP   0x00000008UL
 Accept runt packet. More...
#define MYSON_RCR_ALP   0x00000004UL
 Accept long packet. More...
#define MYSON_RCR_RE   0x00000001UL
 Receive enable. More...
#define MYSON_IDLE_MAX_WAIT_MS   100
 Maximum time to wait for transmit and receive to be idle, in milliseconds. More...
#define MYSON_BCR   0x1c
 Bus Command Register. More...
#define MYSON_BCR_RLE   0x00000100UL
 Read line enable. More...
#define MYSON_BCR_RME   0x00000080UL
 Read multiple enable. More...
#define MYSON_BCR_WIE   0x00000040UL
 Write and invalidate. More...
#define MYSON_BCR_PBL(x)   ( (x) << 3 )
 Burst length. More...
#define MYSON_BCR_SWR   0x00000001UL
 Software reset. More...
 Maximum time to wait for a reset, in milliseconds. More...
#define MYSON_TXPDR   0x20
 Transmit Poll Demand Register. More...
#define MYSON_RXPDR   0x24
 Receive Poll Demand Register. More...
#define MYSON_TXLBA   0x2c
 Transmit List Base Address. More...
#define MYSON_NUM_TX_DESC   4
 Number of transmit descriptors. More...
#define MYSON_RXLBA   0x30
 Receive List Base Address. More...
#define MYSON_NUM_RX_DESC   4
 Number of receive descriptors. More...
#define MYSON_RX_MAX_LEN   ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )
 Receive buffer length. More...
#define MYSON_ISR   0x34
 Interrupt Status Register. More...
#define MYSON_IRQ_TI   0x00000008UL
 Transmit interrupt. More...
#define MYSON_IRQ_RI   0x00000004UL
 Receive interrupt. More...
 Number of I/O delays between ISR reads. More...
#define MYSON_IMR   0x38
 Interrupt Mask Register. More...
#define MYSON_ROM_MII   0x40
 Boot ROM / EEPROM / MII Management Register. More...
#define MYSON_ROM_AUTOLD   0x00100000UL
 Auto load. More...
 Maximum time to wait for a configuration reload, in milliseconds. More...


struct myson_descriptor __attribute__ ((packed))
static __attribute__ ((always_inline)) void myson_init_ring(struct myson_ring *ring
 Initialise descriptor ring. More...


uint32_t status
 Status. More...
uint32_t control
 Control. More...
uint32_t address
 Buffer start address. More...
uint32_t next
 Next descriptor address. More...
uint32_t low
 Low 16 bits of address. More...
uint32_t high
 High 32 bits of address. More...
union myson_physical_address __attribute__
static unsigned int count
static unsigned int unsigned int reg

Detailed Description

Myson Technology network card driver.

Definition in file myson.h.

Macro Definition Documentation


#define MYSON_BAR_SIZE   256

BAR size.

Definition at line 16 of file myson.h.


#define MYSON_TX_STAT_OWN   0x80000000UL


Definition at line 31 of file myson.h.


#define MYSON_TX_STAT_ABORT   0x00002000UL


Definition at line 32 of file myson.h.


#define MYSON_TX_STAT_CSL   0x00001000UL

Carrier sense lost.

Definition at line 33 of file myson.h.


#define MYSON_TX_CTRL_IC   0x80000000UL

Interrupt control.

Definition at line 36 of file myson.h.


#define MYSON_TX_CTRL_LD   0x20000000UL

Last descriptor.

Definition at line 37 of file myson.h.


#define MYSON_TX_CTRL_FD   0x10000000UL

First descriptor.

Definition at line 38 of file myson.h.


#define MYSON_TX_CTRL_CRC   0x08000000UL

CRC append.

Definition at line 39 of file myson.h.


#define MYSON_TX_CTRL_PAD   0x04000000UL

Pad control.

Definition at line 40 of file myson.h.


#define MYSON_TX_CTRL_RTLC   0x02000000UL

Retry late collision.

Definition at line 41 of file myson.h.


#define MYSON_TX_CTRL_PKTS (   x)    ( (x) << 11 )

Packet size.

Definition at line 42 of file myson.h.


#define MYSON_TX_CTRL_TBS (   x)    ( (x) << 0 )

Transmit buffer size.

Definition at line 43 of file myson.h.


#define MYSON_RX_STAT_OWN   0x80000000UL


Definition at line 46 of file myson.h.


#define MYSON_RX_STAT_FLNG (   status)    ( ( (status) >> 16 ) & 0xfff )

Definition at line 47 of file myson.h.


#define MYSON_RX_STAT_ES   0x00000080UL

Error summary.

Definition at line 48 of file myson.h.


#define MYSON_RX_CTRL_RBS (   x)    ( (x) << 0 )

Receive buffer size.

Definition at line 51 of file myson.h.


#define MYSON_RING_ALIGN   4

Descriptor ring alignment.

Definition at line 54 of file myson.h.


#define MYSON_PAR0   0x00

Physical Address Register 0.

Definition at line 57 of file myson.h.


#define MYSON_PAR4   0x04

Physical Address Register 4.

Definition at line 60 of file myson.h.


#define MYSON_TCR_RCR   0x18

Transmit and Receive Configuration Register.

Definition at line 72 of file myson.h.


#define MYSON_TCR_TXS   0x80000000UL

Transmit status.

Definition at line 73 of file myson.h.


#define MYSON_TCR_TE   0x00040000UL

Transmit enable.

Definition at line 74 of file myson.h.


#define MYSON_RCR_RXS   0x00008000UL

Receive status.

Definition at line 75 of file myson.h.


#define MYSON_RCR_PROM   0x00000080UL

Promiscuous mode.

Definition at line 76 of file myson.h.


#define MYSON_RCR_AB   0x00000040UL

Accept broadcast.

Definition at line 77 of file myson.h.


#define MYSON_RCR_AM   0x00000020UL

Accept multicast.

Definition at line 78 of file myson.h.


#define MYSON_RCR_ARP   0x00000008UL

Accept runt packet.

Definition at line 79 of file myson.h.


#define MYSON_RCR_ALP   0x00000004UL

Accept long packet.

Definition at line 80 of file myson.h.


#define MYSON_RCR_RE   0x00000001UL

Receive enable.

Definition at line 81 of file myson.h.


#define MYSON_IDLE_MAX_WAIT_MS   100

Maximum time to wait for transmit and receive to be idle, in milliseconds.

Definition at line 84 of file myson.h.


#define MYSON_BCR   0x1c

Bus Command Register.

Definition at line 87 of file myson.h.


#define MYSON_BCR_RLE   0x00000100UL

Read line enable.

Definition at line 88 of file myson.h.


#define MYSON_BCR_RME   0x00000080UL

Read multiple enable.

Definition at line 89 of file myson.h.


#define MYSON_BCR_WIE   0x00000040UL

Write and invalidate.

Definition at line 90 of file myson.h.


#define MYSON_BCR_PBL (   x)    ( (x) << 3 )

Burst length.

Definition at line 91 of file myson.h.



Definition at line 92 of file myson.h.



Definition at line 93 of file myson.h.


#define MYSON_BCR_SWR   0x00000001UL

Software reset.

Definition at line 94 of file myson.h.



Maximum time to wait for a reset, in milliseconds.

Definition at line 97 of file myson.h.


#define MYSON_TXPDR   0x20

Transmit Poll Demand Register.

Definition at line 100 of file myson.h.


#define MYSON_RXPDR   0x24

Receive Poll Demand Register.

Definition at line 103 of file myson.h.


#define MYSON_TXLBA   0x2c

Transmit List Base Address.

Definition at line 106 of file myson.h.


#define MYSON_NUM_TX_DESC   4

Number of transmit descriptors.

Definition at line 109 of file myson.h.


#define MYSON_RXLBA   0x30

Receive List Base Address.

Definition at line 112 of file myson.h.


#define MYSON_NUM_RX_DESC   4

Number of receive descriptors.

Definition at line 115 of file myson.h.


#define MYSON_RX_MAX_LEN   ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )

Receive buffer length.

Definition at line 118 of file myson.h.


#define MYSON_ISR   0x34

Interrupt Status Register.

Definition at line 121 of file myson.h.


#define MYSON_IRQ_TI   0x00000008UL

Transmit interrupt.

Definition at line 122 of file myson.h.


#define MYSON_IRQ_RI   0x00000004UL

Receive interrupt.

Definition at line 123 of file myson.h.



Number of I/O delays between ISR reads.

Definition at line 126 of file myson.h.


#define MYSON_IMR   0x38

Interrupt Mask Register.

Definition at line 129 of file myson.h.


#define MYSON_ROM_MII   0x40

Boot ROM / EEPROM / MII Management Register.

Definition at line 132 of file myson.h.


#define MYSON_ROM_AUTOLD   0x00100000UL

Auto load.

Definition at line 133 of file myson.h.



Maximum time to wait for a configuration reload, in milliseconds.

Definition at line 136 of file myson.h.

Function Documentation



◆ __attribute__() [1/2]

struct myson_descriptor __attribute__ ( (packed)  )

◆ __attribute__() [2/2]

static __attribute__ ( (always_inline)  )

Initialise descriptor ring.

Check if card can access physical address.

ringDescriptor ring
countNumber of descriptors
regDescriptor base address register
addressPhysical address
address_okCard can access physical address

Definition at line 186 of file myson.h.

187  {
189  /* In a 32-bit build, all addresses can be accessed */
190  if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
191  return 1;
193  /* Card can access all addresses below 4GB */
194  if ( ( address & ~0xffffffffULL ) == 0 )
195  return 1;
197  return 0;
198 }
unsigned int uint32_t
Definition: stdint.h:12
unsigned long physaddr_t
Definition: stdint.h:20
uint32_t address
Buffer start address.
Definition: myson.h:16

References address.

Variable Documentation

◆ status

uint32_t status


Definition at line 12 of file myson.h.

◆ control

uint8_t control

◆ address

uint32_t address

Buffer start address.

Definition at line 16 of file myson.h.

Referenced by __attribute__().

◆ next

struct arbelprm_wqe_segment_next next

◆ low

uint16_t low

◆ high

uint32_t high

◆ __attribute__

◆ count

unsigned int count

Definition at line 161 of file myson.h.

◆ reg

ring reg
Initial value:
ring->count = count
static unsigned int count
Definition: myson.h:161

Definition at line 162 of file myson.h.

Referenced by __er32(), __ew32(), __gm_phy_read(), __mdio_read(), __mdio_write(), __vxge_hw_device_register_poll(), __xm_phy_read(), _efx_readl(), _efx_writel(), amd8111e_read_phy(), ar5008_hw_process_ini(), ar9002_hw_load_ani_reg(), ar9003_hw_drive_strength_apply(), ar9003_hw_prog_ini(), ath5k_hw_reg_read(), ath5k_hw_reg_write(), ath5k_hw_write_rate_duration(), ath5k_setup_pwr_to_pdadc_table(), ath9k_hw_analog_shift_regwrite(), ath9k_hw_analog_shift_rmw(), ath9k_hw_check_alive(), ath9k_hw_setrxabort(), ath9k_hw_wait(), ath9k_init_band_txpower(), ath9k_regd_get_ctl(), ath_regd_get_band_ctl(), b44_phy_read(), b44_phy_write(), b44_wait_bit(), bcom_phy_init(), bflush(), bnx2_init_board(), bnx2_read_phy(), bnx2_reset_phy(), bnx2_write_phy(), bnxt_pci_base(), br32(), bw32(), efx_hunt_clear_interrupts(), efx_hunt_evq_read_ack(), efx_hunt_notify_rx_desc(), efx_hunt_notify_tx_desc(), efx_probe(), efx_readl(), efx_writel(), exanic_clear_base(), exanic_write_base(), falcon_clear_interrupts(), falcon_eventq_read_ack(), falcon_i2c_bit_read(), falcon_i2c_bit_write(), falcon_init_resources(), falcon_init_sram(), falcon_mask_status_intr(), falcon_mdio_read(), falcon_mdio_write(), falcon_notify_rx_desc(), falcon_notify_tx_desc(), falcon_pm8358_phy_init(), falcon_read(), falcon_read_sram(), falcon_readl(), falcon_reconfigure_mac_wrapper(), falcon_reconfigure_xmac(), falcon_reset_xaui(), falcon_reset_xmac(), falcon_setup_nic(), falcon_spi_rw(), falcon_spi_wait(), falcon_tenxpress_phy_init(), falcon_write(), falcon_write_sram(), falcon_writel(), falcon_xaui_link_ok(), falcon_xgmii_status(), forcedeth_map_regs(), genesis_reset(), genesis_stop(), gm_phy_read(), gm_phy_write(), gma_read16(), gma_read32(), gma_set_addr(), hfa384x_copy_from_bap(), hfa384x_docmd_wait(), hfa384x_getreg(), hfa384x_getreg_noswap(), hfa384x_prepare_bap(), hfa384x_setreg(), hfa384x_setreg_noswap(), hfa384x_wait_for_event(), icplus_mii_read_bit(), icplus_mii_write_bit(), intel_disable_ring(), intel_init_ring(), intel_reset_ring(), is_yukon_lite_a0(), jme_mdio_read(), jme_mdio_write(), jread32(), jwrite32(), jwrite32f(), linda_ib_epb_mod_reg(), linda_set_serdes_param(), mdio_clause45_check_mmds(), mdio_read(), mdio_read_latched(), mdio_write(), mentormac_init(), mentormac_reset(), mii_bit_read(), mii_bit_rw(), mii_bit_write(), mii_read(), mii_rw(), mii_write(), natsemi_spi_read_bit(), natsemi_spi_write_bit(), pci_bar(), pci_bar_size(), pci_bar_start(), pci_read_bases(), pcnet32_mdio_read(), pcnet32_mdio_write(), phantom_crb_access_128m(), phantom_crb_access_2m(), phantom_crb_access_32m(), phantom_readl(), phantom_writel(), phy_init(), prism2_poll(), qib7322_ahb_mod_reg_all(), rdc_init_ring(), rdc_mii_read(), rdc_mii_write(), realtek_init_ring(), realtek_mii_read(), realtek_mii_write(), realtek_spi_read_bit(), realtek_spi_write_bit(), rhine_mii_read(), rhine_mii_write(), rtl818x_init_hw(), rtl818x_poll(), rtl818x_probe(), rtl818x_set_anaparam(), rtl818x_spi_read_bit(), rtl818x_spi_write_bit(), rtl818x_start(), rtl818x_stop(), rtl8225_read(), rtl8225_rf_set_tx_power(), rtl8225_rf_stop(), rtl8225_write(), sfe4001_init(), sis190_get_mac_addr(), sis190_get_mac_addr_from_apc(), sis190_mii_probe_88e1111_fixup(), sis190_read_eeprom(), sis190_set_rgmii(), sis630e_get_mac_addr(), skge_read16(), skge_read32(), skge_read8(), skge_reset(), skge_write16(), skge_write32(), skge_write8(), sky2_gmac_reset(), sky2_link_down(), sky2_link_up(), sky2_mac_init(), sky2_pci_read16(), sky2_pci_read32(), sky2_pci_write16(), sky2_pci_write32(), sky2_phy_init(), sky2_power_on(), sky2_read16(), sky2_read32(), sky2_read8(), sky2_set_multicast(), sky2_write16(), sky2_write32(), sky2_write8(), smscusb_mii_read(), smscusb_mii_write(), tg3_phy_auxctl_read(), tg3_phy_auxctl_write(), tg3_phy_toggle_automdix(), tg3_phydsp_write(), tg3_readphy(), tg3_ump_link_report(), tg3_writephy(), TLan_MiiReadReg(), TLan_MiiWriteReg(), velocity_mii_read(), velocity_mii_write(), xhci_writeq(), xm_outaddr(), xm_outhash(), xm_phy_read(), xm_phy_write(), xm_read16(), xm_read32(), yukon_link_up(), and yukon_mac_init().