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iPXE
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SPI interface. More...
#include <ipxe/nvs.h>Go to the source code of this file.
Data Structures | |
| struct | spi_device |
| An SPI device. More... | |
| struct | spi_bus |
| An SPI bus. More... | |
Macros | |
| #define | SPI_WRSR 0x01 |
| Write status register. More... | |
| #define | SPI_WRITE 0x02 |
| Write data to memory array. More... | |
| #define | SPI_READ 0x03 |
| Read data from memory array. More... | |
| #define | SPI_WRDI 0x04 |
| Reset write enable latch. More... | |
| #define | SPI_RDSR 0x05 |
| Read status register. More... | |
| #define | SPI_WREN 0x06 |
| Set write enable latch. More... | |
| #define | ATMEL_SECTOR_ERASE 0x52 |
| Erase one sector in memory array (Not supported on all devices) More... | |
| #define | ATMEL_CHIP_ERASE 0x62 |
| Erase all sections in memory array (Not supported on all devices) More... | |
| #define | ATMEL_RDID 0x15 |
| Read manufacturer and product ID (Not supported on all devices) More... | |
| #define | SPI_STATUS_WPEN 0x80 |
| Write-protect pin enabled. More... | |
| #define | SPI_STATUS_BP2 0x10 |
| Block protection bit 2. More... | |
| #define | SPI_STATUS_BP1 0x08 |
| Block protection bit 1. More... | |
| #define | SPI_STATUS_BP0 0x04 |
| Block protection bit 0. More... | |
| #define | SPI_STATUS_WEN 0x02 |
| State of the write enable latch. More... | |
| #define | SPI_STATUS_NRDY 0x01 |
| Device busy flag. More... | |
| #define | SPI_AUTODETECT_ADDRESS_LEN 0 |
| SPI magic autodetection address length. More... | |
| #define | SPI_MODE_CPHA 0x01 |
| Clock phase (CPHA) mode bit. More... | |
| #define | SPI_MODE_CPOL 0x02 |
| Clock polarity (CPOL) mode bit. More... | |
| #define | SPI_MODE_SSPOL 0x10 |
| Slave select polarity mode bit. More... | |
| #define | SPI_MODE_MICROWIRE 1 |
| Microwire-compatible mode. More... | |
| #define | SPI_MODE_MICROWIRE_PLUS 0 |
| Microwire/Plus-compatible mode. More... | |
| #define | SPI_MODE_THREEWIRE ( SPI_MODE_MICROWIRE_PLUS | SPI_MODE_SSPOL ) |
| Threewire-compatible mode. More... | |
Functions | |
| FILE_LICENCE (GPL2_OR_LATER_OR_UBDL) | |
| static | __attribute__ ((always_inline)) void init_at25f1024(struct spi_device *device) |
| Atmel AT25F1024 serial flash. More... | |
| int | spi_read (struct nvs_device *nvs, unsigned int address, void *data, size_t len) |
| Read data from SPI device. More... | |
| int | spi_write (struct nvs_device *nvs, unsigned int address, const void *data, size_t len) |
| Write data to SPI device. More... | |
SPI interface.
Definition in file spi.h.
| #define SPI_AUTODETECT_ADDRESS_LEN 0 |
SPI magic autodetection address length.
Set spi_device::address_len to SPI_AUTODETECT_ADDRESS_LEN if the address length should be autodetected.
| #define SPI_MODE_CPHA 0x01 |
| #define SPI_MODE_CPOL 0x02 |
| #define SPI_MODE_SSPOL 0x10 |
| #define SPI_MODE_MICROWIRE 1 |
| #define SPI_MODE_MICROWIRE_PLUS 0 |
| #define SPI_MODE_THREEWIRE ( SPI_MODE_MICROWIRE_PLUS | SPI_MODE_SSPOL ) |
| FILE_LICENCE | ( | GPL2_OR_LATER_OR_UBDL | ) |
| int spi_read | ( | struct nvs_device * | nvs, |
| unsigned int | address, | ||
| void * | data, | ||
| size_t | len | ||
| ) |
Read data from SPI device.
| nvs | NVS device |
| address | Address from which to read |
| data | Data buffer |
| len | Length of data buffer |
| rc | Return status code |
Definition at line 89 of file spi.c.
References address, bus, data, DBG, len, NULL, spi_device::nvs, rc, spi_command(), and SPI_READ.
| int spi_write | ( | struct nvs_device * | nvs, |
| unsigned int | address, | ||
| const void * | data, | ||
| size_t | len | ||
| ) |
Write data to SPI device.
| nvs | NVS device |
| address | Address from which to read |
| data | Data buffer |
| len | Length of data buffer |
| rc | Return status code |
Definition at line 116 of file spi.c.
References address, bus, data, DBG, len, NULL, spi_device::nvs, rc, spi_command(), spi_wait(), SPI_WREN, and SPI_WRITE.
1.8.15