iPXE
base.h
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00001 /*-
00002  * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
00003  * All rights reserved.
00004  *
00005  * Modified for iPXE, July 2009, by Joshua Oreman <oremanj@rwcr.net>
00006  * Original from Linux kernel 2.6.30.
00007  *
00008  * Redistribution and use in source and binary forms, with or without
00009  * modification, are permitted provided that the following conditions
00010  * are met:
00011  * 1. Redistributions of source code must retain the above copyright
00012  *    notice, this list of conditions and the following disclaimer,
00013  *    without modification.
00014  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
00015  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
00016  *    redistribution must be conditioned upon including a substantially
00017  *    similar Disclaimer requirement for further binary redistribution.
00018  * 3. Neither the names of the above-listed copyright holders nor the names
00019  *    of any contributors may be used to endorse or promote products derived
00020  *    from this software without specific prior written permission.
00021  *
00022  * Alternatively, this software may be distributed under the terms of the
00023  * GNU General Public License ("GPL") version 2 as published by the Free
00024  * Software Foundation.
00025  *
00026  * NO WARRANTY
00027  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
00028  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
00029  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
00030  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
00031  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
00032  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
00033  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00034  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
00035  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
00036  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
00037  * THE POSSIBILITY OF SUCH DAMAGES.
00038  *
00039  */
00040 
00041 /*
00042  * Defintions for the Atheros Wireless LAN controller driver.
00043  */
00044 #ifndef _DEV_ATH_ATHVAR_H
00045 #define _DEV_ATH_ATHVAR_H
00046 
00047 FILE_LICENCE ( BSD3 );
00048 
00049 #include "ath5k.h"
00050 #include <ipxe/iobuf.h>
00051 
00052 #define ATH_RXBUF       16              /* number of RX buffers */
00053 #define ATH_TXBUF       16              /* number of TX buffers */
00054 
00055 struct ath5k_buf {
00056         struct list_head        list;
00057         unsigned int            flags;  /* rx descriptor flags */
00058         struct ath5k_desc       *desc;  /* virtual addr of desc */
00059         u32                     daddr;  /* physical addr of desc */
00060         struct io_buffer        *iob;   /* I/O buffer for buf */
00061         u32                     iobaddr;/* physical addr of iob data */
00062 };
00063 
00064 /*
00065  * Data transmit queue state.  One of these exists for each
00066  * hardware transmit queue.  Packets sent to us from above
00067  * are assigned to queues based on their priority.  Not all
00068  * devices support a complete set of hardware transmit queues.
00069  * For those devices the array sc_ac2q will map multiple
00070  * priorities to fewer hardware queues (typically all to one
00071  * hardware queue).
00072  */
00073 struct ath5k_txq {
00074         unsigned int            qnum;   /* hardware q number */
00075         u32                     *link;  /* link ptr in last TX desc */
00076         struct list_head        q;      /* transmit queue */
00077         int                     setup;
00078 };
00079 
00080 #if CHAN_DEBUG
00081 #define ATH_CHAN_MAX    (26+26+26+200+200)
00082 #else
00083 #define ATH_CHAN_MAX    (14+14+14+252+20)
00084 #endif
00085 
00086 /* Software Carrier, keeps track of the driver state
00087  * associated with an instance of a device */
00088 struct ath5k_softc {
00089         struct pci_device       *pdev;          /* for dma mapping */
00090         void                    *iobase;        /* address of the device */
00091         struct net80211_device  *dev;           /* IEEE 802.11 common */
00092         struct ath5k_hw         *ah;            /* Atheros HW */
00093         struct net80211_hw_info *hwinfo;
00094         int                     curband;
00095         int                     irq_ena;        /* interrupts enabled */
00096 
00097         struct ath5k_buf        *bufptr;        /* allocated buffer ptr */
00098         struct ath5k_desc       *desc;          /* TX/RX descriptors */
00099         u32                     desc_daddr;     /* DMA (physical) address */
00100         size_t                  desc_len;       /* size of TX/RX descriptors */
00101         u16                     cachelsz;       /* cache line size */
00102 
00103         int                     status;
00104 #define ATH_STAT_INVALID        0x01            /* disable hardware accesses */
00105 #define ATH_STAT_MRRETRY        0x02            /* multi-rate retry support */
00106 #define ATH_STAT_PROMISC        0x04
00107 #define ATH_STAT_LEDSOFT        0x08            /* enable LED gpio status */
00108 #define ATH_STAT_STARTED        0x10            /* opened & irqs enabled */
00109 
00110         unsigned int            filter_flags;   /* HW flags, AR5K_RX_FILTER_* */
00111         unsigned int            curmode;        /* current phy mode */
00112         struct net80211_channel *curchan;       /* current h/w channel */
00113 
00114         enum ath5k_int          imask;          /* interrupt mask copy */
00115 
00116         u8                      bssidmask[ETH_ALEN];
00117 
00118         unsigned int            rxbufsize;      /* rx size based on mtu */
00119         struct list_head        rxbuf;          /* receive buffer */
00120         u32                     *rxlink;        /* link ptr in last RX desc */
00121 
00122         struct list_head        txbuf;          /* transmit buffer */
00123         unsigned int            txbuf_len;      /* buf count in txbuf list */
00124         struct ath5k_txq        txq;            /* tx queue */
00125 
00126         struct {
00127                 u16 gpio;
00128                 unsigned polarity;
00129         } rf_kill;
00130 
00131         int                     last_calib_ticks;
00132 
00133         int                     power_level;    /* Requested tx power in dbm */
00134         int                     assoc;          /* assocate state */
00135 
00136         int                     hw_rate;        /* Hardware tx rate code */
00137         int                     hw_rtscts_rate; /* Hardware rts/cts rate code */
00138 };
00139 
00140 #define ath5k_hw_hasbssidmask(_ah) \
00141         (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0)
00142 #define ath5k_hw_hasveol(_ah) \
00143         (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)
00144 
00145 #endif