iPXE
Data Structures | Defines | Enumerations | Functions | Variables
intel.h File Reference

Intel 10/100/1000 network card driver. More...

#include <stdint.h>
#include <ipxe/if_ether.h>
#include <ipxe/nvs.h>

Go to the source code of this file.

Data Structures

struct  intel_descriptor
 A packet descriptor. More...
union  intel_receive_address
 Receive address. More...
struct  intel_ring
 An Intel descriptor ring. More...
struct  intel_mailbox
 An Intel virtual function mailbox. More...

Defines

#define INTEL_BAR_SIZE   ( 128 * 1024 )
 Intel BAR size.
#define INTEL_DESC_FL_DTYP(dtyp)   ( (dtyp) << 4 )
 Descriptor type.
#define INTEL_DESC_FL_DTYP_DATA   INTEL_DESC_FL_DTYP ( 0x03 )
#define INTEL_DESC_CMD_DEXT   0x20
 Descriptor extension.
#define INTEL_DESC_CMD_RS   0x08
 Report status.
#define INTEL_DESC_CMD_IFCS   0x02
 Insert frame checksum (CRC)
#define INTEL_DESC_CMD_EOP   0x01
 End of packet.
#define INTEL_DESC_STATUS_DD   0x00000001UL
 Descriptor done.
#define INTEL_DESC_STATUS_RXE   0x00000100UL
 Receive error.
#define INTEL_DESC_STATUS_PAYLEN(len)   ( (len) << 14 )
 Payload length.
#define INTEL_CTRL   0x00000UL
 Device Control Register.
#define INTEL_CTRL_LRST   0x00000008UL
 Link reset.
#define INTEL_CTRL_ASDE   0x00000020UL
 Auto-speed detection.
#define INTEL_CTRL_SLU   0x00000040UL
 Set link up.
#define INTEL_CTRL_FRCSPD   0x00000800UL
 Force speed.
#define INTEL_CTRL_FRCDPLX   0x00001000UL
 Force duplex.
#define INTEL_CTRL_RST   0x04000000UL
 Device reset.
#define INTEL_CTRL_PHY_RST   0x80000000UL
 PHY reset.
#define INTEL_RESET_DELAY_MS   20
 Time to delay for device reset, in milliseconds.
#define INTEL_STATUS   0x00008UL
 Device Status Register.
#define INTEL_STATUS_LU   0x00000002UL
 Link up.
#define INTEL_EERD   0x00014UL
 EEPROM Read Register.
#define INTEL_EERD_START   0x00000001UL
 Start read.
#define INTEL_EERD_DONE_SMALL   0x00000010UL
 Read done (small EERD)
#define INTEL_EERD_DONE_LARGE   0x00000002UL
 Read done (large EERD)
#define INTEL_EERD_ADDR_SHIFT_SMALL   8
 Address shift (small)
#define INTEL_EERD_ADDR_SHIFT_LARGE   2
 Address shift (large)
#define INTEL_EERD_DATA(value)   ( (value) >> 16 )
 Read data.
#define INTEL_EEPROM_MAX_WAIT_MS   100
 Maximum time to wait for EEPROM read, in milliseconds.
#define INTEL_EEPROM_WORD_LEN_LOG2   1
 EEPROM word length.
#define INTEL_EEPROM_MIN_SIZE_WORDS   64
 Minimum EEPROM size, in words.
#define INTEL_EEPROM_MAC   0x00
 Offset of MAC address within EEPROM.
#define INTEL_ICR   0x000c0UL
 Interrupt Cause Read Register.
#define INTEL_IRQ_TXDW   0x00000001UL
 Transmit descriptor done.
#define INTEL_IRQ_TXQE   0x00000002UL
 Transmit queue empty.
#define INTEL_IRQ_LSC   0x00000004UL
 Link status change.
#define INTEL_IRQ_RXDMT0   0x00000010UL
 Receive queue low.
#define INTEL_IRQ_RXO   0x00000040UL
 Receive overrun.
#define INTEL_IRQ_RXT0   0x00000080UL
 Receive timer.
#define INTEL_IMS   0x000d0UL
 Interrupt Mask Set/Read Register.
#define INTEL_IMC   0x000d8UL
 Interrupt Mask Clear Register.
#define INTEL_RCTL   0x00100UL
 Receive Control Register.
#define INTEL_RCTL_EN   0x00000002UL
 Receive enable.
#define INTEL_RCTL_UPE   0x00000008UL
 Unicast promiscuous mode.
#define INTEL_RCTL_MPE   0x00000010UL
 Multicast promiscuous.
#define INTEL_RCTL_BAM   0x00008000UL
 Broadcast accept mode.
#define INTEL_RCTL_BSIZE_BSEX(bsex, bsize)   ( ( (bsize) << 16 ) | ( (bsex) << 25 ) )
 Buffer size.
#define INTEL_RCTL_BSIZE_2048   INTEL_RCTL_BSIZE_BSEX ( 0, 0 )
#define INTEL_RCTL_BSIZE_BSEX_MASK   INTEL_RCTL_BSIZE_BSEX ( 1, 3 )
#define INTEL_RCTL_SECRC   0x04000000UL
 Strip CRC.
#define INTEL_TCTL   0x00400UL
 Transmit Control Register.
#define INTEL_TCTL_EN   0x00000002UL
 Transmit enable.
#define INTEL_TCTL_PSP   0x00000008UL
 Pad short packets.
#define INTEL_TCTL_CT(x)   ( (x) << 4 )
 Collision threshold.
#define INTEL_TCTL_CT_DEFAULT   INTEL_TCTL_CT ( 0x0f )
#define INTEL_TCTL_CT_MASK   INTEL_TCTL_CT ( 0xff )
#define INTEL_TCTL_COLD(x)   ( (x) << 12 )
 Collision distance.
#define INTEL_TCTL_COLD_DEFAULT   INTEL_TCTL_COLD ( 0x040 )
#define INTEL_TCTL_COLD_MASK   INTEL_TCTL_COLD ( 0x3ff )
#define INTEL_PBA   0x01000UL
 Packet Buffer Allocation.
#define INTEL_PBS   0x01008UL
 Packet Buffer Size.
#define INTEL_RD   0x02800UL
 Receive Descriptor register block.
#define INTEL_NUM_RX_DESC   16
 Number of receive descriptors.
#define INTEL_RX_FILL   8
 Receive descriptor ring fill level.
#define INTEL_RX_MAX_LEN   2048
 Receive buffer length.
#define INTEL_TD   0x03800UL
 Transmit Descriptor register block.
#define INTEL_NUM_TX_DESC   16
 Number of transmit descriptors.
#define INTEL_TX_FILL   ( INTEL_NUM_TX_DESC - 1 )
 Transmit descriptor ring maximum fill level.
#define INTEL_xDBAL   0x00
 Receive/Transmit Descriptor Base Address Low (offset)
#define INTEL_xDBAH   0x04
 Receive/Transmit Descriptor Base Address High (offset)
#define INTEL_xDLEN   0x08
 Receive/Transmit Descriptor Length (offset)
#define INTEL_xDH   0x10
 Receive/Transmit Descriptor Head (offset)
#define INTEL_xDT   0x18
 Receive/Transmit Descriptor Tail (offset)
#define INTEL_xDCTL   0x28
 Receive/Transmit Descriptor Control (offset)
#define INTEL_xDCTL_ENABLE   0x02000000UL
 Queue enable.
#define INTEL_DISABLE_MAX_WAIT_MS   100
 Maximum time to wait for queue disable, in milliseconds.
#define INTEL_RAL0   0x05400UL
 Receive Address Low.
#define INTEL_RAH0   0x05404UL
 Receive Address High.
#define INTEL_RAH0_AV   0x80000000UL
 Address valid.
#define INTEL_FEXTNVM11   0x05bbcUL
 Future Extended NVM register 11.
#define INTEL_FEXTNVM11_WTF   0x00002000UL
 Don't ask.
#define INTEL_I219   ( INTEL_NO_PHY_RST | INTEL_RST_HANG )
 The i219 has a seriously broken reset mechanism.

Enumerations

enum  intel_flags {
  INTEL_PBS_ERRATA = 0x0001, INTEL_VMWARE = 0x0002, INTEL_NO_PHY_RST = 0x0004, INTEL_NO_ASDE = 0x0008,
  INTEL_RST_HANG = 0x0010
}
 Driver flags. More...

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)
struct intel_descriptor __attribute__ ((packed))
static __attribute__ ((always_inline)) void intel_init_ring(struct intel_ring *ring
 Initialise descriptor ring.
static void intel_diag (struct intel_nic *intel)
 Dump diagnostic information.
void intel_describe_tx (struct intel_descriptor *tx, physaddr_t addr, size_t len)
 Populate transmit descriptor.
void intel_describe_tx_adv (struct intel_descriptor *tx, physaddr_t addr, size_t len)
 Populate advanced transmit descriptor.
void intel_describe_rx (struct intel_descriptor *rx, physaddr_t addr, size_t len)
 Populate receive descriptor.
void intel_reset_ring (struct intel_nic *intel, unsigned int reg)
 Reset descriptor ring.
int intel_create_ring (struct intel_nic *intel, struct intel_ring *ring)
 Create descriptor ring.
void intel_destroy_ring (struct intel_nic *intel, struct intel_ring *ring)
 Destroy descriptor ring.
void intel_refill_rx (struct intel_nic *intel)
 Refill receive descriptor ring.
void intel_empty_rx (struct intel_nic *intel)
 Discard unused receive I/O buffers.
int intel_transmit (struct net_device *netdev, struct io_buffer *iobuf)
 Transmit packet.
void intel_poll_tx (struct net_device *netdev)
 Poll for completed packets.
void intel_poll_rx (struct net_device *netdev)
 Poll for received packets.

Variables

uint64_t address
 Buffer address.
uint16_t length
 Length.
uint8_t flags
 Flags.
uint8_t command
 Command.
uint32_t status
 Status.
uint32_t low
 Low 16 bits of address.
uint32_t high
 High 32 bits of address.
union intel_receive_address __attribute__
static unsigned int count
static unsigned int unsigned int reg
static unsigned int unsigned
int void(* 
describe )(struct intel_descriptor *desc, physaddr_t addr, size_t len))
static unsigned int ctrl

Detailed Description

Intel 10/100/1000 network card driver.

Definition in file intel.h.


Define Documentation

#define INTEL_BAR_SIZE   ( 128 * 1024 )

Intel BAR size.

Definition at line 17 of file intel.h.

Referenced by intel_probe(), and intelx_probe().

#define INTEL_DESC_FL_DTYP (   dtyp)    ( (dtyp) << 4 )

Descriptor type.

Definition at line 34 of file intel.h.

Definition at line 35 of file intel.h.

Referenced by intel_describe_tx_adv().

#define INTEL_DESC_CMD_DEXT   0x20

Descriptor extension.

Definition at line 38 of file intel.h.

Referenced by intel_describe_tx_adv().

#define INTEL_DESC_CMD_RS   0x08

Report status.

Definition at line 41 of file intel.h.

Referenced by intel_describe_tx(), and intel_describe_tx_adv().

#define INTEL_DESC_CMD_IFCS   0x02

Insert frame checksum (CRC)

Definition at line 44 of file intel.h.

Referenced by intel_describe_tx(), and intel_describe_tx_adv().

#define INTEL_DESC_CMD_EOP   0x01

End of packet.

Definition at line 47 of file intel.h.

Referenced by intel_describe_tx(), and intel_describe_tx_adv().

#define INTEL_DESC_STATUS_DD   0x00000001UL

Descriptor done.

Definition at line 50 of file intel.h.

Referenced by intel_poll_rx(), and intel_poll_tx().

#define INTEL_DESC_STATUS_RXE   0x00000100UL

Receive error.

Definition at line 53 of file intel.h.

Referenced by intel_poll_rx().

#define INTEL_DESC_STATUS_PAYLEN (   len)    ( (len) << 14 )

Payload length.

Definition at line 56 of file intel.h.

Referenced by intel_describe_tx_adv().

#define INTEL_CTRL   0x00000UL

Device Control Register.

Definition at line 59 of file intel.h.

Referenced by intel_reset().

#define INTEL_CTRL_LRST   0x00000008UL

Link reset.

Definition at line 60 of file intel.h.

Referenced by intel_reset().

#define INTEL_CTRL_ASDE   0x00000020UL

Auto-speed detection.

Definition at line 61 of file intel.h.

Referenced by intel_reset().

#define INTEL_CTRL_SLU   0x00000040UL

Set link up.

Definition at line 62 of file intel.h.

Referenced by intel_reset().

#define INTEL_CTRL_FRCSPD   0x00000800UL

Force speed.

Definition at line 63 of file intel.h.

Referenced by intel_reset().

#define INTEL_CTRL_FRCDPLX   0x00001000UL

Force duplex.

Definition at line 64 of file intel.h.

Referenced by intel_reset().

#define INTEL_CTRL_RST   0x04000000UL

Device reset.

Definition at line 65 of file intel.h.

Referenced by intel_reset().

#define INTEL_CTRL_PHY_RST   0x80000000UL

PHY reset.

Definition at line 66 of file intel.h.

Referenced by intel_reset().

#define INTEL_RESET_DELAY_MS   20

Time to delay for device reset, in milliseconds.

Definition at line 69 of file intel.h.

Referenced by intel_reset().

#define INTEL_STATUS   0x00008UL

Device Status Register.

Definition at line 72 of file intel.h.

Referenced by intel_check_link(), and intel_reset().

#define INTEL_STATUS_LU   0x00000002UL

Link up.

Definition at line 73 of file intel.h.

Referenced by intel_check_link(), and intel_reset().

#define INTEL_EERD   0x00014UL

EEPROM Read Register.

Definition at line 76 of file intel.h.

Referenced by intel_init_eeprom(), and intel_read_eeprom().

#define INTEL_EERD_START   0x00000001UL

Start read.

Definition at line 77 of file intel.h.

Referenced by intel_init_eeprom(), and intel_read_eeprom().

#define INTEL_EERD_DONE_SMALL   0x00000010UL

Read done (small EERD)

Definition at line 78 of file intel.h.

Referenced by intel_init_eeprom().

#define INTEL_EERD_DONE_LARGE   0x00000002UL

Read done (large EERD)

Definition at line 79 of file intel.h.

Referenced by intel_init_eeprom().

Address shift (small)

Definition at line 80 of file intel.h.

Referenced by intel_init_eeprom().

Address shift (large)

Definition at line 81 of file intel.h.

Referenced by intel_init_eeprom().

#define INTEL_EERD_DATA (   value)    ( (value) >> 16 )

Read data.

Definition at line 82 of file intel.h.

Referenced by intel_read_eeprom().

#define INTEL_EEPROM_MAX_WAIT_MS   100

Maximum time to wait for EEPROM read, in milliseconds.

Definition at line 85 of file intel.h.

Referenced by intel_init_eeprom(), and intel_read_eeprom().

EEPROM word length.

Definition at line 88 of file intel.h.

Referenced by intel_init_eeprom().

#define INTEL_EEPROM_MIN_SIZE_WORDS   64

Minimum EEPROM size, in words.

Definition at line 91 of file intel.h.

Referenced by intel_init_eeprom().

#define INTEL_EEPROM_MAC   0x00

Offset of MAC address within EEPROM.

Definition at line 94 of file intel.h.

Referenced by intel_fetch_mac_eeprom().

#define INTEL_ICR   0x000c0UL

Interrupt Cause Read Register.

Definition at line 97 of file intel.h.

Referenced by intel_poll().

#define INTEL_IRQ_TXDW   0x00000001UL

Transmit descriptor done.

Definition at line 98 of file intel.h.

Referenced by intel_irq(), and intel_poll().

#define INTEL_IRQ_TXQE   0x00000002UL

Transmit queue empty.

Definition at line 99 of file intel.h.

Referenced by intel_poll().

#define INTEL_IRQ_LSC   0x00000004UL

Link status change.

Definition at line 100 of file intel.h.

Referenced by intel_irq(), and intel_poll().

#define INTEL_IRQ_RXDMT0   0x00000010UL

Receive queue low.

Definition at line 101 of file intel.h.

Referenced by intel_poll().

#define INTEL_IRQ_RXO   0x00000040UL

Receive overrun.

Definition at line 102 of file intel.h.

Referenced by intel_poll().

#define INTEL_IRQ_RXT0   0x00000080UL

Receive timer.

Definition at line 103 of file intel.h.

Referenced by intel_irq(), intel_open(), and intel_poll().

#define INTEL_IMS   0x000d0UL

Interrupt Mask Set/Read Register.

Definition at line 106 of file intel.h.

Referenced by intel_irq().

#define INTEL_IMC   0x000d8UL

Interrupt Mask Clear Register.

Definition at line 109 of file intel.h.

Referenced by intel_irq().

#define INTEL_RCTL   0x00100UL

Receive Control Register.

Definition at line 112 of file intel.h.

Referenced by intel_close(), and intel_open().

#define INTEL_RCTL_EN   0x00000002UL

Receive enable.

Definition at line 113 of file intel.h.

Referenced by intel_open().

#define INTEL_RCTL_UPE   0x00000008UL

Unicast promiscuous mode.

Definition at line 114 of file intel.h.

Referenced by intel_open().

#define INTEL_RCTL_MPE   0x00000010UL

Multicast promiscuous.

Definition at line 115 of file intel.h.

Referenced by intel_open().

#define INTEL_RCTL_BAM   0x00008000UL

Broadcast accept mode.

Definition at line 116 of file intel.h.

Referenced by intel_open().

#define INTEL_RCTL_BSIZE_BSEX (   bsex,
  bsize 
)    ( ( (bsize) << 16 ) | ( (bsex) << 25 ) )

Buffer size.

Definition at line 117 of file intel.h.

Definition at line 120 of file intel.h.

Referenced by intel_open().

Definition at line 121 of file intel.h.

Referenced by intel_open().

#define INTEL_RCTL_SECRC   0x04000000UL

Strip CRC.

Definition at line 122 of file intel.h.

Referenced by intel_open().

#define INTEL_TCTL   0x00400UL

Transmit Control Register.

Definition at line 125 of file intel.h.

Referenced by intel_close(), and intel_open().

#define INTEL_TCTL_EN   0x00000002UL

Transmit enable.

Definition at line 126 of file intel.h.

Referenced by intel_open().

#define INTEL_TCTL_PSP   0x00000008UL

Pad short packets.

Definition at line 127 of file intel.h.

Referenced by intel_open().

#define INTEL_TCTL_CT (   x)    ( (x) << 4 )

Collision threshold.

Definition at line 128 of file intel.h.

#define INTEL_TCTL_CT_DEFAULT   INTEL_TCTL_CT ( 0x0f )

Definition at line 129 of file intel.h.

Referenced by intel_open().

#define INTEL_TCTL_CT_MASK   INTEL_TCTL_CT ( 0xff )

Definition at line 130 of file intel.h.

Referenced by intel_open().

#define INTEL_TCTL_COLD (   x)    ( (x) << 12 )

Collision distance.

Definition at line 131 of file intel.h.

#define INTEL_TCTL_COLD_DEFAULT   INTEL_TCTL_COLD ( 0x040 )

Definition at line 132 of file intel.h.

Referenced by intel_open().

#define INTEL_TCTL_COLD_MASK   INTEL_TCTL_COLD ( 0x3ff )

Definition at line 133 of file intel.h.

Referenced by intel_open().

#define INTEL_PBA   0x01000UL

Packet Buffer Allocation.

Definition at line 136 of file intel.h.

Referenced by intel_reset().

#define INTEL_PBS   0x01008UL

Packet Buffer Size.

Definition at line 139 of file intel.h.

Referenced by intel_reset().

#define INTEL_RD   0x02800UL

Receive Descriptor register block.

Definition at line 142 of file intel.h.

Referenced by intel_probe().

#define INTEL_NUM_RX_DESC   16

Number of receive descriptors.

Minimum value is 8, since the descriptor ring length must be a multiple of 128.

Definition at line 149 of file intel.h.

Referenced by intel_empty_rx(), intel_poll_rx(), intel_probe(), intel_refill_rx(), intelx_probe(), and intelxvf_probe().

#define INTEL_RX_FILL   8

Receive descriptor ring fill level.

Definition at line 152 of file intel.h.

Referenced by intel_refill_rx().

#define INTEL_RX_MAX_LEN   2048

Receive buffer length.

Definition at line 155 of file intel.h.

Referenced by intel_refill_rx().

#define INTEL_TD   0x03800UL

Transmit Descriptor register block.

Definition at line 158 of file intel.h.

Referenced by intel_probe().

#define INTEL_NUM_TX_DESC   16

Number of transmit descriptors.

Descriptor ring length must be a multiple of 16. ICH8/9/10 requires a minimum of 16 TX descriptors.

Definition at line 165 of file intel.h.

Referenced by intel_poll_tx(), intel_probe(), intel_transmit(), intelx_probe(), and intelxvf_probe().

#define INTEL_TX_FILL   ( INTEL_NUM_TX_DESC - 1 )

Transmit descriptor ring maximum fill level.

Definition at line 168 of file intel.h.

Referenced by intel_transmit().

#define INTEL_xDBAL   0x00

Receive/Transmit Descriptor Base Address Low (offset)

Definition at line 171 of file intel.h.

Referenced by intel_create_ring(), and intel_reset_ring().

#define INTEL_xDBAH   0x04

Receive/Transmit Descriptor Base Address High (offset)

Definition at line 174 of file intel.h.

Referenced by intel_create_ring(), and intel_reset_ring().

#define INTEL_xDLEN   0x08

Receive/Transmit Descriptor Length (offset)

Definition at line 177 of file intel.h.

Referenced by intel_create_ring(), and intel_reset_ring().

#define INTEL_xDH   0x10

Receive/Transmit Descriptor Head (offset)

Definition at line 180 of file intel.h.

Referenced by intel_create_ring(), and intel_reset_ring().

#define INTEL_xDT   0x18

Receive/Transmit Descriptor Tail (offset)

Definition at line 183 of file intel.h.

Referenced by intel_create_ring(), intel_refill_rx(), intel_reset_ring(), and intel_transmit().

#define INTEL_xDCTL   0x28

Receive/Transmit Descriptor Control (offset)

Definition at line 186 of file intel.h.

Referenced by intel_create_ring(), intel_disable_ring(), and intelxvf_open().

#define INTEL_xDCTL_ENABLE   0x02000000UL

Queue enable.

Definition at line 187 of file intel.h.

Referenced by intel_create_ring(), and intel_disable_ring().

#define INTEL_DISABLE_MAX_WAIT_MS   100

Maximum time to wait for queue disable, in milliseconds.

Definition at line 190 of file intel.h.

Referenced by intel_disable_ring().

#define INTEL_RAL0   0x05400UL

Receive Address Low.

Definition at line 193 of file intel.h.

Referenced by intel_fetch_mac(), and intel_open().

#define INTEL_RAH0   0x05404UL

Receive Address High.

Definition at line 196 of file intel.h.

Referenced by intel_fetch_mac(), and intel_open().

#define INTEL_RAH0_AV   0x80000000UL

Address valid.

Definition at line 197 of file intel.h.

Referenced by intel_open().

#define INTEL_FEXTNVM11   0x05bbcUL

Future Extended NVM register 11.

Definition at line 200 of file intel.h.

Referenced by intel_open().

#define INTEL_FEXTNVM11_WTF   0x00002000UL

Don't ask.

Definition at line 201 of file intel.h.

Referenced by intel_open().

The i219 has a seriously broken reset mechanism.

Definition at line 321 of file intel.h.


Enumeration Type Documentation

Driver flags.

Enumerator:
INTEL_PBS_ERRATA 

PBS/PBA errata workaround required.

INTEL_VMWARE 

VMware missing interrupt workaround required.

INTEL_NO_PHY_RST 

PHY reset is broken.

INTEL_NO_ASDE 

ASDE is broken.

INTEL_RST_HANG 

Reset may cause a complete device hang.

Definition at line 307 of file intel.h.

                                                          {

Function Documentation

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL  )
struct intel_descriptor __attribute__ ( (packed)  )
static __attribute__ ( (always_inline)  ) [inline, static]

Initialise descriptor ring.

Initialise mailbox.

Parameters:
ringDescriptor ring
countNumber of descriptors
regDescriptor register block
describeMethod to populate descriptor
mboxMailbox
ctrlMailbox control register
memMailbox memory register base
static void intel_diag ( struct intel_nic *  intel) [inline, static]

Dump diagnostic information.

Parameters:
intelIntel device

Definition at line 328 of file intel.h.

void intel_describe_tx ( struct intel_descriptor tx,
physaddr_t  addr,
size_t  len 
)

Populate transmit descriptor.

Parameters:
txTransmit descriptor
addrData buffer address
lenLength of data

Definition at line 383 of file intel.c.

References intel_descriptor::address, intel_descriptor::command, cpu_to_le16, cpu_to_le64, intel_descriptor::flags, INTEL_DESC_CMD_EOP, INTEL_DESC_CMD_IFCS, INTEL_DESC_CMD_RS, intel_descriptor::length, and intel_descriptor::status.

Referenced by intel_probe(), and intelx_probe().

                                      {

        /* Populate transmit descriptor */
        tx->address = cpu_to_le64 ( addr );
        tx->length = cpu_to_le16 ( len );
        tx->flags = 0;
        tx->command = ( INTEL_DESC_CMD_RS | INTEL_DESC_CMD_IFCS |
                        INTEL_DESC_CMD_EOP );
        tx->status = 0;
}
void intel_describe_tx_adv ( struct intel_descriptor tx,
physaddr_t  addr,
size_t  len 
)

Populate advanced transmit descriptor.

Parameters:
txTransmit descriptor
addrData buffer address
lenLength of data

Definition at line 402 of file intel.c.

References intel_descriptor::address, intel_descriptor::command, cpu_to_le16, cpu_to_le32, cpu_to_le64, intel_descriptor::flags, INTEL_DESC_CMD_DEXT, INTEL_DESC_CMD_EOP, INTEL_DESC_CMD_IFCS, INTEL_DESC_CMD_RS, INTEL_DESC_FL_DTYP_DATA, INTEL_DESC_STATUS_PAYLEN, intel_descriptor::length, and intel_descriptor::status.

Referenced by intelxvf_probe().

void intel_describe_rx ( struct intel_descriptor rx,
physaddr_t  addr,
size_t len  __unused 
)

Populate receive descriptor.

Parameters:
rxReceive descriptor
addrData buffer address
lenLength of data

Definition at line 421 of file intel.c.

References intel_descriptor::address, cpu_to_le64, intel_descriptor::length, and intel_descriptor::status.

Referenced by intel_probe(), intelx_probe(), and intelxvf_probe().

                                               {

        /* Populate transmit descriptor */
        rx->address = cpu_to_le64 ( addr );
        rx->length = 0;
        rx->status = 0;
}
void intel_reset_ring ( struct intel_nic *  intel,
unsigned int  reg 
)

Reset descriptor ring.

Parameters:
intelIntel device
regRegister block
Return values:
rcReturn status code

Definition at line 475 of file intel.c.

References intel_disable_ring(), INTEL_xDBAH, INTEL_xDBAL, INTEL_xDH, INTEL_xDLEN, INTEL_xDT, and writel().

Referenced by intel_destroy_ring(), and intelxvf_open().

                                                                    {

        /* Disable ring.  Ignore errors and continue to reset the ring anyway */
        intel_disable_ring ( intel, reg );

        /* Clear ring length */
        writel ( 0, ( intel->regs + reg + INTEL_xDLEN ) );

        /* Clear ring address */
        writel ( 0, ( intel->regs + reg + INTEL_xDBAH ) );
        writel ( 0, ( intel->regs + reg + INTEL_xDBAL ) );

        /* Reset head and tail pointers */
        writel ( 0, ( intel->regs + reg + INTEL_xDH ) );
        writel ( 0, ( intel->regs + reg + INTEL_xDT ) );
}
int intel_create_ring ( struct intel_nic *  intel,
struct intel_ring ring 
)

Create descriptor ring.

Parameters:
intelIntel device
ringDescriptor ring
Return values:
rcReturn status code

Definition at line 499 of file intel.c.

References address, DBGC, intel_ring::desc, ENOMEM, INTEL_xDBAH, INTEL_xDBAL, INTEL_xDCTL, INTEL_xDCTL_ENABLE, INTEL_xDH, INTEL_xDLEN, INTEL_xDT, intel_ring::len, malloc_dma(), memset(), readl(), intel_ring::reg, virt_to_bus(), and writel().

Referenced by intel_open(), intelx_open(), and intelxvf_open().

                                                                           {
        physaddr_t address;
        uint32_t dctl;

        /* Allocate descriptor ring.  Align ring on its own size to
         * prevent any possible page-crossing errors due to hardware
         * errata.
         */
        ring->desc = malloc_dma ( ring->len, ring->len );
        if ( ! ring->desc )
                return -ENOMEM;

        /* Initialise descriptor ring */
        memset ( ring->desc, 0, ring->len );

        /* Program ring address */
        address = virt_to_bus ( ring->desc );
        writel ( ( address & 0xffffffffUL ),
                 ( intel->regs + ring->reg + INTEL_xDBAL ) );
        if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
                writel ( ( ( ( uint64_t ) address ) >> 32 ),
                         ( intel->regs + ring->reg + INTEL_xDBAH ) );
        } else {
                writel ( 0, intel->regs + ring->reg + INTEL_xDBAH );
        }

        /* Program ring length */
        writel ( ring->len, ( intel->regs + ring->reg + INTEL_xDLEN ) );

        /* Reset head and tail pointers */
        writel ( 0, ( intel->regs + ring->reg + INTEL_xDH ) );
        writel ( 0, ( intel->regs + ring->reg + INTEL_xDT ) );

        /* Enable ring */
        dctl = readl ( intel->regs + ring->reg + INTEL_xDCTL );
        dctl |= INTEL_xDCTL_ENABLE;
        writel ( dctl, intel->regs + ring->reg + INTEL_xDCTL );

        DBGC ( intel, "INTEL %p ring %05x is at [%08llx,%08llx)\n",
               intel, ring->reg, ( ( unsigned long long ) address ),
               ( ( unsigned long long ) address + ring->len ) );

        return 0;
}
void intel_destroy_ring ( struct intel_nic *  intel,
struct intel_ring ring 
)

Destroy descriptor ring.

Parameters:
intelIntel device
ringDescriptor ring

Definition at line 550 of file intel.c.

References intel_ring::cons, intel_ring::desc, free_dma(), intel_reset_ring(), intel_ring::len, NULL, intel_ring::prod, and intel_ring::reg.

Referenced by intel_close(), intel_open(), intelx_close(), intelx_open(), intelxvf_close(), and intelxvf_open().

                                                                             {

        /* Reset ring */
        intel_reset_ring ( intel, ring->reg );

        /* Free descriptor ring */
        free_dma ( ring->desc, ring->len );
        ring->desc = NULL;
        ring->prod = 0;
        ring->cons = 0;
}
void intel_refill_rx ( struct intel_nic *  intel)

Refill receive descriptor ring.

Parameters:
intelIntel device

Definition at line 567 of file intel.c.

References address, alloc_iob(), assert, io_buffer::data, DBGC2, INTEL_NUM_RX_DESC, INTEL_RX_FILL, INTEL_RX_MAX_LEN, INTEL_xDT, NULL, profile_exclude(), profile_start(), profile_stop(), rx, virt_to_bus(), wmb, and writel().

Referenced by intel_open(), intel_poll(), intelx_open(), intelx_poll(), intelxvf_open(), and intelxvf_poll().

                                                 {
        struct intel_descriptor *rx;
        struct io_buffer *iobuf;
        unsigned int rx_idx;
        unsigned int rx_tail;
        physaddr_t address;
        unsigned int refilled = 0;

        /* Refill ring */
        while ( ( intel->rx.prod - intel->rx.cons ) < INTEL_RX_FILL ) {

                /* Allocate I/O buffer */
                iobuf = alloc_iob ( INTEL_RX_MAX_LEN );
                if ( ! iobuf ) {
                        /* Wait for next refill */
                        break;
                }

                /* Get next receive descriptor */
                rx_idx = ( intel->rx.prod++ % INTEL_NUM_RX_DESC );
                rx = &intel->rx.desc[rx_idx];

                /* Populate receive descriptor */
                address = virt_to_bus ( iobuf->data );
                intel->rx.describe ( rx, address, 0 );

                /* Record I/O buffer */
                assert ( intel->rx_iobuf[rx_idx] == NULL );
                intel->rx_iobuf[rx_idx] = iobuf;

                DBGC2 ( intel, "INTEL %p RX %d is [%llx,%llx)\n", intel, rx_idx,
                        ( ( unsigned long long ) address ),
                        ( ( unsigned long long ) address + INTEL_RX_MAX_LEN ) );
                refilled++;
        }

        /* Push descriptors to card, if applicable */
        if ( refilled ) {
                wmb();
                rx_tail = ( intel->rx.prod % INTEL_NUM_RX_DESC );
                profile_start ( &intel_vm_refill_profiler );
                writel ( rx_tail, intel->regs + intel->rx.reg + INTEL_xDT );
                profile_stop ( &intel_vm_refill_profiler );
                profile_exclude ( &intel_vm_refill_profiler );
        }
}
void intel_empty_rx ( struct intel_nic *  intel)

Discard unused receive I/O buffers.

Parameters:
intelIntel device

Definition at line 619 of file intel.c.

References free_iob(), INTEL_NUM_RX_DESC, and NULL.

Referenced by intel_close(), intelx_close(), and intelxvf_close().

                                                {
        unsigned int i;

        for ( i = 0 ; i < INTEL_NUM_RX_DESC ; i++ ) {
                if ( intel->rx_iobuf[i] )
                        free_iob ( intel->rx_iobuf[i] );
                intel->rx_iobuf[i] = NULL;
        }
}
int intel_transmit ( struct net_device netdev,
struct io_buffer iobuf 
)

Transmit packet.

Parameters:
netdevNetwork device
iobufI/O buffer
Return values:
rcReturn status code

Definition at line 740 of file intel.c.

References address, io_buffer::data, DBGC, DBGC2, ENOBUFS, INTEL_NUM_TX_DESC, INTEL_TX_FILL, INTEL_xDT, iob_len(), len, net_device::priv, profile_exclude(), profile_start(), profile_stop(), tx, virt_to_bus(), wmb, and writel().

                                                                          {
        struct intel_nic *intel = netdev->priv;
        struct intel_descriptor *tx;
        unsigned int tx_idx;
        unsigned int tx_tail;
        physaddr_t address;
        size_t len;

        /* Get next transmit descriptor */
        if ( ( intel->tx.prod - intel->tx.cons ) >= INTEL_TX_FILL ) {
                DBGC ( intel, "INTEL %p out of transmit descriptors\n", intel );
                return -ENOBUFS;
        }
        tx_idx = ( intel->tx.prod++ % INTEL_NUM_TX_DESC );
        tx_tail = ( intel->tx.prod % INTEL_NUM_TX_DESC );
        tx = &intel->tx.desc[tx_idx];

        /* Populate transmit descriptor */
        address = virt_to_bus ( iobuf->data );
        len = iob_len ( iobuf );
        intel->tx.describe ( tx, address, len );
        wmb();

        /* Notify card that there are packets ready to transmit */
        profile_start ( &intel_vm_tx_profiler );
        writel ( tx_tail, intel->regs + intel->tx.reg + INTEL_xDT );
        profile_stop ( &intel_vm_tx_profiler );
        profile_exclude ( &intel_vm_tx_profiler );

        DBGC2 ( intel, "INTEL %p TX %d is [%llx,%llx)\n", intel, tx_idx,
                ( ( unsigned long long ) address ),
                ( ( unsigned long long ) address + len ) );

        return 0;
}
void intel_poll_tx ( struct net_device netdev)

Poll for completed packets.

Parameters:
netdevNetwork device

Definition at line 781 of file intel.c.

References cpu_to_le32, DBGC2, INTEL_DESC_STATUS_DD, INTEL_NUM_TX_DESC, netdev_tx_complete_next(), net_device::priv, intel_descriptor::status, and tx.

Referenced by intel_poll(), intelx_poll(), and intelxvf_poll().

                                                 {
        struct intel_nic *intel = netdev->priv;
        struct intel_descriptor *tx;
        unsigned int tx_idx;

        /* Check for completed packets */
        while ( intel->tx.cons != intel->tx.prod ) {

                /* Get next transmit descriptor */
                tx_idx = ( intel->tx.cons % INTEL_NUM_TX_DESC );
                tx = &intel->tx.desc[tx_idx];

                /* Stop if descriptor is still in use */
                if ( ! ( tx->status & cpu_to_le32 ( INTEL_DESC_STATUS_DD ) ) )
                        return;

                DBGC2 ( intel, "INTEL %p TX %d complete\n", intel, tx_idx );

                /* Complete TX descriptor */
                netdev_tx_complete_next ( netdev );
                intel->tx.cons++;
        }
}
void intel_poll_rx ( struct net_device netdev)

Poll for received packets.

Parameters:
netdevNetwork device

Definition at line 810 of file intel.c.

References cpu_to_le32, DBGC, DBGC2, EIO, INTEL_DESC_STATUS_DD, INTEL_DESC_STATUS_RXE, INTEL_NUM_RX_DESC, iob_put, le16_to_cpu, le32_to_cpu, len, intel_descriptor::length, netdev_rx(), netdev_rx_err(), NULL, net_device::priv, rx, and intel_descriptor::status.

Referenced by intel_poll(), intelx_poll(), and intelxvf_poll().

                                                 {
        struct intel_nic *intel = netdev->priv;
        struct intel_descriptor *rx;
        struct io_buffer *iobuf;
        unsigned int rx_idx;
        size_t len;

        /* Check for received packets */
        while ( intel->rx.cons != intel->rx.prod ) {

                /* Get next receive descriptor */
                rx_idx = ( intel->rx.cons % INTEL_NUM_RX_DESC );
                rx = &intel->rx.desc[rx_idx];

                /* Stop if descriptor is still in use */
                if ( ! ( rx->status & cpu_to_le32 ( INTEL_DESC_STATUS_DD ) ) )
                        return;

                /* Populate I/O buffer */
                iobuf = intel->rx_iobuf[rx_idx];
                intel->rx_iobuf[rx_idx] = NULL;
                len = le16_to_cpu ( rx->length );
                iob_put ( iobuf, len );

                /* Hand off to network stack */
                if ( rx->status & cpu_to_le32 ( INTEL_DESC_STATUS_RXE ) ) {
                        DBGC ( intel, "INTEL %p RX %d error (length %zd, "
                               "status %08x)\n", intel, rx_idx, len,
                               le32_to_cpu ( rx->status ) );
                        netdev_rx_err ( netdev, iobuf, -EIO );
                } else {
                        DBGC2 ( intel, "INTEL %p RX %d complete (length %zd)\n",
                                intel, rx_idx, len );
                        netdev_rx ( netdev, iobuf );
                }
                intel->rx.cons++;
        }
}

Variable Documentation

Buffer address.

Definition at line 33 of file intel.h.

Flags.

Definition at line 37 of file intel.h.

Status.

Definition at line 41 of file intel.h.

unsigned int count

Definition at line 245 of file intel.h.

unsigned int unsigned int reg

Definition at line 245 of file intel.h.

Referenced by ar5008_hw_process_ini(), ar9002_hw_load_ani_reg(), ar9003_hw_drive_strength_apply(), ar9003_hw_prog_ini(), ath5k_hw_write_rate_duration(), ath5k_setup_pwr_to_pdadc_table(), ath9k_hw_check_alive(), ath9k_hw_setrxabort(), ath9k_init_band_txpower(), bcom_phy_init(), bnx2_init_board(), bnx2_reset_phy(), efx_hunt_clear_interrupts(), efx_hunt_evq_read_ack(), efx_hunt_notify_rx_desc(), efx_hunt_notify_tx_desc(), efx_probe(), falcon_clear_interrupts(), falcon_eventq_read_ack(), falcon_i2c_bit_read(), falcon_i2c_bit_write(), falcon_init_resources(), falcon_init_sram(), falcon_mask_status_intr(), falcon_mdio_read(), falcon_mdio_write(), falcon_notify_rx_desc(), falcon_notify_tx_desc(), falcon_pm8358_phy_init(), falcon_read_sram(), falcon_reconfigure_mac_wrapper(), falcon_reconfigure_xmac(), falcon_reset_xaui(), falcon_reset_xmac(), falcon_setup_nic(), falcon_spi_rw(), falcon_spi_wait(), falcon_tenxpress_phy_init(), falcon_write_sram(), falcon_xaui_link_ok(), falcon_xgmii_status(), forcedeth_map_regs(), genesis_reset(), genesis_stop(), hfa384x_copy_from_bap(), hfa384x_docmd_wait(), hfa384x_prepare_bap(), hfa384x_wait_for_event(), icplus_mii_read_bit(), icplus_mii_write_bit(), is_yukon_lite_a0(), linda_set_serdes_param(), mdio_clause45_check_mmds(), mentormac_init(), mentormac_reset(), mii_rw(), natsemi_spi_read_bit(), natsemi_spi_write_bit(), pci_read_bases(), phy_init(), prism2_poll(), realtek_init_ring(), realtek_spi_read_bit(), realtek_spi_write_bit(), rtl818x_init_hw(), rtl818x_poll(), rtl818x_probe(), rtl818x_set_anaparam(), rtl818x_spi_read_bit(), rtl818x_spi_write_bit(), rtl818x_start(), rtl818x_stop(), rtl8225_read(), rtl8225_rf_set_tx_power(), rtl8225_rf_stop(), rtl8225_write(), sfe4001_init(), sis190_get_mac_addr(), sis190_get_mac_addr_from_apc(), sis190_mii_probe_88e1111_fixup(), sis630e_get_mac_addr(), skge_reset(), sky2_gmac_reset(), sky2_link_down(), sky2_link_up(), sky2_mac_init(), sky2_phy_init(), sky2_power_on(), sky2_set_multicast(), tg3_phy_toggle_automdix(), tg3_ump_link_report(), yukon_link_up(), and yukon_mac_init().

unsigned int unsigned int void( * describe)(struct intel_descriptor *desc, physaddr_t addr, size_t len))

Definition at line 246 of file intel.h.

                                                                        {

        ring->len = ( count * sizeof ( ring->desc[0] ) );
        ring->reg = reg;
        ring->describe = describe;
}