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iPXE
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Intel 40 Gigabit Ethernet network card driver. More...
Go to the source code of this file.
Data Structures | |
| struct | intelxl_admin_buffer_params |
| Admin queue data buffer command parameters. More... | |
| struct | intelxl_admin_version |
| Admin queue version number. More... | |
| struct | intelxl_admin_version_params |
| Admin queue Get Version command parameters. More... | |
| struct | intelxl_admin_driver_params |
| Admin queue Driver Version command parameters. More... | |
| struct | intelxl_admin_driver_buffer |
| Admin queue Driver Version data buffer. More... | |
| struct | intelxl_admin_shutdown_params |
| Admin queue Shutdown command parameters. More... | |
| struct | intelxl_admin_switch_config |
| Switching element configuration. More... | |
| struct | intelxl_admin_switch_params |
| Admin queue Get Switch Configuration command parameters. More... | |
| struct | intelxl_admin_switch_buffer |
| Admin queue Get Switch Configuration data buffer. More... | |
| struct | intelxl_admin_vsi_params |
| Admin queue Get VSI Parameters command parameters. More... | |
| struct | intelxl_admin_vsi_buffer |
| Admin queue Get VSI Parameters data buffer. More... | |
| struct | intelxl_admin_promisc_params |
| Admin queue Set VSI Promiscuous Modes command parameters. More... | |
| struct | intelxl_admin_autoneg_params |
| Admin queue Restart Autonegotiation command parameters. More... | |
| struct | intelxl_admin_link_params |
| Admin queue Get Link Status command parameters. More... | |
| union | intelxl_admin_params |
| Admin queue command parameters. More... | |
| union | intelxl_admin_buffer |
| Admin queue data buffer. More... | |
| struct | intelxl_admin_descriptor |
| Admin queue descriptor. More... | |
| struct | intelxl_admin |
| Admin queue. More... | |
| struct | intelxl_context_tx |
| Transmit queue context. More... | |
| struct | intelxl_context_rx |
| Receive queue context. More... | |
| struct | intelxl_tx_data_descriptor |
| Transmit data descriptor. More... | |
| struct | intelxl_tx_writeback_descriptor |
| Transmit writeback descriptor. More... | |
| struct | intelxl_rx_data_descriptor |
| Receive data descriptor. More... | |
| struct | intelxl_rx_writeback_descriptor |
| Receive writeback descriptor. More... | |
| union | intelxl_descriptor |
| Packet descriptor. More... | |
| struct | intelxl_ring |
| Descriptor ring. More... | |
| union | intelxl_receive_address |
| Receive address. More... | |
| struct | intelxl_nic |
| An Intel 40Gigabit network card. More... | |
Defines | |
| #define | INTELXL_BAR_SIZE 0x200000 |
| BAR size. | |
| #define | INTELXL_ALIGN 128 |
| Alignment. | |
| #define | INTELXL_ADMIN_CMD 0x080000 |
| PF Admin Command Queue register block. | |
| #define | INTELXL_ADMIN_EVT 0x080080 |
| PF Admin Event Queue register block. | |
| #define | INTELXL_ADMIN_BAL 0x000 |
| Admin Queue Base Address Low Register (offset) | |
| #define | INTELXL_ADMIN_BAH 0x100 |
| Admin Queue Base Address High Register (offset) | |
| #define | INTELXL_ADMIN_LEN 0x200 |
| Admin Queue Length Register (offset) | |
| #define | INTELXL_ADMIN_LEN_LEN(x) ( (x) << 0 ) |
| Queue length. | |
| #define | INTELXL_ADMIN_LEN_ENABLE 0x80000000UL |
| Queue enable. | |
| #define | INTELXL_ADMIN_HEAD 0x300 |
| Admin Queue Head Register (offset) | |
| #define | INTELXL_ADMIN_TAIL 0x400 |
| Admin Queue Tail Register (offset) | |
| #define | INTELXL_ADMIN_VERSION 0x0001 |
| Admin queue Get Version command. | |
| #define | INTELXL_ADMIN_DRIVER 0x0002 |
| Admin queue Driver Version command. | |
| #define | INTELXL_ADMIN_SHUTDOWN 0x0003 |
| Admin queue Shutdown command. | |
| #define | INTELXL_ADMIN_SHUTDOWN_UNLOADING 0x01 |
| Driver is unloading. | |
| #define | INTELXL_ADMIN_SWITCH 0x0200 |
| Admin queue Get Switch Configuration command. | |
| #define | INTELXL_ADMIN_SWITCH_TYPE_VSI 19 |
| Virtual Station Inferface element type. | |
| #define | INTELXL_ADMIN_VSI 0x0212 |
| Admin queue Get VSI Parameters command. | |
| #define | INTELXL_ADMIN_PROMISC 0x0254 |
| Admin queue Set VSI Promiscuous Modes command. | |
| #define | INTELXL_ADMIN_PROMISC_FL_UNICAST 0x0001 |
| Promiscuous unicast mode. | |
| #define | INTELXL_ADMIN_PROMISC_FL_MULTICAST 0x0002 |
| Promiscuous multicast mode. | |
| #define | INTELXL_ADMIN_PROMISC_FL_BROADCAST 0x0004 |
| Promiscuous broadcast mode. | |
| #define | INTELXL_ADMIN_PROMISC_FL_VLAN 0x0010 |
| Promiscuous VLAN mode. | |
| #define | INTELXL_ADMIN_AUTONEG 0x0605 |
| Admin queue Restart Autonegotiation command. | |
| #define | INTELXL_ADMIN_AUTONEG_FL_RESTART 0x02 |
| Restart autonegotiation. | |
| #define | INTELXL_ADMIN_AUTONEG_FL_ENABLE 0x04 |
| Enable link. | |
| #define | INTELXL_ADMIN_LINK 0x0607 |
| Admin queue Get Link Status command. | |
| #define | INTELXL_ADMIN_LINK_NOTIFY 0x03 |
| Notify driver of link status changes. | |
| #define | INTELXL_ADMIN_LINK_UP 0x01 |
| Link is up. | |
| #define | INTELXL_ADMIN_FL_DD 0x0001 |
| Admin descriptor done. | |
| #define | INTELXL_ADMIN_FL_CMP 0x0002 |
| Admin descriptor contains a completion. | |
| #define | INTELXL_ADMIN_FL_ERR 0x0004 |
| Admin descriptor completed in error. | |
| #define | INTELXL_ADMIN_FL_RD 0x0400 |
| Admin descriptor uses data buffer for command parameters. | |
| #define | INTELXL_ADMIN_FL_BUF 0x1000 |
| Admin descriptor uses data buffer. | |
| #define | INTELXL_ADMIN_NUM_DESC 4 |
| #define | INTELXL_ADMIN_MAX_WAIT_MS 100 |
| #define | INTELXL_ADMIN_API_MAJOR 1 |
| #define | INTELXL_PFCM_LANCTXDATA(x) ( 0x10c100 + ( 0x80 * (x) ) ) |
| #define | INTELXL_PFCM_LANCTXCTL 0x10c300 |
| #define | INTELXL_PFCM_LANCTXCTL_QUEUE_NUM(x) ( (x) << 0 ) |
| #define | INTELXL_PFCM_LANCTXCTL_SUB_LINE(x) ( (x) << 12 ) |
| #define | INTELXL_PFCM_LANCTXCTL_TYPE(x) ( (x) << 15 ) |
| #define | INTELXL_PFCM_LANCTXCTL_TYPE_RX INTELXL_PFCM_LANCTXCTL_TYPE ( 0x0 ) |
| #define | INTELXL_PFCM_LANCTXCTL_TYPE_TX INTELXL_PFCM_LANCTXCTL_TYPE ( 0x1 ) |
| #define | INTELXL_PFCM_LANCTXCTL_OP_CODE(x) ( (x) << 17 ) |
| #define | INTELXL_PFCM_LANCTXCTL_OP_CODE_READ INTELXL_PFCM_LANCTXCTL_OP_CODE ( 0x0 ) |
| #define | INTELXL_PFCM_LANCTXCTL_OP_CODE_WRITE INTELXL_PFCM_LANCTXCTL_OP_CODE ( 0x1 ) |
| #define | INTELXL_PFCM_LANCTXSTAT 0x10c380 |
| #define | INTELXL_PFCM_LANCTXSTAT_DONE 0x00000001UL |
| #define | INTELXL_CTX_TX_FL_NEW 0x4000 |
| New transmit queue context. | |
| #define | INTELXL_CTX_TX_BASE(base) ( (base) >> 7 ) |
| Transmit queue base address. | |
| #define | INTELXL_CTX_TX_COUNT(count) ( (count) << 1 ) |
| Transmit queue count. | |
| #define | INTELXL_CTX_TX_QSET(qset) ( (qset) << 4 ) |
| Transmit queue set. | |
| #define | INTELXL_CTX_RX_BASE_COUNT(base, count) ( ( (base) >> 7 ) | ( ( ( uint64_t ) (count) ) << 57 ) ) |
| Receive queue base address and queue count. | |
| #define | INTELXL_CTX_RX_LEN(len) ( (len) >> 1 ) |
| Receive queue data buffer length. | |
| #define | INTELXL_CTX_RX_FL_CRCSTRIP 0x20 |
| Strip CRC from received packets. | |
| #define | INTELXL_CTX_RX_MFS(mfs) ( (mfs) >> 2 ) |
| Receive queue maximum frame size. | |
| #define | INTELXL_CTX_MAX_WAIT_MS 100 |
| Maximum time to wait for a context operation to complete. | |
| #define | INTELXL_QUEUE_ENABLE_DELAY_US 20 |
| Time to wait for a queue to become enabled. | |
| #define | INTELXL_QUEUE_PRE_DISABLE_DELAY_US 400 |
| Time to wait for a transmit queue to become pre-disabled. | |
| #define | INTELXL_QUEUE_DISABLE_MAX_WAIT_MS 1000 |
| Maximum time to wait for a queue to become disabled. | |
| #define | INTELXL_QTX_HEAD(x) ( 0x0e4000 + ( 0x4 * (x) ) ) |
| Global Transmit Queue Head register. | |
| #define | INTELXL_GLLAN_TXPRE_QDIS(x) ( 0x0e6500 + ( 0x4 * ( (x) / 0x80 ) ) ) |
| Global Transmit Pre Queue Disable register. | |
| #define | INTELXL_GLLAN_TXPRE_QDIS_QINDX(x) ( (x) << 0 ) |
| Queue index. | |
| #define | INTELXL_GLLAN_TXPRE_QDIS_SET_QDIS 0x40000000UL |
| Set disable. | |
| #define | INTELXL_GLLAN_TXPRE_QDIS_CLEAR_QDIS 0x80000000UL |
| Clear disable. | |
| #define | INTELXL_QTX(x) ( 0x100000 + ( 0x4 * (x) ) ) |
| Global Transmit Queue register block. | |
| #define | INTELXL_QRX(x) ( 0x120000 + ( 0x4 * (x) ) ) |
| Global Receive Queue register block. | |
| #define | INTELXL_QXX_ENA 0x0000 |
| Queue Enable Register (offset) | |
| #define | INTELXL_QXX_ENA_REQ 0x00000001UL |
| Enable request. | |
| #define | INTELXL_QXX_ENA_STAT 0x00000004UL |
| Enabled status. | |
| #define | INTELXL_QXX_CTL 0x4000 |
| Queue Control Register (offset) | |
| #define | INTELXL_QXX_CTL_PFVF_Q(x) ( (x) << 0 ) |
| PF/VF queue. | |
| #define | INTELXL_QXX_CTL_PFVF_Q_PF INTELXL_QXX_CTL_PFVF_Q ( 0x2 ) |
| PF queue. | |
| #define | INTELXL_QXX_CTL_PFVF_PF_INDX(x) ( (x) << 2 ) |
| PF index. | |
| #define | INTELXL_QXX_TAIL 0x8000 |
| Queue Tail Pointer Register (offset) | |
| #define | INTELXL_TX_DATA_DTYP 0x0 |
| Transmit data descriptor type. | |
| #define | INTELXL_TX_DATA_EOP 0x10 |
| Transmit data descriptor end of packet. | |
| #define | INTELXL_TX_DATA_RS 0x20 |
| Transmit data descriptor report status. | |
| #define | INTELXL_TX_DATA_JFDI 0x40 |
| Transmit data descriptor pretty please. | |
| #define | INTELXL_TX_DATA_LEN(len) ( (len) << 2 ) |
| Transmit data descriptor length. | |
| #define | INTELXL_TX_WB_FL_DD 0x01 |
| Transmit writeback descriptor complete. | |
| #define | INTELXL_RX_WB_FL_DD 0x00000001UL |
| Receive writeback descriptor complete. | |
| #define | INTELXL_RX_WB_FL_RXE 0x00080000UL |
| Receive writeback descriptor error. | |
| #define | INTELXL_RX_WB_LEN(len) ( ( (len) >> 6 ) & 0x3fff ) |
| Receive writeback descriptor length. | |
| #define | INTELXL_TX_NUM_DESC 16 |
| Number of transmit descriptors. | |
| #define | INTELXL_TX_FILL ( INTELXL_TX_NUM_DESC - 1 ) |
| Transmit descriptor ring maximum fill level. | |
| #define | INTELXL_RX_NUM_DESC 8 |
| Number of receive descriptors. | |
| #define | INTELXL_RX_FILL ( INTELXL_RX_NUM_DESC - 1 ) |
| Receive descriptor ring fill level. | |
| #define | INTELXL_PFINT_DYN_CTL0 0x038480 |
| PF Interrupt Zero Dynamic Control Register. | |
| #define | INTELXL_PFINT_DYN_CTL0_INTENA 0x00000001UL |
| Enable. | |
| #define | INTELXL_PFINT_DYN_CTL0_CLEARPBA 0x00000002UL |
| Acknowledge. | |
| #define | INTELXL_PFINT_DYN_CTL0_INTENA_MASK 0x80000000UL |
| Ignore enable. | |
| #define | INTELXL_PFINT_LNKLST0 0x038500 |
| PF Interrupt Zero Linked List Register. | |
| #define | INTELXL_PFINT_LNKLST0_FIRSTQ_INDX(x) ( (x) << 0 ) |
| Queue index. | |
| #define | INTELXL_PFINT_LNKLST0_FIRSTQ_INDX_NONE INTELXL_PFINT_LNKLST0_FIRSTQ_INDX ( 0x7ff ) |
| End of list. | |
| #define | INTELXL_PFINT_LNKLST0_FIRSTQ_TYPE(x) ( (x) << 11 ) |
| Queue type. | |
| #define | INTELXL_PFINT_LNKLST0_FIRSTQ_TYPE_RX INTELXL_PFINT_LNKLST0_FIRSTQ_TYPE ( 0x0 ) |
| Receive queue. | |
| #define | INTELXL_PFINT_LNKLST0_FIRSTQ_TYPE_TX INTELXL_PFINT_LNKLST0_FIRSTQ_TYPE ( 0x1 ) |
| Transmit queue. | |
| #define | INTELXL_PFINT_ICR0_ENA 0x038800 |
| PF Interrupt Zero Cause Enablement Register. | |
| #define | INTELXL_PFINT_ICR0_ENA_ADMINQ 0x40000000UL |
| Admin event. | |
| #define | INTELXL_QINT_RQCTL(x) ( 0x03a000 + ( 0x4 * (x) ) ) |
| Receive Queue Interrupt Cause Control Register. | |
| #define | INTELXL_QINT_RQCTL_NEXTQ_INDX(x) ( (x) << 16 ) |
| Queue index. | |
| #define | INTELXL_QINT_RQCTL_NEXTQ_INDX_NONE INTELXL_QINT_RQCTL_NEXTQ_INDX ( 0x7ff ) |
| End of list. | |
| #define | INTELXL_QINT_RQCTL_NEXTQ_TYPE(x) ( (x) << 27 ) |
| Queue type. | |
| #define | INTELXL_QINT_RQCTL_NEXTQ_TYPE_RX INTELXL_QINT_RQCTL_NEXTQ_TYPE ( 0x0 ) |
| Receive queue. | |
| #define | INTELXL_QINT_RQCTL_NEXTQ_TYPE_TX INTELXL_QINT_RQCTL_NEXTQ_TYPE ( 0x1 ) |
| Transmit queue. | |
| #define | INTELXL_QINT_RQCTL_CAUSE_ENA 0x40000000UL |
| Enable. | |
| #define | INTELXL_QINT_TQCTL(x) ( 0x03c000 + ( 0x4 * (x) ) ) |
| Transmit Queue Interrupt Cause Control Register. | |
| #define | INTELXL_QINT_TQCTL_NEXTQ_INDX(x) ( (x) << 16 ) |
| Queue index. | |
| #define | INTELXL_QINT_TQCTL_NEXTQ_INDX_NONE INTELXL_QINT_TQCTL_NEXTQ_INDX ( 0x7ff ) |
| End of list. | |
| #define | INTELXL_QINT_TQCTL_NEXTQ_TYPE(x) ( (x) << 27 ) |
| Queue type. | |
| #define | INTELXL_QINT_TQCTL_NEXTQ_TYPE_RX INTELXL_QINT_TQCTL_NEXTQ_TYPE ( 0x0 ) |
| Receive queue. | |
| #define | INTELXL_QINT_TQCTL_NEXTQ_TYPE_TX INTELXL_QINT_TQCTL_NEXTQ_TYPE ( 0x1 ) |
| Transmit queue. | |
| #define | INTELXL_QINT_TQCTL_CAUSE_ENA 0x40000000UL |
| Enable. | |
| #define | INTELXL_PFGEN_CTRL 0x092400 |
| PF Control Register. | |
| #define | INTELXL_PFGEN_CTRL_PFSWR 0x00000001UL |
| Software Reset. | |
| #define | INTELXL_RESET_DELAY_MS 100 |
| Time to delay for device reset, in milliseconds. | |
| #define | INTELXL_PFLAN_QALLOC 0x1c0400 |
| PF Queue Allocation Register. | |
| #define | INTELXL_PFLAN_QALLOC_FIRSTQ(x) ( ( (x) >> 0 ) & 0x7ff ) |
| First queue. | |
| #define | INTELXL_PFLAN_QALLOC_LASTQ(x) ( ( (x) >> 16 ) & 0x7ff ) |
| Last queue. | |
| #define | INTELXL_PFGEN_PORTNUM 0x1c0480 |
| PF LAN Port Number Register. | |
| #define | INTELXL_PFGEN_PORTNUM_PORT_NUM(x) ( ( (x) >> 0 ) & 0x3 ) |
| Port number. | |
| #define | INTELXL_PRTGL_SAL 0x1e2120 |
| Port MAC Address Low Register. | |
| #define | INTELXL_PRTGL_SAH 0x1e2140 |
| Port MAC Address High Register. | |
| #define | INTELXL_PRTGL_SAH_MFS_GET(x) ( (x) >> 16 ) |
| Max frame size. | |
| #define | INTELXL_PRTGL_SAH_MFS_SET(x) ( (x) << 16 ) |
| Max frame size. | |
Functions | |
| FILE_LICENCE (GPL2_OR_LATER_OR_UBDL) | |
| struct intelxl_admin_buffer_params | __attribute__ ((packed)) |
| static | __attribute__ ((always_inline)) void intelxl_init_admin(struct intelxl_admin *admin |
| Initialise admin queue. | |
Variables | |
| uint8_t | reserved [8] |
| Reserved. | |
| uint32_t | high |
| Buffer address high. | |
| uint32_t | low |
| Buffer address low. | |
| uint16_t | major |
| Major version number. | |
| uint16_t | minor |
| Minor version number. | |
| uint32_t | rom |
| ROM version. | |
| uint32_t | build |
| Firmware build ID. | |
| struct intelxl_admin_version | firmware |
| Firmware version. | |
| struct intelxl_admin_version | api |
| API version. | |
| uint8_t | sub |
| Sub-build version. | |
| uint64_t | address |
| Data buffer address. | |
| char | name [32] |
| Driver name. | |
| uint8_t | unloading |
| Driver unloading. | |
| uint8_t | type |
| Switching element type. | |
| uint8_t | revision |
| Revision. | |
| uint16_t | seid |
| Switching element ID. | |
| uint16_t | uplink |
| Uplink switching element ID. | |
| uint16_t | downlink |
| Downlink switching element ID. | |
| uint8_t | reserved_b [3] |
| Reserved. | |
| uint8_t | connection |
| Connection type. | |
| uint8_t | reserved_c [2] |
| Reserved. | |
| uint16_t | info |
| Element specific information. | |
| uint16_t | next |
| Starting switching element identifier. | |
| uint16_t | count |
| Number of switching elements reported. | |
| uint16_t | total |
| Total number of switching elements. | |
| uint8_t | reserved_a [12] |
| Reserved. | |
| struct intelxl_admin_switch_config | cfg |
| Switch configuration. | |
| uint16_t | vsi |
| VSI switching element ID. | |
| uint16_t | queue [16] |
| Queue numbers. | |
| uint16_t | qset [8] |
| Queue set handles for each traffic class. | |
| uint16_t | flags |
| Flags. | |
| uint16_t | valid |
| Valid flags. | |
| uint8_t | notify |
| Link status notification. | |
| uint8_t | phy |
| PHY type. | |
| uint8_t | speed |
| Link speed. | |
| uint8_t | status |
| Link status. | |
| struct intelxl_admin_buffer_params | buffer |
| Additional data buffer command parameters. | |
| struct intelxl_admin_version_params | version |
| Get Version command parameters. | |
| struct intelxl_admin_driver_params | driver |
| Driver Version command parameters. | |
| struct intelxl_admin_shutdown_params | shutdown |
| Shutdown command parameters. | |
| struct intelxl_admin_switch_params | sw |
| Get Switch Configuration command parameters. | |
| struct intelxl_admin_promisc_params | promisc |
| Set VSI Promiscuous Modes command parameters. | |
| struct intelxl_admin_autoneg_params | autoneg |
| Restart Autonegotiation command parameters. | |
| struct intelxl_admin_link_params | link |
| Get Link Status command parameters. | |
| uint16_t | opcode |
| Opcode. | |
| uint16_t | len |
| Data length. | |
| uint16_t | ret |
| Return value. | |
| uint32_t | cookie |
| Cookie. | |
| union intelxl_admin_params | params |
| Parameters. | |
| struct intelxl_admin | __attribute__ |
| uint16_t | head |
| Head pointer. | |
| uint64_t | base |
| Base address. | |
| uint64_t | base_count |
| Base address and queue count. | |
| uint16_t | mfs |
| Maximum frame size. | |
| static unsigned int int(* | context )(struct intelxl_nic *intelxl, physaddr_t address)) |
Intel 40 Gigabit Ethernet network card driver.
Definition in file intelxl.h.
| #define INTELXL_BAR_SIZE 0x200000 |
| #define INTELXL_ALIGN 128 |
Alignment.
No data structure requires greater than 128 byte alignment.
Definition at line 24 of file intelxl.h.
Referenced by intelxl_create_admin(), intelxl_create_ring(), and intelxl_open().
| #define INTELXL_ADMIN_CMD 0x080000 |
PF Admin Command Queue register block.
Definition at line 34 of file intelxl.h.
Referenced by intelxl_create_admin(), and intelxl_probe().
| #define INTELXL_ADMIN_EVT 0x080080 |
PF Admin Event Queue register block.
Definition at line 37 of file intelxl.h.
Referenced by intelxl_probe().
| #define INTELXL_ADMIN_BAL 0x000 |
Admin Queue Base Address Low Register (offset)
Definition at line 40 of file intelxl.h.
Referenced by intelxl_create_admin().
| #define INTELXL_ADMIN_BAH 0x100 |
Admin Queue Base Address High Register (offset)
Definition at line 43 of file intelxl.h.
Referenced by intelxl_create_admin().
| #define INTELXL_ADMIN_LEN 0x200 |
Admin Queue Length Register (offset)
Definition at line 46 of file intelxl.h.
Referenced by intelxl_create_admin(), and intelxl_destroy_admin().
| #define INTELXL_ADMIN_LEN_LEN | ( | x | ) | ( (x) << 0 ) |
| #define INTELXL_ADMIN_LEN_ENABLE 0x80000000UL |
| #define INTELXL_ADMIN_HEAD 0x300 |
Admin Queue Head Register (offset)
Definition at line 51 of file intelxl.h.
Referenced by intelxl_create_admin().
| #define INTELXL_ADMIN_TAIL 0x400 |
Admin Queue Tail Register (offset)
Definition at line 54 of file intelxl.h.
Referenced by intelxl_admin_command(), intelxl_create_admin(), and intelxl_refill_admin().
| #define INTELXL_ADMIN_VERSION 0x0001 |
Admin queue Get Version command.
Definition at line 67 of file intelxl.h.
Referenced by intelxl_admin_version().
| #define INTELXL_ADMIN_DRIVER 0x0002 |
Admin queue Driver Version command.
Definition at line 90 of file intelxl.h.
Referenced by intelxl_admin_driver().
| #define INTELXL_ADMIN_SHUTDOWN 0x0003 |
Admin queue Shutdown command.
Definition at line 115 of file intelxl.h.
Referenced by intelxl_admin_shutdown().
| #define INTELXL_ADMIN_SHUTDOWN_UNLOADING 0x01 |
Driver is unloading.
Definition at line 126 of file intelxl.h.
Referenced by intelxl_admin_shutdown().
| #define INTELXL_ADMIN_SWITCH 0x0200 |
Admin queue Get Switch Configuration command.
Definition at line 129 of file intelxl.h.
Referenced by intelxl_admin_switch().
| #define INTELXL_ADMIN_SWITCH_TYPE_VSI 19 |
Virtual Station Inferface element type.
Definition at line 154 of file intelxl.h.
Referenced by intelxl_admin_switch().
| #define INTELXL_ADMIN_VSI 0x0212 |
Admin queue Get VSI Parameters command.
Definition at line 179 of file intelxl.h.
Referenced by intelxl_admin_vsi().
| #define INTELXL_ADMIN_PROMISC 0x0254 |
Admin queue Set VSI Promiscuous Modes command.
Definition at line 206 of file intelxl.h.
Referenced by intelxl_admin_promisc().
| #define INTELXL_ADMIN_PROMISC_FL_UNICAST 0x0001 |
Promiscuous unicast mode.
Definition at line 221 of file intelxl.h.
Referenced by intelxl_admin_promisc().
| #define INTELXL_ADMIN_PROMISC_FL_MULTICAST 0x0002 |
Promiscuous multicast mode.
Definition at line 224 of file intelxl.h.
Referenced by intelxl_admin_promisc().
| #define INTELXL_ADMIN_PROMISC_FL_BROADCAST 0x0004 |
Promiscuous broadcast mode.
Definition at line 227 of file intelxl.h.
Referenced by intelxl_admin_promisc().
| #define INTELXL_ADMIN_PROMISC_FL_VLAN 0x0010 |
Promiscuous VLAN mode.
Definition at line 230 of file intelxl.h.
Referenced by intelxl_admin_promisc().
| #define INTELXL_ADMIN_AUTONEG 0x0605 |
Admin queue Restart Autonegotiation command.
Definition at line 233 of file intelxl.h.
Referenced by intelxl_admin_autoneg().
| #define INTELXL_ADMIN_AUTONEG_FL_RESTART 0x02 |
Restart autonegotiation.
Definition at line 244 of file intelxl.h.
Referenced by intelxl_admin_autoneg().
| #define INTELXL_ADMIN_AUTONEG_FL_ENABLE 0x04 |
| #define INTELXL_ADMIN_LINK 0x0607 |
Admin queue Get Link Status command.
Definition at line 250 of file intelxl.h.
Referenced by intelxl_admin_link(), and intelxl_poll_admin().
| #define INTELXL_ADMIN_LINK_NOTIFY 0x03 |
Notify driver of link status changes.
Definition at line 269 of file intelxl.h.
Referenced by intelxl_admin_link().
| #define INTELXL_ADMIN_LINK_UP 0x01 |
| #define INTELXL_ADMIN_FL_DD 0x0001 |
Admin descriptor done.
Definition at line 325 of file intelxl.h.
Referenced by intelxl_admin_command(), and intelxl_poll_admin().
| #define INTELXL_ADMIN_FL_CMP 0x0002 |
Admin descriptor contains a completion.
Definition at line 328 of file intelxl.h.
Referenced by intelxl_admin_command().
| #define INTELXL_ADMIN_FL_ERR 0x0004 |
Admin descriptor completed in error.
Definition at line 331 of file intelxl.h.
Referenced by intelxl_admin_command().
| #define INTELXL_ADMIN_FL_RD 0x0400 |
Admin descriptor uses data buffer for command parameters.
Definition at line 334 of file intelxl.h.
Referenced by intelxl_admin_driver().
| #define INTELXL_ADMIN_FL_BUF 0x1000 |
Admin descriptor uses data buffer.
Definition at line 337 of file intelxl.h.
Referenced by intelxl_admin_command(), intelxl_admin_driver(), intelxl_admin_switch(), and intelxl_admin_vsi().
| #define INTELXL_ADMIN_NUM_DESC 4 |
| #define INTELXL_ADMIN_MAX_WAIT_MS 100 |
Referenced by intelxl_admin_command().
| #define INTELXL_ADMIN_API_MAJOR 1 |
Referenced by intelxl_admin_version().
| #define INTELXL_PFCM_LANCTXDATA | ( | x | ) | ( 0x10c100 + ( 0x80 * (x) ) ) |
Referenced by intelxl_context_dump(), and intelxl_context_line().
| #define INTELXL_PFCM_LANCTXCTL 0x10c300 |
Referenced by intelxl_context_dump(), and intelxl_context_line().
| #define INTELXL_PFCM_LANCTXCTL_QUEUE_NUM | ( | x | ) | ( (x) << 0 ) |
Referenced by intelxl_context_dump(), and intelxl_context_line().
| #define INTELXL_PFCM_LANCTXCTL_SUB_LINE | ( | x | ) | ( (x) << 12 ) |
Referenced by intelxl_context_dump(), and intelxl_context_line().
| #define INTELXL_PFCM_LANCTXCTL_TYPE | ( | x | ) | ( (x) << 15 ) |
| #define INTELXL_PFCM_LANCTXCTL_TYPE_RX INTELXL_PFCM_LANCTXCTL_TYPE ( 0x0 ) |
Referenced by intelxl_close(), and intelxl_context_rx().
| #define INTELXL_PFCM_LANCTXCTL_TYPE_TX INTELXL_PFCM_LANCTXCTL_TYPE ( 0x1 ) |
Referenced by intelxl_close(), and intelxl_context_tx().
| #define INTELXL_PFCM_LANCTXCTL_OP_CODE | ( | x | ) | ( (x) << 17 ) |
| #define INTELXL_PFCM_LANCTXCTL_OP_CODE_READ INTELXL_PFCM_LANCTXCTL_OP_CODE ( 0x0 ) |
Referenced by intelxl_context_dump().
| #define INTELXL_PFCM_LANCTXCTL_OP_CODE_WRITE INTELXL_PFCM_LANCTXCTL_OP_CODE ( 0x1 ) |
Referenced by intelxl_context_line().
| #define INTELXL_PFCM_LANCTXSTAT 0x10c380 |
Referenced by intelxl_context_dump(), and intelxl_context_line().
| #define INTELXL_PFCM_LANCTXSTAT_DONE 0x00000001UL |
Referenced by intelxl_context_dump(), and intelxl_context_line().
| #define INTELXL_CTX_TX_FL_NEW 0x4000 |
New transmit queue context.
Definition at line 433 of file intelxl.h.
Referenced by intelxl_context_tx().
| #define INTELXL_CTX_TX_BASE | ( | base | ) | ( (base) >> 7 ) |
Transmit queue base address.
Definition at line 436 of file intelxl.h.
Referenced by intelxl_context_tx().
| #define INTELXL_CTX_TX_COUNT | ( | count | ) | ( (count) << 1 ) |
| #define INTELXL_CTX_TX_QSET | ( | qset | ) | ( (qset) << 4 ) |
| #define INTELXL_CTX_RX_BASE_COUNT | ( | base, | |
| count | |||
| ) | ( ( (base) >> 7 ) | ( ( ( uint64_t ) (count) ) << 57 ) ) |
Receive queue base address and queue count.
Definition at line 463 of file intelxl.h.
Referenced by intelxl_context_rx().
| #define INTELXL_CTX_RX_LEN | ( | len | ) | ( (len) >> 1 ) |
Receive queue data buffer length.
Definition at line 467 of file intelxl.h.
Referenced by intelxl_context_rx().
| #define INTELXL_CTX_RX_FL_CRCSTRIP 0x20 |
Strip CRC from received packets.
Definition at line 470 of file intelxl.h.
Referenced by intelxl_context_rx().
| #define INTELXL_CTX_RX_MFS | ( | mfs | ) | ( (mfs) >> 2 ) |
Receive queue maximum frame size.
Definition at line 473 of file intelxl.h.
Referenced by intelxl_context_rx().
| #define INTELXL_CTX_MAX_WAIT_MS 100 |
Maximum time to wait for a context operation to complete.
Definition at line 476 of file intelxl.h.
Referenced by intelxl_context_dump(), and intelxl_context_line().
| #define INTELXL_QUEUE_ENABLE_DELAY_US 20 |
Time to wait for a queue to become enabled.
Definition at line 479 of file intelxl.h.
Referenced by intelxl_enable_ring().
| #define INTELXL_QUEUE_PRE_DISABLE_DELAY_US 400 |
Time to wait for a transmit queue to become pre-disabled.
Definition at line 482 of file intelxl.h.
Referenced by intelxl_close(), and intelxl_open().
| #define INTELXL_QUEUE_DISABLE_MAX_WAIT_MS 1000 |
Maximum time to wait for a queue to become disabled.
Definition at line 485 of file intelxl.h.
Referenced by intelxl_disable_ring().
| #define INTELXL_QTX_HEAD | ( | x | ) | ( 0x0e4000 + ( 0x4 * (x) ) ) |
Global Transmit Queue Head register.
Definition at line 495 of file intelxl.h.
Referenced by intelxl_open().
| #define INTELXL_GLLAN_TXPRE_QDIS | ( | x | ) | ( 0x0e6500 + ( 0x4 * ( (x) / 0x80 ) ) ) |
Global Transmit Pre Queue Disable register.
Definition at line 498 of file intelxl.h.
Referenced by intelxl_close(), and intelxl_open().
| #define INTELXL_GLLAN_TXPRE_QDIS_QINDX | ( | x | ) | ( (x) << 0 ) |
Queue index.
Definition at line 499 of file intelxl.h.
Referenced by intelxl_close(), and intelxl_open().
| #define INTELXL_GLLAN_TXPRE_QDIS_SET_QDIS 0x40000000UL |
Set disable.
Definition at line 502 of file intelxl.h.
Referenced by intelxl_close(), and intelxl_open().
| #define INTELXL_GLLAN_TXPRE_QDIS_CLEAR_QDIS 0x80000000UL |
| #define INTELXL_QTX | ( | x | ) | ( 0x100000 + ( 0x4 * (x) ) ) |
Global Transmit Queue register block.
Definition at line 508 of file intelxl.h.
Referenced by intelxl_probe().
| #define INTELXL_QRX | ( | x | ) | ( 0x120000 + ( 0x4 * (x) ) ) |
Global Receive Queue register block.
Definition at line 511 of file intelxl.h.
Referenced by intelxl_probe().
| #define INTELXL_QXX_ENA 0x0000 |
Queue Enable Register (offset)
Definition at line 514 of file intelxl.h.
Referenced by intelxl_disable_ring(), and intelxl_enable_ring().
| #define INTELXL_QXX_ENA_REQ 0x00000001UL |
| #define INTELXL_QXX_ENA_STAT 0x00000004UL |
Enabled status.
Definition at line 516 of file intelxl.h.
Referenced by intelxl_disable_ring(), and intelxl_enable_ring().
| #define INTELXL_QXX_CTL 0x4000 |
Queue Control Register (offset)
Definition at line 519 of file intelxl.h.
Referenced by intelxl_open().
| #define INTELXL_QXX_CTL_PFVF_Q | ( | x | ) | ( (x) << 0 ) |
| #define INTELXL_QXX_CTL_PFVF_Q_PF INTELXL_QXX_CTL_PFVF_Q ( 0x2 ) |
| #define INTELXL_QXX_CTL_PFVF_PF_INDX | ( | x | ) | ( (x) << 2 ) |
| #define INTELXL_QXX_TAIL 0x8000 |
Queue Tail Pointer Register (offset)
Definition at line 526 of file intelxl.h.
Referenced by intelxl_create_ring(), intelxl_refill_rx(), and intelxl_transmit().
| #define INTELXL_TX_DATA_DTYP 0x0 |
Transmit data descriptor type.
Definition at line 539 of file intelxl.h.
Referenced by intelxl_transmit().
| #define INTELXL_TX_DATA_EOP 0x10 |
Transmit data descriptor end of packet.
Definition at line 542 of file intelxl.h.
Referenced by intelxl_transmit().
| #define INTELXL_TX_DATA_RS 0x20 |
Transmit data descriptor report status.
Definition at line 545 of file intelxl.h.
Referenced by intelxl_transmit().
| #define INTELXL_TX_DATA_JFDI 0x40 |
Transmit data descriptor pretty please.
This bit is completely missing from older versions of the XL710 datasheet. Later versions describe it innocuously as "reserved, must be 1". Without this bit, everything will appear to work (up to and including the port "transmit good octets" counter), but no packet will actually be sent.
Definition at line 555 of file intelxl.h.
Referenced by intelxl_transmit().
| #define INTELXL_TX_DATA_LEN | ( | len | ) | ( (len) << 2 ) |
Transmit data descriptor length.
Definition at line 558 of file intelxl.h.
Referenced by intelxl_transmit().
| #define INTELXL_TX_WB_FL_DD 0x01 |
Transmit writeback descriptor complete.
Definition at line 571 of file intelxl.h.
Referenced by intelxl_poll_tx().
| #define INTELXL_RX_WB_FL_DD 0x00000001UL |
Receive writeback descriptor complete.
Definition at line 594 of file intelxl.h.
Referenced by intelxl_poll_rx().
| #define INTELXL_RX_WB_FL_RXE 0x00080000UL |
Receive writeback descriptor error.
Definition at line 597 of file intelxl.h.
Referenced by intelxl_poll_rx().
| #define INTELXL_RX_WB_LEN | ( | len | ) | ( ( (len) >> 6 ) & 0x3fff ) |
Receive writeback descriptor length.
Definition at line 600 of file intelxl.h.
Referenced by intelxl_poll_rx().
| #define INTELXL_TX_NUM_DESC 16 |
Number of transmit descriptors.
Definition at line 652 of file intelxl.h.
Referenced by intelxl_context_tx(), intelxl_poll_tx(), intelxl_probe(), and intelxl_transmit().
| #define INTELXL_TX_FILL ( INTELXL_TX_NUM_DESC - 1 ) |
Transmit descriptor ring maximum fill level.
Definition at line 655 of file intelxl.h.
Referenced by intelxl_transmit().
| #define INTELXL_RX_NUM_DESC 8 |
Number of receive descriptors.
In PXE mode (i.e. able to post single receive descriptors), 8 descriptors is the only permitted value covering all possible numbers of PFs.
Definition at line 663 of file intelxl.h.
Referenced by intelxl_close(), intelxl_context_rx(), intelxl_poll_rx(), intelxl_probe(), and intelxl_refill_rx().
| #define INTELXL_RX_FILL ( INTELXL_RX_NUM_DESC - 1 ) |
Receive descriptor ring fill level.
Definition at line 666 of file intelxl.h.
Referenced by intelxl_refill_rx().
| #define INTELXL_PFINT_DYN_CTL0 0x038480 |
PF Interrupt Zero Dynamic Control Register.
Definition at line 676 of file intelxl.h.
Referenced by intelxl_irq(), and intelxl_poll().
| #define INTELXL_PFINT_DYN_CTL0_INTENA 0x00000001UL |
| #define INTELXL_PFINT_DYN_CTL0_CLEARPBA 0x00000002UL |
| #define INTELXL_PFINT_DYN_CTL0_INTENA_MASK 0x80000000UL |
| #define INTELXL_PFINT_LNKLST0 0x038500 |
PF Interrupt Zero Linked List Register.
Definition at line 682 of file intelxl.h.
Referenced by intelxl_probe().
| #define INTELXL_PFINT_LNKLST0_FIRSTQ_INDX | ( | x | ) | ( (x) << 0 ) |
| #define INTELXL_PFINT_LNKLST0_FIRSTQ_INDX_NONE INTELXL_PFINT_LNKLST0_FIRSTQ_INDX ( 0x7ff ) |
| #define INTELXL_PFINT_LNKLST0_FIRSTQ_TYPE | ( | x | ) | ( (x) << 11 ) |
| #define INTELXL_PFINT_ICR0_ENA 0x038800 |
PF Interrupt Zero Cause Enablement Register.
Definition at line 697 of file intelxl.h.
Referenced by intelxl_probe().
| #define INTELXL_PFINT_ICR0_ENA_ADMINQ 0x40000000UL |
| #define INTELXL_QINT_RQCTL | ( | x | ) | ( 0x03a000 + ( 0x4 * (x) ) ) |
Receive Queue Interrupt Cause Control Register.
Definition at line 701 of file intelxl.h.
Referenced by intelxl_probe().
| #define INTELXL_QINT_RQCTL_NEXTQ_INDX | ( | x | ) | ( (x) << 16 ) |
| #define INTELXL_QINT_RQCTL_NEXTQ_INDX_NONE INTELXL_QINT_RQCTL_NEXTQ_INDX ( 0x7ff ) |
| #define INTELXL_QINT_RQCTL_NEXTQ_TYPE | ( | x | ) | ( (x) << 27 ) |
| #define INTELXL_QINT_RQCTL_NEXTQ_TYPE_RX INTELXL_QINT_RQCTL_NEXTQ_TYPE ( 0x0 ) |
| #define INTELXL_QINT_RQCTL_NEXTQ_TYPE_TX INTELXL_QINT_RQCTL_NEXTQ_TYPE ( 0x1 ) |
| #define INTELXL_QINT_RQCTL_CAUSE_ENA 0x40000000UL |
| #define INTELXL_QINT_TQCTL | ( | x | ) | ( 0x03c000 + ( 0x4 * (x) ) ) |
Transmit Queue Interrupt Cause Control Register.
Definition at line 713 of file intelxl.h.
Referenced by intelxl_probe().
| #define INTELXL_QINT_TQCTL_NEXTQ_INDX | ( | x | ) | ( (x) << 16 ) |
| #define INTELXL_QINT_TQCTL_NEXTQ_INDX_NONE INTELXL_QINT_TQCTL_NEXTQ_INDX ( 0x7ff ) |
| #define INTELXL_QINT_TQCTL_NEXTQ_TYPE | ( | x | ) | ( (x) << 27 ) |
| #define INTELXL_QINT_TQCTL_NEXTQ_TYPE_RX INTELXL_QINT_TQCTL_NEXTQ_TYPE ( 0x0 ) |
| #define INTELXL_QINT_TQCTL_NEXTQ_TYPE_TX INTELXL_QINT_TQCTL_NEXTQ_TYPE ( 0x1 ) |
| #define INTELXL_QINT_TQCTL_CAUSE_ENA 0x40000000UL |
| #define INTELXL_PFGEN_CTRL 0x092400 |
| #define INTELXL_PFGEN_CTRL_PFSWR 0x00000001UL |
| #define INTELXL_RESET_DELAY_MS 100 |
Time to delay for device reset, in milliseconds.
Definition at line 729 of file intelxl.h.
Referenced by intelxl_reset().
| #define INTELXL_PFLAN_QALLOC 0x1c0400 |
PF Queue Allocation Register.
Definition at line 732 of file intelxl.h.
Referenced by intelxl_probe().
| #define INTELXL_PFLAN_QALLOC_FIRSTQ | ( | x | ) | ( ( (x) >> 0 ) & 0x7ff ) |
| #define INTELXL_PFLAN_QALLOC_LASTQ | ( | x | ) | ( ( (x) >> 16 ) & 0x7ff ) |
| #define INTELXL_PFGEN_PORTNUM 0x1c0480 |
PF LAN Port Number Register.
Definition at line 741 of file intelxl.h.
Referenced by intelxl_probe().
| #define INTELXL_PFGEN_PORTNUM_PORT_NUM | ( | x | ) | ( ( (x) >> 0 ) & 0x3 ) |
| #define INTELXL_PRTGL_SAL 0x1e2120 |
Port MAC Address Low Register.
Definition at line 747 of file intelxl.h.
Referenced by intelxl_fetch_mac(), and intelxl_open().
| #define INTELXL_PRTGL_SAH 0x1e2140 |
Port MAC Address High Register.
Definition at line 750 of file intelxl.h.
Referenced by intelxl_fetch_mac(), and intelxl_open().
| #define INTELXL_PRTGL_SAH_MFS_GET | ( | x | ) | ( (x) >> 16 ) |
| #define INTELXL_PRTGL_SAH_MFS_SET | ( | x | ) | ( (x) << 16 ) |
| FILE_LICENCE | ( | GPL2_OR_LATER_OR_UBDL | ) |
| struct intelxl_admin_buffer_params __attribute__ | ( | (packed) | ) |
| static __attribute__ | ( | (always_inline) | ) | [inline, static] |
Initialise admin queue.
Initialise descriptor ring.
| admin | Admin queue |
| reg | Register block |
| ring | Descriptor ring |
| count | Number of descriptors |
| context | Method to program queue context |
Major version number.
Driver version.
Definition at line 77 of file intelxl.h.
Referenced by aoe_open(), aoedev_open(), and ar9300_eeprom_restore_internal().
Minor version number.
Minor version.
Definition at line 79 of file intelxl.h.
Referenced by aoe_open(), aoedev_open(), ar9300_eeprom_restore_internal(), and falcon_probe_nic_variant().
Firmware build ID.
Build version.
Definition at line 91 of file intelxl.h.
Referenced by hv_map_hypercall().
| struct intelxl_admin_version firmware |
| struct intelxl_admin_version api |
Revision.
Definition at line 155 of file intelxl.h.
Referenced by efx_probe(), falcon_probe_nic_variant(), rhine_probe(), sis900_probe(), smc9000_probe(), vxge_probe(), and xhci_port_protocol().
| struct arbelprm_wqe_segment_next next |
Starting switching element identifier.
Definition at line 166 of file intelxl.h.
Referenced by aes_setkey(), asn1_okx(), ath5k_handle_rx(), cert_exec(), ehci_ring_alloc(), http_parse_headers(), icplus_create_ring(), image_asn1(), image_x509(), imgverify(), inline_list_add(), inline_list_add_tail(), inline_list_del(), meme820(), myson_create_ring(), ne_poll(), ns8390_poll(), pciscan_exec(), pem_image_asn1(), rhine_create_ring(), sis190_free_phy(), tftp_rx_oack(), tls_new_alert(), tls_new_finished(), tls_new_server_hello(), tls_new_server_hello_done(), and xhci_extended_capability().
| unsigned int count |
Total number of switching elements.
Definition at line 180 of file intelxl.h.
Referenced by ath5k_eeprom_read_mac(), der_probe(), format_dnssl_setting(), peerblk_parse_block(), run_all_tests(), tls_generate_keys(), and tls_set_cipher().
| struct intelxl_admin_switch_config cfg |
Switch configuration.
Definition at line 184 of file intelxl.h.
Referenced by a3c90x_hw_start(), ifec_net_open(), intelxl_admin_switch(), natsemi_check_link(), natsemi_reset(), sfe4001_fini(), sfe4001_init(), sis900_check_mode(), sis900_reset(), txnic_disable_cq(), and txnic_disable_rq().
| struct intelxl_admin_vsi_buffer vsi |
VSI switching element ID.
Get VSI Parameters data buffer.
Get VSI Parameters command parameters.
Definition at line 191 of file intelxl.h.
Referenced by intelxl_admin_vsi().
Link status notification.
Definition at line 268 of file intelxl.h.
Referenced by netfront_refill_rx(), netfront_transmit(), and virtnet_probe_modern().
PHY type.
Definition at line 272 of file intelxl.h.
Referenced by ath_buf_set_rate(), epic100_probe(), sis190_default_phy(), sis190_mii_probe(), start_link(), sundance_probe(), tg3_phy_apply_otp(), tg3_phy_toggle_automdix(), TLan_FinishReset(), TLan_PhyDetect(), TLan_PhyFinishAutoNeg(), TLan_PhyReset(), TLan_PhyStartLink(), and w89c840_probe().
Link speed.
Definition at line 274 of file intelxl.h.
Referenced by amd8111e_poll_link(), atl1e_check_link(), ehci_root_speed(), exanic_check_link(), hunt_check_link(), sis900_check_mode(), sundance_probe(), uhci_root_speed(), xhci_port_speed(), and xhci_root_speed().
Driver Version command parameters.
Driver Version data buffer.
Definition at line 300 of file intelxl.h.
Referenced by alloc_usb_hub(), bofm_find_driver(), efi_unload_blacklist(), eisa_probe(), ib_notify(), intelxl_admin_driver(), isabus_probe(), isapnp_probe(), mca_probe(), netdev_notify(), parse_net_args(), pci_find_driver(), pci_set_driver(), register_ibdev(), register_netdev(), unregister_ibdev(), unregister_netdev(), usb_endpoint_init(), usb_find_driver(), usb_probe(), usb_score(), usbio_supported(), vmbus_probe_channels(), xenbus_probe_device(), and xenbus_probe_type().
Shutdown command parameters.
Definition at line 302 of file intelxl.h.
Referenced by intelxl_admin_shutdown(), shutdown_boot(), and shutdown_exit().
| struct intelxl_admin_switch_buffer sw |
Get Switch Configuration command parameters.
Get Switch Configuration data buffer.
Definition at line 304 of file intelxl.h.
Referenced by intelxl_admin_switch().
Set VSI Promiscuous Modes command parameters.
Definition at line 308 of file intelxl.h.
Referenced by intelxl_admin_promisc().
Restart Autonegotiation command parameters.
Definition at line 310 of file intelxl.h.
Referenced by intelxl_admin_autoneg().
| struct intelxl_admin_link_params link |
Return value.
Definition at line 330 of file intelxl.h.
Referenced by __vxge_hw_device_register_poll(), ath5k_attach(), ath5k_config(), ath5k_desc_alloc(), ath5k_eeprom_init_11a_pcal_freq(), ath5k_eeprom_init_header(), ath5k_eeprom_init_modes(), ath5k_eeprom_read_ants(), ath5k_eeprom_read_ctl_info(), ath5k_eeprom_read_freq_list(), ath5k_eeprom_read_mac(), ath5k_eeprom_read_modes(), ath5k_eeprom_read_pcal_info_2413(), ath5k_eeprom_read_pcal_info_5111(), ath5k_eeprom_read_pcal_info_5112(), ath5k_eeprom_read_target_rate_pwr_info(), ath5k_eeprom_read_turbo_modes(), ath5k_handle_rx(), ath5k_hw_attach(), ath5k_hw_channel(), ath5k_hw_nic_reset(), ath5k_hw_nic_wakeup(), ath5k_hw_noise_floor_calibration(), ath5k_hw_phy_calibrate(), ath5k_hw_radio_revision(), ath5k_hw_reset(), ath5k_hw_rf5110_calibrate(), ath5k_hw_rf5111_channel(), ath5k_hw_rf_gainf_adjust(), ath5k_hw_setup_tx_queue(), ath5k_hw_txpower(), ath5k_hw_update_tx_triglevel(), ath5k_init(), ath5k_probe(), ath5k_reset(), ath5k_rx_start(), ath5k_start(), ath5k_tx_processq(), ath5k_txbuf_setup(), ath9k_hw_init(), ath9k_init_softc(), ath9k_setpower(), ath9k_tx(), ath_get_next_rx_buf(), ath_pci_probe(), ath_update_survey_stats(), bnx2_read_phy(), bnx2_write_phy(), fetch_setting(), fetchf_setting(), format_int_setting(), format_uint_setting(), guestinfo_fetch(), guestinfo_fetch_type(), ifec_spi_read_bit(), is_yukon_lite_a0(), ne_poll(), ns8390_poll(), pn_to_u64(), pxe_api_call(), pxe_loader_call(), rc80211_init(), rtl818x_start(), sis900_probe(), stack_check(), tg3_do_test_dma(), tg3_fiber_aneg_smachine(), tg3_nvram_read(), tg3_phy_set_wirespeed(), tg3_phy_toggle_automdix(), tg3_readphy(), tg3_test_dma(), tg3_writephy(), TLan_EeReadByte(), vxge_device_register(), vxge_hw_device_begin_irq(), vxge_open(), vxge_probe(), and wpa_alloc_frame().
| union intelxl_admin_params params |
Parameters.
Definition at line 336 of file intelxl.h.
Referenced by __attribute__(), bios_handle_ed(), create_parameters(), efi_handle_ed(), fbcon_handle_ed(), find_parameters(), free_parameters(), http_open_post_uri(), int13_get_extended_parameters(), param_exec(), params_exec(), parse_uri(), and uri_params_okx().
Base address.
Base.
Definition at line 436 of file intelxl.h.
Referenced by bigint_mod_exp_raw(), bigint_mod_exp_sample(), deflate_init(), efi_file_varlen(), efi_local_open_path(), eth_probe(), gma_read32(), hvm_cpuid_base(), init_eheap(), pciea_bar_start(), qib7322_create_send_bufs(), skge_qset(), skge_ring_alloc(), smscusb_mii_read(), smscusb_mii_wait(), smscusb_mii_write(), strtoul(), strtoull(), uri_resolve_okx(), and virtio_pci_map_capability().
Base address and queue count.
Definition at line 466 of file intelxl.h.
Referenced by intelxl_context_rx().
| unsigned int int( * context)(struct intelxl_nic *intelxl, physaddr_t address)) |
Definition at line 644 of file intelxl.h.
Referenced by efi_snp_wait_for_packet(), efi_usb_async_start(), efi_usb_timer(), hash_df(), hmac_drbg_update_key(), hmac_drbg_update_value(), md4_final(), md4_init(), md4_update(), md5_final(), md5_init(), md5_sha1_final(), md5_sha1_init(), md5_sha1_update(), md5_update(), rsa_decrypt(), rsa_encrypt(), rsa_final(), rsa_init(), rsa_max_len(), rsa_sign(), rsa_verify(), sha1_final(), sha1_init(), sha1_update(), sha224_init(), sha256_final(), sha256_init(), sha256_update(), sha384_init(), sha512_224_init(), sha512_256_init(), sha512_final(), sha512_init(), sha512_update(), usbio_interrupt_callback(), and xhci_context().
1.7.6.1