Exablaze ExaNIC driver. More...

#include <stdint.h>
#include <ipxe/pci.h>
#include <ipxe/ethernet.h>
#include <ipxe/uaccess.h>
#include <ipxe/retry.h>
#include <ipxe/i2c.h>
#include <ipxe/bitbash.h>

Data Structures
struct	exanic_tx_descriptor
	An ExaNIC transmit chunk descriptor. More...

struct	exanic_tx_chunk
	An ExaNIC transmit chunk. More...

struct	exanic_rx_descriptor
	An ExaNIC receive chunk descriptor. More...

struct	exanic_rx_chunk
	An ExaNIC receive chunk. More...

struct	exanic_i2c_config
	An ExaNIC I2C bus configuration. More...

struct	exanic_port
	An ExaNIC port. More...

struct	exanic
	An ExaNIC. More...

Macros
#define	EXANIC_MAX_PORTS 8
	Maximum number of ports. More...

#define	EXANIC_REGS_BAR PCI_BASE_ADDRESS_0
	Register BAR. More...

#define	EXANIC_TX_BAR PCI_BASE_ADDRESS_2
	Transmit region BAR. More...

#define	EXANIC_ALIGN 0x1000
	Alignment for DMA regions. More...

#define	EXANIC_DMA_32_BIT 0x00000001UL
	Flag for 32-bit DMA addresses. More...

#define	EXANIC_REGS_LEN 0x2000
	Register set length. More...

#define	EXANIC_TXF_LEN 0x1000
	Transmit feedback region length. More...

#define	EXANIC_TXF_SLOT(index) ( 0x40 * (index) )
	Transmit feedback slot. More...

#define	EXANIC_RX_LEN 0x200000
	Receive region length. More...

#define	EXANIC_TXF_BASE 0x0014
	Transmit feedback base address register. More...

#define	EXANIC_CAPS 0x0038
	Capabilities register. More...

#define	EXANIC_CAPS_100M 0x01000000UL
	100Mbps supported More...

#define	EXANIC_CAPS_1G 0x02000000UL
	1Gbps supported More...

#define	EXANIC_CAPS_10G 0x04000000UL
	10Gbps supported More...

#define	EXANIC_CAPS_40G 0x08000000UL
	40Gbps supported More...

#define	EXANIC_CAPS_100G 0x10000000UL
	100Gbps supported More...

#define	EXANIC_CAPS_SPEED_MASK 0x1f000000UL
	Supported speeds mask. More...

#define	EXANIC_I2C 0x012c
	I2C GPIO register. More...

#define	EXANIC_POWER 0x0138
	Power control register. More...

#define	EXANIC_POWER_ON 0x000000f0UL
	Power on PHYs. More...

#define	EXANIC_PORT_REGS(index) ( 0x0200 + ( 0x40 * (index) ) )
	Port register offset. More...

#define	EXANIC_PORT_ENABLE 0x0000
	Port enable register. More...

#define	EXANIC_PORT_ENABLE_ENABLED 0x00000001UL
	Port is enabled. More...

#define	EXANIC_PORT_SPEED 0x0004
	Port speed register. More...

#define	EXANIC_PORT_STATUS 0x0008
	Port status register. More...

#define	EXANIC_PORT_STATUS_LINK 0x00000008UL
	Link is up. More...

#define	EXANIC_PORT_STATUS_ABSENT 0x80000000UL
	Port is not present. More...

#define	EXANIC_PORT_MAC 0x000c
	Port MAC address (second half) register. More...

#define	EXANIC_PORT_FLAGS 0x0010
	Port flags register. More...

#define	EXANIC_PORT_FLAGS_PROMISC 0x00000001UL
	Promiscuous mode. More...

#define	EXANIC_PORT_RX_BASE 0x0014
	Port receive chunk base address register. More...

#define	EXANIC_PORT_TX_COMMAND 0x0020
	Port transmit command register. More...

#define	EXANIC_PORT_TX_OFFSET 0x0024
	Port transmit region offset register. More...

#define	EXANIC_PORT_TX_LEN 0x0028
	Port transmit region length register. More...

#define	EXANIC_PORT_OUI 0x0030
	Port MAC address (first half) register. More...

#define	EXANIC_PORT_IRQ 0x0034
	Port interrupt configuration register. More...

#define	EXANIC_TYPE_RAW 0x01
	Raw Ethernet frame type. More...

#define	EXANIC_STATUS_ERROR_MASK 0x0f
	Receive status error mask. More...

#define	EXANIC_EEPROM_ADDRESS 0x50
	EEPROM address. More...

#define	EXANIC_MAX_TX_LEN ( 256 * sizeof ( struct exanic_tx_chunk ) )
	Maximum used length of transmit region. More...

#define	EXANIC_MAX_RX_LEN ( ETH_FRAME_LEN + 4 /* VLAN / + 4 / CRC */ )
	Maximum length of received packet. More...

#define	EXANIC_LINK_INTERVAL ( 1 * TICKS_PER_SEC )
	Interval between link state checks. More...

Functions
	FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)

Detailed Description

Exablaze ExaNIC driver.

Definition in file exanic.h.

Macro Definition Documentation

◆ EXANIC_MAX_PORTS

#define EXANIC_MAX_PORTS 8

Maximum number of ports.

Definition at line 21 of file exanic.h.

◆ EXANIC_REGS_BAR

#define EXANIC_REGS_BAR PCI_BASE_ADDRESS_0

Register BAR.

Definition at line 24 of file exanic.h.

◆ EXANIC_TX_BAR

#define EXANIC_TX_BAR PCI_BASE_ADDRESS_2

Transmit region BAR.

Definition at line 27 of file exanic.h.

◆ EXANIC_ALIGN

#define EXANIC_ALIGN 0x1000

Alignment for DMA regions.

Definition at line 30 of file exanic.h.

◆ EXANIC_DMA_32_BIT

#define EXANIC_DMA_32_BIT 0x00000001UL

Flag for 32-bit DMA addresses.

Definition at line 33 of file exanic.h.

◆ EXANIC_REGS_LEN

#define EXANIC_REGS_LEN 0x2000

Register set length.

Definition at line 36 of file exanic.h.

◆ EXANIC_TXF_LEN

#define EXANIC_TXF_LEN 0x1000

Transmit feedback region length.

Definition at line 39 of file exanic.h.

◆ EXANIC_TXF_SLOT

#define EXANIC_TXF_SLOT ( index ) ( 0x40 * (index) )

Transmit feedback slot.

This is a policy decision.

Definition at line 45 of file exanic.h.

◆ EXANIC_RX_LEN

#define EXANIC_RX_LEN 0x200000

Receive region length.

Definition at line 48 of file exanic.h.

◆ EXANIC_TXF_BASE

#define EXANIC_TXF_BASE 0x0014

Transmit feedback base address register.

Definition at line 51 of file exanic.h.

◆ EXANIC_CAPS

#define EXANIC_CAPS 0x0038

Capabilities register.

Definition at line 54 of file exanic.h.

◆ EXANIC_CAPS_100M

#define EXANIC_CAPS_100M 0x01000000UL

100Mbps supported

Definition at line 55 of file exanic.h.

◆ EXANIC_CAPS_1G

#define EXANIC_CAPS_1G 0x02000000UL

1Gbps supported

Definition at line 56 of file exanic.h.

◆ EXANIC_CAPS_10G

#define EXANIC_CAPS_10G 0x04000000UL

10Gbps supported

Definition at line 57 of file exanic.h.

◆ EXANIC_CAPS_40G

#define EXANIC_CAPS_40G 0x08000000UL

40Gbps supported

Definition at line 58 of file exanic.h.

◆ EXANIC_CAPS_100G

#define EXANIC_CAPS_100G 0x10000000UL

100Gbps supported

Definition at line 59 of file exanic.h.

◆ EXANIC_CAPS_SPEED_MASK

#define EXANIC_CAPS_SPEED_MASK 0x1f000000UL

Supported speeds mask.

Definition at line 60 of file exanic.h.

◆ EXANIC_I2C

#define EXANIC_I2C 0x012c

I2C GPIO register.

Definition at line 63 of file exanic.h.

◆ EXANIC_POWER

#define EXANIC_POWER 0x0138

Power control register.

Definition at line 66 of file exanic.h.

◆ EXANIC_POWER_ON

#define EXANIC_POWER_ON 0x000000f0UL

Power on PHYs.

Definition at line 67 of file exanic.h.

◆ EXANIC_PORT_REGS

#define EXANIC_PORT_REGS ( index ) ( 0x0200 + ( 0x40 * (index) ) )

Port register offset.

Definition at line 70 of file exanic.h.

◆ EXANIC_PORT_ENABLE

#define EXANIC_PORT_ENABLE 0x0000

Port enable register.

Definition at line 73 of file exanic.h.

◆ EXANIC_PORT_ENABLE_ENABLED

#define EXANIC_PORT_ENABLE_ENABLED 0x00000001UL

Port is enabled.

Definition at line 74 of file exanic.h.

◆ EXANIC_PORT_SPEED

#define EXANIC_PORT_SPEED 0x0004

Port speed register.

Definition at line 77 of file exanic.h.

◆ EXANIC_PORT_STATUS

#define EXANIC_PORT_STATUS 0x0008

Port status register.

Definition at line 80 of file exanic.h.

◆ EXANIC_PORT_STATUS_LINK

#define EXANIC_PORT_STATUS_LINK 0x00000008UL

Link is up.

Definition at line 81 of file exanic.h.

◆ EXANIC_PORT_STATUS_ABSENT

#define EXANIC_PORT_STATUS_ABSENT 0x80000000UL

Port is not present.

Definition at line 82 of file exanic.h.

◆ EXANIC_PORT_MAC

#define EXANIC_PORT_MAC 0x000c

Port MAC address (second half) register.

Definition at line 85 of file exanic.h.

◆ EXANIC_PORT_FLAGS

#define EXANIC_PORT_FLAGS 0x0010

Port flags register.

Definition at line 88 of file exanic.h.

◆ EXANIC_PORT_FLAGS_PROMISC

#define EXANIC_PORT_FLAGS_PROMISC 0x00000001UL

Promiscuous mode.

Definition at line 89 of file exanic.h.

◆ EXANIC_PORT_RX_BASE

#define EXANIC_PORT_RX_BASE 0x0014

Port receive chunk base address register.

Definition at line 92 of file exanic.h.

◆ EXANIC_PORT_TX_COMMAND

#define EXANIC_PORT_TX_COMMAND 0x0020

Port transmit command register.

Definition at line 95 of file exanic.h.

◆ EXANIC_PORT_TX_OFFSET

#define EXANIC_PORT_TX_OFFSET 0x0024

Port transmit region offset register.

Definition at line 98 of file exanic.h.

◆ EXANIC_PORT_TX_LEN

#define EXANIC_PORT_TX_LEN 0x0028

Port transmit region length register.

Definition at line 101 of file exanic.h.

◆ EXANIC_PORT_OUI

#define EXANIC_PORT_OUI 0x0030

Port MAC address (first half) register.

Definition at line 104 of file exanic.h.

◆ EXANIC_PORT_IRQ

#define EXANIC_PORT_IRQ 0x0034

Port interrupt configuration register.

Definition at line 107 of file exanic.h.

◆ EXANIC_TYPE_RAW

#define EXANIC_TYPE_RAW 0x01

Raw Ethernet frame type.

Definition at line 134 of file exanic.h.

◆ EXANIC_STATUS_ERROR_MASK

#define EXANIC_STATUS_ERROR_MASK 0x0f

Receive status error mask.

Definition at line 159 of file exanic.h.

◆ EXANIC_EEPROM_ADDRESS

#define EXANIC_EEPROM_ADDRESS 0x50

EEPROM address.

Definition at line 172 of file exanic.h.

◆ EXANIC_MAX_TX_LEN

#define EXANIC_MAX_TX_LEN ( 256 * sizeof ( struct exanic_tx_chunk ) )

Maximum used length of transmit region.

This is a policy decision to avoid overflowing the 16-bit transmit producer and consumer counters.

Definition at line 247 of file exanic.h.

◆ EXANIC_MAX_RX_LEN

#define EXANIC_MAX_RX_LEN ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )

Maximum length of received packet.

This is a policy decision.

Definition at line 253 of file exanic.h.

◆ EXANIC_LINK_INTERVAL

#define EXANIC_LINK_INTERVAL ( 1 * TICKS_PER_SEC )

Interval between link state checks.

This is a policy decision.

Definition at line 259 of file exanic.h.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )

Data Structures

Macros

Functions

Detailed Description

Macro Definition Documentation

◆ EXANIC_MAX_PORTS

◆ EXANIC_REGS_BAR

◆ EXANIC_TX_BAR

◆ EXANIC_ALIGN

◆ EXANIC_DMA_32_BIT

◆ EXANIC_REGS_LEN

◆ EXANIC_TXF_LEN

◆ EXANIC_TXF_SLOT

◆ EXANIC_RX_LEN

◆ EXANIC_TXF_BASE

◆ EXANIC_CAPS

◆ EXANIC_CAPS_100M

◆ EXANIC_CAPS_1G

◆ EXANIC_CAPS_10G

◆ EXANIC_CAPS_40G

◆ EXANIC_CAPS_100G

◆ EXANIC_CAPS_SPEED_MASK

◆ EXANIC_I2C

◆ EXANIC_POWER

◆ EXANIC_POWER_ON

◆ EXANIC_PORT_REGS

◆ EXANIC_PORT_ENABLE

◆ EXANIC_PORT_ENABLE_ENABLED

◆ EXANIC_PORT_SPEED

◆ EXANIC_PORT_STATUS

◆ EXANIC_PORT_STATUS_LINK

◆ EXANIC_PORT_STATUS_ABSENT

◆ EXANIC_PORT_MAC

◆ EXANIC_PORT_FLAGS

◆ EXANIC_PORT_FLAGS_PROMISC

◆ EXANIC_PORT_RX_BASE

◆ EXANIC_PORT_TX_COMMAND

◆ EXANIC_PORT_TX_OFFSET

◆ EXANIC_PORT_TX_LEN

◆ EXANIC_PORT_OUI

◆ EXANIC_PORT_IRQ

◆ EXANIC_TYPE_RAW

◆ EXANIC_STATUS_ERROR_MASK

◆ EXANIC_EEPROM_ADDRESS

◆ EXANIC_MAX_TX_LEN

◆ EXANIC_MAX_RX_LEN

◆ EXANIC_LINK_INTERVAL

Function Documentation

◆ FILE_LICENCE()