mlx_nvconfig.h File Reference

#include "../mlx_reg_access/mlx_reg_access.h"
#include "../../include/public/mlx_utils.h"

Go to the source code of this file.

Data Structures
struct	nvconfig_tlv_type_per_port
struct	nvconfig_tlv_type_per_host
struct	nvconfig_tlv_type_global
struct	nvconfig_tlv_mapping
union	nvconfig_tlv_type
struct	nvconfig_nvqc
struct	nvconfig_header
struct	nvconfig_nvda
struct	nv_conf_cap
struct	mlx_nvconfig_virt_net_addr

Macros
#define	NVCONFIG_MAX_TLV_SIZE   256

Enumerations
enum	NVRAM_CLASS_CODE { NVRAM_TLV_CLASS_GLOBAL = 0, NVRAM_TLV_CLASS_PHYSICAL_PORT = 1, NVRAM_TLV_CLASS_HOST = 3 }
enum	NVDA_WRITER_ID { NVDA_NV_HEADER_WRITER_ID_UEFI_HII = 0x6, NVDA_NV_HEADER_WRITER_ID_FLEXBOOT = 0x8 }
enum	NV_DEFAULT_OPT { TLV_ACCESS_DEFAULT_DIS = 0, TLV_ACCESS_CURRENT = 1, TLV_ACCESS_DEFAULT_EN = 2 }

Functions
	FILE_LICENCE (GPL2_OR_LATER)
mlx_status	nvconfig_query_capability (IN mlx_utils *utils, IN mlx_uint8 port, IN mlx_uint16 tlv_type, OUT mlx_boolean *read_supported, OUT mlx_boolean *write_supported)
mlx_status	nvconfig_nvdata_invalidate (IN mlx_utils *utils, IN mlx_uint8 port, IN mlx_uint16 tlv_type)
mlx_status	nvconfig_nvdata_access (IN mlx_utils *utils, IN mlx_uint8 port, IN mlx_uint16 tlv_type, IN REG_ACCESS_OPT opt, IN mlx_size data_size, IN NV_DEFAULT_OPT def_en, IN NVDA_WRITER_ID writer_id, IN OUT mlx_uint8 *version, IN OUT mlx_void *data)

Macro Definition Documentation

NVCONFIG_MAX_TLV_SIZE

#define NVCONFIG_MAX_TLV_SIZE   256

Definition at line 112 of file mlx_nvconfig.h.

Enumeration Type Documentation

NVRAM_CLASS_CODE

enum NVRAM_CLASS_CODE

Enumerator
NVRAM_TLV_CLASS_GLOBAL
NVRAM_TLV_CLASS_PHYSICAL_PORT
NVRAM_TLV_CLASS_HOST

Definition at line 28 of file mlx_nvconfig.h.

             {
        NVRAM_TLV_CLASS_GLOBAL = 0,
        NVRAM_TLV_CLASS_PHYSICAL_PORT = 1,
        NVRAM_TLV_CLASS_HOST = 3,
} NVRAM_CLASS_CODE;

NVDA_WRITER_ID

enum NVDA_WRITER_ID

Enumerator
NVDA_NV_HEADER_WRITER_ID_UEFI_HII
NVDA_NV_HEADER_WRITER_ID_FLEXBOOT

Definition at line 34 of file mlx_nvconfig.h.

             {
        NVDA_NV_HEADER_WRITER_ID_UEFI_HII  = 0x6,
        NVDA_NV_HEADER_WRITER_ID_FLEXBOOT = 0x8,
} NVDA_WRITER_ID;

NV_DEFAULT_OPT

enum NV_DEFAULT_OPT

Enumerator
TLV_ACCESS_DEFAULT_DIS
TLV_ACCESS_CURRENT
TLV_ACCESS_DEFAULT_EN

Definition at line 39 of file mlx_nvconfig.h.

             {
  TLV_ACCESS_DEFAULT_DIS = 0,
  TLV_ACCESS_CURRENT = 1,
  TLV_ACCESS_DEFAULT_EN = 2,
} NV_DEFAULT_OPT;

Function Documentation

FILE_LICENCE()

FILE_LICENCE

(

GPL2_OR_LATER

)

nvconfig_query_capability()

mlx_status nvconfig_query_capability	(	IN mlx_utils *	utils,
		IN mlx_uint8	port,
		IN mlx_uint16	tlv_type,
		OUT mlx_boolean *	read_supported,
		OUT mlx_boolean *	write_supported
	)

Definition at line 155 of file mlx_nvconfig.c.

{
        mlx_status status = MLX_SUCCESS;
        struct nvconfig_nvqc nvqc;
        mlx_uint32 reg_status;
        NVRAM_CLASS_CODE class_code;
        mlx_uint16 real_tlv_type;

        if (utils == NULL || read_supported == NULL || write_supported == NULL) {
                status = MLX_INVALID_PARAMETER;
                goto bad_param;
        }

        status = nvconfig_get_tlv_type_and_class(tlv_type, &real_tlv_type, &class_code);
        MLX_CHECK_STATUS(utils, status, tlv_not_supported, "tlv not supported");

        mlx_memory_set(utils, &nvqc, 0, sizeof(nvqc));
        nvconfig_fill_tlv_type(port, class_code, real_tlv_type, &nvqc.tlv_type);

        status = mlx_reg_access(utils, REG_ID_NVQC, REG_ACCESS_READ, &nvqc, sizeof(nvqc),
                        &reg_status);
        MLX_CHECK_STATUS(utils, status, reg_err, "mlx_reg_access failed ");
        if (reg_status != 0) {
                MLX_DEBUG_ERROR(utils,"mlx_reg_access failed with status = %d\n", reg_status);
                status = MLX_FAILED;
                goto reg_err;
        }
        *read_supported = nvqc.support_rd;
        *write_supported = nvqc.support_wr;
reg_err:
tlv_not_supported:
bad_param:
        return status;
}

References MLX_CHECK_STATUS, MLX_DEBUG_ERROR, MLX_FAILED, MLX_INVALID_PARAMETER, mlx_memory_set(), mlx_reg_access(), MLX_SUCCESS, NULL, nvconfig_fill_tlv_type(), nvconfig_get_tlv_type_and_class(), port, REG_ACCESS_READ, REG_ID_NVQC, status, nvconfig_nvqc::support_rd, nvconfig_nvqc::support_wr, and nvconfig_nvqc::tlv_type.

nvconfig_nvdata_invalidate()

mlx_status nvconfig_nvdata_invalidate	(	IN mlx_utils *	utils,
		IN mlx_uint8	port,
		IN mlx_uint16	tlv_type
	)

Definition at line 197 of file mlx_nvconfig.c.

{
        mlx_status status = MLX_SUCCESS;
        struct nvconfig_header nv_header;
        mlx_uint32 reg_status;
        NVRAM_CLASS_CODE class_code;
        mlx_uint16 real_tlv_type;

        if (utils == NULL) {
                status = MLX_INVALID_PARAMETER;
                goto bad_param;
        }

        status = nvconfig_get_tlv_type_and_class(tlv_type, &real_tlv_type, &class_code);
        MLX_CHECK_STATUS(utils, status, tlv_not_supported, "tlv not supported");

        mlx_memory_set(utils, &nv_header, 0, sizeof(nv_header));
        nvconfig_fill_tlv_type(port, class_code, real_tlv_type, &nv_header.tlv_type);

        status = mlx_reg_access(utils, REG_ID_NVDI, REG_ACCESS_WRITE, &nv_header, sizeof(nv_header),
                        &reg_status);
        MLX_CHECK_STATUS(utils, status, reg_err, "mlx_reg_access failed ");
        if (reg_status != 0) {
                MLX_DEBUG_ERROR(utils,"mlx_reg_access failed with status = %d\n", reg_status);
                status = MLX_FAILED;
                goto reg_err;
        }
reg_err:
tlv_not_supported:
bad_param:
        return status;
}

References MLX_CHECK_STATUS, MLX_DEBUG_ERROR, MLX_FAILED, MLX_INVALID_PARAMETER, mlx_memory_set(), mlx_reg_access(), MLX_SUCCESS, NULL, nvconfig_fill_tlv_type(), nvconfig_get_tlv_type_and_class(), port, REG_ACCESS_WRITE, REG_ID_NVDI, status, and nvconfig_header::tlv_type.

nvconfig_nvdata_access()

mlx_status nvconfig_nvdata_access	(	IN mlx_utils *	utils,
		IN mlx_uint8	port,
		IN mlx_uint16	tlv_type,
		IN REG_ACCESS_OPT	opt,
		IN mlx_size	data_size,
		IN NV_DEFAULT_OPT	def_en,
		IN NVDA_WRITER_ID	writer_id,
		IN OUT mlx_uint8 *	version,
		IN OUT mlx_void *	data
	)

Definition at line 235 of file mlx_nvconfig.c.

{
        mlx_status status = MLX_SUCCESS;
        struct nvconfig_nvda nvda;
        mlx_uint32 reg_status;
        mlx_uint32 real_size_to_read;
        mlx_uint32 index;
        NVRAM_CLASS_CODE class_code;
        mlx_uint16 real_tlv_type;
        mlx_size data_size_align_to_dword;

        if (utils == NULL || data == NULL || data_size > NVCONFIG_MAX_TLV_SIZE) {
                status = MLX_INVALID_PARAMETER;
                goto bad_param;
        }

        status = nvconfig_get_tlv_type_and_class(tlv_type, &real_tlv_type, &class_code);
        MLX_CHECK_STATUS(utils, status, tlv_not_supported, "tlv not supported");

        data_size_align_to_dword = ((data_size + 3) / sizeof(mlx_uint32)) * sizeof(mlx_uint32);
        mlx_memory_set(utils, &nvda, 0, sizeof(nvda));
        nvda.nv_header.length = data_size_align_to_dword;
        nvda.nv_header.access_mode = def_en;
        nvda.nv_header.version = *version;
        nvda.nv_header.writer_id = writer_id;

        nvconfig_fill_tlv_type(port, class_code, real_tlv_type, &nvda.nv_header.tlv_type);

        mlx_memory_cpy(utils, nvda.data, data, data_size);
        for (index = 0 ; index * 4 < NVCONFIG_MAX_TLV_SIZE ; index++) {
                mlx_memory_be32_to_cpu(utils,(((mlx_uint32 *)nvda.data)[index]), ((mlx_uint32 *)nvda.data) + index);
        }
        status = mlx_reg_access(utils, REG_ID_NVDA, opt, &nvda,
                        data_size_align_to_dword + sizeof(nvda.nv_header), &reg_status);
        MLX_CHECK_STATUS(utils, status, reg_err, "mlx_reg_access failed ");
        if (reg_status != 0) {
                MLX_DEBUG_ERROR(utils,"mlx_reg_access failed with status = %d\n", reg_status);
                status = MLX_FAILED;
                goto reg_err;
        }
        for (index = 0 ; index * 4 < NVCONFIG_MAX_TLV_SIZE ; index++) {
                mlx_memory_cpu_to_be32(utils,(((mlx_uint32 *)nvda.data)[index]), ((mlx_uint32 *)nvda.data) + index);
        }
        if (opt == REG_ACCESS_READ) {
                real_size_to_read = (nvda.nv_header.length > data_size) ? data_size :
                                nvda.nv_header.length;
                mlx_memory_cpy(utils, data, nvda.data, real_size_to_read);
                *version = nvda.nv_header.version;
        } else {
                nvconfig_set_fw_reset_level(utils, tlv_type);
        }
reg_err:
tlv_not_supported:
bad_param:
        return status;
}

References nvconfig_header::access_mode, data, nvconfig_nvda::data, index, nvconfig_header::length, MLX_CHECK_STATUS, MLX_DEBUG_ERROR, MLX_FAILED, MLX_INVALID_PARAMETER, mlx_memory_be32_to_cpu(), mlx_memory_cpu_to_be32(), mlx_memory_cpy(), mlx_memory_set(), mlx_reg_access(), MLX_SUCCESS, NULL, nvconfig_nvda::nv_header, nvconfig_fill_tlv_type(), nvconfig_get_tlv_type_and_class(), NVCONFIG_MAX_TLV_SIZE, nvconfig_set_fw_reset_level(), port, REG_ACCESS_READ, REG_ID_NVDA, status, nvconfig_header::tlv_type, nvconfig_header::version, version, and nvconfig_header::writer_id.

Referenced by nvconfig_nvdata_default_access(), and nvconfig_read_rom_ini_values().