iPXE
sis190.h
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1 #ifndef __SIS190_H__
2 #define __SIS190_H__
3 
4 FILE_LICENCE ( GPL_ANY );
5 
6 #include <stdint.h>
7 #include <stdio.h>
8 #include <stdlib.h>
9 #include <stddef.h>
10 #include <string.h>
11 #include <unistd.h>
12 #include <assert.h>
13 #include <byteswap.h>
14 #include <errno.h>
15 #include <mii.h>
16 #include <ipxe/ethernet.h>
17 #include <ipxe/if_ether.h>
18 #include <ipxe/io.h>
19 #include <ipxe/iobuf.h>
20 #include <ipxe/malloc.h>
21 #include <ipxe/netdevice.h>
22 #include <ipxe/pci.h>
23 #include <ipxe/timer.h>
24 
25 #define PCI_VENDOR_ID_SI 0x1039
26 
27 #define PHY_MAX_ADDR 32
28 #define PHY_ID_ANY 0x1f
29 #define MII_REG_ANY 0x1f
30 
31 #define DRV_VERSION "1.3"
32 #define DRV_NAME "sis190"
33 #define SIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION
34 #define PFX DRV_NAME ": "
35 
36 #define sis190_rx_quota(count, quota) count
37 
38 #define NUM_TX_DESC 8 /* [8..1024] */
39 #define NUM_RX_DESC 8 /* [8..8192] */
40 #define TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
41 #define RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))
42 #define RX_BUF_SIZE 1536
43 #define RX_BUF_MASK 0xfff8
44 
45 #define RING_ALIGNMENT 256
46 
47 #define SIS190_REGS_SIZE 0x80
48 
49 /* Enhanced PHY access register bit definitions */
50 #define EhnMIIread 0x0000
51 #define EhnMIIwrite 0x0020
52 #define EhnMIIdataShift 16
53 #define EhnMIIpmdShift 6 /* 7016 only */
54 #define EhnMIIregShift 11
55 #define EhnMIIreq 0x0010
56 #define EhnMIInotDone 0x0010
57 
58 /* Write/read MMIO register */
59 #define SIS_W8(reg, val) writeb ((val), ioaddr + (reg))
60 #define SIS_W16(reg, val) writew ((val), ioaddr + (reg))
61 #define SIS_W32(reg, val) writel ((val), ioaddr + (reg))
62 #define SIS_R8(reg) readb (ioaddr + (reg))
63 #define SIS_R16(reg) readw (ioaddr + (reg))
64 #define SIS_R32(reg) readl (ioaddr + (reg))
65 
66 #define SIS_PCI_COMMIT() SIS_R32(IntrControl)
67 
69  TxControl = 0x00,
71  rsv0 = 0x08, // reserved
72  TxSts = 0x0c, // unused (Control/Status)
73  RxControl = 0x10,
75  rsv1 = 0x18, // reserved
76  RxSts = 0x1c, // unused
77  IntrStatus = 0x20,
78  IntrMask = 0x24,
79  IntrControl = 0x28,
80  IntrTimer = 0x2c, // unused (Interrupt Timer)
81  PMControl = 0x30, // unused (Power Mgmt Control/Status)
82  rsv2 = 0x34, // reserved
83  ROMControl = 0x38,
84  ROMInterface = 0x3c,
86  GMIIControl = 0x44,
87  GIoCR = 0x48, // unused (GMAC IO Compensation)
88  GIoCtrl = 0x4c, // unused (GMAC IO Control)
89  TxMacControl = 0x50,
90  TxLimit = 0x54, // unused (Tx MAC Timer/TryLimit)
91  RGDelay = 0x58, // unused (RGMII Tx Internal Delay)
92  rsv3 = 0x5c, // reserved
93  RxMacControl = 0x60,
94  RxMacAddr = 0x62,
95  RxHashTable = 0x68,
96  // Undocumented = 0x6c,
97  RxWolCtrl = 0x70,
98  RxWolData = 0x74, // unused (Rx WOL Data Access)
99  RxMPSControl = 0x78, // unused (Rx MPS Control)
100  rsv4 = 0x7c, // reserved
101 };
102 
104  /* IntrStatus */
105  SoftInt = 0x40000000, // unused
106  Timeup = 0x20000000, // unused
107  PauseFrame = 0x00080000, // unused
108  MagicPacket = 0x00040000, // unused
109  WakeupFrame = 0x00020000, // unused
110  LinkChange = 0x00010000,
111  RxQEmpty = 0x00000080,
112  RxQInt = 0x00000040,
113  TxQ1Empty = 0x00000020, // unused
114  TxQ1Int = 0x00000010,
115  TxQ0Empty = 0x00000008, // unused
116  TxQ0Int = 0x00000004,
117  RxHalt = 0x00000002,
118  TxHalt = 0x00000001,
119 
120  /* {Rx/Tx}CmdBits */
121  CmdReset = 0x10,
122  CmdRxEnb = 0x08, // unused
123  CmdTxEnb = 0x01,
124  RxBufEmpty = 0x01, // unused
125 
126  /* Cfg9346Bits */
127  Cfg9346_Lock = 0x00, // unused
128  Cfg9346_Unlock = 0xc0, // unused
129 
130  /* RxMacControl */
131  AcceptErr = 0x20, // unused
132  AcceptRunt = 0x10, // unused
133  AcceptBroadcast = 0x0800,
134  AcceptMulticast = 0x0400,
135  AcceptMyPhys = 0x0200,
136  AcceptAllPhys = 0x0100,
137 
138  /* RxConfigBits */
140  RxCfgDMAShift = 8, // 0x1a in RxControl ?
141 
142  /* TxConfigBits */
144  TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
145 
146  LinkStatus = 0x02, // unused
147  FullDup = 0x01, // unused
148 
149  /* TBICSRBit */
150  TBILinkOK = 0x02000000, // unused
151 };
152 
153 struct TxDesc {
154  volatile u32 PSize;
155  volatile u32 status;
156  volatile u32 addr;
157  volatile u32 size;
158 };
159 
160 struct RxDesc {
161  volatile u32 PSize;
162  volatile u32 status;
163  volatile u32 addr;
164  volatile u32 size;
165 };
166 
168  /* _Desc.status */
169  OWNbit = 0x80000000, // RXOWN/TXOWN
170  INTbit = 0x40000000, // RXINT/TXINT
171  CRCbit = 0x00020000, // CRCOFF/CRCEN
172  PADbit = 0x00010000, // PREADD/PADEN
173  /* _Desc.size */
174  RingEnd = 0x80000000,
175  /* TxDesc.status */
176  LSEN = 0x08000000, // TSO ? -- FR
177  IPCS = 0x04000000,
178  TCPCS = 0x02000000,
179  UDPCS = 0x01000000,
180  BSTEN = 0x00800000,
181  EXTEN = 0x00400000,
182  DEFEN = 0x00200000,
183  BKFEN = 0x00100000,
184  CRSEN = 0x00080000,
185  COLEN = 0x00040000,
186  THOL3 = 0x30000000,
187  THOL2 = 0x20000000,
188  THOL1 = 0x10000000,
189  THOL0 = 0x00000000,
190 
191  WND = 0x00080000,
192  TABRT = 0x00040000,
193  FIFO = 0x00020000,
194  LINK = 0x00010000,
195  ColCountMask = 0x0000ffff,
196  /* RxDesc.status */
197  IPON = 0x20000000,
198  TCPON = 0x10000000,
199  UDPON = 0x08000000,
200  Wakup = 0x00400000,
201  Magic = 0x00200000,
202  Pause = 0x00100000,
203  DEFbit = 0x00200000,
204  BCAST = 0x000c0000,
205  MCAST = 0x00080000,
206  UCAST = 0x00040000,
207  /* RxDesc.PSize */
208  TAGON = 0x80000000,
209  RxDescCountMask = 0x7f000000, // multi-desc pkt when > 1 ? -- FR
210  ABORT = 0x00800000,
211  SHORT = 0x00400000,
212  LIMIT = 0x00200000,
213  MIIER = 0x00100000,
214  OVRUN = 0x00080000,
215  NIBON = 0x00040000,
216  COLON = 0x00020000,
217  CRCOK = 0x00010000,
218  RxSizeMask = 0x0000ffff
219  /*
220  * The asic could apparently do vlan, TSO, jumbo (sis191 only) and
221  * provide two (unused with Linux) Tx queues. No publicly
222  * available documentation alas.
223  */
224 };
225 
227  EECS = 0x00000001, // unused
228  EECLK = 0x00000002, // unused
229  EEDO = 0x00000008, // unused
230  EEDI = 0x00000004, // unused
231  EEREQ = 0x00000080,
232  EEROP = 0x00000200,
233  EEWOP = 0x00000100 // unused
234 };
235 
236 /* EEPROM Addresses */
239  EEPROMCLK = 0x01, // unused
240  EEPROMInfo = 0x02,
242 };
243 
248 };
249 
251  void *mmio_addr;
253  struct net_device *dev;
267 };
268 
269 struct sis190_phy {
270  struct list_head list;
271  int phy_id;
272  u16 id[2];
275 };
276 
278  UNKNOWN = 0x00,
279  HOME = 0x01,
280  LAN = 0x02,
281  MIX = 0x03
282 };
283 
284 static struct mii_chip_info {
285  const char *name;
286  u16 id[2];
287  unsigned int type;
289 } mii_chip_table[] = {
290  { "Atheros PHY", { 0x004d, 0xd010 }, LAN, 0 },
291  { "Atheros PHY AR8012", { 0x004d, 0xd020 }, LAN, 0 },
292  { "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN, F_PHY_BCM5461 },
293  { "Broadcom PHY AC131", { 0x0143, 0xbc70 }, LAN, 0 },
294  { "Agere PHY ET1101B", { 0x0282, 0xf010 }, LAN, 0 },
295  { "Marvell PHY 88E1111", { 0x0141, 0x0cc0 }, LAN, F_PHY_88E1111 },
296  { "Realtek PHY RTL8201", { 0x0000, 0x8200 }, LAN, 0 },
297  { NULL, { 0x00, 0x00 }, 0, 0 }
298 };
299 
300 static void sis190_phy_task(struct sis190_private *tp);
301 static void sis190_free(struct net_device *dev);
302 static inline void sis190_init_rxfilter(struct net_device *dev);
303 
304 #endif
Definition: sis190.h:233
uint16_t u16
Definition: stdint.h:21
Definition: sis190.h:212
Definition: sis190.h:232
Definition: sis190.h:229
iPXE I/O API
Definition: sis190.h:179
Definition: sis190.h:191
Definition: sis190.h:112
Definition: sis190.h:211
Definition: sis190.h:230
Definition: sis190.h:210
sis190_eeprom_address
Definition: sis190.h:237
u16 status
Definition: sis190.h:273
Definition: sis190.h:193
Definition: sis190.h:169
Definition: sis190.h:87
Error codes.
static struct mii_chip_info mii_chip_table[]
I/O buffers.
Definition: sis190.h:205
#define NUM_TX_DESC
Definition: sis190.h:38
sis190_registers
Definition: sis190.h:68
sis190_feature
Definition: sis190.h:244
volatile u32 addr
Definition: sis190.h:156
Definition: sis190.h:214
_DescStatusBit
Definition: sis190.h:167
iPXE timers
static void sis190_free(struct net_device *dev)
Definition: sis190.h:279
Definition: sis190.h:82
Definition: sis190.h:181
Definition: sis190.h:170
void * mmio_addr
Definition: sis190.h:251
struct net_device * dev
Definition: sis190.h:253
volatile u32 size
Definition: sis190.h:157
A doubly-linked list entry (or list head)
Definition: list.h:18
Definition: sis190.h:90
volatile u32 size
Definition: sis190.h:164
Dynamic memory allocation.
u32 dirty_rx
Definition: sis190.h:256
volatile u32 status
Definition: sis190.h:162
struct io_buffer * Rx_iobuf[NUM_RX_DESC]
Definition: sis190.h:262
Definition: sis190.h:100
Definition: sis190.h:185
Definition: sis190.h:187
Assertions.
volatile u32 PSize
Definition: sis190.h:154
Definition: sis190.h:118
Ethernet protocol.
Definition: sis190.h:182
struct RxDesc * RxDescRing
Definition: sis190.h:260
sis190_phy_type
Definition: sis190.h:277
Definition: sis190.h:204
static struct tulip_private * tp
Definition: tulip.c:441
volatile u32 PSize
Definition: sis190.h:161
Definition: sis190.h:206
Definition: sis190.h:106
Definition: sis190.h:76
Definition: sis190.h:91
PCI bus.
A PCI device.
Definition: pci.h:187
static void sis190_phy_task(struct sis190_private *tp)
Definition: sis190.h:208
#define NUM_RX_DESC
Definition: sis190.h:39
Definition: sis190.h:199
A network device.
Definition: netdevice.h:348
sis190_register_content
Definition: sis190.h:103
Definition: sis190.h:200
Definition: sis190.h:178
u32 dirty_tx
Definition: sis190.h:257
Definition: sis190.h:216
FILE_LICENCE(GPL_ANY)
u8 type
Definition: sis190.h:274
Definition: sis190.h:227
static void sis190_init_rxfilter(struct net_device *dev)
Definition: sis190.h:186
Definition: sis190.h:231
Network device management.
Definition: sis190.h:198
int phy_id
Definition: sis190.h:271
Definition: sis190.h:188
Definition: sis190.h:75
Definition: sis190.h:280
struct list_head list
Definition: sis190.h:270
Definition: sis190.h:88
unsigned int type
Definition: sis190.h:287
Definition: sis190.h:213
u32 features
Definition: sis190.h:266
struct TxDesc * TxDescRing
Definition: sis190.h:261
Media Independent Interface constants.
u32 feature
Definition: sis190.h:288
Definition: sis190.h:189
struct list_head first_phy
Definition: sis190.h:265
Definition: sis190.h:197
Definition: sis190.h:194
Definition: sis190.h:201
volatile u32 status
Definition: sis190.h:155
Definition: sis190.h:92
Definition: sis190.h:171
volatile u32 addr
Definition: sis190.h:163
Definition: sis190.h:117
const char * name
Definition: sis190.h:285
Definition: sis190.h:172
Definition: sis190.h:192
struct pci_device * pci_device
Definition: sis190.h:252
Definition: sis190.h:153
sis190_eeprom_access_register_bits
Definition: sis190.h:226
Definition: sis190.h:71
struct mii_if_info mii_if
Definition: sis190.h:264
Definition: sis190.h:184
Definition: sis190.h:281
Definition: sis190.h:177
Definition: sis190.h:228
Definition: sis190.h:217
Definition: sis190.h:203
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
Definition: sis190.h:183
Definition: sis190.h:215
Definition: sis190.h:180
String functions.
uint8_t u8
Definition: stdint.h:19
uint32_t u32
Definition: stdint.h:23
struct io_buffer * Tx_iobuf[NUM_TX_DESC]
Definition: sis190.h:263
Definition: sis190.h:160
Definition: sis190.h:202
Definition: sis190.h:72
Definition: sis190.h:176
A persistent I/O buffer.
Definition: iobuf.h:32