iPXE
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#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <stddef.h>
#include <string.h>
#include <unistd.h>
#include <assert.h>
#include <byteswap.h>
#include <errno.h>
#include <mii.h>
#include <ipxe/ethernet.h>
#include <ipxe/if_ether.h>
#include <ipxe/io.h>
#include <ipxe/iobuf.h>
#include <ipxe/malloc.h>
#include <ipxe/netdevice.h>
#include <ipxe/pci.h>
#include <ipxe/timer.h>
Go to the source code of this file.
Data Structures | |
struct | TxDesc |
struct | RxDesc |
struct | sis190_private |
struct | sis190_phy |
struct | mii_chip_info |
Macros | |
#define | PCI_VENDOR_ID_SI 0x1039 |
#define | PHY_MAX_ADDR 32 |
#define | PHY_ID_ANY 0x1f |
#define | MII_REG_ANY 0x1f |
#define | DRV_VERSION "1.3" |
#define | DRV_NAME "sis190" |
#define | SIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION |
#define | PFX DRV_NAME ": " |
#define | sis190_rx_quota(count, quota) count |
#define | NUM_TX_DESC 8 /* [8..1024] */ |
#define | NUM_RX_DESC 8 /* [8..8192] */ |
#define | TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) |
#define | RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) |
#define | RX_BUF_SIZE 1536 |
#define | RX_BUF_MASK 0xfff8 |
#define | RING_ALIGNMENT 256 |
#define | SIS190_REGS_SIZE 0x80 |
#define | EhnMIIread 0x0000 |
#define | EhnMIIwrite 0x0020 |
#define | EhnMIIdataShift 16 |
#define | EhnMIIpmdShift 6 /* 7016 only */ |
#define | EhnMIIregShift 11 |
#define | EhnMIIreq 0x0010 |
#define | EhnMIInotDone 0x0010 |
#define | SIS_W8(reg, val) writeb ((val), ioaddr + (reg)) |
#define | SIS_W16(reg, val) writew ((val), ioaddr + (reg)) |
#define | SIS_W32(reg, val) writel ((val), ioaddr + (reg)) |
#define | SIS_R8(reg) readb (ioaddr + (reg)) |
#define | SIS_R16(reg) readw (ioaddr + (reg)) |
#define | SIS_R32(reg) readl (ioaddr + (reg)) |
#define | SIS_PCI_COMMIT() SIS_R32(IntrControl) |
Enumerations | |
enum | sis190_registers { TxControl = 0x00, TxDescStartAddr = 0x04, rsv0 = 0x08, TxSts = 0x0c, RxControl = 0x10, RxDescStartAddr = 0x14, rsv1 = 0x18, RxSts = 0x1c, IntrStatus = 0x20, IntrMask = 0x24, IntrControl = 0x28, IntrTimer = 0x2c, PMControl = 0x30, rsv2 = 0x34, ROMControl = 0x38, ROMInterface = 0x3c, StationControl = 0x40, GMIIControl = 0x44, GIoCR = 0x48, GIoCtrl = 0x4c, TxMacControl = 0x50, TxLimit = 0x54, RGDelay = 0x58, rsv3 = 0x5c, RxMacControl = 0x60, RxMacAddr = 0x62, RxHashTable = 0x68, RxWolCtrl = 0x70, RxWolData = 0x74, RxMPSControl = 0x78, rsv4 = 0x7c } |
enum | sis190_register_content { SoftInt = 0x40000000, Timeup = 0x20000000, PauseFrame = 0x00080000, MagicPacket = 0x00040000, WakeupFrame = 0x00020000, LinkChange = 0x00010000, RxQEmpty = 0x00000080, RxQInt = 0x00000040, TxQ1Empty = 0x00000020, TxQ1Int = 0x00000010, TxQ0Empty = 0x00000008, TxQ0Int = 0x00000004, RxHalt = 0x00000002, TxHalt = 0x00000001, CmdReset = 0x10, CmdRxEnb = 0x08, CmdTxEnb = 0x01, RxBufEmpty = 0x01, Cfg9346_Lock = 0x00, Cfg9346_Unlock = 0xc0, AcceptErr = 0x20, AcceptRunt = 0x10, AcceptBroadcast = 0x0800, AcceptMulticast = 0x0400, AcceptMyPhys = 0x0200, AcceptAllPhys = 0x0100, RxCfgFIFOShift = 13, RxCfgDMAShift = 8, TxInterFrameGapShift = 24, TxDMAShift = 8, LinkStatus = 0x02, FullDup = 0x01, TBILinkOK = 0x02000000 } |
enum | _DescStatusBit { OWNbit = 0x80000000, INTbit = 0x40000000, CRCbit = 0x00020000, PADbit = 0x00010000, RingEnd = 0x80000000, LSEN = 0x08000000, IPCS = 0x04000000, TCPCS = 0x02000000, UDPCS = 0x01000000, BSTEN = 0x00800000, EXTEN = 0x00400000, DEFEN = 0x00200000, BKFEN = 0x00100000, CRSEN = 0x00080000, COLEN = 0x00040000, THOL3 = 0x30000000, THOL2 = 0x20000000, THOL1 = 0x10000000, THOL0 = 0x00000000, WND = 0x00080000, TABRT = 0x00040000, FIFO = 0x00020000, LINK = 0x00010000, ColCountMask = 0x0000ffff, IPON = 0x20000000, TCPON = 0x10000000, UDPON = 0x08000000, Wakup = 0x00400000, Magic = 0x00200000, Pause = 0x00100000, DEFbit = 0x00200000, BCAST = 0x000c0000, MCAST = 0x00080000, UCAST = 0x00040000, TAGON = 0x80000000, RxDescCountMask = 0x7f000000, ABORT = 0x00800000, SHORT = 0x00400000, LIMIT = 0x00200000, MIIER = 0x00100000, OVRUN = 0x00080000, NIBON = 0x00040000, COLON = 0x00020000, CRCOK = 0x00010000, RxSizeMask = 0x0000ffff } |
enum | sis190_eeprom_access_register_bits { EECS = 0x00000001, EECLK = 0x00000002, EEDO = 0x00000008, EEDI = 0x00000004, EEREQ = 0x00000080, EEROP = 0x00000200, EEWOP = 0x00000100 } |
enum | sis190_eeprom_address { EEPROMSignature = 0x00, EEPROMCLK = 0x01, EEPROMInfo = 0x02, EEPROMMACAddr = 0x03 } |
enum | sis190_feature { F_HAS_RGMII = 1, F_PHY_88E1111 = 2, F_PHY_BCM5461 = 4 } |
enum | sis190_phy_type { UNKNOWN = 0x00, HOME = 0x01, LAN = 0x02, MIX = 0x03 } |
Functions | |
FILE_LICENCE (GPL_ANY) | |
static void | sis190_phy_task (struct sis190_private *tp) |
static void | sis190_free (struct net_device *dev) |
static void | sis190_init_rxfilter (struct net_device *dev) |
Variables | |
static struct mii_chip_info | mii_chip_table [] |
#define SIS190_DRIVER_NAME DRV_NAME " Gigabit Ethernet driver " DRV_VERSION |
#define TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) |
#define RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) |
#define SIS_PCI_COMMIT | ( | ) | SIS_R32(IntrControl) |
enum sis190_registers |
Definition at line 68 of file sis190.h.
Definition at line 103 of file sis190.h.
enum _DescStatusBit |
Definition at line 167 of file sis190.h.
Enumerator | |
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EECS | |
EECLK | |
EEDO | |
EEDI | |
EEREQ | |
EEROP | |
EEWOP |
Definition at line 226 of file sis190.h.
Enumerator | |
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EEPROMSignature | |
EEPROMCLK | |
EEPROMInfo | |
EEPROMMACAddr |
enum sis190_feature |
Enumerator | |
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F_HAS_RGMII | |
F_PHY_88E1111 | |
F_PHY_BCM5461 |
enum sis190_phy_type |
Enumerator | |
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UNKNOWN | |
HOME | |
LAN | |
MIX |
FILE_LICENCE | ( | GPL_ANY | ) |
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static |
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static |
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inlinestatic |
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static |
Referenced by sis190_init_phy().