iPXE
vmxnet3.h
Go to the documentation of this file.
1 #ifndef _VMXNET3_H
2 #define _VMXNET3_H
3 
4 /*
5  * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of the
10  * License, or any later version.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20  * 02110-1301, USA.
21  *
22  * You can also choose to distribute this program under the terms of
23  * the Unmodified Binary Distribution Licence (as given in the file
24  * COPYING.UBDL), provided that you have satisfied its requirements.
25  */
26 
27 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
28 
29 /**
30  * @file
31  *
32  * VMware vmxnet3 virtual NIC driver
33  *
34  */
35 
36 #include <ipxe/pci.h>
37 
38 /** Maximum number of TX queues */
39 #define VMXNET3_MAX_TX_QUEUES 8
40 
41 /** Maximum number of RX queues */
42 #define VMXNET3_MAX_RX_QUEUES 16
43 
44 /** Maximum number of interrupts */
45 #define VMXNET3_MAX_INTRS 25
46 
47 /** Maximum packet size */
48 #define VMXNET3_MAX_PACKET_LEN 0x4000
49 
50 /** "PT" PCI BAR address */
51 #define VMXNET3_PT_BAR PCI_BASE_ADDRESS_0
52 
53 /** "PT" PCI BAR size */
54 #define VMXNET3_PT_LEN 0x1000
55 
56 /** Interrupt Mask Register */
57 #define VMXNET3_PT_IMR 0x0
58 
59 /** Transmit producer index */
60 #define VMXNET3_PT_TXPROD 0x600
61 
62 /** Rx producer index for ring 1 */
63 #define VMXNET3_PT_RXPROD 0x800
64 
65 /** Rx producer index for ring 2 */
66 #define VMXNET3_PT_RXPROD2 0xa00
67 
68 /** "VD" PCI BAR address */
69 #define VMXNET3_VD_BAR PCI_BASE_ADDRESS_1
70 
71 /** "VD" PCI BAR size */
72 #define VMXNET3_VD_LEN 0x1000
73 
74 /** vmxnet3 Revision Report Selection */
75 #define VMXNET3_VD_VRRS 0x0
76 
77 /** UPT Version Report Selection */
78 #define VMXNET3_VD_UVRS 0x8
79 
80 /** Driver Shared Address Low */
81 #define VMXNET3_VD_DSAL 0x10
82 
83 /** Driver Shared Address High */
84 #define VMXNET3_VD_DSAH 0x18
85 
86 /** Command */
87 #define VMXNET3_VD_CMD 0x20
88 
89 /** MAC Address Low */
90 #define VMXNET3_VD_MACL 0x28
91 
92 /** MAC Address High */
93 #define VMXNET3_VD_MACH 0x30
94 
95 /** Interrupt Cause Register */
96 #define VMXNET3_VD_ICR 0x38
97 
98 /** Event Cause Register */
99 #define VMXNET3_VD_ECR 0x40
100 
101 /** Commands */
103  VMXNET3_CMD_FIRST_SET = 0xcafe0000,
115 
116  VMXNET3_CMD_FIRST_GET = 0xf00d0000,
126 };
127 
128 /** Events */
130  VMXNET3_ECR_RQERR = 0x00000001,
131  VMXNET3_ECR_TQERR = 0x00000002,
132  VMXNET3_ECR_LINK = 0x00000004,
133  VMXNET3_ECR_DIC = 0x00000008,
134  VMXNET3_ECR_DEBUG = 0x00000010,
135 };
136 
137 /** Miscellaneous configuration descriptor */
139  /** Driver version */
141  /** Guest information */
143  /** Version supported */
145  /** UPT version supported */
147  /** UPT features supported */
149  /** Driver-private data address */
151  /** Queue descriptors data address */
153  /** Driver-private data length */
155  /** Queue descriptors data length */
157  /** Maximum transmission unit */
159  /** Maximum number of RX scatter-gather */
161  /** Number of TX queues */
163  /** Number of RX queues */
165  /** Reserved */
167 } __attribute__ (( packed ));
168 
169 /** Driver version magic */
170 #define VMXNET3_VERSION_MAGIC 0x69505845
171 
172 /** Interrupt configuration */
180 } __attribute__ (( packed ));
181 
182 /** Interrupt control - disable all interrupts */
183 #define VMXNET3_IC_DISABLE_ALL 0x1
184 
185 /** Receive filter configuration */
187  /** Receive filter mode */
189  /** Multicast filter table length */
191  /** Reserved */
193  /** Multicast filter table address */
195  /** VLAN filter table (one bit per possible VLAN) */
197 } __attribute__ (( packed ));
198 
199 /** Receive filter mode */
201  VMXNET3_RXM_UCAST = 0x01, /**< Unicast only */
202  VMXNET3_RXM_MCAST = 0x02, /**< Multicast passing the filters */
203  VMXNET3_RXM_BCAST = 0x04, /**< Broadcast only */
204  VMXNET3_RXM_ALL_MULTI = 0x08, /**< All multicast */
205  VMXNET3_RXM_PROMISC = 0x10, /**< Promiscuous */
206 };
207 
208 /** Variable-length configuration descriptor */
213 } __attribute__ (( packed ));
214 
215 /** Driver shared area */
217  /** Magic signature */
219  /** Reserved */
221  /** Miscellaneous configuration */
223  /** Interrupt configuration */
225  /** Receive filter configuration */
227  /** RSS configuration */
229  /** Pattern-matching configuration */
231  /** Plugin configuration */
233  /** Event notifications */
235  /** Reserved */
237 } __attribute__ (( packed ));
238 
239 /** Alignment of driver shared area */
240 #define VMXNET3_SHARED_ALIGN 8
241 
242 /** Driver shared area magic */
243 #define VMXNET3_SHARED_MAGIC 0xbabefee1
244 
245 /** Transmit descriptor */
247  /** Address */
249  /** Flags */
251 } __attribute__ (( packed ));
252 
253 /** Transmit generation flag */
254 #define VMXNET3_TXF_GEN 0x00004000UL
255 
256 /** Transmit end-of-packet flag */
257 #define VMXNET3_TXF_EOP 0x000001000UL
258 
259 /** Transmit completion request flag */
260 #define VMXNET3_TXF_CQ 0x000002000UL
261 
262 /** Transmit completion descriptor */
264  /** Index of the end-of-packet descriptor */
266  /** Reserved */
268  /** Flags */
270 } __attribute__ (( packed ));
271 
272 /** Transmit completion generation flag */
273 #define VMXNET3_TXCF_GEN 0x80000000UL
274 
275 /** Transmit queue control */
280 } __attribute__ (( packed ));
281 
282 /** Transmit queue configuration */
284  /** Descriptor ring address */
286  /** Data ring address */
288  /** Completion ring address */
290  /** Driver-private data address */
292  /** Reserved */
294  /** Number of descriptors */
296  /** Number of data descriptors */
298  /** Number of completion descriptors */
300  /** Driver-private data length */
302  /** Interrupt index */
304  /** Reserved */
306 } __attribute__ (( packed ));
307 
308 /** Transmit queue statistics */
310  /** Reserved */
312 } __attribute__ (( packed ));
313 
314 /** Receive descriptor */
316  /** Address */
318  /** Flags */
320  /** Reserved */
322 } __attribute__ (( packed ));
323 
324 /** Receive generation flag */
325 #define VMXNET3_RXF_GEN 0x80000000UL
326 
327 /** Receive completion descriptor */
329  /** Descriptor index */
331  /** RSS hash value */
333  /** Length */
335  /** Flags */
337 } __attribute__ (( packed ));
338 
339 /** Receive completion generation flag */
340 #define VMXNET3_RXCF_GEN 0x80000000UL
341 
342 /** Receive queue control */
347 } __attribute__ (( packed ));
348 
349 /** Receive queue configuration */
351  /** Descriptor ring addresses */
353  /** Completion ring address */
355  /** Driver-private data address */
357  /** Reserved */
359  /** Number of descriptors */
361  /** Number of completion descriptors */
363  /** Driver-private data length */
365  /** Interrupt index */
367  /** Reserved */
369 } __attribute__ (( packed ));
370 
371 /** Receive queue statistics */
373  /** Reserved */
375 } __attribute__ (( packed ));
376 
377 /** Queue status */
382 } __attribute__ (( packed ));
383 
384 /** Transmit queue descriptor */
391 } __attribute__ (( packed ));
392 
393 /** Receive queue descriptor */
400 } __attribute__ (( packed ));
401 
402 /**
403  * Queue descriptor set
404  *
405  * We use only a single TX and RX queue
406  */
408  /** Transmit queue descriptor(s) */
410  /** Receive queue descriptor(s) */
412 } __attribute__ (( packed ));
413 
414 /** Alignment of queue descriptor set */
415 #define VMXNET3_QUEUES_ALIGN 128
416 
417 /** Alignment of rings */
418 #define VMXNET3_RING_ALIGN 512
419 
420 /** Number of TX descriptors */
421 #define VMXNET3_NUM_TX_DESC 32
422 
423 /** Number of TX completion descriptors */
424 #define VMXNET3_NUM_TX_COMP 32
425 
426 /** Number of RX descriptors */
427 #define VMXNET3_NUM_RX_DESC 32
428 
429 /** Number of RX completion descriptors */
430 #define VMXNET3_NUM_RX_COMP 32
431 
432 /**
433  * DMA areas
434  *
435  * These are arranged in order of decreasing alignment, to allow for a
436  * single allocation
437  */
438 struct vmxnet3_dma {
439  /** TX descriptor ring */
441  /** TX completion ring */
443  /** RX descriptor ring */
445  /** RX completion ring */
447  /** Queue descriptors */
449  /** Shared area */
451 } __attribute__ (( packed ));
452 
453 /** DMA area alignment */
454 #define VMXNET3_DMA_ALIGN 512
455 
456 /** Producer and consumer counters */
458  /** Transmit producer counter */
459  unsigned int tx_prod;
460  /** Transmit completion consumer counter */
461  unsigned int tx_cons;
462  /** Receive producer counter */
463  unsigned int rx_prod;
464  /** Receive fill level */
465  unsigned int rx_fill;
466  /** Receive consumer counter */
467  unsigned int rx_cons;
468 };
469 
470 /** A vmxnet3 NIC */
471 struct vmxnet3_nic {
472  /** "PT" register base address */
473  void *pt;
474  /** "VD" register base address */
475  void *vd;
476 
477  /** DMA area */
478  struct vmxnet3_dma *dma;
479  /** Producer and consumer counters */
481  /** Transmit I/O buffers */
483  /** Receive I/O buffers */
485 };
486 
487 /** vmxnet3 version that we support */
488 #define VMXNET3_VERSION_SELECT 1
489 
490 /** UPT version that we support */
491 #define VMXNET3_UPT_VERSION_SELECT 1
492 
493 /** MTU size */
494 #define VMXNET3_MTU ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* FCS */ )
495 
496 /** Transmit ring maximum fill level */
497 #define VMXNET3_TX_FILL ( VMXNET3_NUM_TX_DESC - 1 )
498 
499 /** Receive ring maximum fill level */
500 #define VMXNET3_RX_FILL 8
501 
502 /** Received packet alignment padding */
503 #define NET_IP_ALIGN 2
504 
505 #endif /* _VMXNET3_H */
uint64_t upt_features
UPT features supported.
Definition: vmxnet3.h:148
vmxnet3_event
Events.
Definition: vmxnet3.h:129
struct vmxnet3_tx_queue_config cfg
Definition: vmxnet3.h:387
struct vmxnet3_rx_queue_config cfg
Definition: vmxnet3.h:396
uint32_t driver_data_len
Driver-private data length.
Definition: vmxnet3.h:364
Receive queue configuration.
Definition: vmxnet3.h:350
uint32_t driver_data_len
Driver-private data length.
Definition: vmxnet3.h:301
#define __attribute__(x)
Definition: compiler.h:10
Driver shared area.
Definition: vmxnet3.h:216
unsigned short uint16_t
Definition: stdint.h:11
uint16_t max_num_rx_sg
Maximum number of RX scatter-gather.
Definition: vmxnet3.h:160
vmxnet3_rx_filter_mode
Receive filter mode.
Definition: vmxnet3.h:200
Broadcast only.
Definition: vmxnet3.h:203
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
void * vd
"VD" register base address
Definition: vmxnet3.h:475
Transmit descriptor.
Definition: vmxnet3.h:246
struct vmxnet3_rx_queue_control ctrl
Definition: vmxnet3.h:395
uint8_t intr_index
Interrupt index.
Definition: vmxnet3.h:366
uint64_t driver_data_address
Driver-private data address.
Definition: vmxnet3.h:291
#define VMXNET3_MAX_INTRS
Maximum number of interrupts.
Definition: vmxnet3.h:45
uint32_t version_support
Version supported.
Definition: vmxnet3.h:144
Queue status.
Definition: vmxnet3.h:378
Receive filter configuration.
Definition: vmxnet3.h:186
uint64_t desc_address
Descriptor ring address.
Definition: vmxnet3.h:285
Receive queue statistics.
Definition: vmxnet3.h:372
Transmit queue statistics.
Definition: vmxnet3.h:309
uint8_t moderation_level[VMXNET3_MAX_INTRS]
Definition: vmxnet3.h:177
struct vmxnet3_rx_comp rx_comp[VMXNET3_NUM_RX_COMP]
RX completion ring.
Definition: vmxnet3.h:446
Receive descriptor.
Definition: vmxnet3.h:315
Unicast only.
Definition: vmxnet3.h:201
uint8_t num_rx_queues
Number of RX queues.
Definition: vmxnet3.h:164
struct vmxnet3_interrupt_config interrupt
Interrupt configuration.
Definition: vmxnet3.h:224
unsigned int rx_fill
Receive fill level.
Definition: vmxnet3.h:465
#define VMXNET3_NUM_TX_DESC
Number of TX descriptors.
Definition: vmxnet3.h:421
unsigned int tx_prod
Transmit producer counter.
Definition: vmxnet3.h:459
unsigned long long uint64_t
Definition: stdint.h:13
struct vmxnet3_dma * dma
DMA area.
Definition: vmxnet3.h:478
uint32_t reserved0
Reserved.
Definition: vmxnet3.h:321
uint32_t flags
Flags.
Definition: vmxnet3.h:269
struct vmxnet3_tx_stats state
Definition: vmxnet3.h:389
Producer and consumer counters.
Definition: vmxnet3.h:457
uint64_t reserved0
Reserved.
Definition: vmxnet3.h:358
uint32_t num_desc
Number of descriptors.
Definition: vmxnet3.h:295
uint16_t reserved0
Reserved.
Definition: vmxnet3.h:192
Interrupt configuration.
Definition: vmxnet3.h:173
uint8_t vlan_filter[512]
VLAN filter table (one bit per possible VLAN)
Definition: vmxnet3.h:196
uint32_t index
Index of the end-of-packet descriptor.
Definition: vmxnet3.h:265
uint32_t reserved0
Reserved.
Definition: vmxnet3.h:220
Miscellaneous configuration descriptor.
Definition: vmxnet3.h:138
uint32_t upt_version_support
UPT version supported.
Definition: vmxnet3.h:146
uint32_t mtu
Maximum transmission unit.
Definition: vmxnet3.h:158
uint32_t reserved1[5]
Reserved.
Definition: vmxnet3.h:236
uint32_t reserved0[2]
Definition: vmxnet3.h:179
#define VMXNET3_NUM_TX_COMP
Number of TX completion descriptors.
Definition: vmxnet3.h:424
uint64_t reserved0
Reserved.
Definition: vmxnet3.h:293
uint32_t rss
RSS hash value.
Definition: vmxnet3.h:332
uint8_t reserved0[7]
Definition: vmxnet3.h:345
uint64_t queue_desc_address
Queue descriptors data address.
Definition: vmxnet3.h:152
uint32_t queue_desc_len
Queue descriptors data length.
Definition: vmxnet3.h:156
uint8_t reserved0[3]
Definition: vmxnet3.h:380
uint32_t flags[2]
Flags.
Definition: vmxnet3.h:250
struct vmxnet3_variable_config rss
RSS configuration.
Definition: vmxnet3.h:228
struct io_buffer * tx_iobuf[VMXNET3_NUM_TX_DESC]
Transmit I/O buffers.
Definition: vmxnet3.h:482
Transmit queue control.
Definition: vmxnet3.h:276
uint32_t guest_info
Guest information.
Definition: vmxnet3.h:142
All multicast.
Definition: vmxnet3.h:204
struct vmxnet3_queues queues
Queue descriptors.
Definition: vmxnet3.h:448
uint32_t num_desc[2]
Number of descriptors.
Definition: vmxnet3.h:360
uint32_t mode
Receive filter mode.
Definition: vmxnet3.h:188
struct vmxnet3_queue_status status
Definition: vmxnet3.h:397
Promiscuous.
Definition: vmxnet3.h:205
vmxnet3_command
Commands.
Definition: vmxnet3.h:102
struct vmxnet3_rx_filter_config rx_filter
Receive filter configuration.
Definition: vmxnet3.h:226
Receive queue control.
Definition: vmxnet3.h:343
uint16_t multicast_len
Multicast filter table length.
Definition: vmxnet3.h:190
Receive queue descriptor.
Definition: vmxnet3.h:394
uint8_t reserved[7]
Reserved.
Definition: vmxnet3.h:368
Transmit queue descriptor.
Definition: vmxnet3.h:385
DMA areas.
Definition: vmxnet3.h:438
PCI bus.
struct vmxnet3_queue_status status
Definition: vmxnet3.h:388
uint32_t num_comp
Number of completion descriptors.
Definition: vmxnet3.h:299
unsigned char uint8_t
Definition: stdint.h:10
Transmit queue configuration.
Definition: vmxnet3.h:283
uint64_t comp_address
Completion ring address.
Definition: vmxnet3.h:289
unsigned int uint32_t
Definition: stdint.h:12
uint32_t flags
Flags.
Definition: vmxnet3.h:336
#define VMXNET3_NUM_RX_COMP
Number of RX completion descriptors.
Definition: vmxnet3.h:430
struct vmxnet3_tx_queue_control ctrl
Definition: vmxnet3.h:386
uint64_t immediate_address
Data ring address.
Definition: vmxnet3.h:287
Definition: dmfe.c:137
struct vmxnet3_rx_queue rx
Receive queue descriptor(s)
Definition: vmxnet3.h:411
uint64_t desc_address[2]
Descriptor ring addresses.
Definition: vmxnet3.h:352
uint64_t address
Address.
Definition: vmxnet3.h:317
uint32_t reserved0[4]
Reserved.
Definition: vmxnet3.h:166
uint32_t reserved0[2]
Reserved.
Definition: vmxnet3.h:267
unsigned int rx_cons
Receive consumer counter.
Definition: vmxnet3.h:467
void * pt
"PT" register base address
Definition: vmxnet3.h:473
struct vmxnet3_rx_stats stats
Definition: vmxnet3.h:398
Queue descriptor set.
Definition: vmxnet3.h:407
struct vmxnet3_variable_config plugin
Plugin configuration.
Definition: vmxnet3.h:232
struct io_buffer * rx_iobuf[VMXNET3_NUM_RX_DESC]
Receive I/O buffers.
Definition: vmxnet3.h:484
unsigned int rx_prod
Receive producer counter.
Definition: vmxnet3.h:463
uint64_t driver_data_address
Driver-private data address.
Definition: vmxnet3.h:150
struct vmxnet3_tx_queue tx
Transmit queue descriptor(s)
Definition: vmxnet3.h:409
uint8_t intr_index
Interrupt index.
Definition: vmxnet3.h:303
struct vmxnet3_misc_config misc
Miscellaneous configuration.
Definition: vmxnet3.h:222
uint32_t flags
Flags.
Definition: vmxnet3.h:319
uint32_t index
Descriptor index.
Definition: vmxnet3.h:330
uint64_t reserved[10]
Reserved.
Definition: vmxnet3.h:311
Definition: dmfe.c:143
uint64_t reserved[10]
Reserved.
Definition: vmxnet3.h:374
Variable-length configuration descriptor.
Definition: vmxnet3.h:209
uint64_t address
Address.
Definition: vmxnet3.h:248
uint8_t num_tx_queues
Number of TX queues.
Definition: vmxnet3.h:162
unsigned int tx_cons
Transmit completion consumer counter.
Definition: vmxnet3.h:461
uint8_t reserved[88]
Definition: vmxnet3.h:390
struct vmxnet3_tx_comp tx_comp[VMXNET3_NUM_TX_COMP]
TX completion ring.
Definition: vmxnet3.h:442
uint32_t magic
Magic signature.
Definition: vmxnet3.h:218
uint8_t reserved[7]
Reserved.
Definition: vmxnet3.h:305
uint8_t reserved[88]
Definition: vmxnet3.h:399
Transmit completion descriptor.
Definition: vmxnet3.h:263
uint64_t driver_data_address
Driver-private data address.
Definition: vmxnet3.h:356
uint64_t multicast_address
Multicast filter table address.
Definition: vmxnet3.h:194
struct vmxnet3_counters count
Producer and consumer counters.
Definition: vmxnet3.h:480
#define VMXNET3_NUM_RX_DESC
Number of RX descriptors.
Definition: vmxnet3.h:427
uint32_t driver_data_len
Driver-private data length.
Definition: vmxnet3.h:154
struct vmxnet3_shared shared
Shared area.
Definition: vmxnet3.h:450
uint32_t num_immediate
Number of data descriptors.
Definition: vmxnet3.h:297
Multicast passing the filters.
Definition: vmxnet3.h:202
uint32_t ecr
Event notifications.
Definition: vmxnet3.h:234
A vmxnet3 NIC.
Definition: vmxnet3.h:471
uint32_t len
Length.
Definition: vmxnet3.h:334
Receive completion descriptor.
Definition: vmxnet3.h:328
uint32_t num_comp
Number of completion descriptors.
Definition: vmxnet3.h:362
struct vmxnet3_variable_config pattern
Pattern-matching configuration.
Definition: vmxnet3.h:230
uint32_t version
Driver version.
Definition: vmxnet3.h:140
uint64_t comp_address
Completion ring address.
Definition: vmxnet3.h:354
A persistent I/O buffer.
Definition: iobuf.h:32