iPXE
3c515.c
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00001 /*
00002 *    3c515.c -- 3COM 3C515 Fast Etherlink ISA 10/100BASE-TX driver for etherboot
00003 *    Copyright (C) 2002 Timothy Legge <tlegge@rogers.com>
00004 *
00005 *    This program is free software; you can redistribute it and/or modify
00006 *    it under the terms of the GNU General Public License as published by
00007 *    the Free Software Foundation; either version 2 of the License, or
00008 *    (at your option) any later version.
00009 *
00010 *    This program is distributed in the hope that it will be useful,
00011 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
00012 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00013 *    GNU General Public License for more details.
00014 *
00015 *    You should have received a copy of the GNU General Public License
00016 *    along with this program; if not, write to the Free Software
00017 *    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
00018 *    02110-1301, USA.
00019 *
00020 * Portions of this code:
00021 * Copyright (C) 1997-2002 Donald Becker  3c515.c: A 3Com ISA EtherLink XL "Corkscrew" ethernet driver for linux.
00022 * Copyright (C) 2001 P.J.H.Fox (fox@roestock.demon.co.uk) ISAPNP Tools
00023 * Copyright (c) 2002 Jaroslav Kysela <perex@suse.cz>  ISA Plug & Play support Linux Kernel
00024 * Copyright (C) 2000 Shusuke Nisiyama <shu@athena.qe.eng.hokudai.ac.jp> etherboot-5.0.5 3c595.c
00025 * Coptright (C) 1995 Martin Renters etherboot-5.0.5 3c509.c
00026 * Copyright (C) 1999 LightSys Technology Services, Inc. etherboot-5.0.5 3c90x.c
00027 * Portions Copyright (C) 1999 Steve Smith etherboot-5.0.5 3c90x.c
00028 *
00029 * The probe and reset functions and defines are direct copies from the
00030 * Becker code modified where necessary to make it work for etherboot
00031 *
00032 * The poll and transmit functions either contain code from or were written by referencing
00033 * the above referenced etherboot drivers.  This driver would not have been
00034 * possible without this prior work
00035 *
00036 * REVISION HISTORY:
00037 * ================
00038 * v0.10 4-17-2002       TJL     Initial implementation.
00039 * v0.11 4-17-2002       TJL     Cleanup of the code
00040 * v0.12 4-26-2002       TJL     Added ISA Plug and Play for Non-PNP Bioses
00041 * v0.13 6-10-2002       TJL     Fixed ISA_PNP MAC Address problem
00042 * v0.14 9-23-2003       TJL     Replaced delay with currticks
00043 *
00044 * Indent Options: indent -kr -i8
00045 * *********************************************************/
00046 
00047 FILE_LICENCE ( GPL2_OR_LATER );
00048 
00049 /* to get some global routines like printf */
00050 #include "etherboot.h"
00051 /* to get the interface to the body of the program */
00052 #include "nic.h"
00053 #include <ipxe/isapnp.h>
00054 #include <ipxe/isa.h> /* for ISA_ROM */
00055 #include <ipxe/ethernet.h>
00056 
00057 static void t3c515_wait(unsigned int nticks)
00058 {
00059         unsigned int to = currticks() + nticks;
00060         while (currticks() < to)
00061                 /* wait */ ;
00062 }
00063 
00064 /* TJL definations */
00065 #define HZ      100
00066 static int if_port;
00067 static struct corkscrew_private *vp;
00068 /* Brought directly from 3c515.c by Becker */
00069 #define CORKSCREW 1
00070 
00071 /* Maximum events (Rx packets, etc.) to handle at each interrupt.
00072 static int max_interrupt_work = 20;
00073 */
00074 
00075 /* Enable the automatic media selection code -- usually set. */
00076 #define AUTOMEDIA 1
00077 
00078 /* Allow the use of fragment bus master transfers instead of only
00079    programmed-I/O for Vortex cards.  Full-bus-master transfers are always
00080    enabled by default on Boomerang cards.  If VORTEX_BUS_MASTER is defined,
00081    the feature may be turned on using 'options'. */
00082 #define VORTEX_BUS_MASTER
00083 
00084 /* A few values that may be tweaked. */
00085 /* Keep the ring sizes a power of two for efficiency. */
00086 #define TX_RING_SIZE    16
00087 #define RX_RING_SIZE    16
00088 #define PKT_BUF_SZ              1536    /* Size of each temporary Rx buffer. */
00089 
00090 /* "Knobs" for adjusting internal parameters. */
00091 /* Put out somewhat more debugging messages. (0 - no msg, 1 minimal msgs). */
00092 #define DRIVER_DEBUG 1
00093 /* Some values here only for performance evaluation and path-coverage
00094    debugging.
00095 static int rx_nocopy, rx_copy, queued_packet;
00096 */
00097 
00098 #define CORKSCREW_ID 10
00099 
00100 #define EL3WINDOW(win_num) \
00101         outw(SelectWindow + (win_num), nic->ioaddr + EL3_CMD)
00102 #define EL3_CMD 0x0e
00103 #define EL3_STATUS 0x0e
00104 #define RX_BYTES_MASK                   (unsigned short) (0x07ff)
00105 
00106 enum corkscrew_cmd {
00107         TotalReset = 0 << 11, SelectWindow = 1 << 11, StartCoax = 2 << 11,
00108         RxDisable = 3 << 11, RxEnable = 4 << 11, RxReset = 5 << 11,
00109         UpStall = 6 << 11, UpUnstall = (6 << 11) + 1,
00110         DownStall = (6 << 11) + 2, DownUnstall = (6 << 11) + 3,
00111         RxDiscard = 8 << 11, TxEnable = 9 << 11, TxDisable =
00112             10 << 11, TxReset = 11 << 11,
00113         FakeIntr = 12 << 11, AckIntr = 13 << 11, SetIntrEnb = 14 << 11,
00114         SetStatusEnb = 15 << 11, SetRxFilter = 16 << 11, SetRxThreshold =
00115             17 << 11,
00116         SetTxThreshold = 18 << 11, SetTxStart = 19 << 11,
00117         StartDMAUp = 20 << 11, StartDMADown = (20 << 11) + 1, StatsEnable =
00118             21 << 11,
00119         StatsDisable = 22 << 11, StopCoax = 23 << 11,
00120 };
00121 
00122 /* The SetRxFilter command accepts the following classes: */
00123 enum RxFilter {
00124         RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8
00125 };
00126 
00127 /* Bits in the general status register. */
00128 enum corkscrew_status {
00129         IntLatch = 0x0001, AdapterFailure = 0x0002, TxComplete = 0x0004,
00130         TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
00131         IntReq = 0x0040, StatsFull = 0x0080,
00132         DMADone = 1 << 8, DownComplete = 1 << 9, UpComplete = 1 << 10,
00133         DMAInProgress = 1 << 11,        /* DMA controller is still busy. */
00134         CmdInProgress = 1 << 12,        /* EL3_CMD is still busy. */
00135 };
00136 
00137 /* Register window 1 offsets, the window used in normal operation.
00138    On the Corkscrew this window is always mapped at offsets 0x10-0x1f. */
00139 enum Window1 {
00140         TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
00141         RxStatus = 0x18, Timer = 0x1A, TxStatus = 0x1B,
00142         TxFree = 0x1C,          /* Remaining free bytes in Tx buffer. */
00143 };
00144 enum Window0 {
00145         Wn0IRQ = 0x08,
00146 #if defined(CORKSCREW)
00147         Wn0EepromCmd = 0x200A,  /* Corkscrew EEPROM command register. */
00148         Wn0EepromData = 0x200C, /* Corkscrew EEPROM results register. */
00149 #else
00150         Wn0EepromCmd = 10,      /* Window 0: EEPROM command register. */
00151         Wn0EepromData = 12,     /* Window 0: EEPROM results register. */
00152 #endif
00153 };
00154 enum Win0_EEPROM_bits {
00155         EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
00156         EEPROM_EWENB = 0x30,    /* Enable erasing/writing for 10 msec. */
00157         EEPROM_EWDIS = 0x00,    /* Disable EWENB before 10 msec timeout. */
00158 };
00159 
00160 enum Window3 {                  /* Window 3: MAC/config bits. */
00161         Wn3_Config = 0, Wn3_MAC_Ctrl = 6, Wn3_Options = 8,
00162 };
00163 union wn3_config {
00164         int i;
00165         struct w3_config_fields {
00166                 unsigned int ram_size:3, ram_width:1, ram_speed:2,
00167                     rom_size:2;
00168                 int pad8:8;
00169                 unsigned int ram_split:2, pad18:2, xcvr:3, pad21:1,
00170                     autoselect:1;
00171                 int pad24:7;
00172         } u;
00173 };
00174 
00175 enum Window4 {
00176         Wn4_NetDiag = 6, Wn4_Media = 10,        /* Window 4: Xcvr/media bits. */
00177 };
00178 enum Win4_Media_bits {
00179         Media_SQE = 0x0008,     /* Enable SQE error counting for AUI. */
00180         Media_10TP = 0x00C0,    /* Enable link beat and jabber for 10baseT. */
00181         Media_Lnk = 0x0080,     /* Enable just link beat for 100TX/100FX. */
00182         Media_LnkBeat = 0x0800,
00183 };
00184 enum Window7 {                  /* Window 7: Bus Master control. */
00185         Wn7_MasterAddr = 0, Wn7_MasterLen = 6, Wn7_MasterStatus = 12,
00186 };
00187 
00188 /* Boomerang-style bus master control registers.  Note ISA aliases! */
00189 enum MasterCtrl {
00190         PktStatus = 0x400, DownListPtr = 0x404, FragAddr = 0x408, FragLen =
00191             0x40c,
00192         TxFreeThreshold = 0x40f, UpPktStatus = 0x410, UpListPtr = 0x418,
00193 };
00194 
00195 /* The Rx and Tx descriptor lists.
00196    Caution Alpha hackers: these types are 32 bits!  Note also the 8 byte
00197    alignment contraint on tx_ring[] and rx_ring[]. */
00198 struct boom_rx_desc {
00199         u32 next;
00200         s32 status;
00201         u32 addr;
00202         s32 length;
00203 };
00204 
00205 /* Values for the Rx status entry. */
00206 enum rx_desc_status {
00207         RxDComplete = 0x00008000, RxDError = 0x4000,
00208         /* See boomerang_rx() for actual error bits */
00209 };
00210 
00211 struct boom_tx_desc {
00212         u32 next;
00213         s32 status;
00214         u32 addr;
00215         s32 length;
00216 };
00217 
00218 struct corkscrew_private {
00219         const char *product_name;
00220         struct net_device *next_module;
00221         /* The Rx and Tx rings are here to keep them quad-word-aligned. */
00222         struct boom_rx_desc rx_ring[RX_RING_SIZE];
00223         struct boom_tx_desc tx_ring[TX_RING_SIZE];
00224         /* The addresses of transmit- and receive-in-place skbuffs. */
00225         struct sk_buff *rx_skbuff[RX_RING_SIZE];
00226         struct sk_buff *tx_skbuff[TX_RING_SIZE];
00227         unsigned int cur_rx, cur_tx;    /* The next free ring entry */
00228         unsigned int dirty_rx, dirty_tx;        /* The ring entries to be free()ed. */
00229         struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl.  */
00230         int capabilities;       /* Adapter capabilities word. */
00231         int options;            /* User-settable misc. driver options. */
00232         int last_rx_packets;    /* For media autoselection. */
00233         unsigned int available_media:8, /* From Wn3_Options */
00234          media_override:3,      /* Passed-in media type. */
00235          default_media:3,       /* Read from the EEPROM. */
00236          full_duplex:1, autoselect:1, bus_master:1,     /* Vortex can only do a fragment bus-m. */
00237          full_bus_master_tx:1, full_bus_master_rx:1,    /* Boomerang  */
00238          tx_full:1;
00239 };
00240 
00241 /* The action to take with a media selection timer tick.
00242    Note that we deviate from the 3Com order by checking 10base2 before AUI.
00243  */
00244 enum xcvr_types {
00245         XCVR_10baseT =
00246             0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
00247         XCVR_100baseFx, XCVR_MII = 6, XCVR_Default = 8,
00248 };
00249 
00250 static struct media_table {
00251         char *name;
00252         unsigned int media_bits:16,     /* Bits to set in Wn4_Media register. */
00253          mask:8,                /* The transceiver-present bit in Wn3_Config. */
00254          next:8;                /* The media type to try next. */
00255         short wait;             /* Time before we check media status. */
00256 } media_tbl[] = {
00257         {
00258         "10baseT", Media_10TP, 0x08, XCVR_10base2, (14 * HZ) / 10}
00259         , {
00260         "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1 * HZ) / 10}
00261         , {
00262         "undefined", 0, 0x80, XCVR_10baseT, 10000}
00263         , {
00264         "10base2", 0, 0x10, XCVR_AUI, (1 * HZ) / 10}
00265         , {
00266         "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx,
00267                     (14 * HZ) / 10}
00268         , {
00269         "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14 * HZ) / 10}
00270         , {
00271         "MII", 0, 0x40, XCVR_10baseT, 3 * HZ}
00272         , {
00273         "undefined", 0, 0x01, XCVR_10baseT, 10000}
00274         , {
00275         "Default", 0, 0xFF, XCVR_10baseT, 10000}
00276 ,};
00277 
00278 /* TILEG Modified to remove reference to dev */
00279 static int corkscrew_found_device(int ioaddr, int irq, int product_index,
00280                                   int options, struct nic *nic);
00281 static int corkscrew_probe1(int ioaddr, int irq, int product_index,
00282                             struct nic *nic);
00283 
00284 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
00285 /* Note: this is the only limit on the number of cards supported!! */
00286 static int options = -1;
00287 
00288 /* End Brought directly from 3c515.c by Becker */
00289 
00290 /**************************************************************************
00291 RESET - Reset adapter
00292 ***************************************************************************/
00293 static void t515_reset(struct nic *nic)
00294 {
00295         union wn3_config config;
00296         int i;
00297 
00298         /* Before initializing select the active media port. */
00299         EL3WINDOW(3);
00300         if (vp->full_duplex)
00301                 outb(0x20, nic->ioaddr + Wn3_MAC_Ctrl); /* Set the full-duplex bit. */
00302         config.i = inl(nic->ioaddr + Wn3_Config);
00303 
00304         if (vp->media_override != 7) {
00305                 DBG ( "Media override to transceiver %d (%s).\n",
00306                       vp->media_override,
00307                       media_tbl[vp->media_override].name);
00308                 if_port = vp->media_override;
00309         } else if (vp->autoselect) {
00310                 /* Find first available media type, starting with 100baseTx. */
00311                 if_port = 4;
00312                 while (!(vp->available_media & media_tbl[if_port].mask))
00313                         if_port = media_tbl[if_port].next;
00314 
00315                 DBG ( "Initial media type %s.\n",
00316                       media_tbl[if_port].name);
00317         } else
00318                 if_port = vp->default_media;
00319 
00320         config.u.xcvr = if_port;
00321         outl(config.i, nic->ioaddr + Wn3_Config);
00322 
00323         DBG ( "corkscrew_open() InternalConfig 0x%hX.\n",
00324               config.i);
00325 
00326         outw(TxReset, nic->ioaddr + EL3_CMD);
00327         for (i = 20; i >= 0; i--)
00328                 if (!(inw(nic->ioaddr + EL3_STATUS) & CmdInProgress))
00329                         break;
00330 
00331         outw(RxReset, nic->ioaddr + EL3_CMD);
00332         /* Wait a few ticks for the RxReset command to complete. */
00333         for (i = 20; i >= 0; i--)
00334                 if (!(inw(nic->ioaddr + EL3_STATUS) & CmdInProgress))
00335                         break;
00336 
00337         outw(SetStatusEnb | 0x00, nic->ioaddr + EL3_CMD);
00338 
00339 #ifdef debug_3c515
00340                 EL3WINDOW(4);
00341                 DBG ( "FIXME: fix print for irq, not 9" );
00342                 DBG ( "corkscrew_open() irq %d media status 0x%hX.\n",
00343                       9, inw(nic->ioaddr + Wn4_Media) );
00344 #endif
00345 
00346         /* Set the station address and mask in window 2 each time opened. */
00347         EL3WINDOW(2);
00348         for (i = 0; i < 6; i++)
00349                 outb(nic->node_addr[i], nic->ioaddr + i);
00350         for (; i < 12; i += 2)
00351                 outw(0, nic->ioaddr + i);
00352 
00353         if (if_port == 3)
00354                 /* Start the thinnet transceiver. We should really wait 50ms... */
00355                 outw(StartCoax, nic->ioaddr + EL3_CMD);
00356         EL3WINDOW(4);
00357         outw((inw(nic->ioaddr + Wn4_Media) & ~(Media_10TP | Media_SQE)) |
00358              media_tbl[if_port].media_bits, nic->ioaddr + Wn4_Media);
00359 
00360         /* Switch to the stats window, and clear all stats by reading. */
00361 /*      outw(StatsDisable, nic->ioaddr + EL3_CMD);*/
00362         EL3WINDOW(6);
00363         for (i = 0; i < 10; i++)
00364                 inb(nic->ioaddr + i);
00365         inw(nic->ioaddr + 10);
00366         inw(nic->ioaddr + 12);
00367         /* New: On the Vortex we must also clear the BadSSD counter. */
00368         EL3WINDOW(4);
00369         inb(nic->ioaddr + 12);
00370         /* ..and on the Boomerang we enable the extra statistics bits. */
00371         outw(0x0040, nic->ioaddr + Wn4_NetDiag);
00372 
00373         /* Switch to register set 7 for normal use. */
00374         EL3WINDOW(7);
00375 
00376         /* Temporarily left in place.  If these FIXMEs are printed
00377            it meand that special logic for that card may need to be added
00378            see Becker's 3c515.c driver */
00379         if (vp->full_bus_master_rx) {   /* Boomerang bus master. */
00380                 printf("FIXME: Is this if necessary");
00381                 vp->cur_rx = vp->dirty_rx = 0;
00382                 DBG ( "   Filling in the Rx ring.\n" );
00383                 for (i = 0; i < RX_RING_SIZE; i++) {
00384                         printf("FIXME: Is this if necessary");
00385                 }
00386         }
00387         if (vp->full_bus_master_tx) {   /* Boomerang bus master Tx. */
00388                 vp->cur_tx = vp->dirty_tx = 0;
00389                 outb(PKT_BUF_SZ >> 8, nic->ioaddr + TxFreeThreshold);   /* Room for a packet. */
00390                 /* Clear the Tx ring. */
00391                 for (i = 0; i < TX_RING_SIZE; i++)
00392                         vp->tx_skbuff[i] = NULL;
00393                 outl(0, nic->ioaddr + DownListPtr);
00394         }
00395         /* Set receiver mode: presumably accept b-case and phys addr only. */
00396         outw(SetRxFilter | RxStation | RxMulticast | RxBroadcast | RxProm,
00397              nic->ioaddr + EL3_CMD);
00398 
00399         outw(RxEnable, nic->ioaddr + EL3_CMD);  /* Enable the receiver. */
00400         outw(TxEnable, nic->ioaddr + EL3_CMD);  /* Enable transmitter. */
00401         /* Allow status bits to be seen. */
00402         outw(SetStatusEnb | AdapterFailure | IntReq | StatsFull |
00403              (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
00404              (vp->full_bus_master_rx ? UpComplete : RxComplete) |
00405              (vp->bus_master ? DMADone : 0), nic->ioaddr + EL3_CMD);
00406         /* Ack all pending events, and set active indicator mask. */
00407         outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
00408              nic->ioaddr + EL3_CMD);
00409         outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete | StatsFull
00410              | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete,
00411              nic->ioaddr + EL3_CMD);
00412 
00413 }
00414 
00415 /**************************************************************************
00416 POLL - Wait for a frame
00417 ***************************************************************************/
00418 static int t515_poll(struct nic *nic, int retrieve)
00419 {
00420         short status, cst;
00421         register short rx_fifo;
00422 
00423         cst = inw(nic->ioaddr + EL3_STATUS);
00424 
00425         if ((cst & RxComplete) == 0) {
00426                 /* Ack all pending events, and set active indicator mask. */
00427                 outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
00428                      nic->ioaddr + EL3_CMD);
00429                 outw(SetIntrEnb | IntLatch | TxAvailable | RxComplete |
00430                      StatsFull | (vp->
00431                                   bus_master ? DMADone : 0) | UpComplete |
00432                      DownComplete, nic->ioaddr + EL3_CMD);
00433                 return 0;
00434         }
00435         status = inw(nic->ioaddr + RxStatus);
00436 
00437         if (status & RxDError) {
00438                 printf("RxDError\n");
00439                 outw(RxDiscard, nic->ioaddr + EL3_CMD);
00440                 return 0;
00441         }
00442 
00443         rx_fifo = status & RX_BYTES_MASK;
00444         if (rx_fifo == 0)
00445                 return 0;
00446 
00447         if ( ! retrieve ) return 1;
00448 
00449         DBG ( "[l=%d", rx_fifo );
00450         insw(nic->ioaddr + RX_FIFO, nic->packet, rx_fifo / 2);
00451         if (rx_fifo & 1)
00452                 nic->packet[rx_fifo - 1] = inb(nic->ioaddr + RX_FIFO);
00453         nic->packetlen = rx_fifo;
00454 
00455         while (1) {
00456                 status = inw(nic->ioaddr + RxStatus);
00457                 DBG ( "0x%hX*", status );
00458                 rx_fifo = status & RX_BYTES_MASK;
00459 
00460                 if (rx_fifo > 0) {
00461                         insw(nic->ioaddr + RX_FIFO, nic->packet + nic->packetlen,
00462                              rx_fifo / 2);
00463                         if (rx_fifo & 1)
00464                                 nic->packet[nic->packetlen + rx_fifo - 1] =
00465                                     inb(nic->ioaddr + RX_FIFO);
00466                         nic->packetlen += rx_fifo;
00467                         DBG ( "+%d", rx_fifo );
00468                 }
00469                 if ((status & RxComplete) == 0) {
00470                         DBG ( "=%d", nic->packetlen );
00471                         break;
00472                 }
00473                 udelay(1000);
00474         }
00475 
00476         /* acknowledge reception of packet */
00477         outw(RxDiscard, nic->ioaddr + EL3_CMD);
00478         while (inw(nic->ioaddr + EL3_STATUS) & CmdInProgress);
00479 #ifdef debug_3c515
00480         {
00481                 unsigned short type = 0;
00482                 type = (nic->packet[12] << 8) | nic->packet[13];
00483                 if (nic->packet[0] + nic->packet[1] + nic->packet[2] +
00484                     nic->packet[3] + nic->packet[4] + nic->packet[5] ==
00485                     0xFF * ETH_ALEN)
00486                         DBG ( ",t=0x%hX,b]", type );
00487                 else
00488                         DBG ( ",t=0x%hX]", type );
00489         }
00490 #endif
00491 
00492         return 1;
00493 }
00494 
00495 /*************************************************************************
00496         3Com 515 - specific routines
00497 **************************************************************************/
00498 static char padmap[] = {
00499         0, 3, 2, 1
00500 };
00501 /**************************************************************************
00502 TRANSMIT - Transmit a frame
00503 ***************************************************************************/
00504 static void t515_transmit(struct nic *nic, const char *d,       /* Destination */
00505                           unsigned int t,       /* Type */
00506                           unsigned int s,       /* size */
00507                           const char *p)
00508 {                               /* Packet */
00509         register int len;
00510         int pad;
00511         int status;
00512 
00513         DBG ( "{l=%d,t=0x%hX}", s + ETH_HLEN, t );
00514 
00515         /* swap bytes of type */
00516         t = htons(t);
00517 
00518         len = s + ETH_HLEN;     /* actual length of packet */
00519         pad = padmap[len & 3];
00520 
00521         /*
00522          * The 3c515 automatically pads short packets to minimum ethernet length,
00523          * but we drop packets that are too large. Perhaps we should truncate
00524          * them instead?
00525          Copied from 3c595.  Is this true for the 3c515?
00526          */
00527         if (len + pad > ETH_FRAME_LEN) {
00528                 return;
00529         }
00530         /* drop acknowledgements */
00531         while ((status = inb(nic->ioaddr + TxStatus)) & TxComplete) {
00532                 /*if(status & (TXS_UNDERRUN|0x88|TXS_STATUS_OVERFLOW)) { */
00533                 outw(TxReset, nic->ioaddr + EL3_CMD);
00534                 outw(TxEnable, nic->ioaddr + EL3_CMD);
00535 /*              }                                                          */
00536 
00537                 outb(0x0, nic->ioaddr + TxStatus);
00538         }
00539 
00540         while (inw(nic->ioaddr + TxFree) < len + pad + 4) {
00541                 /* no room in FIFO */
00542         }
00543 
00544         outw(len, nic->ioaddr + TX_FIFO);
00545         outw(0x0, nic->ioaddr + TX_FIFO);       /* Second dword meaningless */
00546 
00547         /* write packet */
00548         outsw(nic->ioaddr + TX_FIFO, d, ETH_ALEN / 2);
00549         outsw(nic->ioaddr + TX_FIFO, nic->node_addr, ETH_ALEN / 2);
00550         outw(t, nic->ioaddr + TX_FIFO);
00551         outsw(nic->ioaddr + TX_FIFO, p, s / 2);
00552 
00553         if (s & 1)
00554                 outb(*(p + s - 1), nic->ioaddr + TX_FIFO);
00555 
00556         while (pad--)
00557                 outb(0, nic->ioaddr + TX_FIFO); /* Padding */
00558 
00559         /* wait for Tx complete */
00560         while ((inw(nic->ioaddr + EL3_STATUS) & CmdInProgress) != 0);
00561 }
00562 
00563 /**************************************************************************
00564 DISABLE - Turn off ethernet interface
00565 ***************************************************************************/
00566 static void t515_disable ( struct nic *nic,
00567                            struct isapnp_device *isapnp ) {
00568 
00569         t515_reset(nic);
00570 
00571         /* This is a hack.  Since ltsp worked on my
00572            system without any disable functionality I
00573            have no way to determine if this works */
00574 
00575         /* Disable the receiver and transmitter. */
00576         outw(RxDisable, nic->ioaddr + EL3_CMD);
00577         outw(TxDisable, nic->ioaddr + EL3_CMD);
00578 
00579         if (if_port == XCVR_10base2)
00580                 /* Turn off thinnet power.  Green! */
00581                 outw(StopCoax, nic->ioaddr + EL3_CMD);
00582 
00583 
00584         outw(SetIntrEnb | 0x0000, nic->ioaddr + EL3_CMD);
00585 
00586         deactivate_isapnp_device ( isapnp );
00587         return;
00588 }
00589 
00590 static void t515_irq(struct nic *nic __unused, irq_action_t action __unused)
00591 {
00592   switch ( action ) {
00593   case DISABLE :
00594     break;
00595   case ENABLE :
00596     break;
00597   case FORCE :
00598     break;
00599   }
00600 }
00601 
00602 static struct nic_operations t515_operations = {
00603         .connect        = dummy_connect,
00604         .poll           = t515_poll,
00605         .transmit       = t515_transmit,
00606         .irq            = t515_irq,
00607 
00608 };
00609 
00610 /**************************************************************************
00611 PROBE - Look for an adapter, this routine's visible to the outside
00612 You should omit the last argument struct pci_device * for a non-PCI NIC
00613 ***************************************************************************/
00614 static int t515_probe ( struct nic *nic, struct isapnp_device *isapnp ) {
00615 
00616         /* Direct copy from Beckers 3c515.c removing any ISAPNP sections */
00617 
00618         nic->ioaddr = isapnp->ioaddr;
00619         nic->irqno = isapnp->irqno;
00620         activate_isapnp_device ( isapnp );
00621 
00622         /* Check the resource configuration for a matching ioaddr. */
00623         if ((unsigned)(inw(nic->ioaddr + 0x2002) & 0x1f0)
00624             != (nic->ioaddr & 0x1f0)) {
00625                 DBG ( "3c515 ioaddr mismatch\n" );
00626                 return 0;
00627         }
00628 
00629         /* Verify by reading the device ID from the EEPROM. */
00630         {
00631                 int timer;
00632                 outw(EEPROM_Read + 7, nic->ioaddr + Wn0EepromCmd);
00633                 /* Pause for at least 162 us. for the read to take place. */
00634                 for (timer = 4; timer >= 0; timer--) {
00635                         t3c515_wait(1);
00636                         if ((inw(nic->ioaddr + Wn0EepromCmd) & 0x0200) == 0)
00637                                 break;
00638                 }
00639                 if (inw(nic->ioaddr + Wn0EepromData) != 0x6d50) {
00640                         DBG ( "3c515 read incorrect vendor ID from EEPROM" );
00641                         return 0;
00642                 }
00643 
00644         }
00645         DBG ( "3c515 Resource configuration register 0x%X, DCR 0x%hX.\n",
00646               inl(nic->ioaddr + 0x2002), inw(nic->ioaddr + 0x2000) );
00647         corkscrew_found_device(nic->ioaddr, nic->irqno, CORKSCREW_ID,
00648                                options, nic);
00649         
00650         t515_reset(nic);        
00651         nic->nic_op     = &t515_operations;
00652         return 1;
00653 }
00654 
00655 static int
00656 corkscrew_found_device(int ioaddr, int irq,
00657                        int product_index, int options, struct nic *nic)
00658 {
00659         /* Direct copy from Becker 3c515.c with unnecessary parts removed */
00660         vp->product_name = "3c515";
00661         vp->options = options;
00662         if (options >= 0) {
00663                 vp->media_override =
00664                     ((options & 7) == 2) ? 0 : options & 7;
00665                 vp->full_duplex = (options & 8) ? 1 : 0;
00666                 vp->bus_master = (options & 16) ? 1 : 0;
00667         } else {
00668                 vp->media_override = 7;
00669                 vp->full_duplex = 0;
00670                 vp->bus_master = 0;
00671         }
00672 
00673         corkscrew_probe1(ioaddr, irq, product_index, nic);
00674         return 0;
00675 }
00676 
00677 static int
00678 corkscrew_probe1(int ioaddr, int irq, int product_index __unused,
00679                  struct nic *nic)
00680 {
00681         unsigned int eeprom[0x40], checksum = 0;        /* EEPROM contents */
00682         int i;
00683 
00684         printf("3Com %s at 0x%hX, ", vp->product_name, ioaddr);
00685 
00686         /* Read the station address from the EEPROM. */
00687         EL3WINDOW(0);
00688         for (i = 0; i < 0x18; i++) {
00689                 short *phys_addr = (short *) nic->node_addr;
00690                 int timer;
00691                 outw(EEPROM_Read + i, ioaddr + Wn0EepromCmd);
00692                 /* Pause for at least 162 us. for the read to take place. */
00693                 for (timer = 4; timer >= 0; timer--) {
00694                         t3c515_wait(1);
00695                         if ((inw(ioaddr + Wn0EepromCmd) & 0x0200) == 0)
00696                                 break;
00697                 }
00698                 eeprom[i] = inw(ioaddr + Wn0EepromData);
00699                 DBG ( "Value %d: %hX        ", i, eeprom[i] );
00700                 checksum ^= eeprom[i];
00701                 if (i < 3)
00702                         phys_addr[i] = htons(eeprom[i]);
00703         }
00704         checksum = (checksum ^ (checksum >> 8)) & 0xff;
00705         if (checksum != 0x00)
00706                 printf(" ***INVALID CHECKSUM 0x%hX*** ", checksum);
00707 
00708         DBG ( "%s", eth_ntoa ( nic->node_addr ) );
00709 
00710         if (eeprom[16] == 0x11c7) {     /* Corkscrew */
00711 
00712         }
00713         printf(", IRQ %d\n", irq);
00714         /* Tell them about an invalid IRQ. */
00715         if ( (irq <= 0 || irq > 15) ) {
00716                 DBG (" *** Warning: this IRQ is unlikely to work! ***\n" );
00717         }
00718 
00719         {
00720                 char *ram_split[] = { "5:3", "3:1", "1:1", "3:5" };
00721                 union wn3_config config;
00722                 EL3WINDOW(3);
00723                 vp->available_media = inw(ioaddr + Wn3_Options);
00724                 config.i = inl(ioaddr + Wn3_Config);
00725                 DBG ( "  Internal config register is %4.4x, "
00726                       "transceivers 0x%hX.\n",
00727                       config.i, inw(ioaddr + Wn3_Options) );
00728                 printf
00729                     ("  %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
00730                      8 << config.u.ram_size,
00731                      config.u.ram_width ? "word" : "byte",
00732                      ram_split[config.u.ram_split],
00733                      config.u.autoselect ? "autoselect/" : "",
00734                      media_tbl[config.u.xcvr].name);
00735                 if_port = config.u.xcvr;
00736                 vp->default_media = config.u.xcvr;
00737                 vp->autoselect = config.u.autoselect;
00738         }
00739         if (vp->media_override != 7) {
00740                 printf("  Media override to transceiver type %d (%s).\n",
00741                        vp->media_override,
00742                        media_tbl[vp->media_override].name);
00743                 if_port = vp->media_override;
00744         }
00745 
00746         vp->capabilities = eeprom[16];
00747         vp->full_bus_master_tx = (vp->capabilities & 0x20) ? 1 : 0;
00748         /* Rx is broken at 10mbps, so we always disable it. */
00749         /* vp->full_bus_master_rx = 0; */
00750         vp->full_bus_master_rx = (vp->capabilities & 0x20) ? 1 : 0;
00751 
00752         return 0;
00753 }
00754 
00755 static struct isapnp_device_id t515_adapters[] = {
00756         { "3c515 (ISAPnP)", ISAPNP_VENDOR('T','C','M'), 0x5051 },
00757 };
00758 
00759 ISAPNP_DRIVER ( t515_driver, t515_adapters );
00760 
00761 DRIVER ( "3c515", nic_driver, isapnp_driver, t515_driver,
00762          t515_probe, t515_disable );
00763 
00764 ISA_ROM ( "3c515", "3c515 Fast EtherLink ISAPnP" );