iPXE
Data Structures | Defines | Enumerations | Functions | Variables
natsemi.h File Reference

National Semiconductor "MacPhyter" network card driver. More...

#include <stdint.h>
#include <ipxe/spi.h>
#include <ipxe/spi_bit.h>

Go to the source code of this file.

Data Structures

struct  natsemi_descriptor_32
 A 32-bit packet descriptor. More...
struct  natsemi_descriptor_64
 A 64-bit packet descriptor. More...
union  natsemi_descriptor
 A packet descriptor. More...
struct  natsemi_ring
 A National Semiconductor descriptor ring. More...

Defines

#define NATSEMI_BAR_SIZE   0x100
 BAR size.
#define NATSEMI_DESC_SIZE_MASK   0xfff
 Descriptor buffer size mask.
#define NATSEMI_CR   0x0000
 Command Register.
#define NATSEMI_CR_RST   0x00000100UL
 Reset.
#define NATSEMI_CR_RXR   0x00000020UL
 Receiver reset.
#define NATSEMI_CR_TXR   0x00000010UL
 Transmit reset.
#define NATSEMI_CR_RXE   0x00000004UL
 Receiver enable.
#define NATSEMI_CR_TXE   0x00000001UL
 Transmit enable.
#define NATSEMI_RESET_MAX_WAIT_MS   100
 Maximum time to wait for a reset, in milliseconds.
#define NATSEMI_CFG   0x0004
 Configuration and Media Status Register.
#define NATSEMI_CFG_LNKSTS   0x80000000UL
 Link status.
#define NATSEMI_CFG_SPDSTS1   0x40000000UL
 Speed status bit 1.
#define NATSEMI_CFG_MODE_1000   0x00400000UL
 1000 Mb/s mode control
#define NATSEMI_CFG_PCI64_DET   0x00002000UL
 PCI 64-bit bus detected.
#define NATSEMI_CFG_DATA64_EN   0x00001000UL
 64-bit data enable
#define NATSEMI_CFG_M64ADDR   0x00000800UL
 64-bit address enable
#define NATSEMI_CFG_EXTSTS_EN   0x00000100UL
 Extended status enable.
#define NATSEMI_MEAR   0x0008
 EEPROM Access Register.
#define NATSEMI_MEAR_EESEL   0x00000008UL
 EEPROM chip select.
#define NATSEMI_MEAR_EECLK   0x00000004UL
 EEPROM serial clock.
#define NATSEMI_MEAR_EEDO   0x00000002UL
 EEPROM data out.
#define NATSEMI_MEAR_EEDI   0x00000001UL
 EEPROM data in.
#define NATSEMI_EEPROM_SIZE   32
 Size of EEPROM (in bytes)
#define NATSEMI_EEPROM_MAC_SANE   0x0a
 Word offset of MAC address within sane EEPROM layout.
#define NATSEMI_EEPROM_MAC_INSANE   0x06
 Word offset of MAC address within insane EEPROM layout.
#define NATSEMI_PTSCR   0x000c
 PCI Test Control Register.
#define NATSEMI_PTSCR_EELOAD_EN   0x00000004UL
 Enable EEPROM load.
#define NATSEMI_EELOAD_MAX_WAIT_MS   100
 Maximum time to wait for a configuration reload, in milliseconds.
#define NATSEMI_ISR   0x0010
 Interrupt Status Register.
#define NATSEMI_IRQ_TXDESC   0x00000080UL
 TX descriptor.
#define NATSEMI_IRQ_RXDESC   0x00000002UL
 RX descriptor.
#define NATSEMI_IMR   0x0014
 Interrupt Mask Register.
#define NATSEMI_IER   0x0018
 Interrupt Enable Register.
#define NATSEMI_IER_IE   0x00000001UL
 Interrupt enable.
#define NATSEMI_TXDP   0x0020
 Transmit Descriptor Pointer.
#define NATSEMI_TXDP_HI_64   0x0024
 Transmit Descriptor Pointer High Dword (64-bit)
#define NATSEMI_NUM_TX_DESC   4
 Number of transmit descriptors.
#define NATSEMI_TXCFG_32   0x24
 Transmit configuration register (32-bit)
#define NATSEMI_TXCFG_64   0x28
 Transmit configuration register (64-bit)
#define NATSEMI_TXCFG_CSI   0x80000000UL
 Carrier sense ignore.
#define NATSEMI_TXCFG_HBI   0x40000000UL
 Heartbeat ignore.
#define NATSEMI_TXCFG_ATP   0x10000000UL
 Automatic padding.
#define NATSEMI_TXCFG_ECRETRY   0x00800000UL
 Excess collision retry.
#define NATSEMI_TXCFG_MXDMA(x)   ( (x) << 20 )
 Max DMA burst size.
#define NATSEMI_TXCFG_FLTH(x)   ( (x) << 8 )
 Fill threshold.
#define NATSEMI_TXCFG_DRTH(x)   ( (x) << 0 )
 Drain threshold.
#define NATSEMI_TXCFG_MXDMA_DEFAULT   NATSEMI_TXCFG_MXDMA ( 0x7 )
 Max DMA burst size (encoded value)
#define NATSEMI_TXCFG_FLTH_DEFAULT   NATSEMI_TXCFG_FLTH ( 512 / 32 )
 Fill threshold (in units of 32 bytes)
#define NATSEMI_TXCFG_DRTH_DEFAULT   NATSEMI_TXCFG_DRTH ( 1024 / 32 )
 Drain threshold (in units of 32 bytes)
#define NATSEMI_RXDP   0x0030
 Receive Descriptor Pointer.
#define NATSEMI_RXDP_HI_64   0x0034
 Receive Descriptor Pointer High Dword (64-bit)
#define NATSEMI_NUM_RX_DESC   4
 Number of receive descriptors.
#define NATSEMI_RX_MAX_LEN   ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )
 Receive buffer length.
#define NATSEMI_RXCFG_32   0x34
 Receive configuration register (32-bit)
#define NATSEMI_RXCFG_64   0x38
 Receive configuration register (64-bit)
#define NATSEMI_RXCFG_ARP   0x40000000UL
 Accept runt packets.
#define NATSEMI_RXCFG_ATX   0x10000000UL
 Accept transmit packets.
#define NATSEMI_RXCFG_ALP   0x08000000UL
 Accept long packets.
#define NATSEMI_RXCFG_MXDMA(x)   ( (x) << 20 )
 Max DMA burst size.
#define NATSEMI_RXCFG_DRTH(x)   ( (x) << 1 )
 Drain threshold.
#define NATSEMI_RXCFG_MXDMA_DEFAULT   NATSEMI_RXCFG_MXDMA ( 0x7 )
 Max DMA burst size (encoded value)
#define NATSEMI_RXCFG_DRTH_DEFAULT   NATSEMI_RXCFG_DRTH ( 64 / 8 )
 Drain threshold (in units of 8 bytes)
#define NATSEMI_RFCR   0x0048
 Receive Filter/Match Control Register.
#define NATSEMI_RFCR_RFEN   0x80000000UL
 RX filter enable.
#define NATSEMI_RFCR_AAB   0x40000000UL
 Accept all broadcast.
#define NATSEMI_RFCR_AAM   0x20000000UL
 Accept all multicast.
#define NATSEMI_RFCR_AAU   0x10000000UL
 Accept all unicast.
#define NATSEMI_RFCR_RFADDR(addr)   ( (addr) << 0 )
 Extended address.
#define NATSEMI_RFCR_RFADDR_MASK   NATSEMI_RFCR_RFADDR ( 0x3ff )
#define NATSEMI_RFADDR_PMATCH_BASE   0x000
 Perfect match filter address base.
#define NATSEMI_RFDR   0x004c
 Receive Filter/Match Data Register.
#define NATSEMI_RFDR_BMASK   0x00030000UL
 Byte mask.
#define NATSEMI_RFDR_DATA(value)   ( (value) & 0xffff )
 Filter data.

Enumerations

enum  natsemi_descriptor_flags { NATSEMI_DESC_OWN = 0x80000000UL, NATSEMI_DESC_INTR = 0x20000000UL, NATSEMI_DESC_OK = 0x08000000UL }
 Packet descriptor flags. More...
enum  natsemi_nic_flags { NATSEMI_EEPROM_LITTLE_ENDIAN = 0x0001, NATSEMI_EEPROM_INSANE = 0x0002, NATSEMI_64BIT = 0x0004, NATSEMI_1000 = 0x0008 }
 National Semiconductor network card flags. More...

Functions

 FILE_LICENCE (GPL2_OR_LATER)
struct natsemi_descriptor_32 __attribute__ ((packed))
static __attribute__ ((always_inline)) void natsemi_init_ring(struct natsemi_ring *ring
 Initialise descriptor ring.

Variables

uint32_t link
 Link to next descriptor.
uint32_t cmdsts
 Command / status.
uint32_t bufptr
 Buffer pointer.
uint32_t extsts
 Extended status.
uint8_t reserved_a [16]
 Reserved.
uint8_t reserved_b [12]
 Reserved.
uint8_t reserved [12]
 Reserved.
struct natsemi_descriptor_32 d32
 Descriptor.
union natsemi_descriptor __attribute__
static unsigned int count

Detailed Description

National Semiconductor "MacPhyter" network card driver.

Definition in file natsemi.h.


Define Documentation

#define NATSEMI_BAR_SIZE   0x100

BAR size.

Definition at line 17 of file natsemi.h.

Referenced by natsemi_probe().

#define NATSEMI_DESC_SIZE_MASK   0xfff

Descriptor buffer size mask.

Definition at line 70 of file natsemi.h.

Referenced by natsemi_poll_rx().

#define NATSEMI_CR   0x0000

Command Register.

Definition at line 83 of file natsemi.h.

Referenced by natsemi_close(), natsemi_refill_rx(), natsemi_soft_reset(), and natsemi_transmit().

#define NATSEMI_CR_RST   0x00000100UL

Reset.

Definition at line 84 of file natsemi.h.

Referenced by natsemi_soft_reset().

#define NATSEMI_CR_RXR   0x00000020UL

Receiver reset.

Definition at line 85 of file natsemi.h.

Referenced by natsemi_close().

#define NATSEMI_CR_TXR   0x00000010UL

Transmit reset.

Definition at line 86 of file natsemi.h.

Referenced by natsemi_close().

#define NATSEMI_CR_RXE   0x00000004UL

Receiver enable.

Definition at line 87 of file natsemi.h.

Referenced by natsemi_refill_rx().

#define NATSEMI_CR_TXE   0x00000001UL

Transmit enable.

Definition at line 88 of file natsemi.h.

Referenced by natsemi_transmit().

#define NATSEMI_RESET_MAX_WAIT_MS   100

Maximum time to wait for a reset, in milliseconds.

Definition at line 91 of file natsemi.h.

Referenced by natsemi_soft_reset().

#define NATSEMI_CFG   0x0004

Configuration and Media Status Register.

Definition at line 94 of file natsemi.h.

Referenced by natsemi_check_link(), and natsemi_reset().

#define NATSEMI_CFG_LNKSTS   0x80000000UL

Link status.

Definition at line 95 of file natsemi.h.

Referenced by natsemi_check_link().

#define NATSEMI_CFG_SPDSTS1   0x40000000UL

Speed status bit 1.

Definition at line 96 of file natsemi.h.

Referenced by natsemi_check_link().

#define NATSEMI_CFG_MODE_1000   0x00400000UL

1000 Mb/s mode control

Definition at line 97 of file natsemi.h.

Referenced by natsemi_check_link().

#define NATSEMI_CFG_PCI64_DET   0x00002000UL

PCI 64-bit bus detected.

Definition at line 98 of file natsemi.h.

Referenced by natsemi_reset().

#define NATSEMI_CFG_DATA64_EN   0x00001000UL

64-bit data enable

Definition at line 99 of file natsemi.h.

Referenced by natsemi_reset().

#define NATSEMI_CFG_M64ADDR   0x00000800UL

64-bit address enable

Definition at line 100 of file natsemi.h.

Referenced by natsemi_reset().

#define NATSEMI_CFG_EXTSTS_EN   0x00000100UL

Extended status enable.

Definition at line 101 of file natsemi.h.

Referenced by natsemi_reset().

#define NATSEMI_MEAR   0x0008

EEPROM Access Register.

Definition at line 104 of file natsemi.h.

Referenced by natsemi_spi_read_bit(), and natsemi_spi_write_bit().

#define NATSEMI_MEAR_EESEL   0x00000008UL

EEPROM chip select.

Definition at line 105 of file natsemi.h.

#define NATSEMI_MEAR_EECLK   0x00000004UL

EEPROM serial clock.

Definition at line 106 of file natsemi.h.

#define NATSEMI_MEAR_EEDO   0x00000002UL

EEPROM data out.

Definition at line 107 of file natsemi.h.

#define NATSEMI_MEAR_EEDI   0x00000001UL

EEPROM data in.

Definition at line 108 of file natsemi.h.

#define NATSEMI_EEPROM_SIZE   32

Size of EEPROM (in bytes)

Definition at line 111 of file natsemi.h.

Referenced by natsemi_hwaddr().

#define NATSEMI_EEPROM_MAC_SANE   0x0a

Word offset of MAC address within sane EEPROM layout.

Definition at line 114 of file natsemi.h.

Referenced by natsemi_hwaddr_sane().

#define NATSEMI_EEPROM_MAC_INSANE   0x06

Word offset of MAC address within insane EEPROM layout.

Definition at line 117 of file natsemi.h.

Referenced by natsemi_hwaddr_insane().

#define NATSEMI_PTSCR   0x000c

PCI Test Control Register.

Definition at line 120 of file natsemi.h.

Referenced by natsemi_reload_config().

#define NATSEMI_PTSCR_EELOAD_EN   0x00000004UL

Enable EEPROM load.

Definition at line 121 of file natsemi.h.

Referenced by natsemi_reload_config().

#define NATSEMI_EELOAD_MAX_WAIT_MS   100

Maximum time to wait for a configuration reload, in milliseconds.

Definition at line 124 of file natsemi.h.

Referenced by natsemi_reload_config().

#define NATSEMI_ISR   0x0010

Interrupt Status Register.

Definition at line 127 of file natsemi.h.

Referenced by natsemi_poll().

#define NATSEMI_IRQ_TXDESC   0x00000080UL

TX descriptor.

Definition at line 128 of file natsemi.h.

Referenced by natsemi_open(), and natsemi_poll().

#define NATSEMI_IRQ_RXDESC   0x00000002UL

RX descriptor.

Definition at line 129 of file natsemi.h.

Referenced by natsemi_open(), and natsemi_poll().

#define NATSEMI_IMR   0x0014

Interrupt Mask Register.

Definition at line 132 of file natsemi.h.

Referenced by natsemi_close(), and natsemi_open().

#define NATSEMI_IER   0x0018

Interrupt Enable Register.

Definition at line 135 of file natsemi.h.

Referenced by natsemi_irq().

#define NATSEMI_IER_IE   0x00000001UL

Interrupt enable.

Definition at line 136 of file natsemi.h.

Referenced by natsemi_irq().

#define NATSEMI_TXDP   0x0020

Transmit Descriptor Pointer.

Definition at line 139 of file natsemi.h.

Referenced by natsemi_probe().

#define NATSEMI_TXDP_HI_64   0x0024

Transmit Descriptor Pointer High Dword (64-bit)

Definition at line 142 of file natsemi.h.

#define NATSEMI_NUM_TX_DESC   4

Number of transmit descriptors.

Definition at line 145 of file natsemi.h.

Referenced by natsemi_poll_tx(), natsemi_probe(), and natsemi_transmit().

#define NATSEMI_TXCFG_32   0x24

Transmit configuration register (32-bit)

Definition at line 148 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_TXCFG_64   0x28

Transmit configuration register (64-bit)

Definition at line 151 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_TXCFG_CSI   0x80000000UL

Carrier sense ignore.

Definition at line 152 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_TXCFG_HBI   0x40000000UL

Heartbeat ignore.

Definition at line 153 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_TXCFG_ATP   0x10000000UL

Automatic padding.

Definition at line 154 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_TXCFG_ECRETRY   0x00800000UL

Excess collision retry.

Definition at line 155 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_TXCFG_MXDMA (   x)    ( (x) << 20 )

Max DMA burst size.

Definition at line 156 of file natsemi.h.

#define NATSEMI_TXCFG_FLTH (   x)    ( (x) << 8 )

Fill threshold.

Definition at line 157 of file natsemi.h.

#define NATSEMI_TXCFG_DRTH (   x)    ( (x) << 0 )

Drain threshold.

Definition at line 158 of file natsemi.h.

Max DMA burst size (encoded value)

This represents 256-byte bursts on 83815 controllers and 512-byte bursts on 83820 controllers.

Definition at line 165 of file natsemi.h.

Referenced by natsemi_open().

Fill threshold (in units of 32 bytes)

Must be at least as large as the max DMA burst size, so use a value of 512 bytes.

Definition at line 172 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_TXCFG_DRTH_DEFAULT   NATSEMI_TXCFG_DRTH ( 1024 / 32 )

Drain threshold (in units of 32 bytes)

Start transmission once we receive a conservative 1024 bytes, to avoid FIFO underrun errors. (83815 does not allow us to specify a value of 0 for "wait until whole packet is present".)

Fill threshold plus drain threshold must be less than the transmit FIFO size, which is 2kB on 83815 and 8kB on 83820.

Definition at line 183 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RXDP   0x0030

Receive Descriptor Pointer.

Definition at line 186 of file natsemi.h.

Referenced by natsemi_probe().

#define NATSEMI_RXDP_HI_64   0x0034

Receive Descriptor Pointer High Dword (64-bit)

Definition at line 189 of file natsemi.h.

#define NATSEMI_NUM_RX_DESC   4

Number of receive descriptors.

Definition at line 192 of file natsemi.h.

Referenced by natsemi_close(), natsemi_poll_rx(), natsemi_probe(), and natsemi_refill_rx().

#define NATSEMI_RX_MAX_LEN   ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )

Receive buffer length.

Definition at line 195 of file natsemi.h.

Referenced by natsemi_refill_rx().

#define NATSEMI_RXCFG_32   0x34

Receive configuration register (32-bit)

Definition at line 198 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RXCFG_64   0x38

Receive configuration register (64-bit)

Definition at line 201 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RXCFG_ARP   0x40000000UL

Accept runt packets.

Definition at line 202 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RXCFG_ATX   0x10000000UL

Accept transmit packets.

Definition at line 203 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RXCFG_ALP   0x08000000UL

Accept long packets.

Definition at line 204 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RXCFG_MXDMA (   x)    ( (x) << 20 )

Max DMA burst size.

Definition at line 205 of file natsemi.h.

#define NATSEMI_RXCFG_DRTH (   x)    ( (x) << 1 )

Drain threshold.

Definition at line 206 of file natsemi.h.

Max DMA burst size (encoded value)

This represents 256-byte bursts on 83815 controllers and 512-byte bursts on 83820 controllers.

Definition at line 213 of file natsemi.h.

Referenced by natsemi_open().

Drain threshold (in units of 8 bytes)

Start draining after 64 bytes.

Must be large enough to allow packet's accept/reject status to be determined before draining begins.

Definition at line 222 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RFCR   0x0048

Receive Filter/Match Control Register.

Definition at line 225 of file natsemi.h.

Referenced by natsemi_open(), and natsemi_pmatch().

#define NATSEMI_RFCR_RFEN   0x80000000UL

RX filter enable.

Definition at line 226 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RFCR_AAB   0x40000000UL

Accept all broadcast.

Definition at line 227 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RFCR_AAM   0x20000000UL

Accept all multicast.

Definition at line 228 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RFCR_AAU   0x10000000UL

Accept all unicast.

Definition at line 229 of file natsemi.h.

Referenced by natsemi_open().

#define NATSEMI_RFCR_RFADDR (   addr)    ( (addr) << 0 )

Extended address.

Definition at line 230 of file natsemi.h.

Referenced by natsemi_pmatch().

Definition at line 231 of file natsemi.h.

Referenced by natsemi_pmatch().

#define NATSEMI_RFADDR_PMATCH_BASE   0x000

Perfect match filter address base.

Definition at line 234 of file natsemi.h.

Referenced by natsemi_pmatch().

#define NATSEMI_RFDR   0x004c

Receive Filter/Match Data Register.

Definition at line 237 of file natsemi.h.

Referenced by natsemi_pmatch().

#define NATSEMI_RFDR_BMASK   0x00030000UL

Byte mask.

Definition at line 238 of file natsemi.h.

Referenced by natsemi_pmatch().

#define NATSEMI_RFDR_DATA (   value)    ( (value) & 0xffff )

Filter data.

Definition at line 239 of file natsemi.h.


Enumeration Type Documentation

Packet descriptor flags.

Enumerator:
NATSEMI_DESC_OWN 

Descriptor is owned by NIC.

NATSEMI_DESC_INTR 

Request descriptor interrupt.

NATSEMI_DESC_OK 

Packet OK.

Definition at line 73 of file natsemi.h.

                              {
        /** Descriptor is owned by NIC */
        NATSEMI_DESC_OWN = 0x80000000UL,
        /** Request descriptor interrupt */
        NATSEMI_DESC_INTR = 0x20000000UL,
        /** Packet OK */
        NATSEMI_DESC_OK = 0x08000000UL,
};

National Semiconductor network card flags.

Enumerator:
NATSEMI_EEPROM_LITTLE_ENDIAN 

EEPROM is little-endian.

NATSEMI_EEPROM_INSANE 

EEPROM layout is insane.

NATSEMI_64BIT 

Card supports 64-bit operation.

NATSEMI_1000 

Card supports 1000Mbps link.

Definition at line 242 of file natsemi.h.

                       {
        /** EEPROM is little-endian */
        NATSEMI_EEPROM_LITTLE_ENDIAN = 0x0001,
        /** EEPROM layout is insane */
        NATSEMI_EEPROM_INSANE = 0x0002,
        /** Card supports 64-bit operation */
        NATSEMI_64BIT = 0x0004,
        /** Card supports 1000Mbps link */
        NATSEMI_1000 = 0x0008,
};

Function Documentation

FILE_LICENCE ( GPL2_OR_LATER  )
struct natsemi_descriptor_32 __attribute__ ( (packed)  )
static __attribute__ ( (always_inline)  ) [inline, static]

Initialise descriptor ring.

Check if card can access physical address.

Parameters:
ringDescriptor ring
countNumber of descriptors
regDescriptor start address register
natsemiNational Semiconductor device
addressPhysical address
address_okCard can access physical address

Variable Documentation

Link to next descriptor.

Definition at line 29 of file natsemi.h.

Command / status.

Definition at line 31 of file natsemi.h.

Referenced by sis900_init_rxd().

Buffer pointer.

Definition at line 33 of file natsemi.h.

Referenced by sis900_init_rxd().

Extended status.

Definition at line 47 of file natsemi.h.

Reserved.

Definition at line 59 of file natsemi.h.

Reserved.

Definition at line 63 of file natsemi.h.

Reserved.

Definition at line 68 of file natsemi.h.

Descriptor.

Definition at line 70 of file natsemi.h.

Referenced by natsemi_create_ring().

unsigned int count

Definition at line 276 of file natsemi.h.