iPXE
Data Structures | Macros | Functions | Variables
desc.h File Reference

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Data Structures

struct  ath5k_hw_rx_ctl
struct  ath5k_hw_rx_status
struct  ath5k_hw_rx_error
struct  ath5k_hw_2w_tx_ctl
struct  ath5k_hw_4w_tx_ctl
struct  ath5k_hw_tx_status
struct  ath5k_hw_5210_tx_desc
struct  ath5k_hw_5212_tx_desc
struct  ath5k_hw_all_rx_desc
struct  ath5k_desc

Macros

#define AR5K_DESC_RX_CTL0   0x00000000
#define AR5K_DESC_RX_CTL1_BUF_LEN   0x00000fff
#define AR5K_DESC_RX_CTL1_INTREQ   0x00002000
#define AR5K_5210_RX_DESC_STATUS0_DATA_LEN   0x00000fff
#define AR5K_5210_RX_DESC_STATUS0_MORE   0x00001000
#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE   0x00078000
#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE_S   15
#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL   0x07f80000
#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL_S   19
#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANTENNA   0x38000000
#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANTENNA_S   27
#define AR5K_5210_RX_DESC_STATUS1_DONE   0x00000001
#define AR5K_5210_RX_DESC_STATUS1_FRAME_RECEIVE_OK   0x00000002
#define AR5K_5210_RX_DESC_STATUS1_CRC_ERROR   0x00000004
#define AR5K_5210_RX_DESC_STATUS1_FIFO_OVERRUN   0x00000008
#define AR5K_5210_RX_DESC_STATUS1_DECRYPT_CRC_ERROR   0x00000010
#define AR5K_5210_RX_DESC_STATUS1_PHY_ERROR   0x000000e0
#define AR5K_5210_RX_DESC_STATUS1_PHY_ERROR_S   5
#define AR5K_5210_RX_DESC_STATUS1_KEY_INDEX_VALID   0x00000100
#define AR5K_5210_RX_DESC_STATUS1_KEY_INDEX   0x00007e00
#define AR5K_5210_RX_DESC_STATUS1_KEY_INDEX_S   9
#define AR5K_5210_RX_DESC_STATUS1_RECEIVE_TIMESTAMP   0x0fff8000
#define AR5K_5210_RX_DESC_STATUS1_RECEIVE_TIMESTAMP_S   15
#define AR5K_5210_RX_DESC_STATUS1_KEY_CACHE_MISS   0x10000000
#define AR5K_5212_RX_DESC_STATUS0_DATA_LEN   0x00000fff
#define AR5K_5212_RX_DESC_STATUS0_MORE   0x00001000
#define AR5K_5212_RX_DESC_STATUS0_DECOMP_CRC_ERROR   0x00002000
#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE   0x000f8000
#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE_S   15
#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL   0x0ff00000
#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL_S   20
#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA   0xf0000000
#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA_S   28
#define AR5K_5212_RX_DESC_STATUS1_DONE   0x00000001
#define AR5K_5212_RX_DESC_STATUS1_FRAME_RECEIVE_OK   0x00000002
#define AR5K_5212_RX_DESC_STATUS1_CRC_ERROR   0x00000004
#define AR5K_5212_RX_DESC_STATUS1_DECRYPT_CRC_ERROR   0x00000008
#define AR5K_5212_RX_DESC_STATUS1_PHY_ERROR   0x00000010
#define AR5K_5212_RX_DESC_STATUS1_MIC_ERROR   0x00000020
#define AR5K_5212_RX_DESC_STATUS1_KEY_INDEX_VALID   0x00000100
#define AR5K_5212_RX_DESC_STATUS1_KEY_INDEX   0x0000fe00
#define AR5K_5212_RX_DESC_STATUS1_KEY_INDEX_S   9
#define AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP   0x7fff0000
#define AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP_S   16
#define AR5K_5212_RX_DESC_STATUS1_KEY_CACHE_MISS   0x80000000
#define AR5K_RX_DESC_ERROR0   0x00000000
#define AR5K_RX_DESC_ERROR1_PHY_ERROR_CODE   0x0000ff00
#define AR5K_RX_DESC_ERROR1_PHY_ERROR_CODE_S   8
#define AR5K_DESC_RX_PHY_ERROR_NONE   0x00
#define AR5K_DESC_RX_PHY_ERROR_TIMING   0x20
#define AR5K_DESC_RX_PHY_ERROR_PARITY   0x40
#define AR5K_DESC_RX_PHY_ERROR_RATE   0x60
#define AR5K_DESC_RX_PHY_ERROR_LENGTH   0x80
#define AR5K_DESC_RX_PHY_ERROR_64QAM   0xa0
#define AR5K_DESC_RX_PHY_ERROR_SERVICE   0xc0
#define AR5K_DESC_RX_PHY_ERROR_TRANSMITOVR   0xe0
#define AR5K_2W_TX_DESC_CTL0_FRAME_LEN   0x00000fff
#define AR5K_2W_TX_DESC_CTL0_HEADER_LEN   0x0003f000 /*[5210 ?]*/
#define AR5K_2W_TX_DESC_CTL0_HEADER_LEN_S   12
#define AR5K_2W_TX_DESC_CTL0_XMIT_RATE   0x003c0000
#define AR5K_2W_TX_DESC_CTL0_XMIT_RATE_S   18
#define AR5K_2W_TX_DESC_CTL0_RTSENA   0x00400000
#define AR5K_2W_TX_DESC_CTL0_CLRDMASK   0x01000000
#define AR5K_2W_TX_DESC_CTL0_LONG_PACKET   0x00800000 /*[5210]*/
#define AR5K_2W_TX_DESC_CTL0_VEOL   0x00800000 /*[5211]*/
#define AR5K_2W_TX_DESC_CTL0_FRAME_TYPE   0x1c000000 /*[5210]*/
#define AR5K_2W_TX_DESC_CTL0_FRAME_TYPE_S   26
#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210   0x02000000
#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211   0x1e000000
#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT
#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_S   25
#define AR5K_2W_TX_DESC_CTL0_INTREQ   0x20000000
#define AR5K_2W_TX_DESC_CTL0_ENCRYPT_KEY_VALID   0x40000000
#define AR5K_2W_TX_DESC_CTL1_BUF_LEN   0x00000fff
#define AR5K_2W_TX_DESC_CTL1_MORE   0x00001000
#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210   0x0007e000
#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5211   0x000fe000
#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX
#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_S   13
#define AR5K_2W_TX_DESC_CTL1_FRAME_TYPE   0x00700000 /*[5211]*/
#define AR5K_2W_TX_DESC_CTL1_FRAME_TYPE_S   20
#define AR5K_2W_TX_DESC_CTL1_NOACK   0x00800000 /*[5211]*/
#define AR5K_2W_TX_DESC_CTL1_RTS_DURATION   0xfff80000 /*[5210 ?]*/
#define AR5K_AR5210_TX_DESC_FRAME_TYPE_NORMAL   0x00
#define AR5K_AR5210_TX_DESC_FRAME_TYPE_ATIM   0x04
#define AR5K_AR5210_TX_DESC_FRAME_TYPE_PSPOLL   0x08
#define AR5K_AR5210_TX_DESC_FRAME_TYPE_NO_DELAY   0x0c
#define AR5K_AR5210_TX_DESC_FRAME_TYPE_PIFS   0x10
#define AR5K_4W_TX_DESC_CTL0_FRAME_LEN   0x00000fff
#define AR5K_4W_TX_DESC_CTL0_XMIT_POWER   0x003f0000
#define AR5K_4W_TX_DESC_CTL0_XMIT_POWER_S   16
#define AR5K_4W_TX_DESC_CTL0_RTSENA   0x00400000
#define AR5K_4W_TX_DESC_CTL0_VEOL   0x00800000
#define AR5K_4W_TX_DESC_CTL0_CLRDMASK   0x01000000
#define AR5K_4W_TX_DESC_CTL0_ANT_MODE_XMIT   0x1e000000
#define AR5K_4W_TX_DESC_CTL0_ANT_MODE_XMIT_S   25
#define AR5K_4W_TX_DESC_CTL0_INTREQ   0x20000000
#define AR5K_4W_TX_DESC_CTL0_ENCRYPT_KEY_VALID   0x40000000
#define AR5K_4W_TX_DESC_CTL0_CTSENA   0x80000000
#define AR5K_4W_TX_DESC_CTL1_BUF_LEN   0x00000fff
#define AR5K_4W_TX_DESC_CTL1_MORE   0x00001000
#define AR5K_4W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX   0x000fe000
#define AR5K_4W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_S   13
#define AR5K_4W_TX_DESC_CTL1_FRAME_TYPE   0x00f00000
#define AR5K_4W_TX_DESC_CTL1_FRAME_TYPE_S   20
#define AR5K_4W_TX_DESC_CTL1_NOACK   0x01000000
#define AR5K_4W_TX_DESC_CTL1_COMP_PROC   0x06000000
#define AR5K_4W_TX_DESC_CTL1_COMP_PROC_S   25
#define AR5K_4W_TX_DESC_CTL1_COMP_IV_LEN   0x18000000
#define AR5K_4W_TX_DESC_CTL1_COMP_IV_LEN_S   27
#define AR5K_4W_TX_DESC_CTL1_COMP_ICV_LEN   0x60000000
#define AR5K_4W_TX_DESC_CTL1_COMP_ICV_LEN_S   29
#define AR5K_4W_TX_DESC_CTL2_RTS_DURATION   0x00007fff
#define AR5K_4W_TX_DESC_CTL2_DURATION_UPDATE_ENABLE   0x00008000
#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES0   0x000f0000
#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES0_S   16
#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1   0x00f00000
#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1_S   20
#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2   0x0f000000
#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2_S   24
#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES3   0xf0000000
#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES3_S   28
#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE0   0x0000001f
#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE1   0x000003e0
#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE1_S   5
#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE2   0x00007c00
#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE2_S   10
#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE3   0x000f8000
#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE3_S   15
#define AR5K_4W_TX_DESC_CTL3_RTS_CTS_RATE   0x01f00000
#define AR5K_4W_TX_DESC_CTL3_RTS_CTS_RATE_S   20
#define AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK   0x00000001
#define AR5K_DESC_TX_STATUS0_EXCESSIVE_RETRIES   0x00000002
#define AR5K_DESC_TX_STATUS0_FIFO_UNDERRUN   0x00000004
#define AR5K_DESC_TX_STATUS0_FILTERED   0x00000008
#define AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT   0x000000f0
#define AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT_S   4
#define AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT   0x00000f00
#define AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT_S   8
#define AR5K_DESC_TX_STATUS0_VIRT_COLL_COUNT   0x0000f000
#define AR5K_DESC_TX_STATUS0_VIRT_COLL_COUNT_S   12
#define AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP   0xffff0000
#define AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP_S   16
#define AR5K_DESC_TX_STATUS1_DONE   0x00000001
#define AR5K_DESC_TX_STATUS1_SEQ_NUM   0x00001ffe
#define AR5K_DESC_TX_STATUS1_SEQ_NUM_S   1
#define AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH   0x001fe000
#define AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH_S   13
#define AR5K_DESC_TX_STATUS1_FINAL_TS_INDEX   0x00600000
#define AR5K_DESC_TX_STATUS1_FINAL_TS_INDEX_S   21
#define AR5K_DESC_TX_STATUS1_COMP_SUCCESS   0x00800000
#define AR5K_DESC_TX_STATUS1_XMIT_ANTENNA   0x01000000
#define AR5K_RXDESC_INTREQ   0x0020
#define AR5K_TXDESC_CLRDMASK   0x0001
#define AR5K_TXDESC_NOACK   0x0002 /*[5211+]*/
#define AR5K_TXDESC_RTSENA   0x0004
#define AR5K_TXDESC_CTSENA   0x0008
#define AR5K_TXDESC_INTREQ   0x0010
#define AR5K_TXDESC_VEOL   0x0020 /*[5211+]*/

Functions

 FILE_SECBOOT (FORBIDDEN)
struct ath5k_hw_rx_ctl __attribute__ ((packed))

Variables

u32 rx_control_0
u32 rx_control_1
u32 rx_status_0
u32 rx_status_1
u32 rx_error_0
u32 rx_error_1
u32 tx_control_0
u32 tx_control_1
u32 tx_control_2
u32 tx_control_3
u32 tx_status_0
u32 tx_status_1
struct ath5k_hw_2w_tx_ctl tx_ctl
struct ath5k_hw_tx_status tx_stat
struct ath5k_hw_rx_ctl rx_ctl
union { 
   struct ath5k_hw_rx_status   rx_stat 
   struct ath5k_hw_rx_error   rx_err 
} u
u32 ds_link
u32 ds_data
union { 
   struct ath5k_hw_5210_tx_desc   ds_tx5210 
   struct ath5k_hw_5212_tx_desc   ds_tx5212 
   struct ath5k_hw_all_rx_desc   ds_rx 
} ud

Macro Definition Documentation

◆ AR5K_DESC_RX_CTL0

#define AR5K_DESC_RX_CTL0   0x00000000

Definition at line 35 of file desc.h.

◆ AR5K_DESC_RX_CTL1_BUF_LEN

#define AR5K_DESC_RX_CTL1_BUF_LEN   0x00000fff

Definition at line 38 of file desc.h.

Referenced by ath5k_hw_setup_rx_desc().

◆ AR5K_DESC_RX_CTL1_INTREQ

#define AR5K_DESC_RX_CTL1_INTREQ   0x00002000

Definition at line 39 of file desc.h.

Referenced by ath5k_hw_setup_rx_desc().

◆ AR5K_5210_RX_DESC_STATUS0_DATA_LEN

#define AR5K_5210_RX_DESC_STATUS0_DATA_LEN   0x00000fff

Definition at line 52 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS0_MORE

#define AR5K_5210_RX_DESC_STATUS0_MORE   0x00001000

Definition at line 53 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE

#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE   0x00078000

Definition at line 54 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE_S

#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE_S   15

Definition at line 55 of file desc.h.

◆ AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL

#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL   0x07f80000

Definition at line 56 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL_S

#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL_S   19

Definition at line 57 of file desc.h.

◆ AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANTENNA

#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANTENNA   0x38000000

Definition at line 58 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANTENNA_S

#define AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANTENNA_S   27

Definition at line 59 of file desc.h.

◆ AR5K_5210_RX_DESC_STATUS1_DONE

#define AR5K_5210_RX_DESC_STATUS1_DONE   0x00000001

Definition at line 62 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS1_FRAME_RECEIVE_OK

#define AR5K_5210_RX_DESC_STATUS1_FRAME_RECEIVE_OK   0x00000002

Definition at line 63 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS1_CRC_ERROR

#define AR5K_5210_RX_DESC_STATUS1_CRC_ERROR   0x00000004

Definition at line 64 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS1_FIFO_OVERRUN

#define AR5K_5210_RX_DESC_STATUS1_FIFO_OVERRUN   0x00000008

Definition at line 65 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS1_DECRYPT_CRC_ERROR

#define AR5K_5210_RX_DESC_STATUS1_DECRYPT_CRC_ERROR   0x00000010

Definition at line 66 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS1_PHY_ERROR

#define AR5K_5210_RX_DESC_STATUS1_PHY_ERROR   0x000000e0

Definition at line 67 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS1_PHY_ERROR_S

#define AR5K_5210_RX_DESC_STATUS1_PHY_ERROR_S   5

Definition at line 68 of file desc.h.

◆ AR5K_5210_RX_DESC_STATUS1_KEY_INDEX_VALID

#define AR5K_5210_RX_DESC_STATUS1_KEY_INDEX_VALID   0x00000100

Definition at line 69 of file desc.h.

◆ AR5K_5210_RX_DESC_STATUS1_KEY_INDEX

#define AR5K_5210_RX_DESC_STATUS1_KEY_INDEX   0x00007e00

Definition at line 70 of file desc.h.

◆ AR5K_5210_RX_DESC_STATUS1_KEY_INDEX_S

#define AR5K_5210_RX_DESC_STATUS1_KEY_INDEX_S   9

Definition at line 71 of file desc.h.

◆ AR5K_5210_RX_DESC_STATUS1_RECEIVE_TIMESTAMP

#define AR5K_5210_RX_DESC_STATUS1_RECEIVE_TIMESTAMP   0x0fff8000

Definition at line 72 of file desc.h.

Referenced by ath5k_hw_proc_5210_rx_status().

◆ AR5K_5210_RX_DESC_STATUS1_RECEIVE_TIMESTAMP_S

#define AR5K_5210_RX_DESC_STATUS1_RECEIVE_TIMESTAMP_S   15

Definition at line 73 of file desc.h.

◆ AR5K_5210_RX_DESC_STATUS1_KEY_CACHE_MISS

#define AR5K_5210_RX_DESC_STATUS1_KEY_CACHE_MISS   0x10000000

Definition at line 74 of file desc.h.

◆ AR5K_5212_RX_DESC_STATUS0_DATA_LEN

#define AR5K_5212_RX_DESC_STATUS0_DATA_LEN   0x00000fff

Definition at line 78 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS0_MORE

#define AR5K_5212_RX_DESC_STATUS0_MORE   0x00001000

Definition at line 79 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS0_DECOMP_CRC_ERROR

#define AR5K_5212_RX_DESC_STATUS0_DECOMP_CRC_ERROR   0x00002000

Definition at line 80 of file desc.h.

◆ AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE

#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE   0x000f8000

Definition at line 81 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE_S

#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE_S   15

Definition at line 82 of file desc.h.

◆ AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL

#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL   0x0ff00000

Definition at line 83 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL_S

#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL_S   20

Definition at line 84 of file desc.h.

◆ AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA

#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA   0xf0000000

Definition at line 85 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA_S

#define AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA_S   28

Definition at line 86 of file desc.h.

◆ AR5K_5212_RX_DESC_STATUS1_DONE

#define AR5K_5212_RX_DESC_STATUS1_DONE   0x00000001

Definition at line 89 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS1_FRAME_RECEIVE_OK

#define AR5K_5212_RX_DESC_STATUS1_FRAME_RECEIVE_OK   0x00000002

Definition at line 90 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS1_CRC_ERROR

#define AR5K_5212_RX_DESC_STATUS1_CRC_ERROR   0x00000004

Definition at line 91 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS1_DECRYPT_CRC_ERROR

#define AR5K_5212_RX_DESC_STATUS1_DECRYPT_CRC_ERROR   0x00000008

Definition at line 92 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS1_PHY_ERROR

#define AR5K_5212_RX_DESC_STATUS1_PHY_ERROR   0x00000010

Definition at line 93 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS1_MIC_ERROR

#define AR5K_5212_RX_DESC_STATUS1_MIC_ERROR   0x00000020

Definition at line 94 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS1_KEY_INDEX_VALID

#define AR5K_5212_RX_DESC_STATUS1_KEY_INDEX_VALID   0x00000100

Definition at line 95 of file desc.h.

◆ AR5K_5212_RX_DESC_STATUS1_KEY_INDEX

#define AR5K_5212_RX_DESC_STATUS1_KEY_INDEX   0x0000fe00

Definition at line 96 of file desc.h.

◆ AR5K_5212_RX_DESC_STATUS1_KEY_INDEX_S

#define AR5K_5212_RX_DESC_STATUS1_KEY_INDEX_S   9

Definition at line 97 of file desc.h.

◆ AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP

#define AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP   0x7fff0000

Definition at line 98 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP_S

#define AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP_S   16

Definition at line 99 of file desc.h.

◆ AR5K_5212_RX_DESC_STATUS1_KEY_CACHE_MISS

#define AR5K_5212_RX_DESC_STATUS1_KEY_CACHE_MISS   0x80000000

Definition at line 100 of file desc.h.

◆ AR5K_RX_DESC_ERROR0

#define AR5K_RX_DESC_ERROR0   0x00000000

Definition at line 111 of file desc.h.

◆ AR5K_RX_DESC_ERROR1_PHY_ERROR_CODE

#define AR5K_RX_DESC_ERROR1_PHY_ERROR_CODE   0x0000ff00

Definition at line 114 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status().

◆ AR5K_RX_DESC_ERROR1_PHY_ERROR_CODE_S

#define AR5K_RX_DESC_ERROR1_PHY_ERROR_CODE_S   8

Definition at line 115 of file desc.h.

◆ AR5K_DESC_RX_PHY_ERROR_NONE

#define AR5K_DESC_RX_PHY_ERROR_NONE   0x00

Definition at line 118 of file desc.h.

◆ AR5K_DESC_RX_PHY_ERROR_TIMING

#define AR5K_DESC_RX_PHY_ERROR_TIMING   0x20

Definition at line 119 of file desc.h.

◆ AR5K_DESC_RX_PHY_ERROR_PARITY

#define AR5K_DESC_RX_PHY_ERROR_PARITY   0x40

Definition at line 120 of file desc.h.

◆ AR5K_DESC_RX_PHY_ERROR_RATE

#define AR5K_DESC_RX_PHY_ERROR_RATE   0x60

Definition at line 121 of file desc.h.

◆ AR5K_DESC_RX_PHY_ERROR_LENGTH

#define AR5K_DESC_RX_PHY_ERROR_LENGTH   0x80

Definition at line 122 of file desc.h.

◆ AR5K_DESC_RX_PHY_ERROR_64QAM

#define AR5K_DESC_RX_PHY_ERROR_64QAM   0xa0

Definition at line 123 of file desc.h.

◆ AR5K_DESC_RX_PHY_ERROR_SERVICE

#define AR5K_DESC_RX_PHY_ERROR_SERVICE   0xc0

Definition at line 124 of file desc.h.

◆ AR5K_DESC_RX_PHY_ERROR_TRANSMITOVR

#define AR5K_DESC_RX_PHY_ERROR_TRANSMITOVR   0xe0

Definition at line 125 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_FRAME_LEN

#define AR5K_2W_TX_DESC_CTL0_FRAME_LEN   0x00000fff

Definition at line 136 of file desc.h.

Referenced by ath5k_hw_setup_2word_tx_desc().

◆ AR5K_2W_TX_DESC_CTL0_HEADER_LEN

#define AR5K_2W_TX_DESC_CTL0_HEADER_LEN   0x0003f000 /*[5210 ?]*/

Definition at line 137 of file desc.h.

Referenced by ath5k_hw_setup_2word_tx_desc().

◆ AR5K_2W_TX_DESC_CTL0_HEADER_LEN_S

#define AR5K_2W_TX_DESC_CTL0_HEADER_LEN_S   12

Definition at line 138 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_XMIT_RATE

#define AR5K_2W_TX_DESC_CTL0_XMIT_RATE   0x003c0000

Definition at line 139 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_setup_2word_tx_desc().

◆ AR5K_2W_TX_DESC_CTL0_XMIT_RATE_S

#define AR5K_2W_TX_DESC_CTL0_XMIT_RATE_S   18

Definition at line 140 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_RTSENA

#define AR5K_2W_TX_DESC_CTL0_RTSENA   0x00400000

Definition at line 141 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_CLRDMASK

#define AR5K_2W_TX_DESC_CTL0_CLRDMASK   0x01000000

Definition at line 142 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_LONG_PACKET

#define AR5K_2W_TX_DESC_CTL0_LONG_PACKET   0x00800000 /*[5210]*/

Definition at line 143 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_VEOL

#define AR5K_2W_TX_DESC_CTL0_VEOL   0x00800000 /*[5211]*/

Definition at line 144 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_FRAME_TYPE

#define AR5K_2W_TX_DESC_CTL0_FRAME_TYPE   0x1c000000 /*[5210]*/

Definition at line 145 of file desc.h.

Referenced by ath5k_hw_setup_2word_tx_desc().

◆ AR5K_2W_TX_DESC_CTL0_FRAME_TYPE_S

#define AR5K_2W_TX_DESC_CTL0_FRAME_TYPE_S   26

Definition at line 146 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210

#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210   0x02000000

Definition at line 147 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211

#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211   0x1e000000

Definition at line 148 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT

#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT
Value:
(ah->ah_version == AR5K_AR5210 ? \
AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210 : \
AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211)
AR5K_AR5210
@ AR5K_AR5210
Definition ath5k.h:256
AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210
#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210
Definition desc.h:147
AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211
#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211
Definition desc.h:148
ah
uint8_t ah
Definition registers.h:1

Definition at line 150 of file desc.h.

150#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT \
151 (ah->ah_version == AR5K_AR5210 ? \
152 AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5210 : \
153 AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_5211)

Referenced by ath5k_hw_setup_2word_tx_desc().

◆ AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_S

#define AR5K_2W_TX_DESC_CTL0_ANT_MODE_XMIT_S   25

Definition at line 155 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_INTREQ

#define AR5K_2W_TX_DESC_CTL0_INTREQ   0x20000000

Definition at line 156 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL0_ENCRYPT_KEY_VALID

#define AR5K_2W_TX_DESC_CTL0_ENCRYPT_KEY_VALID   0x40000000

Definition at line 157 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL1_BUF_LEN

#define AR5K_2W_TX_DESC_CTL1_BUF_LEN   0x00000fff

Definition at line 160 of file desc.h.

Referenced by ath5k_hw_setup_2word_tx_desc().

◆ AR5K_2W_TX_DESC_CTL1_MORE

#define AR5K_2W_TX_DESC_CTL1_MORE   0x00001000

Definition at line 161 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210

#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210   0x0007e000

Definition at line 162 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5211

#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5211   0x000fe000

Definition at line 163 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX

#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX
Value:
(ah->ah_version == AR5K_AR5210 ? \
AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210 : \
AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5211)
AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5211
#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5211
Definition desc.h:163
AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210
#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210
Definition desc.h:162

Definition at line 165 of file desc.h.

165#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX \
166 (ah->ah_version == AR5K_AR5210 ? \
167 AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5210 : \
168 AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_5211)

◆ AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_S

#define AR5K_2W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_S   13

Definition at line 170 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL1_FRAME_TYPE

#define AR5K_2W_TX_DESC_CTL1_FRAME_TYPE   0x00700000 /*[5211]*/

Definition at line 171 of file desc.h.

Referenced by ath5k_hw_setup_2word_tx_desc().

◆ AR5K_2W_TX_DESC_CTL1_FRAME_TYPE_S

#define AR5K_2W_TX_DESC_CTL1_FRAME_TYPE_S   20

Definition at line 172 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL1_NOACK

#define AR5K_2W_TX_DESC_CTL1_NOACK   0x00800000 /*[5211]*/

Definition at line 173 of file desc.h.

◆ AR5K_2W_TX_DESC_CTL1_RTS_DURATION

#define AR5K_2W_TX_DESC_CTL1_RTS_DURATION   0xfff80000 /*[5210 ?]*/

Definition at line 174 of file desc.h.

Referenced by ath5k_hw_setup_2word_tx_desc().

◆ AR5K_AR5210_TX_DESC_FRAME_TYPE_NORMAL

#define AR5K_AR5210_TX_DESC_FRAME_TYPE_NORMAL   0x00

Definition at line 177 of file desc.h.

◆ AR5K_AR5210_TX_DESC_FRAME_TYPE_ATIM

#define AR5K_AR5210_TX_DESC_FRAME_TYPE_ATIM   0x04

Definition at line 178 of file desc.h.

◆ AR5K_AR5210_TX_DESC_FRAME_TYPE_PSPOLL

#define AR5K_AR5210_TX_DESC_FRAME_TYPE_PSPOLL   0x08

Definition at line 179 of file desc.h.

◆ AR5K_AR5210_TX_DESC_FRAME_TYPE_NO_DELAY

#define AR5K_AR5210_TX_DESC_FRAME_TYPE_NO_DELAY   0x0c

Definition at line 180 of file desc.h.

Referenced by ath5k_hw_setup_2word_tx_desc().

◆ AR5K_AR5210_TX_DESC_FRAME_TYPE_PIFS

#define AR5K_AR5210_TX_DESC_FRAME_TYPE_PIFS   0x10

Definition at line 181 of file desc.h.

Referenced by ath5k_hw_setup_2word_tx_desc().

◆ AR5K_4W_TX_DESC_CTL0_FRAME_LEN

#define AR5K_4W_TX_DESC_CTL0_FRAME_LEN   0x00000fff

Definition at line 189 of file desc.h.

Referenced by ath5k_hw_setup_4word_tx_desc().

◆ AR5K_4W_TX_DESC_CTL0_XMIT_POWER

#define AR5K_4W_TX_DESC_CTL0_XMIT_POWER   0x003f0000

Definition at line 190 of file desc.h.

Referenced by ath5k_hw_setup_4word_tx_desc().

◆ AR5K_4W_TX_DESC_CTL0_XMIT_POWER_S

#define AR5K_4W_TX_DESC_CTL0_XMIT_POWER_S   16

Definition at line 191 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL0_RTSENA

#define AR5K_4W_TX_DESC_CTL0_RTSENA   0x00400000

Definition at line 192 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL0_VEOL

#define AR5K_4W_TX_DESC_CTL0_VEOL   0x00800000

Definition at line 193 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL0_CLRDMASK

#define AR5K_4W_TX_DESC_CTL0_CLRDMASK   0x01000000

Definition at line 194 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL0_ANT_MODE_XMIT

#define AR5K_4W_TX_DESC_CTL0_ANT_MODE_XMIT   0x1e000000

Definition at line 195 of file desc.h.

Referenced by ath5k_hw_setup_4word_tx_desc().

◆ AR5K_4W_TX_DESC_CTL0_ANT_MODE_XMIT_S

#define AR5K_4W_TX_DESC_CTL0_ANT_MODE_XMIT_S   25

Definition at line 196 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL0_INTREQ

#define AR5K_4W_TX_DESC_CTL0_INTREQ   0x20000000

Definition at line 197 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL0_ENCRYPT_KEY_VALID

#define AR5K_4W_TX_DESC_CTL0_ENCRYPT_KEY_VALID   0x40000000

Definition at line 198 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL0_CTSENA

#define AR5K_4W_TX_DESC_CTL0_CTSENA   0x80000000

Definition at line 199 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_BUF_LEN

#define AR5K_4W_TX_DESC_CTL1_BUF_LEN   0x00000fff

Definition at line 203 of file desc.h.

Referenced by ath5k_hw_setup_4word_tx_desc().

◆ AR5K_4W_TX_DESC_CTL1_MORE

#define AR5K_4W_TX_DESC_CTL1_MORE   0x00001000

Definition at line 204 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX

#define AR5K_4W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX   0x000fe000

Definition at line 205 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_S

#define AR5K_4W_TX_DESC_CTL1_ENCRYPT_KEY_INDEX_S   13

Definition at line 206 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_FRAME_TYPE

#define AR5K_4W_TX_DESC_CTL1_FRAME_TYPE   0x00f00000

Definition at line 207 of file desc.h.

Referenced by ath5k_hw_setup_4word_tx_desc().

◆ AR5K_4W_TX_DESC_CTL1_FRAME_TYPE_S

#define AR5K_4W_TX_DESC_CTL1_FRAME_TYPE_S   20

Definition at line 208 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_NOACK

#define AR5K_4W_TX_DESC_CTL1_NOACK   0x01000000

Definition at line 209 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_COMP_PROC

#define AR5K_4W_TX_DESC_CTL1_COMP_PROC   0x06000000

Definition at line 210 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_COMP_PROC_S

#define AR5K_4W_TX_DESC_CTL1_COMP_PROC_S   25

Definition at line 211 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_COMP_IV_LEN

#define AR5K_4W_TX_DESC_CTL1_COMP_IV_LEN   0x18000000

Definition at line 212 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_COMP_IV_LEN_S

#define AR5K_4W_TX_DESC_CTL1_COMP_IV_LEN_S   27

Definition at line 213 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_COMP_ICV_LEN

#define AR5K_4W_TX_DESC_CTL1_COMP_ICV_LEN   0x60000000

Definition at line 214 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL1_COMP_ICV_LEN_S

#define AR5K_4W_TX_DESC_CTL1_COMP_ICV_LEN_S   29

Definition at line 215 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL2_RTS_DURATION

#define AR5K_4W_TX_DESC_CTL2_RTS_DURATION   0x00007fff

Definition at line 219 of file desc.h.

Referenced by ath5k_hw_setup_4word_tx_desc().

◆ AR5K_4W_TX_DESC_CTL2_DURATION_UPDATE_ENABLE

#define AR5K_4W_TX_DESC_CTL2_DURATION_UPDATE_ENABLE   0x00008000

Definition at line 220 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES0

#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES0   0x000f0000

Definition at line 221 of file desc.h.

Referenced by ath5k_hw_setup_4word_tx_desc().

◆ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES0_S

#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES0_S   16

Definition at line 222 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1

#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1   0x00f00000

Definition at line 223 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1_S

#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1_S   20

Definition at line 224 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2

#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2   0x0f000000

Definition at line 225 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2_S

#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2_S   24

Definition at line 226 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES3

#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES3   0xf0000000

Definition at line 227 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL2_XMIT_TRIES3_S

#define AR5K_4W_TX_DESC_CTL2_XMIT_TRIES3_S   28

Definition at line 228 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL3_XMIT_RATE0

#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE0   0x0000001f

Definition at line 232 of file desc.h.

Referenced by ath5k_hw_proc_4word_tx_status(), and ath5k_hw_setup_4word_tx_desc().

◆ AR5K_4W_TX_DESC_CTL3_XMIT_RATE1

#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE1   0x000003e0

Definition at line 233 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL3_XMIT_RATE1_S

#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE1_S   5

Definition at line 234 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL3_XMIT_RATE2

#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE2   0x00007c00

Definition at line 235 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL3_XMIT_RATE2_S

#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE2_S   10

Definition at line 236 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL3_XMIT_RATE3

#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE3   0x000f8000

Definition at line 237 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL3_XMIT_RATE3_S

#define AR5K_4W_TX_DESC_CTL3_XMIT_RATE3_S   15

Definition at line 238 of file desc.h.

◆ AR5K_4W_TX_DESC_CTL3_RTS_CTS_RATE

#define AR5K_4W_TX_DESC_CTL3_RTS_CTS_RATE   0x01f00000

Definition at line 239 of file desc.h.

Referenced by ath5k_hw_setup_4word_tx_desc().

◆ AR5K_4W_TX_DESC_CTL3_RTS_CTS_RATE_S

#define AR5K_4W_TX_DESC_CTL3_RTS_CTS_RATE_S   20

Definition at line 240 of file desc.h.

◆ AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK

#define AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK   0x00000001

Definition at line 252 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS0_EXCESSIVE_RETRIES

#define AR5K_DESC_TX_STATUS0_EXCESSIVE_RETRIES   0x00000002

Definition at line 253 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS0_FIFO_UNDERRUN

#define AR5K_DESC_TX_STATUS0_FIFO_UNDERRUN   0x00000004

Definition at line 254 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS0_FILTERED

#define AR5K_DESC_TX_STATUS0_FILTERED   0x00000008

Definition at line 255 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT

#define AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT   0x000000f0

Definition at line 260 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT_S

#define AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT_S   4

Definition at line 261 of file desc.h.

◆ AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT

#define AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT   0x00000f00

Definition at line 266 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT_S

#define AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT_S   8

Definition at line 267 of file desc.h.

◆ AR5K_DESC_TX_STATUS0_VIRT_COLL_COUNT

#define AR5K_DESC_TX_STATUS0_VIRT_COLL_COUNT   0x0000f000

Definition at line 268 of file desc.h.

◆ AR5K_DESC_TX_STATUS0_VIRT_COLL_COUNT_S

#define AR5K_DESC_TX_STATUS0_VIRT_COLL_COUNT_S   12

Definition at line 269 of file desc.h.

◆ AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP

#define AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP   0xffff0000

Definition at line 270 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP_S

#define AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP_S   16

Definition at line 271 of file desc.h.

◆ AR5K_DESC_TX_STATUS1_DONE

#define AR5K_DESC_TX_STATUS1_DONE   0x00000001

Definition at line 274 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS1_SEQ_NUM

#define AR5K_DESC_TX_STATUS1_SEQ_NUM   0x00001ffe

Definition at line 275 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS1_SEQ_NUM_S

#define AR5K_DESC_TX_STATUS1_SEQ_NUM_S   1

Definition at line 276 of file desc.h.

◆ AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH

#define AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH   0x001fe000

Definition at line 277 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), and ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH_S

#define AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH_S   13

Definition at line 278 of file desc.h.

◆ AR5K_DESC_TX_STATUS1_FINAL_TS_INDEX

#define AR5K_DESC_TX_STATUS1_FINAL_TS_INDEX   0x00600000

Definition at line 279 of file desc.h.

Referenced by ath5k_hw_proc_4word_tx_status().

◆ AR5K_DESC_TX_STATUS1_FINAL_TS_INDEX_S

#define AR5K_DESC_TX_STATUS1_FINAL_TS_INDEX_S   21

Definition at line 280 of file desc.h.

◆ AR5K_DESC_TX_STATUS1_COMP_SUCCESS

#define AR5K_DESC_TX_STATUS1_COMP_SUCCESS   0x00800000

Definition at line 281 of file desc.h.

◆ AR5K_DESC_TX_STATUS1_XMIT_ANTENNA

#define AR5K_DESC_TX_STATUS1_XMIT_ANTENNA   0x01000000

Definition at line 282 of file desc.h.

Referenced by ath5k_hw_proc_4word_tx_status().

◆ AR5K_RXDESC_INTREQ

#define AR5K_RXDESC_INTREQ   0x0020

Definition at line 326 of file desc.h.

Referenced by ath5k_hw_setup_rx_desc().

◆ AR5K_TXDESC_CLRDMASK

#define AR5K_TXDESC_CLRDMASK   0x0001

Definition at line 328 of file desc.h.

Referenced by ath5k_txbuf_setup().

◆ AR5K_TXDESC_NOACK

#define AR5K_TXDESC_NOACK   0x0002 /*[5211+]*/

Definition at line 329 of file desc.h.

◆ AR5K_TXDESC_RTSENA

#define AR5K_TXDESC_RTSENA   0x0004

Definition at line 330 of file desc.h.

Referenced by ath5k_hw_setup_2word_tx_desc(), and ath5k_hw_setup_4word_tx_desc().

◆ AR5K_TXDESC_CTSENA

#define AR5K_TXDESC_CTSENA   0x0008

Definition at line 331 of file desc.h.

Referenced by ath5k_hw_setup_2word_tx_desc(), ath5k_hw_setup_4word_tx_desc(), and ath5k_txbuf_setup().

◆ AR5K_TXDESC_INTREQ

#define AR5K_TXDESC_INTREQ   0x0010

Definition at line 332 of file desc.h.

Referenced by ath5k_txbuf_setup().

◆ AR5K_TXDESC_VEOL

#define AR5K_TXDESC_VEOL   0x0020 /*[5211+]*/

Definition at line 333 of file desc.h.

Function Documentation

◆ FILE_SECBOOT()

FILE_SECBOOT ( FORBIDDEN )

Variable Documentation

◆ rx_control_0

u32 rx_control_0

Definition at line 0 of file desc.h.

◆ rx_control_1

u32 rx_control_1

Definition at line 1 of file desc.h.

◆ rx_status_0

u32 rx_status_0

Definition at line 0 of file desc.h.

◆ rx_status_1

u32 rx_status_1

Definition at line 1 of file desc.h.

◆ rx_error_0

u32 rx_error_0

Definition at line 0 of file desc.h.

◆ rx_error_1

u32 rx_error_1

Definition at line 1 of file desc.h.

◆ tx_control_0

u32 tx_control_0

Definition at line 0 of file desc.h.

◆ tx_control_1

u32 tx_control_1

Definition at line 1 of file desc.h.

◆ tx_control_2

u32 tx_control_2

Definition at line 30 of file desc.h.

◆ tx_control_3

u32 tx_control_3

Definition at line 43 of file desc.h.

◆ tx_status_0

u32 tx_status_0

Definition at line 0 of file desc.h.

◆ tx_status_1

u32 tx_status_1

Definition at line 1 of file desc.h.

◆ tx_ctl

struct ath5k_hw_4w_tx_ctl tx_ctl

Definition at line 0 of file desc.h.

Referenced by ath5k_hw_proc_2word_tx_status(), ath5k_hw_proc_4word_tx_status(), ath5k_hw_setup_2word_tx_desc(), and ath5k_hw_setup_4word_tx_desc().

◆ tx_stat

struct ath5k_hw_tx_status tx_stat

Definition at line 1 of file desc.h.

◆ rx_ctl

struct ath5k_hw_rx_ctl rx_ctl

Definition at line 0 of file desc.h.

Referenced by ath5k_hw_setup_rx_desc().

◆ rx_stat

struct ath5k_hw_rx_status rx_stat

Definition at line 2 of file desc.h.

◆ rx_err

struct ath5k_hw_rx_error rx_err

Definition at line 3 of file desc.h.

Referenced by ath5k_hw_proc_5212_rx_status(), and igbvf_process_rx_packets().

◆ [union]

union { ... } u

Referenced by acpi_name(), apply_dns_settings(), asn1_built(), denumerate_int_setting(), draw_setting_row(), efi_guid_ntoa(), efi_pxe_ip_filter(), efi_shim_unlock(), efipci_ioremap(), fc_fill_sockaddr(), is_pnp_bios(), md4_digest(), md5_digest(), phantom_get_macaddr(), png_type_name(), select_setting_row(), sha1_digest(), sha256_digest(), sha512_digest(), sis630e_get_mac_addr(), and ucode_vendor_name().

◆ ds_link

u32 ds_link

Definition at line 0 of file desc.h.

Referenced by ar9002_hw_get_desc_link(), ar9002_hw_set_desc_link(), ar9003_hw_get_desc_link(), and ar9003_hw_set_desc_link().

◆ ds_data

u32 ds_data

Definition at line 1 of file desc.h.

◆ ds_tx5210

struct ath5k_hw_5210_tx_desc ds_tx5210

Definition at line 4 of file desc.h.

◆ ds_tx5212

struct ath5k_hw_5212_tx_desc ds_tx5212

Definition at line 5 of file desc.h.

◆ ds_rx

struct ath5k_hw_all_rx_desc ds_rx

Definition at line 6 of file desc.h.

◆ ud

struct arbelprm_ud_send_wqe ud

Definition at line 1 of file arbel.h.

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