iPXE
mlx_pci_priv.c
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1 /*
2  * MlxPciPriv.c
3  *
4  * Created on: Jan 21, 2015
5  * Author: maord
6  */
7 
8 #include <ipxe/pci.h>
9 
10 #include "../../mlx_utils/include/private/mlx_pci_priv.h"
11 
12 
13 static
16  IN mlx_utils *utils,
20  )
21 {
23  if (read) {
24  status = pci_read_config_byte(utils->pci, offset, buffer);
25  }else {
26  status = pci_write_config_byte(utils->pci, offset, *buffer);
27  }
28  return status;
29 }
30 
31 static
34  IN mlx_utils *utils,
38  )
39 {
41  if (read) {
42  status = pci_read_config_word(utils->pci, offset, buffer);
43  }else {
44  status = pci_write_config_word(utils->pci, offset, *buffer);
45  }
46  return status;
47 }
48 
49 static
52  IN mlx_utils *utils,
56  )
57 {
59  if (read) {
60  status = pci_read_config_dword(utils->pci, offset, buffer);
61  }else {
62  status = pci_write_config_dword(utils->pci, offset, *buffer);
63  }
64  return status;
65 }
66 static
69  IN mlx_utils *utils,
71  IN mlx_pci_width width,
75  )
76 {
79  mlx_uintn iteration = 0;
80  if( width == MlxPciWidthUint64) {
81  width = MlxPciWidthUint32;
82  count = count * 2;
83  }
84 
85  for(;iteration < count ; iteration++) {
86  switch (width){
87  case MlxPciWidthUint8:
88  status = mlx_pci_config_byte(utils, read , offset++, tmp++);
89  break;
90  case MlxPciWidthUint16:
92  tmp += 2;
93  offset += 2;
94  break;
95  case MlxPciWidthUint32:
97  tmp += 4;
98  offset += 4;
99  break;
100  default:
102  }
103  if(status != MLX_SUCCESS) {
104  goto config_error;
105  }
106  }
107 config_error:
108  return status;
109 }
112  IN mlx_utils *utils
113  )
114 {
116  adjust_pci_device ( utils->pci );
117 #ifdef DEVICE_CX3
118  utils->config = ioremap ( pci_bar_start ( utils->pci, PCI_BASE_ADDRESS_0),
119  0x100000 );
120 #endif
121  return status;
122 }
123 
126  IN mlx_utils *utils __attribute__ ((unused))
127  )
128 {
130 #ifdef DEVICE_CX3
131  iounmap( utils->config );
132 #endif
133  return status;
134 }
135 
138  IN mlx_utils *utils,
139  IN mlx_pci_width width,
143  )
144 {
146  status = mlx_pci_config(utils, TRUE, width, offset, count, buffer);
147  return status;
148 }
149 
152  IN mlx_utils *utils,
153  IN mlx_pci_width width,
157  )
158 {
160  status = mlx_pci_config(utils, FALSE, width, offset, count, buffer);
161  return status;
162 }
163 
166  IN mlx_utils *utils __attribute__ ((unused)),
168  IN mlx_uint8 bar_index __attribute__ ((unused)),
172  )
173 {
174  if (buffer == NULL || width != MlxPciWidthUint32)
175  return MLX_INVALID_PARAMETER;
176  *((mlx_uint32 *)buffer) = readl(offset);
177  return MLX_SUCCESS;
178 }
179 
182  IN mlx_utils *utils __attribute__ ((unused)),
184  IN mlx_uint8 bar_index __attribute__ ((unused)),
188  )
189 {
190  if (buffer == NULL || width != MlxPciWidthUint32)
191  return MLX_INVALID_PARAMETER;
192  barrier();
193  writel(*((mlx_uint32 *)buffer), offset);
194  return MLX_SUCCESS;
195 }
uint8_t mlx_boolean
#define MLX_INVALID_PARAMETER
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
mlx_status mlx_pci_mem_write_priv(IN mlx_utils *utils, IN mlx_pci_width width, IN mlx_uint8 bar_index, IN mlx_uint64 offset, IN mlx_uintn count, IN mlx_void *buffer)
Definition: mlx_pci_priv.c:181
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
static mlx_status mlx_pci_config_word(IN mlx_utils *utils, IN mlx_boolean read, IN mlx_uint32 offset, IN OUT mlx_uint16 *buffer)
Definition: mlx_pci_priv.c:33
#define PCI_BASE_ADDRESS_0
Definition: pci.h:61
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
Definition: netvsc.h:16
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:149
mlx_status mlx_pci_write_priv(IN mlx_utils *utils, IN mlx_pci_width width, IN mlx_uint32 offset, IN mlx_uintn count, IN mlx_void *buffer)
Definition: mlx_pci_priv.c:151
mlx_pci_width
Definition: mlx_pci.h:27
mlx_status mlx_pci_init_priv(IN mlx_utils *utils)
Definition: mlx_pci_priv.c:111
uint8_t status
Status.
Definition: ena.h:16
uint32_t mlx_uint32
#define OUT
Definition: mlx_utils.h:29
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
static mlx_status mlx_pci_config_byte(IN mlx_utils *utils, IN mlx_boolean read, IN mlx_uint32 offset, IN OUT mlx_uint8 *buffer)
Definition: mlx_pci_priv.c:15
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
A 16-bit general register.
Definition: registers.h:24
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
Definition: pci.c:96
#define MLX_SUCCESS
static mlx_status mlx_pci_config_dword(IN mlx_utils *utils, IN mlx_boolean read, IN mlx_uint32 offset, IN OUT mlx_uint32 *buffer)
Definition: mlx_pci_priv.c:51
mlx_status mlx_pci_mem_read_priv(IN mlx_utils *utils, IN mlx_pci_width width, IN mlx_uint8 bar_index, IN mlx_uint64 offset, IN mlx_uintn count, OUT mlx_void *buffer)
Definition: mlx_pci_priv.c:165
static mlx_status mlx_pci_config(IN mlx_utils *utils, IN mlx_boolean read, IN mlx_pci_width width, IN mlx_uint32 offset, IN mlx_uintn count, IN OUT mlx_void *buffer)
Definition: mlx_pci_priv.c:68
device device nvs read
Definition: threewire.h:60
int pci_write_config_byte(struct pci_device *pci, unsigned int where, uint8_t value)
Write byte to PCI configuration space.
PCI bus.
uint8_t * tmp
Definition: entropy.h:156
#define TRUE
Definition: tlan.h:46
uint16_t mlx_uint16
mlx_status mlx_pci_teardown_priv(IN mlx_utils *utils)
Definition: mlx_pci_priv.c:125
void mlx_void
#define IN
Definition: mlx_utils.h:28
unsigned long mlx_uintn
uint8_t mlx_uint8
uint8_t unused[32]
Unused.
Definition: eltorito.h:15
#define barrier()
Optimisation barrier.
Definition: compiler.h:655
uint16_t count
Number of entries.
Definition: ena.h:22
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
void iounmap(volatile const void *io_addr)
Unmap I/O address.
#define FALSE
Definition: tlan.h:45
int mlx_status
uint64_t mlx_uint64
void * ioremap(unsigned long bus_addr, size_t len)
Map bus address as an I/O address.
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
mlx_status mlx_pci_read_priv(IN mlx_utils *utils, IN mlx_pci_width width, IN mlx_uint32 offset, IN mlx_uintn count, OUT mlx_void *buffer)
Definition: mlx_pci_priv.c:137
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.