iPXE
pci.c
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
3  *
4  * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
5  * Munro, in turn based on the Linux kernel's PCI implementation.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of the
10  * License, or any later version.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20  * 02110-1301, USA.
21  *
22  * You can also choose to distribute this program under the terms of
23  * the Unmodified Binary Distribution Licence (as given in the file
24  * COPYING.UBDL), provided that you have satisfied its requirements.
25  */
26 
27 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
28 
29 #include <stdint.h>
30 #include <stdlib.h>
31 #include <stdio.h>
32 #include <string.h>
33 #include <errno.h>
34 #include <ipxe/tables.h>
35 #include <ipxe/device.h>
36 #include <ipxe/pci.h>
37 
38 /** @file
39  *
40  * PCI bus
41  *
42  */
43 
44 static void pcibus_remove ( struct root_device *rootdev );
45 
46 /**
47  * Read PCI BAR
48  *
49  * @v pci PCI device
50  * @v reg PCI register number
51  * @ret bar Base address register
52  *
53  * Reads the specified PCI base address register, including the flags
54  * portion. 64-bit BARs will be handled automatically. If the value
55  * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
56  * high dword is non-zero on a 32-bit platform), then the value
57  * returned will be zero plus the flags for a 64-bit BAR. Unreachable
58  * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
59  */
60 static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
61  uint32_t low;
62  uint32_t high;
63 
64  pci_read_config_dword ( pci, reg, &low );
67  pci_read_config_dword ( pci, reg + 4, &high );
68  if ( high ) {
69  if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
70  return ( ( ( uint64_t ) high << 32 ) | low );
71  } else {
72  DBGC ( pci, PCI_FMT " unhandled 64-bit BAR "
73  "%08x%08x\n",
74  PCI_ARGS ( pci ), high, low );
76  }
77  }
78  }
79  return low;
80 }
81 
82 /**
83  * Find the start of a PCI BAR
84  *
85  * @v pci PCI device
86  * @v reg PCI register number
87  * @ret start BAR start address
88  *
89  * Reads the specified PCI base address register, and returns the
90  * address portion of the BAR (i.e. without the flags).
91  *
92  * If the address exceeds the size of an unsigned long (i.e. if a
93  * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
94  * return value will be zero.
95  */
96 unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
97  unsigned long bar;
98 
99  bar = pci_bar ( pci, reg );
100  if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
101  return ( bar & ~PCI_BASE_ADDRESS_IO_MASK );
102  } else {
103  return ( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
104  }
105 }
106 
107 /**
108  * Read membase and ioaddr for a PCI device
109  *
110  * @v pci PCI device
111  *
112  * This scans through all PCI BARs on the specified device. The first
113  * valid memory BAR is recorded as pci_device::membase, and the first
114  * valid IO BAR is recorded as pci_device::ioaddr.
115  *
116  * 64-bit BARs are handled automatically. On a 32-bit platform, if a
117  * 64-bit BAR has a non-zero high dword, it will be regarded as
118  * invalid.
119  */
120 static void pci_read_bases ( struct pci_device *pci ) {
121  unsigned long bar;
122  int reg;
123 
124  /* Clear any existing base addresses */
125  pci->ioaddr = 0;
126  pci->membase = 0;
127 
128  /* Get first memory and I/O BAR addresses */
129  for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
130  bar = pci_bar ( pci, reg );
131  if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
132  if ( ! pci->ioaddr )
133  pci->ioaddr =
134  ( bar & ~PCI_BASE_ADDRESS_IO_MASK );
135  } else {
136  if ( ! pci->membase )
137  pci->membase =
138  ( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
139  /* Skip next BAR if 64-bit */
140  if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
141  reg += 4;
142  }
143  }
144 }
145 
146 /**
147  * Enable PCI device
148  *
149  * @v pci PCI device
150  *
151  * Set device to be a busmaster in case BIOS neglected to do so. Also
152  * adjust PCI latency timer to a reasonable value, 32.
153  */
154 void adjust_pci_device ( struct pci_device *pci ) {
155  unsigned short new_command, pci_command;
156  unsigned char pci_latency;
157 
158  pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
159  new_command = ( pci_command | PCI_COMMAND_MASTER |
161  if ( pci_command != new_command ) {
162  DBGC ( pci, PCI_FMT " device not enabled by BIOS! Updating "
163  "PCI command %04x->%04x\n",
164  PCI_ARGS ( pci ), pci_command, new_command );
165  pci_write_config_word ( pci, PCI_COMMAND, new_command );
166  }
167 
168  pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
169  if ( pci_latency < 32 ) {
170  DBGC ( pci, PCI_FMT " latency timer is unreasonably low at "
171  "%d. Setting to 32.\n", PCI_ARGS ( pci ), pci_latency );
173  }
174 }
175 
176 /**
177  * Read PCI device configuration
178  *
179  * @v pci PCI device
180  * @ret rc Return status code
181  */
182 int pci_read_config ( struct pci_device *pci ) {
184  uint8_t hdrtype;
185  uint32_t tmp;
186 
187  /* Ignore all but the first function on non-multifunction devices */
188  if ( PCI_FUNC ( pci->busdevfn ) != 0 ) {
189  busdevfn = pci->busdevfn;
190  pci->busdevfn = PCI_FIRST_FUNC ( pci->busdevfn );
191  pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
192  pci->busdevfn = busdevfn;
193  if ( ! ( hdrtype & PCI_HEADER_TYPE_MULTI ) )
194  return -ENODEV;
195  }
196 
197  /* Check for physical device presence */
199  if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
200  return -ENODEV;
201 
202  /* Populate struct pci_device */
203  pci->vendor = ( tmp & 0xffff );
204  pci->device = ( tmp >> 16 );
206  pci->class = ( tmp >> 8 );
208  pci_read_bases ( pci );
209 
210  /* Initialise generic device component */
211  snprintf ( pci->dev.name, sizeof ( pci->dev.name ), "%04x:%02x:%02x.%x",
212  PCI_SEG ( pci->busdevfn ), PCI_BUS ( pci->busdevfn ),
213  PCI_SLOT ( pci->busdevfn ), PCI_FUNC ( pci->busdevfn ) );
214  pci->dev.desc.bus_type = BUS_TYPE_PCI;
215  pci->dev.desc.location = pci->busdevfn;
216  pci->dev.desc.vendor = pci->vendor;
217  pci->dev.desc.device = pci->device;
218  pci->dev.desc.class = pci->class;
219  pci->dev.desc.ioaddr = pci->ioaddr;
220  pci->dev.desc.irq = pci->irq;
221  INIT_LIST_HEAD ( &pci->dev.siblings );
222  INIT_LIST_HEAD ( &pci->dev.children );
223 
224  return 0;
225 }
226 
227 /**
228  * Find next device on PCI bus
229  *
230  * @v pci PCI device to fill in
231  * @v busdevfn Starting bus:dev.fn address
232  * @ret busdevfn Bus:dev.fn address of next PCI device
233  * @ret rc Return status code
234  */
235 int pci_find_next ( struct pci_device *pci, uint32_t *busdevfn ) {
236  static struct pci_range range;
237  uint8_t hdrtype;
238  uint8_t sub;
239  uint32_t end;
240  unsigned int count;
241  int rc;
242 
243  /* Find next PCI device, if any */
244  do {
245  /* Find next PCI bus:dev.fn address range, if necessary */
246  if ( ( *busdevfn - range.start ) >= range.count ) {
247  pci_discover ( *busdevfn, &range );
248  if ( *busdevfn < range.start )
249  *busdevfn = range.start;
250  if ( ( *busdevfn - range.start ) >= range.count )
251  break;
252  }
253 
254  /* Check for PCI device existence */
255  memset ( pci, 0, sizeof ( *pci ) );
256  pci_init ( pci, *busdevfn );
257  if ( ( rc = pci_read_config ( pci ) ) != 0 )
258  continue;
259 
260  /* If device is a bridge, expand the PCI bus:dev.fn
261  * address range as needed.
262  */
263  pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
264  hdrtype &= PCI_HEADER_TYPE_MASK;
265  if ( hdrtype == PCI_HEADER_TYPE_BRIDGE ) {
266  pci_read_config_byte ( pci, PCI_SUBORDINATE, &sub );
267  end = PCI_BUSDEVFN ( PCI_SEG ( *busdevfn ),
268  ( sub + 1 ), 0, 0 );
269  count = ( end - range.start );
270  if ( count > range.count ) {
271  DBGC ( pci, PCI_FMT " found subordinate bus "
272  "%#02x\n", PCI_ARGS ( pci ), sub );
273  range.count = count;
274  }
275  }
276 
277  /* Return this device */
278  return 0;
279 
280  } while ( ++(*busdevfn) );
281 
282  return -ENODEV;
283 }
284 
285 /**
286  * Find driver for PCI device
287  *
288  * @v pci PCI device
289  * @ret rc Return status code
290  */
291 int pci_find_driver ( struct pci_device *pci ) {
292  struct pci_driver *driver;
293  struct pci_device_id *id;
294  unsigned int i;
295 
296  for_each_table_entry ( driver, PCI_DRIVERS ) {
297  if ( ( driver->class.class ^ pci->class ) & driver->class.mask )
298  continue;
299  for ( i = 0 ; i < driver->id_count ; i++ ) {
300  id = &driver->ids[i];
301  if ( ( id->vendor != PCI_ANY_ID ) &&
302  ( id->vendor != pci->vendor ) )
303  continue;
304  if ( ( id->device != PCI_ANY_ID ) &&
305  ( id->device != pci->device ) )
306  continue;
307  pci_set_driver ( pci, driver, id );
308  return 0;
309  }
310  }
311  return -ENOENT;
312 }
313 
314 /**
315  * Probe a PCI device
316  *
317  * @v pci PCI device
318  * @ret rc Return status code
319  *
320  * Searches for a driver for the PCI device. If a driver is found,
321  * its probe() routine is called.
322  */
323 int pci_probe ( struct pci_device *pci ) {
324  int rc;
325 
326  DBGC ( pci, PCI_FMT " (%04x:%04x) has driver \"%s\"\n",
327  PCI_ARGS ( pci ), pci->vendor, pci->device, pci->id->name );
328  DBGC ( pci, PCI_FMT " has mem %lx io %lx irq %d\n",
329  PCI_ARGS ( pci ), pci->membase, pci->ioaddr, pci->irq );
330 
331  if ( ( rc = pci->driver->probe ( pci ) ) != 0 ) {
332  DBGC ( pci, PCI_FMT " probe failed: %s\n",
333  PCI_ARGS ( pci ), strerror ( rc ) );
334  return rc;
335  }
336 
337  return 0;
338 }
339 
340 /**
341  * Remove a PCI device
342  *
343  * @v pci PCI device
344  */
345 void pci_remove ( struct pci_device *pci ) {
346  pci->driver->remove ( pci );
347  DBGC ( pci, PCI_FMT " removed\n", PCI_ARGS ( pci ) );
348 }
349 
350 /**
351  * Probe PCI root bus
352  *
353  * @v rootdev PCI bus root device
354  *
355  * Scans the PCI bus for devices and registers all devices it can
356  * find.
357  */
358 static int pcibus_probe ( struct root_device *rootdev ) {
359  struct pci_device *pci = NULL;
360  uint32_t busdevfn = 0;
361  int rc;
362 
363  do {
364  /* Allocate struct pci_device */
365  if ( ! pci )
366  pci = malloc ( sizeof ( *pci ) );
367  if ( ! pci ) {
368  rc = -ENOMEM;
369  goto err;
370  }
371 
372  /* Find next PCI device, if any */
373  if ( ( rc = pci_find_next ( pci, &busdevfn ) ) != 0 )
374  break;
375 
376  /* Look for a driver */
377  if ( ( rc = pci_find_driver ( pci ) ) != 0 ) {
378  DBGC ( pci, PCI_FMT " (%04x:%04x class %06x) has no "
379  "driver\n", PCI_ARGS ( pci ), pci->vendor,
380  pci->device, pci->class );
381  continue;
382  }
383 
384  /* Add to device hierarchy */
385  pci->dev.parent = &rootdev->dev;
386  list_add ( &pci->dev.siblings, &rootdev->dev.children );
387 
388  /* Look for a driver */
389  if ( ( rc = pci_probe ( pci ) ) == 0 ) {
390  /* pcidev registered, we can drop our ref */
391  pci = NULL;
392  } else {
393  /* Not registered; re-use struct pci_device */
394  list_del ( &pci->dev.siblings );
395  }
396 
397  } while ( ++busdevfn );
398 
399  free ( pci );
400  return 0;
401 
402  err:
403  free ( pci );
404  pcibus_remove ( rootdev );
405  return rc;
406 }
407 
408 /**
409  * Remove PCI root bus
410  *
411  * @v rootdev PCI bus root device
412  */
413 static void pcibus_remove ( struct root_device *rootdev ) {
414  struct pci_device *pci;
415  struct pci_device *tmp;
416 
417  list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
418  dev.siblings ) {
419  pci_remove ( pci );
420  list_del ( &pci->dev.siblings );
421  free ( pci );
422  }
423 }
424 
425 /** PCI bus root device driver */
426 static struct root_driver pci_root_driver = {
427  .probe = pcibus_probe,
428  .remove = pcibus_remove,
429 };
430 
431 /** PCI bus root device */
432 struct root_device pci_root_device __root_device = {
433  .dev = { .name = "PCI" },
434  .driver = &pci_root_driver,
435 };
#define PCI_FUNC(busdevfn)
Definition: pci.h:279
#define PCI_HEADER_TYPE_BRIDGE
PCI-to-PCI bridge header.
Definition: pci.h:55
uint32_t start
Starting bus:dev.fn address.
Definition: pci_io.h:23
unsigned long membase
Memory base.
Definition: pci.h:215
uint8_t irq
Interrupt number.
Definition: pci.h:229
#define PCI_BUS(busdevfn)
Definition: pci.h:277
static struct root_driver pci_root_driver
PCI bus root device driver.
Definition: pci.c:426
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
uint32_t low
Low 16 bits of address.
Definition: myson.h:19
static __always_inline void struct pci_range * range
Definition: efi_pci_api.h:43
struct pci_class_id class
PCI class ID.
Definition: pci.h:251
struct pci_driver * driver
Driver for this device.
Definition: pci.h:233
A PCI driver.
Definition: pci.h:245
int pci_find_driver(struct pci_device *pci)
Find driver for PCI device.
Definition: pci.c:291
static unsigned int unsigned int reg
Definition: myson.h:162
void(* remove)(struct pci_device *pci)
Remove device.
Definition: pci.h:264
uint32_t class
Device class.
Definition: pci.h:227
#define PCI_LATENCY_TIMER
PCI latency timer.
Definition: pci.h:50
#define list_add(new, head)
Add a new entry to the head of a list.
Definition: list.h:69
unsigned long ioaddr
I/O address.
Definition: pci.h:221
unsigned int id_count
Number of entries in PCI ID table.
Definition: pci.h:249
Error codes.
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:247
unsigned long ioaddr
I/O address.
Definition: device.h:37
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
#define PCI_INTERRUPT_LINE
PCI interrupt line.
Definition: pci.h:90
static void pci_set_driver(struct pci_device *pci, struct pci_driver *driver, struct pci_device_id *id)
Set PCI driver.
Definition: pci.h:343
#define PCI_HEADER_TYPE_MASK
Header type mask.
Definition: pci.h:57
#define DBGC(...)
Definition: compiler.h:505
char name[40]
Name.
Definition: device.h:75
#define ENOENT
No such file or directory.
Definition: errno.h:514
unsigned long class
Device class.
Definition: device.h:35
A root device.
Definition: device.h:94
unsigned long long uint64_t
Definition: stdint.h:13
#define PCI_BASE_ADDRESS_0
Definition: pci.h:62
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
uint32_t mask
Class mask.
Definition: pci.h:189
#define PCI_COMMAND
PCI command.
Definition: pci.h:25
uint32_t class
Class.
Definition: pci.h:187
#define PCI_BASE_ADDRESS_5
Definition: pci.h:67
struct device dev
Device chain.
Definition: device.h:99
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:154
unsigned int vendor
Vendor ID.
Definition: device.h:31
struct device * parent
Bus device.
Definition: device.h:85
struct device dev
Generic device.
Definition: pci.h:208
#define PCI_HEADER_TYPE
PCI header type.
Definition: pci.h:53
#define PCI_COMMAND_MASTER
Bus master.
Definition: pci.h:28
#define list_del(list)
Delete an entry from a list.
Definition: list.h:119
#define PCI_BASE_ADDRESS_IO_MASK
I/O BAR mask.
Definition: pci.h:69
uint16_t busdevfn
PCI bus:dev.fn address.
Definition: ena.h:28
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define PCI_COMMAND_IO
I/O space.
Definition: pci.h:26
struct root_device pci_root_device __root_device
PCI bus root device.
Definition: pci.c:432
int pci_find_next(struct pci_device *pci, uint32_t *busdevfn)
Find next device on PCI bus.
Definition: pci.c:235
uint16_t device
Device ID.
Definition: pci.h:225
#define BUS_TYPE_PCI
PCI bus type.
Definition: device.h:43
static void pci_read_bases(struct pci_device *pci)
Read membase and ioaddr for a PCI device.
Definition: pci.c:120
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
unsigned int irq
IRQ.
Definition: device.h:39
#define PCI_FIRST_FUNC(busdevfn)
Definition: pci.h:280
static int pcibus_probe(struct root_device *rootdev)
Probe PCI root bus.
Definition: pci.c:358
A PCI bus:dev.fn address range.
Definition: pci_io.h:21
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
Definition: pci.c:96
unsigned int location
Location.
Definition: device.h:29
#define list_for_each_entry_safe(pos, tmp, head, member)
Iterate over entries in a list, safe against deletion of the current entry.
Definition: list.h:447
uint8_t id
Request identifier.
Definition: ena.h:12
uint32_t high
High 32 bits of address.
Definition: myson.h:20
#define PCI_BUSDEVFN(segment, bus, slot, func)
Definition: pci_io.h:28
#define PCI_BASE_ADDRESS_MEM_MASK
Memory BAR mask.
Definition: pci.h:72
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:78
static void(* free)(struct refcnt *refcnt))
Definition: refcnt.h:54
#define PCI_BASE_ADDRESS_MEM_TYPE_64
64-bit memory
Definition: pci.h:70
int pci_write_config_byte(struct pci_device *pci, unsigned int where, uint8_t value)
Write byte to PCI configuration space.
#define PCI_FMT
PCI device debug message format.
Definition: pci.h:305
#define PCI_SLOT(busdevfn)
Definition: pci.h:278
PCI bus.
struct list_head siblings
Devices on the same bus.
Definition: device.h:81
A PCI device.
Definition: pci.h:206
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK
Memory type mask.
Definition: pci.h:71
uint8_t * tmp
Definition: entropy.h:156
int pci_read_config(struct pci_device *pci)
Read PCI device configuration.
Definition: pci.c:182
#define for_each_table_entry(pointer, table)
Iterate through all entries within a linker table.
Definition: tables.h:385
A root device driver.
Definition: device.h:107
#define ENODEV
No such device.
Definition: errno.h:509
void pci_remove(struct pci_device *pci)
Remove a PCI device.
Definition: pci.c:345
#define PCI_VENDOR_ID
PCI vendor ID.
Definition: pci.h:19
unsigned char uint8_t
Definition: stdint.h:10
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
A PCI device ID list entry.
Definition: pci.h:170
unsigned int uint32_t
Definition: stdint.h:12
int(* probe)(struct root_device *rootdev)
Add root device.
Definition: device.h:116
void * malloc(size_t size)
Allocate memory.
Definition: malloc.c:583
const char * name
Name.
Definition: pci.h:172
unsigned int count
Number of bus:dev.fn addresses within this range.
Definition: pci_io.h:25
#define PCI_BASE_ADDRESS_SPACE_IO
I/O BAR.
Definition: pci.h:68
uint16_t vendor
Vendor ID.
Definition: pci.h:223
void pci_discover(uint32_t busdevfn, struct pci_range *range)
Find next PCI bus:dev.fn address range in system.
uint32_t busdevfn
Segment, bus, device, and function (bus:dev.fn) number.
Definition: pci.h:231
#define INIT_LIST_HEAD(list)
Initialise a list head.
Definition: list.h:45
unsigned int bus_type
Bus type.
Definition: device.h:24
static void pcibus_remove(struct root_device *rootdev)
Remove PCI root bus.
Definition: pci.c:413
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:258
unsigned int device
Device ID.
Definition: device.h:33
struct list_head children
Devices attached to this device.
Definition: device.h:83
uint16_t count
Number of entries.
Definition: ena.h:22
#define PCI_ARGS(pci)
PCI device debug message arguments.
Definition: pci.h:308
struct pci_device_id * id
Driver device ID.
Definition: pci.h:241
uint32_t end
Ending offset.
Definition: netvsc.h:18
#define PCI_REVISION
PCI revision.
Definition: pci.h:44
struct device_description desc
Device description.
Definition: device.h:79
Linker tables.
Device model.
int snprintf(char *buf, size_t size, const char *fmt,...)
Write a formatted string to a buffer.
Definition: vsprintf.c:382
#define PCI_COMMAND_MEM
Memory space.
Definition: pci.h:27
#define PCI_SUBORDINATE
Subordinate bus number.
Definition: pci.h:149
static void pci_init(struct pci_device *pci, unsigned int busdevfn)
Initialise PCI device.
Definition: pci.h:332
static unsigned long pci_bar(struct pci_device *pci, unsigned int reg)
Read PCI BAR.
Definition: pci.c:60
#define PCI_SEG(busdevfn)
Definition: pci.h:276
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
int pci_probe(struct pci_device *pci)
Probe a PCI device.
Definition: pci.c:323
String functions.
#define PCI_HEADER_TYPE_MULTI
Multi-function device.
Definition: pci.h:58
#define PCI_ANY_ID
Match-anything ID.
Definition: pci.h:182
#define PCI_DRIVERS
PCI driver table.
Definition: pci.h:268
void * memset(void *dest, int character, size_t len) __nonnull
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.