iPXE
pci.c
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
3  *
4  * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
5  * Munro, in turn based on the Linux kernel's PCI implementation.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of the
10  * License, or any later version.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20  * 02110-1301, USA.
21  *
22  * You can also choose to distribute this program under the terms of
23  * the Unmodified Binary Distribution Licence (as given in the file
24  * COPYING.UBDL), provided that you have satisfied its requirements.
25  */
26 
27 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
28 
29 #include <stdint.h>
30 #include <stdlib.h>
31 #include <stdio.h>
32 #include <string.h>
33 #include <errno.h>
34 #include <ipxe/tables.h>
35 #include <ipxe/device.h>
36 #include <ipxe/pci.h>
37 
38 /** @file
39  *
40  * PCI bus
41  *
42  */
43 
44 static void pcibus_remove ( struct root_device *rootdev );
45 
46 /**
47  * Read PCI BAR
48  *
49  * @v pci PCI device
50  * @v reg PCI register number
51  * @ret bar Base address register
52  *
53  * Reads the specified PCI base address register, including the flags
54  * portion. 64-bit BARs will be handled automatically. If the value
55  * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
56  * high dword is non-zero on a 32-bit platform), then the value
57  * returned will be zero plus the flags for a 64-bit BAR. Unreachable
58  * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
59  */
60 static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
61  uint32_t low;
62  uint32_t high;
63 
64  pci_read_config_dword ( pci, reg, &low );
67  pci_read_config_dword ( pci, reg + 4, &high );
68  if ( high ) {
69  if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
70  return ( ( ( uint64_t ) high << 32 ) | low );
71  } else {
72  DBGC ( pci, PCI_FMT " unhandled 64-bit BAR "
73  "%08x%08x\n",
74  PCI_ARGS ( pci ), high, low );
76  }
77  }
78  }
79  return low;
80 }
81 
82 /**
83  * Find the start of a PCI BAR
84  *
85  * @v pci PCI device
86  * @v reg PCI register number
87  * @ret start BAR start address
88  *
89  * Reads the specified PCI base address register, and returns the
90  * address portion of the BAR (i.e. without the flags).
91  *
92  * If the address exceeds the size of an unsigned long (i.e. if a
93  * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
94  * return value will be zero.
95  */
96 unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
97  unsigned long bar;
98 
99  bar = pci_bar ( pci, reg );
100  if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
101  return ( bar & ~PCI_BASE_ADDRESS_IO_MASK );
102  } else {
103  return ( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
104  }
105 }
106 
107 /**
108  * Read membase and ioaddr for a PCI device
109  *
110  * @v pci PCI device
111  *
112  * This scans through all PCI BARs on the specified device. The first
113  * valid memory BAR is recorded as pci_device::membase, and the first
114  * valid IO BAR is recorded as pci_device::ioaddr.
115  *
116  * 64-bit BARs are handled automatically. On a 32-bit platform, if a
117  * 64-bit BAR has a non-zero high dword, it will be regarded as
118  * invalid.
119  */
120 static void pci_read_bases ( struct pci_device *pci ) {
121  unsigned long bar;
122  int reg;
123 
124  for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
125  bar = pci_bar ( pci, reg );
126  if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
127  if ( ! pci->ioaddr )
128  pci->ioaddr =
129  ( bar & ~PCI_BASE_ADDRESS_IO_MASK );
130  } else {
131  if ( ! pci->membase )
132  pci->membase =
133  ( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
134  /* Skip next BAR if 64-bit */
135  if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 )
136  reg += 4;
137  }
138  }
139 }
140 
141 /**
142  * Enable PCI device
143  *
144  * @v pci PCI device
145  *
146  * Set device to be a busmaster in case BIOS neglected to do so. Also
147  * adjust PCI latency timer to a reasonable value, 32.
148  */
149 void adjust_pci_device ( struct pci_device *pci ) {
150  unsigned short new_command, pci_command;
151  unsigned char pci_latency;
152 
153  pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
154  new_command = ( pci_command | PCI_COMMAND_MASTER |
156  if ( pci_command != new_command ) {
157  DBGC ( pci, PCI_FMT " device not enabled by BIOS! Updating "
158  "PCI command %04x->%04x\n",
159  PCI_ARGS ( pci ), pci_command, new_command );
160  pci_write_config_word ( pci, PCI_COMMAND, new_command );
161  }
162 
163  pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
164  if ( pci_latency < 32 ) {
165  DBGC ( pci, PCI_FMT " latency timer is unreasonably low at "
166  "%d. Setting to 32.\n", PCI_ARGS ( pci ), pci_latency );
168  }
169 }
170 
171 /**
172  * Read PCI device configuration
173  *
174  * @v pci PCI device
175  * @ret rc Return status code
176  */
177 int pci_read_config ( struct pci_device *pci ) {
178  uint32_t busdevfn;
179  uint8_t hdrtype;
180  uint32_t tmp;
181 
182  /* Ignore all but the first function on non-multifunction devices */
183  if ( PCI_FUNC ( pci->busdevfn ) != 0 ) {
184  busdevfn = pci->busdevfn;
185  pci->busdevfn = PCI_FIRST_FUNC ( pci->busdevfn );
186  pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
187  pci->busdevfn = busdevfn;
188  if ( ! ( hdrtype & PCI_HEADER_TYPE_MULTI ) )
189  return -ENODEV;
190  }
191 
192  /* Check for physical device presence */
194  if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
195  return -ENODEV;
196 
197  /* Populate struct pci_device */
198  pci->vendor = ( tmp & 0xffff );
199  pci->device = ( tmp >> 16 );
201  pci->class = ( tmp >> 8 );
203  pci_read_bases ( pci );
204 
205  /* Initialise generic device component */
206  snprintf ( pci->dev.name, sizeof ( pci->dev.name ), "%04x:%02x:%02x.%x",
207  PCI_SEG ( pci->busdevfn ), PCI_BUS ( pci->busdevfn ),
208  PCI_SLOT ( pci->busdevfn ), PCI_FUNC ( pci->busdevfn ) );
209  pci->dev.desc.bus_type = BUS_TYPE_PCI;
210  pci->dev.desc.location = pci->busdevfn;
211  pci->dev.desc.vendor = pci->vendor;
212  pci->dev.desc.device = pci->device;
213  pci->dev.desc.class = pci->class;
214  pci->dev.desc.ioaddr = pci->ioaddr;
215  pci->dev.desc.irq = pci->irq;
216  INIT_LIST_HEAD ( &pci->dev.siblings );
217  INIT_LIST_HEAD ( &pci->dev.children );
218 
219  return 0;
220 }
221 
222 /**
223  * Find next device on PCI bus
224  *
225  * @v pci PCI device to fill in
226  * @v busdevfn Starting bus:dev.fn address
227  * @ret busdevfn Bus:dev.fn address of next PCI device, or negative error
228  */
229 int pci_find_next ( struct pci_device *pci, unsigned int busdevfn ) {
230  static unsigned int end;
231  int rc;
232 
233  /* Determine number of PCI buses */
234  if ( ! end )
235  end = PCI_BUSDEVFN ( 0, pci_num_bus(), 0, 0 );
236 
237  /* Find next PCI device, if any */
238  for ( ; busdevfn < end ; busdevfn++ ) {
239  memset ( pci, 0, sizeof ( *pci ) );
240  pci_init ( pci, busdevfn );
241  if ( ( rc = pci_read_config ( pci ) ) == 0 )
242  return busdevfn;
243  }
244 
245  return -ENODEV;
246 }
247 
248 /**
249  * Find driver for PCI device
250  *
251  * @v pci PCI device
252  * @ret rc Return status code
253  */
254 int pci_find_driver ( struct pci_device *pci ) {
255  struct pci_driver *driver;
256  struct pci_device_id *id;
257  unsigned int i;
258 
259  for_each_table_entry ( driver, PCI_DRIVERS ) {
260  if ( ( driver->class.class ^ pci->class ) & driver->class.mask )
261  continue;
262  for ( i = 0 ; i < driver->id_count ; i++ ) {
263  id = &driver->ids[i];
264  if ( ( id->vendor != PCI_ANY_ID ) &&
265  ( id->vendor != pci->vendor ) )
266  continue;
267  if ( ( id->device != PCI_ANY_ID ) &&
268  ( id->device != pci->device ) )
269  continue;
270  pci_set_driver ( pci, driver, id );
271  return 0;
272  }
273  }
274  return -ENOENT;
275 }
276 
277 /**
278  * Probe a PCI device
279  *
280  * @v pci PCI device
281  * @ret rc Return status code
282  *
283  * Searches for a driver for the PCI device. If a driver is found,
284  * its probe() routine is called.
285  */
286 int pci_probe ( struct pci_device *pci ) {
287  int rc;
288 
289  DBGC ( pci, PCI_FMT " (%04x:%04x) has driver \"%s\"\n",
290  PCI_ARGS ( pci ), pci->vendor, pci->device, pci->id->name );
291  DBGC ( pci, PCI_FMT " has mem %lx io %lx irq %d\n",
292  PCI_ARGS ( pci ), pci->membase, pci->ioaddr, pci->irq );
293 
294  if ( ( rc = pci->driver->probe ( pci ) ) != 0 ) {
295  DBGC ( pci, PCI_FMT " probe failed: %s\n",
296  PCI_ARGS ( pci ), strerror ( rc ) );
297  return rc;
298  }
299 
300  return 0;
301 }
302 
303 /**
304  * Remove a PCI device
305  *
306  * @v pci PCI device
307  */
308 void pci_remove ( struct pci_device *pci ) {
309  pci->driver->remove ( pci );
310  DBGC ( pci, PCI_FMT " removed\n", PCI_ARGS ( pci ) );
311 }
312 
313 /**
314  * Probe PCI root bus
315  *
316  * @v rootdev PCI bus root device
317  *
318  * Scans the PCI bus for devices and registers all devices it can
319  * find.
320  */
321 static int pcibus_probe ( struct root_device *rootdev ) {
322  struct pci_device *pci = NULL;
323  int busdevfn = 0;
324  int rc;
325 
326  for ( busdevfn = 0 ; 1 ; busdevfn++ ) {
327 
328  /* Allocate struct pci_device */
329  if ( ! pci )
330  pci = malloc ( sizeof ( *pci ) );
331  if ( ! pci ) {
332  rc = -ENOMEM;
333  goto err;
334  }
335 
336  /* Find next PCI device, if any */
337  busdevfn = pci_find_next ( pci, busdevfn );
338  if ( busdevfn < 0 )
339  break;
340 
341  /* Look for a driver */
342  if ( ( rc = pci_find_driver ( pci ) ) != 0 ) {
343  DBGC ( pci, PCI_FMT " (%04x:%04x class %06x) has no "
344  "driver\n", PCI_ARGS ( pci ), pci->vendor,
345  pci->device, pci->class );
346  continue;
347  }
348 
349  /* Add to device hierarchy */
350  pci->dev.parent = &rootdev->dev;
351  list_add ( &pci->dev.siblings, &rootdev->dev.children );
352 
353  /* Look for a driver */
354  if ( ( rc = pci_probe ( pci ) ) == 0 ) {
355  /* pcidev registered, we can drop our ref */
356  pci = NULL;
357  } else {
358  /* Not registered; re-use struct pci_device */
359  list_del ( &pci->dev.siblings );
360  }
361  }
362 
363  free ( pci );
364  return 0;
365 
366  err:
367  free ( pci );
368  pcibus_remove ( rootdev );
369  return rc;
370 }
371 
372 /**
373  * Remove PCI root bus
374  *
375  * @v rootdev PCI bus root device
376  */
377 static void pcibus_remove ( struct root_device *rootdev ) {
378  struct pci_device *pci;
379  struct pci_device *tmp;
380 
381  list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
382  dev.siblings ) {
383  pci_remove ( pci );
384  list_del ( &pci->dev.siblings );
385  free ( pci );
386  }
387 }
388 
389 /** PCI bus root device driver */
390 static struct root_driver pci_root_driver = {
391  .probe = pcibus_probe,
392  .remove = pcibus_remove,
393 };
394 
395 /** PCI bus root device */
396 struct root_device pci_root_device __root_device = {
397  .dev = { .name = "PCI" },
398  .driver = &pci_root_driver,
399 };
#define PCI_FUNC(busdevfn)
Definition: pci.h:258
unsigned long membase
Memory base.
Definition: pci.h:194
uint8_t irq
Interrupt number.
Definition: pci.h:208
#define PCI_BUS(busdevfn)
Definition: pci.h:256
static struct root_driver pci_root_driver
PCI bus root device driver.
Definition: pci.c:390
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
struct pci_class_id class
PCI class ID.
Definition: pci.h:230
struct pci_driver * driver
Driver for this device.
Definition: pci.h:212
A PCI driver.
Definition: pci.h:224
int pci_find_driver(struct pci_device *pci)
Find driver for PCI device.
Definition: pci.c:254
void(* remove)(struct pci_device *pci)
Remove device.
Definition: pci.h:243
uint32_t class
Device class.
Definition: pci.h:206
#define PCI_LATENCY_TIMER
PCI latency timer.
Definition: pci.h:49
#define list_add(new, head)
Add a new entry to the head of a list.
Definition: list.h:69
unsigned long ioaddr
I/O address.
Definition: pci.h:200
unsigned int id_count
Number of entries in PCI ID table.
Definition: pci.h:228
Error codes.
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:226
unsigned long ioaddr
I/O address.
Definition: device.h:37
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
#define PCI_INTERRUPT_LINE
PCI interrupt line.
Definition: pci.h:89
static void pci_set_driver(struct pci_device *pci, struct pci_driver *driver, struct pci_device_id *id)
Set PCI driver.
Definition: pci.h:324
#define DBGC(...)
Definition: compiler.h:505
char name[40]
Name.
Definition: device.h:75
#define ENOENT
No such file or directory.
Definition: errno.h:514
unsigned long class
Device class.
Definition: device.h:35
A root device.
Definition: device.h:94
unsigned long long uint64_t
Definition: stdint.h:13
#define PCI_BUSDEVFN(segment, bus, slot, func)
Definition: pci.h:259
#define PCI_BASE_ADDRESS_0
Definition: pci.h:61
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
uint32_t mask
Class mask.
Definition: pci.h:170
#define PCI_COMMAND
PCI command.
Definition: pci.h:24
uint32_t class
Class.
Definition: pci.h:168
#define PCI_BASE_ADDRESS_5
Definition: pci.h:66
struct device dev
Device chain.
Definition: device.h:99
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:149
unsigned int vendor
Vendor ID.
Definition: device.h:31
struct device * parent
Bus device.
Definition: device.h:85
struct device dev
Generic device.
Definition: pci.h:189
#define PCI_HEADER_TYPE
PCI header type.
Definition: pci.h:52
#define PCI_COMMAND_MASTER
Bus master.
Definition: pci.h:27
#define list_del(list)
Delete an entry from a list.
Definition: list.h:119
#define PCI_BASE_ADDRESS_IO_MASK
I/O BAR mask.
Definition: pci.h:68
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define PCI_COMMAND_IO
I/O space.
Definition: pci.h:25
struct root_device pci_root_device __root_device
PCI bus root device.
Definition: pci.c:396
uint16_t device
Device ID.
Definition: pci.h:204
#define BUS_TYPE_PCI
PCI bus type.
Definition: device.h:43
static void pci_read_bases(struct pci_device *pci)
Read membase and ioaddr for a PCI device.
Definition: pci.c:120
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
unsigned int irq
IRQ.
Definition: device.h:39
#define PCI_FIRST_FUNC(busdevfn)
Definition: pci.h:262
static int pcibus_probe(struct root_device *rootdev)
Probe PCI root bus.
Definition: pci.c:321
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
Definition: pci.c:96
uint32_t low
Low 16 bits of address.
Definition: intel.h:21
unsigned int location
Location.
Definition: device.h:29
#define list_for_each_entry_safe(pos, tmp, head, member)
Iterate over entries in a list, safe against deletion of the current entry.
Definition: list.h:447
uint8_t id
Request identifier.
Definition: ena.h:12
#define PCI_BASE_ADDRESS_MEM_MASK
Memory BAR mask.
Definition: pci.h:71
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:78
static void(* free)(struct refcnt *refcnt))
Definition: refcnt.h:54
#define PCI_BASE_ADDRESS_MEM_TYPE_64
64-bit memory
Definition: pci.h:69
int pci_write_config_byte(struct pci_device *pci, unsigned int where, uint8_t value)
Write byte to PCI configuration space.
#define PCI_FMT
PCI device debug message format.
Definition: pci.h:287
static unsigned int unsigned int reg
Definition: intel.h:245
#define PCI_SLOT(busdevfn)
Definition: pci.h:257
PCI bus.
struct list_head siblings
Devices on the same bus.
Definition: device.h:81
A PCI device.
Definition: pci.h:187
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK
Memory type mask.
Definition: pci.h:70
uint8_t * tmp
Definition: entropy.h:156
int pci_read_config(struct pci_device *pci)
Read PCI device configuration.
Definition: pci.c:177
#define for_each_table_entry(pointer, table)
Iterate through all entries within a linker table.
Definition: tables.h:358
A root device driver.
Definition: device.h:107
#define ENODEV
No such device.
Definition: errno.h:509
void pci_remove(struct pci_device *pci)
Remove a PCI device.
Definition: pci.c:308
#define PCI_VENDOR_ID
PCI vendor ID.
Definition: pci.h:18
unsigned char uint8_t
Definition: stdint.h:10
int pci_find_next(struct pci_device *pci, unsigned int busdevfn)
Find next device on PCI bus.
Definition: pci.c:229
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
A PCI device ID list entry.
Definition: pci.h:151
unsigned int uint32_t
Definition: stdint.h:12
int(* probe)(struct root_device *rootdev)
Add root device.
Definition: device.h:116
void * malloc(size_t size)
Allocate memory.
Definition: malloc.c:583
const char * name
Name.
Definition: pci.h:153
#define PCI_BASE_ADDRESS_SPACE_IO
I/O BAR.
Definition: pci.h:67
uint16_t vendor
Vendor ID.
Definition: pci.h:202
uint32_t busdevfn
Segment, bus, device, and function (bus:dev.fn) number.
Definition: pci.h:210
#define INIT_LIST_HEAD(list)
Initialise a list head.
Definition: list.h:45
unsigned int bus_type
Bus type.
Definition: device.h:24
static void pcibus_remove(struct root_device *rootdev)
Remove PCI root bus.
Definition: pci.c:377
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:237
unsigned int device
Device ID.
Definition: device.h:33
int pci_num_bus(void)
Determine number of PCI buses within system.
struct list_head children
Devices attached to this device.
Definition: device.h:83
#define PCI_ARGS(pci)
PCI device debug message arguments.
Definition: pci.h:290
struct pci_device_id * id
Driver device ID.
Definition: pci.h:220
uint32_t end
Ending offset.
Definition: netvsc.h:18
#define PCI_REVISION
PCI revision.
Definition: pci.h:43
struct device_description desc
Device description.
Definition: device.h:79
Linker tables.
Device model.
int snprintf(char *buf, size_t size, const char *fmt,...)
Write a formatted string to a buffer.
Definition: vsprintf.c:382
#define PCI_COMMAND_MEM
Memory space.
Definition: pci.h:26
uint32_t high
High 32 bits of address.
Definition: intel.h:22
static void pci_init(struct pci_device *pci, unsigned int busdevfn)
Initialise PCI device.
Definition: pci.h:313
static unsigned long pci_bar(struct pci_device *pci, unsigned int reg)
Read PCI BAR.
Definition: pci.c:60
#define PCI_SEG(busdevfn)
Definition: pci.h:255
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
int pci_probe(struct pci_device *pci)
Probe a PCI device.
Definition: pci.c:286
String functions.
#define PCI_HEADER_TYPE_MULTI
Multi-function device.
Definition: pci.h:57
#define PCI_ANY_ID
Match-anything ID.
Definition: pci.h:163
#define PCI_DRIVERS
PCI driver table.
Definition: pci.h:247
void * memset(void *dest, int character, size_t len) __nonnull
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.