iPXE
pci.c
Go to the documentation of this file.
1/*
2 * Copyright (C) 2006 Michael Brown <mbrown@fensystems.co.uk>.
3 *
4 * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David
5 * Munro, in turn based on the Linux kernel's PCI implementation.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 * You can also choose to distribute this program under the terms of
23 * the Unmodified Binary Distribution Licence (as given in the file
24 * COPYING.UBDL), provided that you have satisfied its requirements.
25 */
26
27FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
28FILE_SECBOOT ( PERMITTED );
29
30#include <stdint.h>
31#include <stdlib.h>
32#include <stdio.h>
33#include <string.h>
34#include <errno.h>
35#include <ipxe/tables.h>
36#include <ipxe/device.h>
37#include <ipxe/pci.h>
38
39/** @file
40 *
41 * PCI bus
42 *
43 */
44
45static void pcibus_remove ( struct root_device *rootdev );
46
47/**
48 * Read PCI BAR
49 *
50 * @v pci PCI device
51 * @v reg PCI register number
52 * @ret bar Base address register
53 *
54 * Reads the specified PCI base address register, including the flags
55 * portion. 64-bit BARs will be handled automatically. If the value
56 * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the
57 * high dword is non-zero on a 32-bit platform), then the value
58 * returned will be zero plus the flags for a 64-bit BAR. Unreachable
59 * 64-bit BARs are therefore returned as uninitialised 64-bit BARs.
60 */
61static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) {
64
65 pci_read_config_dword ( pci, reg, &low );
68 pci_read_config_dword ( pci, reg + 4, &high );
69 if ( high ) {
70 if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
71 return ( ( ( uint64_t ) high << 32 ) | low );
72 } else {
73 DBGC ( pci, PCI_FMT " unhandled 64-bit BAR "
74 "%08x%08x\n",
75 PCI_ARGS ( pci ), high, low );
77 }
78 }
79 }
80 return low;
81}
82
83/**
84 * Find the start of a PCI BAR
85 *
86 * @v pci PCI device
87 * @v reg PCI register number
88 * @ret start BAR start address
89 *
90 * Reads the specified PCI base address register, and returns the
91 * address portion of the BAR (i.e. without the flags).
92 *
93 * If the address exceeds the size of an unsigned long (i.e. if a
94 * 64-bit BAR has a non-zero high dword on a 32-bit machine), the
95 * return value will be zero.
96 */
97unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) {
98 unsigned long bar;
99
100 bar = pci_bar ( pci, reg );
101 if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
102 return ( bar & ~PCI_BASE_ADDRESS_IO_MASK );
103 } else {
104 return ( bar & ~PCI_BASE_ADDRESS_MEM_MASK );
105 }
106}
107
108/**
109 * Set the start of a PCI BAR
110 *
111 * @v pci PCI device
112 * @v reg PCI register number
113 * @v start BAR start address
114 */
115void pci_bar_set ( struct pci_device *pci, unsigned int reg,
116 unsigned long start ) {
117 unsigned int type;
121
122 /* Save the original command register and disable decoding */
125 ( cmd & ~( PCI_COMMAND_MEM |
126 PCI_COMMAND_IO ) ) );
127
128 /* Check for a 64-bit BAR */
129 pci_read_config_dword ( pci, reg, &low );
132
133 /* Write low 32 bits */
134 low = start;
136
137 /* Write high 32 bits, if applicable */
139 if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) {
140 high = ( ( ( uint64_t ) start ) >> 32 );
141 } else {
142 high = 0;
143 }
144 pci_write_config_dword ( pci, reg + 4, high );
145 }
146
147 /* Restore the original command register */
149}
150
151/**
152 * Get the size of a PCI BAR
153 *
154 * @v pci PCI device
155 * @v reg PCI register number
156 * @ret size BAR size
157 *
158 * Most drivers should not need to call this function. It is not
159 * necessary to map the whole PCI BAR, only the portion that will be
160 * used for register access. Since register offsets are almost always
161 * fixed by hardware design, the length of the mapped portion will
162 * almost always be a compile-time constant.
163 */
164unsigned long pci_bar_size ( struct pci_device *pci, unsigned int reg ) {
165 unsigned long start;
166 unsigned long size;
168
169 /* Save the original command register and disable decoding */
172 ( cmd & ~( PCI_COMMAND_MEM |
173 PCI_COMMAND_IO ) ) );
174
175 /* Save the original start address */
176 start = pci_bar_start ( pci, reg );
177
178 /* Set all possible bits */
179 pci_bar_set ( pci, reg, -1UL );
180
181 /* Determine size by finding lowest set bit */
182 size = pci_bar_start ( pci, reg );
183 size &= ( -size );
184
185 /* Restore the original start address */
186 pci_bar_set ( pci, reg, start );
187
188 /* Restore the original command register */
190
191 return size;
192}
193
194/**
195 * Read membase and ioaddr for a PCI device
196 *
197 * @v pci PCI device
198 *
199 * This scans through all PCI BARs on the specified device. The first
200 * valid memory BAR is recorded as pci_device::membase, and the first
201 * valid IO BAR is recorded as pci_device::ioaddr.
202 *
203 * 64-bit BARs are handled automatically. On a 32-bit platform, if a
204 * 64-bit BAR has a non-zero high dword, it will be regarded as
205 * invalid.
206 */
207static void pci_read_bases ( struct pci_device *pci ) {
208 unsigned long bar;
209 int reg;
210
211 /* Clear any existing base addresses */
212 pci->ioaddr = 0;
213 pci->membase = 0;
214
215 /* Get first memory and I/O BAR addresses */
216 for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) {
217 bar = pci_bar ( pci, reg );
218 if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) {
219 if ( ! pci->ioaddr )
220 pci->ioaddr =
222 } else {
223 if ( ! pci->membase )
224 pci->membase =
226 /* Skip next BAR if 64-bit */
228 reg += 4;
229 }
230 }
231}
232
233/**
234 * Enable PCI device
235 *
236 * @v pci PCI device
237 *
238 * Set device to be a busmaster in case BIOS neglected to do so. Also
239 * adjust PCI latency timer to a reasonable value, 32.
240 */
241void adjust_pci_device ( struct pci_device *pci ) {
242 unsigned short new_command, pci_command;
243 unsigned char pci_latency;
244
245 pci_read_config_word ( pci, PCI_COMMAND, &pci_command );
246 new_command = ( pci_command | PCI_COMMAND_MASTER |
248 if ( pci_command != new_command ) {
249 DBGC ( pci, PCI_FMT " device not enabled by BIOS! Updating "
250 "PCI command %04x->%04x\n",
251 PCI_ARGS ( pci ), pci_command, new_command );
252 pci_write_config_word ( pci, PCI_COMMAND, new_command );
253 }
254
255 pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency);
256 if ( pci_latency < 32 ) {
257 DBGC ( pci, PCI_FMT " latency timer is unreasonably low at "
258 "%d. Setting to 32.\n", PCI_ARGS ( pci ), pci_latency );
260 }
261}
262
263/**
264 * Read PCI device configuration
265 *
266 * @v pci PCI device
267 * @ret rc Return status code
268 */
269int pci_read_config ( struct pci_device *pci ) {
271 uint8_t hdrtype;
273
274 /* Ignore all but the first function on non-multifunction devices */
275 if ( PCI_FUNC ( pci->busdevfn ) != 0 ) {
276 busdevfn = pci->busdevfn;
277 pci->busdevfn = PCI_FIRST_FUNC ( pci->busdevfn );
278 pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
279 pci->busdevfn = busdevfn;
280 if ( ! ( hdrtype & PCI_HEADER_TYPE_MULTI ) )
281 return -ENODEV;
282 }
283
284 /* Check for physical device presence */
286 if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
287 return -ENODEV;
288
289 /* Populate struct pci_device */
290 pci->vendor = ( tmp & 0xffff );
291 pci->device = ( tmp >> 16 );
293 pci->class = ( tmp >> 8 );
296 pci_read_bases ( pci );
297
298 /* Initialise generic device component */
299 snprintf ( pci->dev.name, sizeof ( pci->dev.name ), "%04x:%02x:%02x.%x",
300 PCI_SEG ( pci->busdevfn ), PCI_BUS ( pci->busdevfn ),
301 PCI_SLOT ( pci->busdevfn ), PCI_FUNC ( pci->busdevfn ) );
303 pci->dev.desc.location = pci->busdevfn;
304 pci->dev.desc.vendor = pci->vendor;
305 pci->dev.desc.device = pci->device;
306 pci->dev.desc.class = pci->class;
307 pci->dev.desc.ioaddr = pci->ioaddr;
308 pci->dev.desc.irq = pci->irq;
309 INIT_LIST_HEAD ( &pci->dev.siblings );
310 INIT_LIST_HEAD ( &pci->dev.children );
311
312 return 0;
313}
314
315/**
316 * Find next device on PCI bus
317 *
318 * @v pci PCI device to fill in
319 * @v busdevfn Starting bus:dev.fn address
320 * @ret busdevfn Bus:dev.fn address of next PCI device
321 * @ret rc Return status code
322 */
324 static struct pci_range range;
325 uint8_t hdrtype;
326 uint8_t sub;
328 unsigned int count;
329 int rc;
330
331 /* Find next PCI device, if any */
332 do {
333 /* Find next PCI bus:dev.fn address range, if necessary */
334 if ( ( *busdevfn - range.start ) >= range.count ) {
336 if ( *busdevfn < range.start )
337 *busdevfn = range.start;
338 if ( ( *busdevfn - range.start ) >= range.count )
339 break;
340 }
341
342 /* Check for PCI device existence */
343 memset ( pci, 0, sizeof ( *pci ) );
344 pci_init ( pci, *busdevfn );
345 if ( ( rc = pci_read_config ( pci ) ) != 0 )
346 continue;
347
348 /* If device is a bridge, expand the PCI bus:dev.fn
349 * address range as needed.
350 */
351 pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
352 hdrtype &= PCI_HEADER_TYPE_MASK;
353 if ( hdrtype == PCI_HEADER_TYPE_BRIDGE ) {
355 if ( sub <= PCI_BUS ( *busdevfn ) ) {
356 DBGC ( pci, PCI_FMT " ignoring invalid "
357 "subordinate bus %#02x\n",
358 PCI_ARGS ( pci ), sub );
359 } else {
361 ( sub + 1 ), 0, 0 );
362 count = ( end - range.start );
363 if ( count > range.count ) {
364 DBGC ( pci, PCI_FMT " found "
365 "subordinate bus %#02x\n",
366 PCI_ARGS ( pci ), sub );
367 range.count = count;
368 }
369 }
370 }
371
372 /* Return this device */
373 return 0;
374
375 } while ( ++(*busdevfn) );
376
377 return -ENODEV;
378}
379
380/**
381 * Find driver for PCI device
382 *
383 * @v pci PCI device
384 * @ret rc Return status code
385 */
386int pci_find_driver ( struct pci_device *pci ) {
387 struct pci_driver *driver;
388 struct pci_device_id *id;
389 unsigned int i;
390
392 if ( ( driver->class.class ^ pci->class ) & driver->class.mask )
393 continue;
394 for ( i = 0 ; i < driver->id_count ; i++ ) {
395 id = &driver->ids[i];
396 if ( ( id->vendor != PCI_ANY_ID ) &&
397 ( id->vendor != pci->vendor ) )
398 continue;
399 if ( ( id->device != PCI_ANY_ID ) &&
400 ( id->device != pci->device ) )
401 continue;
402 pci_set_driver ( pci, driver, id );
403 return 0;
404 }
405 }
406 return -ENOENT;
407}
408
409/**
410 * Probe a PCI device
411 *
412 * @v pci PCI device
413 * @ret rc Return status code
414 *
415 * Searches for a driver for the PCI device. If a driver is found,
416 * its probe() routine is called.
417 */
418int pci_probe ( struct pci_device *pci ) {
419 int rc;
420
421 DBGC ( pci, PCI_FMT " (%04x:%04x) has driver \"%s\"\n",
422 PCI_ARGS ( pci ), pci->vendor, pci->device, pci->id->name );
423 DBGC ( pci, PCI_FMT " has mem %lx io %lx irq %d\n",
424 PCI_ARGS ( pci ), pci->membase, pci->ioaddr, pci->irq );
425
426 if ( ( rc = pci->driver->probe ( pci ) ) != 0 ) {
427 DBGC ( pci, PCI_FMT " probe failed: %s\n",
428 PCI_ARGS ( pci ), strerror ( rc ) );
429 return rc;
430 }
431
432 return 0;
433}
434
435/**
436 * Remove a PCI device
437 *
438 * @v pci PCI device
439 */
440void pci_remove ( struct pci_device *pci ) {
441 pci->driver->remove ( pci );
442 DBGC ( pci, PCI_FMT " removed\n", PCI_ARGS ( pci ) );
443}
444
445/**
446 * Probe PCI root bus
447 *
448 * @v rootdev PCI bus root device
449 *
450 * Scans the PCI bus for devices and registers all devices it can
451 * find.
452 */
453static int pcibus_probe ( struct root_device *rootdev ) {
454 struct pci_device *pci = NULL;
455 uint32_t busdevfn = 0;
456 int rc;
457
458 do {
459 /* Allocate struct pci_device */
460 if ( ! pci )
461 pci = malloc ( sizeof ( *pci ) );
462 if ( ! pci ) {
463 rc = -ENOMEM;
464 goto err;
465 }
466
467 /* Find next PCI device, if any */
468 if ( ( rc = pci_find_next ( pci, &busdevfn ) ) != 0 )
469 break;
470
471 /* Skip automatic probing if prohibited */
472 if ( ! pci_can_probe ( pci ) )
473 continue;
474
475 /* Look for a driver */
476 if ( ( rc = pci_find_driver ( pci ) ) != 0 ) {
477 DBGC ( pci, PCI_FMT " (%04x:%04x class %06x) has no "
478 "driver\n", PCI_ARGS ( pci ), pci->vendor,
479 pci->device, pci->class );
480 continue;
481 }
482
483 /* Add to device hierarchy */
484 pci->dev.parent = &rootdev->dev;
485 list_add ( &pci->dev.siblings, &rootdev->dev.children );
486
487 /* Look for a driver */
488 if ( ( rc = pci_probe ( pci ) ) == 0 ) {
489 /* pcidev registered, we can drop our ref */
490 pci = NULL;
491 } else {
492 /* Not registered; re-use struct pci_device */
493 list_del ( &pci->dev.siblings );
494 }
495
496 } while ( ++busdevfn );
497
498 free ( pci );
499 return 0;
500
501 err:
502 free ( pci );
503 pcibus_remove ( rootdev );
504 return rc;
505}
506
507/**
508 * Remove PCI root bus
509 *
510 * @v rootdev PCI bus root device
511 */
512static void pcibus_remove ( struct root_device *rootdev ) {
513 struct pci_device *pci;
514 struct pci_device *tmp;
515
516 list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children,
517 dev.siblings ) {
518 pci_remove ( pci );
519 list_del ( &pci->dev.siblings );
520 free ( pci );
521 }
522}
523
524/** PCI bus root device driver */
526 .probe = pcibus_probe,
527 .remove = pcibus_remove,
528};
529
530/** PCI bus root device */
531struct root_device pci_root_device __root_device = {
532 .dev = { .name = "PCI" },
533 .driver = &pci_root_driver,
534};
535
536/* Drag in objects via pcibus_probe() */
538
539/* Drag in PCI configuration */
540REQUIRE_OBJECT ( config_pci );
#define NULL
NULL pointer (VOID *)
Definition Base.h:322
struct golan_eqe_cmd cmd
Definition CIB_PRM.h:1
struct arbelprm_rc_send_wqe rc
Definition arbel.h:3
unsigned short uint16_t
Definition stdint.h:11
unsigned int uint32_t
Definition stdint.h:12
unsigned long long uint64_t
Definition stdint.h:13
unsigned char uint8_t
Definition stdint.h:10
Device model.
#define BUS_TYPE_PCI
PCI bus type.
Definition device.h:44
#define __root_device
Declare a root device.
Definition device.h:136
uint8_t id
Request identifier.
Definition ena.h:1
uint32_t type
Operating system type.
Definition ena.h:1
uint16_t busdevfn
PCI bus:dev.fn address.
Definition ena.h:17
Error codes.
#define DBGC(...)
Definition compiler.h:505
uint32_t start
Starting offset.
Definition netvsc.h:1
uint16_t size
Buffer size.
Definition dwmac.h:3
static unsigned int count
Number of entries.
Definition dwmac.h:220
#define FILE_LICENCE(_licence)
Declare a particular licence as applying to a file.
Definition compiler.h:896
#define REQUIRE_OBJECT(object)
Require an object.
Definition compiler.h:202
#define ENOENT
No such file or directory.
Definition errno.h:515
#define ENOMEM
Not enough space.
Definition errno.h:535
#define ENODEV
No such device.
Definition errno.h:510
#define FILE_SECBOOT(_status)
Declare a file's UEFI Secure Boot permission status.
Definition compiler.h:926
#define REQUIRING_SYMBOL(symbol)
Specify the file's requiring symbol.
Definition compiler.h:140
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
int pci_can_probe(struct pci_device *pci)
Check if PCI bus probing is allowed.
void pci_discover(uint32_t busdevfn, struct pci_range *range)
Find next PCI bus:dev.fn address range in system.
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
#define PCI_BUSDEVFN(segment, bus, slot, func)
Definition pci_io.h:30
int pci_write_config_byte(struct pci_device *pci, unsigned int where, uint8_t value)
Write byte to PCI configuration space.
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
String functions.
void * memset(void *dest, int character, size_t len) __nonnull
unsigned long tmp
Definition linux_pci.h:65
#define list_for_each_entry_safe(pos, tmp, head, member)
Iterate over entries in a list, safe against deletion of the current entry.
Definition list.h:459
#define list_del(list)
Delete an entry from a list.
Definition list.h:120
#define INIT_LIST_HEAD(list)
Initialise a list head.
Definition list.h:46
#define list_add(new, head)
Add a new entry to the head of a list.
Definition list.h:70
void * malloc(size_t size)
Allocate memory.
Definition malloc.c:621
uint32_t high
High 32 bits of address.
Definition myson.h:1
uint32_t low
Low 16 bits of address.
Definition myson.h:0
static unsigned int unsigned int reg
Definition myson.h:162
uint32_t end
Ending offset.
Definition netvsc.h:7
static void pci_read_bases(struct pci_device *pci)
Read membase and ioaddr for a PCI device.
Definition pci.c:207
unsigned long pci_bar_size(struct pci_device *pci, unsigned int reg)
Get the size of a PCI BAR.
Definition pci.c:164
int pci_find_driver(struct pci_device *pci)
Find driver for PCI device.
Definition pci.c:386
int pci_find_next(struct pci_device *pci, uint32_t *busdevfn)
Find next device on PCI bus.
Definition pci.c:323
int pci_probe(struct pci_device *pci)
Probe a PCI device.
Definition pci.c:418
void pci_bar_set(struct pci_device *pci, unsigned int reg, unsigned long start)
Set the start of a PCI BAR.
Definition pci.c:115
int pci_read_config(struct pci_device *pci)
Read PCI device configuration.
Definition pci.c:269
void pci_remove(struct pci_device *pci)
Remove a PCI device.
Definition pci.c:440
static void pcibus_remove(struct root_device *rootdev)
Remove PCI root bus.
Definition pci.c:512
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition pci.c:241
static int pcibus_probe(struct root_device *rootdev)
Probe PCI root bus.
Definition pci.c:453
static unsigned long pci_bar(struct pci_device *pci, unsigned int reg)
Read PCI BAR.
Definition pci.c:61
static struct root_driver pci_root_driver
PCI bus root device driver.
Definition pci.c:525
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
Definition pci.c:97
PCI bus.
#define PCI_BASE_ADDRESS_SPACE_IO
I/O BAR.
Definition pci.h:69
#define PCI_ANY_ID
Match-anything ID.
Definition pci.h:187
#define PCI_HEADER_TYPE
PCI header type.
Definition pci.h:54
#define PCI_FMT
PCI device debug message format.
Definition pci.h:312
#define PCI_COMMAND_MEM
Memory space.
Definition pci.h:28
#define PCI_SEG(busdevfn)
Definition pci.h:283
#define PCI_SUBORDINATE
Subordinate bus number.
Definition pci.h:150
#define PCI_FUNC(busdevfn)
Definition pci.h:286
#define PCI_BUS(busdevfn)
Definition pci.h:284
#define PCI_ARGS(pci)
PCI device debug message arguments.
Definition pci.h:315
#define PCI_FIRST_FUNC(busdevfn)
Definition pci.h:287
#define PCI_INTERRUPT_LINE
PCI interrupt line.
Definition pci.h:91
static void pci_init(struct pci_device *pci, unsigned int busdevfn)
Initialise PCI device.
Definition pci.h:341
#define PCI_COMMAND_IO
I/O space.
Definition pci.h:27
#define PCI_HEADER_TYPE_MULTI
Multi-function device.
Definition pci.h:59
#define PCI_COMMAND_MASTER
Bus master.
Definition pci.h:29
#define PCI_HEADER_TYPE_MASK
Header type mask.
Definition pci.h:58
#define PCI_REVISION
PCI revision.
Definition pci.h:45
#define PCI_BASE_ADDRESS_MEM_MASK
Memory BAR mask.
Definition pci.h:73
#define PCI_BASE_ADDRESS_0
Definition pci.h:63
#define PCI_DRIVERS
PCI driver table.
Definition pci.h:275
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK
Memory type mask.
Definition pci.h:72
#define PCI_COMMAND
PCI command.
Definition pci.h:26
#define PCI_HEADER_TYPE_BRIDGE
PCI-to-PCI bridge header.
Definition pci.h:56
#define PCI_SLOT(busdevfn)
Definition pci.h:285
#define PCI_VENDOR_ID
PCI vendor ID.
Definition pci.h:20
#define PCI_LATENCY_TIMER
PCI latency timer.
Definition pci.h:51
#define PCI_BASE_ADDRESS_IO_MASK
I/O BAR mask.
Definition pci.h:70
#define PCI_BASE_ADDRESS_5
Definition pci.h:68
#define PCI_BASE_ADDRESS_MEM_TYPE_64
64-bit memory
Definition pci.h:71
static void pci_set_driver(struct pci_device *pci, struct pci_driver *driver, struct pci_device_id *id)
Set PCI driver.
Definition pci.h:352
struct pci_range range
PCI bus:dev.fn address range.
Definition pcicloud.c:40
static void(* free)(struct refcnt *refcnt))
Definition refcnt.h:55
char * strerror(int errno)
Retrieve string representation of error number.
Definition strerror.c:79
unsigned int bus_type
Bus type.
Definition device.h:25
unsigned int device
Device ID.
Definition device.h:34
unsigned int vendor
Vendor ID.
Definition device.h:32
unsigned long class
Device class.
Definition device.h:36
unsigned int location
Location.
Definition device.h:30
unsigned int irq
IRQ.
Definition device.h:40
unsigned long ioaddr
I/O address.
Definition device.h:38
struct device_description desc
Device description.
Definition device.h:83
struct device * parent
Bus device.
Definition device.h:89
struct list_head children
Devices attached to this device.
Definition device.h:87
struct list_head siblings
Devices on the same bus.
Definition device.h:85
char name[40]
Name.
Definition device.h:79
uint32_t class
Class.
Definition pci.h:192
uint32_t mask
Class mask.
Definition pci.h:194
A PCI device ID list entry.
Definition pci.h:175
const char * name
Name.
Definition pci.h:177
A PCI device.
Definition pci.h:211
unsigned long ioaddr
I/O address.
Definition pci.h:226
uint32_t busdevfn
Segment, bus, device, and function (bus:dev.fn) number.
Definition pci.h:238
unsigned long membase
Memory base.
Definition pci.h:220
uint32_t class
Device class.
Definition pci.h:232
uint8_t hdrtype
Header type.
Definition pci.h:236
uint8_t irq
Interrupt number.
Definition pci.h:234
struct pci_driver * driver
Driver for this device.
Definition pci.h:240
struct device dev
Generic device.
Definition pci.h:213
struct pci_device_id * id
Driver device ID.
Definition pci.h:248
uint16_t vendor
Vendor ID.
Definition pci.h:228
uint16_t device
Device ID.
Definition pci.h:230
A PCI driver.
Definition pci.h:252
void(* remove)(struct pci_device *pci)
Remove device.
Definition pci.h:271
struct pci_class_id class
PCI class ID.
Definition pci.h:258
struct pci_device_id * ids
PCI ID table.
Definition pci.h:254
int(* probe)(struct pci_device *pci)
Probe device.
Definition pci.h:265
unsigned int id_count
Number of entries in PCI ID table.
Definition pci.h:256
A PCI bus:dev.fn address range.
Definition pci_io.h:23
A root device.
Definition device.h:98
struct device dev
Device chain.
Definition device.h:103
A root device driver.
Definition device.h:111
Linker tables.
#define for_each_table_entry(pointer, table)
Iterate through all entries within a linker table.
Definition tables.h:386
int snprintf(char *buf, size_t size, const char *fmt,...)
Write a formatted string to a buffer.
Definition vsprintf.c:383