Cavium ThunderX Ethernet driver. More...

#include <stdint.h>
#include <ipxe/list.h>
#include <ipxe/netdevice.h>
#include <ipxe/uaccess.h>

Data Structures
struct	txnic_send_header
	A send header subdescriptor. More...

struct	txnic_send_gather
	A send gather subdescriptor. More...

struct	txnic_sqe
	A send queue entry. More...

struct	txnic_sq
	A send queue. More...

struct	txnic_rbdr_entry
	A receive buffer descriptor ring entry. More...

struct	txnic_rqe
	A receive queue entry. More...

struct	txnic_rq
	A receive queue. More...

struct	txnic_cqe_send
	A send completion queue entry. More...

struct	txnic_cqe_rx
	A receive completion queue entry. More...

struct	txnic_cqe_common
	Completion queue entry common fields. More...

union	txnic_cqe
	A completion queue entry. More...

struct	txnic_cq
	A completion queue. More...

struct	txnic
	A virtual NIC. More...

struct	txnic_pf
	A physical function. More...

struct	txnic_lmac_type
	An LMAC type. More...

union	txnic_lmac_address
	An LMAC address. More...

struct	txnic_lmac
	A Logical MAC (LMAC) More...

struct	txnic_bgx
	A BGX Ethernet interface. More...

Macros
#define	TXNIC_LINE_SIZE 128
	Size of a cache line. More...

#define	TXNIC_VF_BAR_SIZE 0x200000UL
	Virtual function BAR size. More...

#define	TXNIC_PF_BAR_SIZE 0x40000000UL
	Physical function BAR size. More...

#define	TXNIC_BGX_BAR_SIZE 0x400000UL
	BGX BAR size. More...

#define	TXNIC_NUM_BGX 2
	Maximum number of BGX Ethernet interfaces (per node) More...

#define	TXNIC_NUM_LMAC 4
	Maximum number of Logical MACs (per BGX) More...

#define	TXNIC_NUM_DMAC 32
	Maximum number of destination MAC addresses (per BGX) More...

#define	TXNIC_NUM_STEERING 8
	Maximum number of steering rules (per BGX) More...

#define	TXNIC_QS_SQ_CFG(q) ( ( (q) << 18 ) \| 0x010800 )
	Send queue configuration. More...

#define	TXNIC_QS_SQ_CFG_ENA ( 1ULL << 19 )

#define	TXNIC_QS_SQ_CFG_RESET ( 1ULL << 17 )

#define	TXNIC_QS_SQ_CFG_QSIZE(sz) ( ( ( uint64_t ) (sz) ) << 8 )

#define	TXNIC_QS_SQ_CFG_QSIZE_1K TXNIC_QS_SQ_CFG_QSIZE ( 0 )

#define	TXNIC_QS_SQ_BASE(q) ( ( (q) << 18 ) \| 0x010820 )
	Send queue base address. More...

#define	TXNIC_QS_SQ_HEAD(q) ( ( (q) << 18 ) \| 0x010828 )
	Send queue head pointer. More...

#define	TXNIC_QS_SQ_TAIL(q) ( ( (q) << 18 ) \| 0x010830 )
	Send queue tail pointer. More...

#define	TXNIC_QS_SQ_DOOR(q) ( ( (q) << 18 ) \| 0x010838 )
	Send queue doorbell. More...

#define	TXNIC_QS_SQ_STATUS(q) ( ( (q) << 18 ) \| 0x010840 )
	Send queue status. More...

#define	TXNIC_QS_SQ_STATUS_STOPPED ( 1ULL << 21 )

#define	TXNIC_SQ_STOP_MAX_WAIT_MS 100
	Maximum time to wait for a send queue to stop. More...

#define	TXNIC_SEND_HDR_FLAGS 0x14
	Flags for send header subdescriptor. More...

#define	TXNIC_SEND_GATHER_FLAGS 0x40
	Flags for send gather subdescriptor. More...

#define	TXNIC_SQE_SUBDESCS
	Number of subdescriptors per send queue entry. More...

#define	TXNIC_SQES ( 1024 / TXNIC_SQE_SUBDESCS )
	Number of send queue entries. More...

#define	TXNIC_SQ_FILL 32
	Send queue maximum fill level. More...

#define	TXNIC_SQ_ALIGN TXNIC_LINE_SIZE
	Send queue alignment. More...

#define	TXNIC_SQ_STRIDE sizeof ( struct txnic_sqe )
	Send queue stride. More...

#define	TXNIC_SQ_SIZE ( TXNIC_SQES * TXNIC_SQ_STRIDE )
	Send queue size. More...

#define	TXNIC_QS_RQ_CFG(q) ( ( (q) << 18 ) \| 0x010600 )
	Receive queue configuration. More...

#define	TXNIC_QS_RQ_CFG_ENA ( 1ULL << 1 )

#define	TXNIC_RQ_DISABLE_MAX_WAIT_MS 100
	Maximum time to wait for a receive queue to disable. More...

#define	TXNIC_QS_RBDR_CFG(q) ( ( (q) << 18 ) \| 0x010c00 )
	Receive buffer descriptor ring configuration. More...

#define	TXNIC_QS_RBDR_CFG_ENA ( 1ULL << 44 )

#define	TXNIC_QS_RBDR_CFG_RESET ( 1ULL << 43 )

#define	TXNIC_QS_RBDR_CFG_QSIZE(sz) ( ( ( uint64_t ) (sz) ) << 32 )

#define	TXNIC_QS_RBDR_CFG_QSIZE_8K TXNIC_QS_RBDR_CFG_QSIZE ( 0 )

#define	TXNIC_QS_RBDR_CFG_LINES(sz) ( ( ( uint64_t ) (sz) ) << 0 )

#define	TXNIC_QS_RBDR_BASE(q) ( ( (q) << 18 ) \| 0x010c20 )
	Receive buffer descriptor ring base address. More...

#define	TXNIC_QS_RBDR_HEAD(q) ( ( (q) << 18 ) \| 0x010c28 )
	Receive buffer descriptor ring head pointer. More...

#define	TXNIC_QS_RBDR_TAIL(q) ( ( (q) << 18 ) \| 0x010c30 )
	Receive buffer descriptor ring tail pointer. More...

#define	TXNIC_QS_RBDR_DOOR(q) ( ( (q) << 18 ) \| 0x010c38 )
	Receive buffer descriptor ring doorbell. More...

#define	TXNIC_QS_RBDR_STATUS0(q) ( ( (q) << 18 ) \| 0x010c40 )
	Receive buffer descriptor ring status 0. More...

#define	TXNIC_RQES 8192
	Number of receive queue entries. More...

#define	TXNIC_RQ_FILL 32
	Receive queue maximum fill level. More...

#define	TXNIC_RQE_SIZE
	Receive queue entry size. More...

#define	TXNIC_RQ_ALIGN TXNIC_LINE_SIZE
	Receive queue alignment. More...

#define	TXNIC_RQ_STRIDE sizeof ( struct txnic_rqe )
	Receive queue stride. More...

#define	TXNIC_RQ_SIZE ( TXNIC_RQES * TXNIC_RQ_STRIDE )
	Receive queue size. More...

#define	TXNIC_QS_CQ_CFG(q) ( ( (q) << 18 ) \| 0x010400 )
	Completion queue configuration. More...

#define	TXNIC_QS_CQ_CFG_ENA ( 1ULL << 42 )

#define	TXNIC_QS_CQ_CFG_RESET ( 1ULL << 41 )

#define	TXNIC_QS_CQ_CFG_QSIZE(sz) ( ( ( uint64_t ) (sz) ) << 32 )

#define	TXNIC_QS_CQ_CFG_QSIZE_256 TXNIC_QS_CQ_CFG_QSIZE ( 7 )

#define	TXNIC_CQ_DISABLE_MAX_WAIT_MS 100
	Maximum time to wait for a completion queue to disable. More...

#define	TXNIC_QS_CQ_BASE(q) ( ( (q) << 18 ) \| 0x010420 )
	Completion queue base address. More...

#define	TXNIC_QS_CQ_HEAD(q) ( ( (q) << 18 ) \| 0x010428 )
	Completion queue head pointer. More...

#define	TXNIC_QS_CQ_TAIL(q) ( ( (q) << 18 ) \| 0x010430 )
	Completion queue tail pointer. More...

#define	TXNIC_QS_CQ_DOOR(q) ( ( (q) << 18 ) \| 0x010438 )
	Completion queue doorbell. More...

#define	TXNIC_QS_CQ_STATUS(q) ( ( (q) << 18 ) \| 0x010440 )
	Completion queue status. More...

#define	TXNIC_QS_CQ_STATUS_QCOUNT(status) ( ( (status) >> 0 ) & 0xffff )

#define	TXNIC_QS_CQ_STATUS2(q) ( ( (q) << 18 ) \| 0x010448 )
	Completion queue status 2. More...

#define	TXNIC_CQE_TYPE_SEND 0x80
	Send completion queue entry type. More...

#define	TXNIC_CQE_TYPE_RX 0x20
	Receive completion queue entry type. More...

#define	TXNIC_CQE_RX_APAD_LEN(apad) ( (apad) >> 5 )
	Applied padding. More...

#define	TXNIC_CQES 256
	Number of completion queue entries. More...

#define	TXNIC_CQ_ALIGN 512
	Completion queue alignment. More...

#define	TXNIC_CQ_STRIDE 512
	Completion queue stride. More...

#define	TXNIC_CQ_SIZE ( TXNIC_CQES * TXNIC_CQ_STRIDE )
	Completion queue size. More...

#define	TXNIC_PF_CFG 0x000000
	Physical function configuration. More...

#define	TXNIC_PF_CFG_ENA ( 1ULL << 0 )

#define	TXNIC_PF_BP_CFG 0x000080
	Backpressure configuration. More...

#define	TXNIC_PF_BP_CFG_BP_POLL_ENA ( 1ULL << 6 )

#define	TXNIC_PF_BP_CFG_BP_POLL_DLY(dl) ( ( ( uint64_t ) (dl) ) << 0 )

#define	TXNIC_PF_BP_CFG_BP_POLL_DLY_DEFAULT TXNIC_PF_BP_CFG_BP_POLL_DLY ( 3 )

#define	TXNIC_PF_INTF_SEND_CFG(in) ( ( (in) << 8 ) \| 0x000200 )
	Interface send configuration. More...

#define	TXNIC_PF_INTF_SEND_CFG_BLOCK_BGX ( 1ULL << 3 )

#define	TXNIC_PF_INTF_SEND_CFG_BLOCK(bl) ( ( ( uint64_t ) (bl) ) << 0 )

#define	TXNIC_PF_INTF_BP_CFG(in) ( ( (in) << 8 ) \| 0x000208 )
	Interface backpressure configuration. More...

#define	TXNIC_PF_INTF_BP_CFG_BP_ENA ( 1ULL << 63 )

#define	TXNIC_PF_INTF_BP_CFG_BP_ID_BGX ( 1ULL << 3 )

#define	TXNIC_PF_INTF_BP_CFG_BP_ID(bp) ( ( ( uint64_t ) (bp) ) << 0 )

#define	TXNIC_PF_PKIND_CFG(pk) ( ( (pk) << 3 ) \| 0x000600 )
	Port kind configuration. More...

#define	TXNIC_PF_PKIND_CFG_LENERR_EN ( 1ULL << 33 )

#define	TXNIC_PF_PKIND_CFG_MAXLEN(ct) ( ( ( uint64_t ) (ct) ) << 16 )

#define	TXNIC_PF_PKIND_CFG_MAXLEN_DISABLE TXNIC_PF_PKIND_CFG_MAXLEN ( 0xffff )

#define	TXNIC_PF_PKIND_CFG_MINLEN(ct) ( ( ( uint64_t ) (ct) ) << 0 )

#define	TXNIC_PF_PKIND_CFG_MINLEN_DISABLE TXNIC_PF_PKIND_CFG_MINLEN ( 0x0000 )

#define	TXNIC_PF_MPI_CFG(ix) ( ( (ix) << 3 ) \| 0x210000 )
	Match parse index configuration. More...

#define	TXNIC_PF_MPI_CFG_VNIC(vn) ( ( ( uint64_t ) (vn) ) << 24 )

#define	TXNIC_PF_MPI_CFG_RSSI_BASE(ix) ( ( ( uint64_t ) (ix) ) << 0 )

#define	TXNIC_PF_RSSI_RQ(ix) ( ( (ix) << 3 ) \| 0x220000 )
	RSS indirection receive queue. More...

#define	TXNIC_PF_RSSI_RQ_RQ_QS(qs) ( ( ( uint64_t ) (qs) ) << 3 )

#define	TXNIC_PF_LMAC(lm) ( ( (lm) << 3 ) \| 0x240000 )
	LMAC registers. More...

#define	TXNIC_PF_LMAC_CFG 0x000000
	LMAC configuration. More...

#define	TXNIC_PF_LMAC_CFG_ADJUST(ad) ( ( ( uint64_t ) (ad) ) << 8 )

#define	TXNIC_PF_LMAC_CFG_ADJUST_DEFAULT TXNIC_PF_LMAC_CFG_ADJUST ( 6 )

#define	TXNIC_PF_LMAC_CFG_MIN_PKT_SIZE(sz) ( ( ( uint64_t ) (sz) ) << 0 )

#define	TXNIC_PF_LMAC_CFG2 0x000100
	LMAC configuration 2. More...

#define	TXNIC_PF_LMAC_CFG2_MAX_PKT_SIZE(sz) ( ( ( uint64_t ) (sz) ) << 0 )

#define	TXNIC_PF_LMAC_CREDIT 0x004000
	LMAC credit. More...

#define	TXNIC_PF_LMAC_CREDIT_CC_UNIT_CNT(ct) ( ( ( uint64_t ) (ct) ) << 12 )

#define	TXNIC_PF_LMAC_CREDIT_CC_UNIT_CNT_DEFAULT TXNIC_PF_LMAC_CREDIT_CC_UNIT_CNT ( 192 )

#define	TXNIC_PF_LMAC_CREDIT_CC_PACKET_CNT(ct) ( ( ( uint64_t ) (ct) ) << 2 )

#define	TXNIC_PF_LMAC_CREDIT_CC_PACKET_CNT_DEFAULT TXNIC_PF_LMAC_CREDIT_CC_PACKET_CNT ( 511 )

#define	TXNIC_PF_LMAC_CREDIT_CC_ENABLE ( 1ULL << 1 )

#define	TXNIC_PF_CHAN(ch) ( ( (ch) << 3 ) \| 0x400000 )
	Channel registers. More...

#define	TXNIC_PF_CHAN_TX_CFG 0x000000
	Channel transmit configuration. More...

#define	TXNIC_PF_CHAN_TX_CFG_BP_ENA ( 1ULL << 0 )

#define	TXNIC_PF_CHAN_RX_CFG 0x020000
	Channel receive configuration. More...

#define	TXNIC_PF_CHAN_RX_CFG_CPI_BASE(ix) ( ( ( uint64_t ) (ix) ) << 48 )

#define	TXNIC_PF_CHAN_RX_BP_CFG 0x080000
	Channel receive backpressure configuration. More...

#define	TXNIC_PF_CHAN_RX_BP_CFG_ENA ( 1ULL << 63 )

#define	TXNIC_PF_CHAN_RX_BP_CFG_BPID(bp) ( ( ( uint64_t ) (bp) ) << 0 )

#define	TXNIC_PF_TL2_CFG(tl) ( ( (tl) << 3 ) \| 0x500000 )
	Traffic limiter 2 configuration. More...

#define	TXNIC_PF_TL2_CFG_RR_QUANTUM(rr) ( ( ( uint64_t ) (rr) ) << 0 )

#define	TXNIC_PF_TL2_CFG_RR_QUANTUM_DEFAULT TXNIC_PF_TL2_CFG_RR_QUANTUM ( 0x905 )

#define	TXNIC_PF_TL3_CFG(tl) ( ( (tl) << 3 ) \| 0x600000 )
	Traffic limiter 3 configuration. More...

#define	TXNIC_PF_TL3_CFG_RR_QUANTUM(rr) ( ( ( uint64_t ) (rr) ) << 0 )

#define	TXNIC_PF_TL3_CFG_RR_QUANTUM_DEFAULT TXNIC_PF_TL3_CFG_RR_QUANTUM ( 0x905 )

#define	TXNIC_PF_TL3_CHAN(tl) ( ( (tl) << 3 ) \| 0x620000 )
	Traffic limiter 3 channel mapping. More...

#define	TXNIC_PF_TL3_CHAN_CHAN(ch) ( ( (ch) & 0x7f ) << 0 )

#define	TXNIC_PF_TL4_CFG(tl) ( ( (tl) << 3 ) \| 0x800000 )
	Traffic limiter 4 configuration. More...

#define	TXNIC_PF_TL4_CFG_SQ_QS(qs) ( ( ( uint64_t ) (qs) ) << 27 )

#define	TXNIC_PF_TL4_CFG_RR_QUANTUM(rr) ( ( ( uint64_t ) (rr) ) << 0 )

#define	TXNIC_PF_TL4_CFG_RR_QUANTUM_DEFAULT TXNIC_PF_TL4_CFG_RR_QUANTUM ( 0x905 )

#define	TXNIC_PF_QS(qs) ( ( (qs) << 21 ) \| 0x20000000UL )
	Queue set registers. More...

#define	TXNIC_PF_QS_CFG 0x010000
	Queue set configuration. More...

#define	TXNIC_PF_QS_CFG_ENA ( 1ULL << 31 )

#define	TXNIC_PF_QS_CFG_VNIC(vn) ( ( ( uint64_t ) (vn) ) << 0 )

#define	TXNIC_PF_QS_RQ_CFG(q) ( ( (q) << 18 ) \| 0x010400 )
	Receive queue configuration. More...

#define	TXNIC_PF_QS_RQ_CFG_CACHING(cx) ( ( ( uint64_t ) (cx) ) << 26 )

#define	TXNIC_PF_QS_RQ_CFG_CACHING_ALL TXNIC_PF_QS_RQ_CFG_CACHING ( 1 )

#define	TXNIC_PF_QS_RQ_CFG_CQ_QS(qs) ( ( ( uint64_t ) (qs) ) << 19 )

#define	TXNIC_PF_QS_RQ_CFG_RBDR_CONT_QS(qs) ( ( ( uint64_t ) (qs) ) << 9 )

#define	TXNIC_PF_QS_RQ_CFG_RBDR_STRT_QS(qs) ( ( ( uint64_t ) (qs) ) << 1 )

#define	TXNIC_PF_QS_RQ_DROP_CFG(q) ( ( (q) << 18 ) \| 0x010420 )
	Receive queue drop configuration. More...

#define	TXNIC_PF_QS_RQ_BP_CFG(q) ( ( (q) << 18 ) \| 0x010500 )
	Receive queue backpressure configuration. More...

#define	TXNIC_PF_QS_RQ_BP_CFG_RBDR_BP_ENA ( 1ULL << 63 )

#define	TXNIC_PF_QS_RQ_BP_CFG_CQ_BP_ENA ( 1ULL << 62 )

#define	TXNIC_PF_QS_RQ_BP_CFG_BPID(bp) ( ( ( uint64_t ) (bp) ) << 0 )

#define	TXNIC_PF_QS_SQ_CFG(q) ( ( (q) << 18 ) \| 0x010c00 )
	Send queue configuration. More...

#define	TXNIC_PF_QS_SQ_CFG_CQ_QS(qs) ( ( ( uint64_t ) (qs) ) << 3 )

#define	TXNIC_PF_QS_SQ_CFG2(q) ( ( (q) << 18 ) \| 0x010c08 )
	Send queue configuration 2. More...

#define	TXNIC_PF_QS_SQ_CFG2_TL4(tl) ( ( ( uint64_t ) (tl) ) << 0 )

#define	TXNIC_VNIC_IDX(bgx_idx, lmac_idx) ( ( (bgx_idx) * TXNIC_NUM_LMAC ) + (lmac_idx) )
	Calculate virtual NIC index. More...

#define	TXNIC_BGX_IDX(vnic_idx) ( (vnic_idx) / TXNIC_NUM_LMAC )
	Calculate BGX Ethernet interface index. More...

#define	TXNIC_LMAC_IDX(vnic_idx) ( (vnic_idx) % TXNIC_NUM_LMAC )
	Calculate logical MAC index. More...

#define	TXNIC_TL2_IDX(vnic_idx) ( (vnic_idx) << 3 )
	Calculate traffic limiter 2 index. More...

#define	TXNIC_TL3_IDX(vnic_idx) ( (vnic_idx) << 5 )
	Calculate traffic limiter 3 index. More...

#define	TXNIC_TL4_IDX(vnic_idx) ( (vnic_idx) << 7 )
	Calculate traffic limiter 4 index. More...

#define	TXNIC_CHAN_IDX(vnic_idx)
	Calculate channel index. More...

#define	BGX_LMAC(lm) ( ( (lm) << 20 ) \| 0x00000000UL )
	Per-LMAC registers. More...

#define	BGX_CMR_CONFIG 0x000000
	CMR configuration. More...

#define	BGX_CMR_CONFIG_ENABLE ( 1ULL << 15 )

#define	BGX_CMR_CONFIG_DATA_PKT_RX_EN ( 1ULL << 14 )

#define	BGX_CMR_CONFIG_DATA_PKT_TX_EN ( 1ULL << 13 )

#define	BGX_CMR_CONFIG_LMAC_TYPE_GET(config) ( ( (config) >> 8 ) & 0x7 )

#define	BGX_CMR_CONFIG_LMAC_TYPE_SET(ty) ( ( ( uint64_t ) (ty) ) << 8 )

#define	BGX_CMR_CONFIG_LANE_TO_SDS(ls) ( ( ( uint64_t ) (ls) ) << 0 )

#define	BGX_CMR_GLOBAL_CONFIG 0x000008
	CMR global configuration. More...

#define	BGX_CMR_GLOBAL_CONFIG_FCS_STRIP ( 1ULL << 6 )

#define	BGX_CMR_RX_STAT0 0x000070
	CMR receive statistics 0. More...

#define	BGX_CMR_RX_STAT1 0x000078
	CMR receive statistics 1. More...

#define	BGX_CMR_RX_STAT2 0x000080
	CMR receive statistics 2. More...

#define	BGX_CMR_RX_STAT3 0x000088
	CMR receive statistics 3. More...

#define	BGX_CMR_RX_STAT4 0x000090
	CMR receive statistics 4. More...

#define	BGX_CMR_RX_STAT5 0x000098
	CMR receive statistics 5. More...

#define	BGX_CMR_RX_STAT6 0x0000a0
	CMR receive statistics 6. More...

#define	BGX_CMR_RX_STAT7 0x0000a8
	CMR receive statistics 7. More...

#define	BGX_CMR_RX_STAT8 0x0000b0
	CMR receive statistics 8. More...

#define	BGX_CMR_RX_STAT9 0x0000b8
	CMR receive statistics 9. More...

#define	BGX_CMR_RX_STAT10 0x0000c0
	CMR receive statistics 10. More...

#define	BGX_CMR_RX_DMAC_CTL 0x0000e8
	CMR destination MAC control. More...

#define	BGX_CMR_RX_DMAC_CTL_MCST_MODE(md) ( ( ( uint64_t ) (md) ) << 1 )

#define	BGX_CMR_RX_DMAC_CTL_MCST_MODE_ACCEPT BGX_CMR_RX_DMAC_CTL_MCST_MODE ( 1 )

#define	BGX_CMR_RX_DMAC_CTL_BCST_ACCEPT ( 1ULL << 0 )

#define	BGX_CMR_RX_DMAC_CAM(i) ( ( (i) << 3 ) \| 0x000200 )
	CMR destination MAC CAM. More...

#define	BGX_CMR_RX_STEERING(i) ( ( (i) << 3 ) \| 0x000300 )
	CMR receive steering. More...

#define	BGX_CMR_CHAN_MSK_AND 0x000450
	CMR backpressure channel mask AND. More...

#define	BGX_CMR_CHAN_MSK_AND_ALL(count) ( 0xffffffffffffffffULL >> ( 16 * ( 4 - (count) ) ) )

#define	BGX_CMR_TX_STAT0 0x000600
	CMR transmit statistics 0. More...

#define	BGX_CMR_TX_STAT1 0x000608
	CMR transmit statistics 1. More...

#define	BGX_CMR_TX_STAT2 0x000610
	CMR transmit statistics 2. More...

#define	BGX_CMR_TX_STAT3 0x000618
	CMR transmit statistics 3. More...

#define	BGX_CMR_TX_STAT4 0x000620
	CMR transmit statistics 4. More...

#define	BGX_CMR_TX_STAT5 0x000628
	CMR transmit statistics 5. More...

#define	BGX_CMR_TX_STAT6 0x000630
	CMR transmit statistics 6. More...

#define	BGX_CMR_TX_STAT7 0x000638
	CMR transmit statistics 7. More...

#define	BGX_CMR_TX_STAT8 0x000640
	CMR transmit statistics 8. More...

#define	BGX_CMR_TX_STAT9 0x000648
	CMR transmit statistics 9. More...

#define	BGX_CMR_TX_STAT10 0x000650
	CMR transmit statistics 10. More...

#define	BGX_CMR_TX_STAT11 0x000658
	CMR transmit statistics 11. More...

#define	BGX_CMR_TX_STAT12 0x000660
	CMR transmit statistics 12. More...

#define	BGX_CMR_TX_STAT13 0x000668
	CMR transmit statistics 13. More...

#define	BGX_CMR_TX_STAT14 0x000670
	CMR transmit statistics 14. More...

#define	BGX_CMR_TX_STAT15 0x000678
	CMR transmit statistics 15. More...

#define	BGX_CMR_TX_STAT16 0x000680
	CMR transmit statistics 16. More...

#define	BGX_CMR_TX_STAT17 0x000688
	CMR transmit statistics 17. More...

#define	BGX_CMR_RX_LMACS 0x000468
	CMR receive logical MACs. More...

#define	BGX_CMR_RX_LMACS_LMACS_GET(lmacs) ( ( (lmacs) >> 0 ) & 0x7 )

#define	BGX_CMR_RX_LMACS_LMACS_SET(ct) ( ( ( uint64_t ) (ct) ) << 0 )

#define	BGX_CMR_TX_LMACS 0x001000
	CMR transmit logical MACs. More...

#define	BGX_CMR_TX_LMACS_LMACS_GET(lmacs) ( ( (lmacs) >> 0 ) & 0x7 )

#define	BGX_CMR_TX_LMACS_LMACS_SET(ct) ( ( ( uint64_t ) (ct) ) << 0 )

#define	BGX_SPU_CONTROL1 0x010000
	SPU control 1. More...

#define	BGX_SPU_CONTROL1_RESET ( 1ULL << 15 )

#define	BGX_SPU_CONTROL1_LO_PWR ( 1ULL << 11 )

#define	BGX_SPU_RESET_DELAY_MS 10
	SPU reset delay. More...

#define	BGX_SPU_STATUS1 0x010008
	SPU status 1. More...

#define	BGX_SPU_STATUS1_FLT ( 1ULL << 7 )

#define	BGX_SPU_STATUS1_RCV_LNK ( 1ULL << 2 )

#define	BGX_SPU_STATUS2 0x010020
	SPU status 2. More...

#define	BGX_SPU_STATUS2_RCVFLT ( 1ULL << 10 )

#define	BGX_SPU_BR_STATUS1 0x010030
	SPU BASE-R status 1. More...

#define	BGX_SPU_BR_STATUS1_RCV_LNK ( 1ULL << 12 )

#define	BGX_SPU_BR_STATUS1_HI_BER ( 1ULL << 1 )

#define	BGX_SPU_BR_STATUS1_BLK_LOCK ( 1ULL << 0 )

#define	BGX_SPU_BR_STATUS2 0x010038
	SPU BASE-R status 2. More...

#define	BGX_SPU_BR_STATUS2_LATCHED_LOCK ( 1ULL << 15 )

#define	BGX_SPU_BR_STATUS2_LATCHED_BER ( 1ULL << 14 )

#define	BGX_SPU_BR_ALGN_STATUS 0x010050
	SPU BASE-R alignment status. More...

#define	BGX_SPU_BR_ALGN_STATUS_ALIGND ( 1ULL << 12 )

#define	BGX_SPU_BR_PMD_CONTROL 0x010068
	SPU BASE-R link training control. More...

#define	BGX_SPU_BR_PMD_CONTROL_TRAIN_EN ( 1ULL << 1 )

#define	BGX_SPU_BR_PMD_STATUS 0x010070
	SPU BASE-R link training status. More...

#define	BGX_SPU_BR_PMD_LP_CUP 0x010078
	SPU link partner coefficient update. More...

#define	BGX_SPU_BR_PMD_LD_CUP 0x010088
	SPU local device coefficient update. More...

#define	BGX_SPU_BR_PMD_LD_REP 0x010090
	SPU local device status report. More...

#define	BGX_SPU_FEC_CONTROL 0x0100a0
	SPU forward error correction control. More...

#define	BGX_SPU_AN_CONTROL 0x0100c8
	SPU autonegotation control. More...

#define	BGX_SPU_AN_STATUS 0x0100d0
	SPU autonegotiation status. More...

#define	BGX_SPU_AN_STATUS_XNP_STAT ( 1ULL << 7 )

#define	BGX_SPU_AN_STATUS_PAGE_RX ( 1ULL << 6 )

#define	BGX_SPU_AN_STATUS_AN_COMPLETE ( 1ULL << 5 )

#define	BGX_SPU_AN_STATUS_LINK_STATUS ( 1ULL << 2 )

#define	BGX_SPU_AN_STATUS_LP_AN_ABLE ( 1ULL << 0 )

#define	BGX_SPU_INT 0x010220
	SPU interrupt. More...

#define	BGX_SPU_INT_TRAINING_FAIL ( 1ULL << 14 )

#define	BGX_SPU_INT_TRAINING_DONE ( 1ULL << 13 )

#define	BGX_SPU_INT_AN_COMPLETE ( 1ULL << 12 )

#define	BGX_SPU_INT_AN_LINK_GOOD ( 1ULL << 11 )

#define	BGX_SPU_INT_AN_PAGE_RX ( 1ULL << 10 )

#define	BGX_SPU_INT_FEC_UNCORR ( 1ULL << 9 )

#define	BGX_SPU_INT_FEC_CORR ( 1ULL << 8 )

#define	BGX_SPU_INT_BIP_ERR ( 1ULL << 7 )

#define	BGX_SPU_INT_DBG_SYNC ( 1ULL << 6 )

#define	BGX_SPU_INT_ALGNLOS ( 1ULL << 5 )

#define	BGX_SPU_INT_SYNLOS ( 1ULL << 4 )

#define	BGX_SPU_INT_BITLCKLS ( 1ULL << 3 )

#define	BGX_SPU_INT_ERR_BLK ( 1ULL << 2 )

#define	BGX_SPU_INT_RX_LINK_DOWN ( 1ULL << 1 )

#define	BGX_SPU_INT_RX_LINK_UP ( 1ULL << 0 )

Enumerations
enum	txnic_lmac_types { TXNIC_LMAC_SGMII = 0x0, TXNIC_LMAC_XAUI = 0x1, TXNIC_LMAC_RXAUI = 0x2, TXNIC_LMAC_10G_R = 0x3, TXNIC_LMAC_40G_R = 0x4 }
	LMAC types. More...

Functions
	FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)

static unsigned int	txnic_address_node (uint64_t addr)
	Calculate node ID. More...

static unsigned int	txnic_address_bgx (uint64_t addr)
	Calculate BGX Ethernet interface index. More...

Detailed Description

Cavium ThunderX Ethernet driver.

Definition in file thunderx.h.

Macro Definition Documentation

◆ TXNIC_LINE_SIZE

#define TXNIC_LINE_SIZE 128

Size of a cache line.

Definition at line 25 of file thunderx.h.

◆ TXNIC_VF_BAR_SIZE

#define TXNIC_VF_BAR_SIZE 0x200000UL

Virtual function BAR size.

Definition at line 28 of file thunderx.h.

◆ TXNIC_PF_BAR_SIZE

#define TXNIC_PF_BAR_SIZE 0x40000000UL

Physical function BAR size.

Definition at line 31 of file thunderx.h.

◆ TXNIC_BGX_BAR_SIZE

#define TXNIC_BGX_BAR_SIZE 0x400000UL

BGX BAR size.

Definition at line 34 of file thunderx.h.

◆ TXNIC_NUM_BGX

#define TXNIC_NUM_BGX 2

Maximum number of BGX Ethernet interfaces (per node)

Definition at line 37 of file thunderx.h.

◆ TXNIC_NUM_LMAC

#define TXNIC_NUM_LMAC 4

Maximum number of Logical MACs (per BGX)

Definition at line 40 of file thunderx.h.

◆ TXNIC_NUM_DMAC

#define TXNIC_NUM_DMAC 32

Maximum number of destination MAC addresses (per BGX)

Definition at line 43 of file thunderx.h.

◆ TXNIC_NUM_STEERING

#define TXNIC_NUM_STEERING 8

Maximum number of steering rules (per BGX)

Definition at line 46 of file thunderx.h.

◆ TXNIC_QS_SQ_CFG

#define TXNIC_QS_SQ_CFG ( q ) ( ( (q) << 18 ) | 0x010800 )

Send queue configuration.

Definition at line 80 of file thunderx.h.

◆ TXNIC_QS_SQ_CFG_ENA

#define TXNIC_QS_SQ_CFG_ENA ( 1ULL << 19 )

Definition at line 81 of file thunderx.h.

◆ TXNIC_QS_SQ_CFG_RESET

#define TXNIC_QS_SQ_CFG_RESET ( 1ULL << 17 )

Definition at line 82 of file thunderx.h.

◆ TXNIC_QS_SQ_CFG_QSIZE

#define TXNIC_QS_SQ_CFG_QSIZE ( sz ) ( ( ( uint64_t ) (sz) ) << 8 )

Definition at line 83 of file thunderx.h.

◆ TXNIC_QS_SQ_CFG_QSIZE_1K

#define TXNIC_QS_SQ_CFG_QSIZE_1K TXNIC_QS_SQ_CFG_QSIZE ( 0 )

Definition at line 84 of file thunderx.h.

◆ TXNIC_QS_SQ_BASE

#define TXNIC_QS_SQ_BASE ( q ) ( ( (q) << 18 ) | 0x010820 )

Send queue base address.

Definition at line 88 of file thunderx.h.

◆ TXNIC_QS_SQ_HEAD

#define TXNIC_QS_SQ_HEAD ( q ) ( ( (q) << 18 ) | 0x010828 )

Send queue head pointer.

Definition at line 91 of file thunderx.h.

◆ TXNIC_QS_SQ_TAIL

#define TXNIC_QS_SQ_TAIL ( q ) ( ( (q) << 18 ) | 0x010830 )

Send queue tail pointer.

Definition at line 94 of file thunderx.h.

◆ TXNIC_QS_SQ_DOOR

#define TXNIC_QS_SQ_DOOR ( q ) ( ( (q) << 18 ) | 0x010838 )

Send queue doorbell.

Definition at line 97 of file thunderx.h.

◆ TXNIC_QS_SQ_STATUS

#define TXNIC_QS_SQ_STATUS ( q ) ( ( (q) << 18 ) | 0x010840 )

Send queue status.

Definition at line 100 of file thunderx.h.

◆ TXNIC_QS_SQ_STATUS_STOPPED

#define TXNIC_QS_SQ_STATUS_STOPPED ( 1ULL << 21 )

Definition at line 101 of file thunderx.h.

◆ TXNIC_SQ_STOP_MAX_WAIT_MS

#define TXNIC_SQ_STOP_MAX_WAIT_MS 100

Maximum time to wait for a send queue to stop.

This is a policy decision.

Definition at line 107 of file thunderx.h.

◆ TXNIC_SEND_HDR_FLAGS

#define TXNIC_SEND_HDR_FLAGS 0x14

Flags for send header subdescriptor.

These comprise SUBDC=0x1 and PNC=0x1.

Definition at line 127 of file thunderx.h.

◆ TXNIC_SEND_GATHER_FLAGS

#define TXNIC_SEND_GATHER_FLAGS 0x40

Flags for send gather subdescriptor.

These comprise SUBDC=0x4 and LD_TYPE=0x0.

Definition at line 145 of file thunderx.h.

◆ TXNIC_SQE_SUBDESCS

#define TXNIC_SQE_SUBDESCS

Value:

( sizeof ( struct txnic_sqe ) / \

sizeof ( struct txnic_send_header ) )

txnic_sqe

A send queue entry.

Definition: thunderx.h:152

txnic_send_header

A send header subdescriptor.

Definition: thunderx.h:110

Number of subdescriptors per send queue entry.

Definition at line 160 of file thunderx.h.

◆ TXNIC_SQES

#define TXNIC_SQES ( 1024 / TXNIC_SQE_SUBDESCS )

Number of send queue entries.

The minimum send queue size is 1024 entries.

Definition at line 167 of file thunderx.h.

◆ TXNIC_SQ_FILL

#define TXNIC_SQ_FILL 32

Send queue maximum fill level.

This is a policy decision.

Definition at line 173 of file thunderx.h.

◆ TXNIC_SQ_ALIGN

#define TXNIC_SQ_ALIGN TXNIC_LINE_SIZE

Send queue alignment.

Definition at line 176 of file thunderx.h.

◆ TXNIC_SQ_STRIDE

#define TXNIC_SQ_STRIDE sizeof ( struct txnic_sqe )

Send queue stride.

Definition at line 179 of file thunderx.h.

◆ TXNIC_SQ_SIZE

#define TXNIC_SQ_SIZE ( TXNIC_SQES * TXNIC_SQ_STRIDE )

Send queue size.

Definition at line 182 of file thunderx.h.

◆ TXNIC_QS_RQ_CFG

#define TXNIC_QS_RQ_CFG ( q ) ( ( (q) << 18 ) | 0x010600 )

Receive queue configuration.

Definition at line 202 of file thunderx.h.

◆ TXNIC_QS_RQ_CFG_ENA

#define TXNIC_QS_RQ_CFG_ENA ( 1ULL << 1 )

Definition at line 203 of file thunderx.h.

◆ TXNIC_RQ_DISABLE_MAX_WAIT_MS

#define TXNIC_RQ_DISABLE_MAX_WAIT_MS 100

Maximum time to wait for a receive queue to disable.

This is a policy decision.

Definition at line 209 of file thunderx.h.

◆ TXNIC_QS_RBDR_CFG

#define TXNIC_QS_RBDR_CFG ( q ) ( ( (q) << 18 ) | 0x010c00 )

Receive buffer descriptor ring configuration.

Definition at line 212 of file thunderx.h.

◆ TXNIC_QS_RBDR_CFG_ENA

#define TXNIC_QS_RBDR_CFG_ENA ( 1ULL << 44 )

Definition at line 213 of file thunderx.h.

◆ TXNIC_QS_RBDR_CFG_RESET

#define TXNIC_QS_RBDR_CFG_RESET ( 1ULL << 43 )

Definition at line 214 of file thunderx.h.

◆ TXNIC_QS_RBDR_CFG_QSIZE

#define TXNIC_QS_RBDR_CFG_QSIZE ( sz ) ( ( ( uint64_t ) (sz) ) << 32 )

Definition at line 215 of file thunderx.h.

◆ TXNIC_QS_RBDR_CFG_QSIZE_8K

#define TXNIC_QS_RBDR_CFG_QSIZE_8K TXNIC_QS_RBDR_CFG_QSIZE ( 0 )

Definition at line 216 of file thunderx.h.

◆ TXNIC_QS_RBDR_CFG_LINES

#define TXNIC_QS_RBDR_CFG_LINES ( sz ) ( ( ( uint64_t ) (sz) ) << 0 )

Definition at line 218 of file thunderx.h.

◆ TXNIC_QS_RBDR_BASE

#define TXNIC_QS_RBDR_BASE ( q ) ( ( (q) << 18 ) | 0x010c20 )

Receive buffer descriptor ring base address.

Definition at line 221 of file thunderx.h.

◆ TXNIC_QS_RBDR_HEAD

#define TXNIC_QS_RBDR_HEAD ( q ) ( ( (q) << 18 ) | 0x010c28 )

Receive buffer descriptor ring head pointer.

Definition at line 224 of file thunderx.h.

◆ TXNIC_QS_RBDR_TAIL

#define TXNIC_QS_RBDR_TAIL ( q ) ( ( (q) << 18 ) | 0x010c30 )

Receive buffer descriptor ring tail pointer.

Definition at line 227 of file thunderx.h.

◆ TXNIC_QS_RBDR_DOOR

#define TXNIC_QS_RBDR_DOOR ( q ) ( ( (q) << 18 ) | 0x010c38 )

Receive buffer descriptor ring doorbell.

Definition at line 230 of file thunderx.h.

◆ TXNIC_QS_RBDR_STATUS0

#define TXNIC_QS_RBDR_STATUS0 ( q ) ( ( (q) << 18 ) | 0x010c40 )

Receive buffer descriptor ring status 0.

Definition at line 233 of file thunderx.h.

◆ TXNIC_RQES

#define TXNIC_RQES 8192

Number of receive queue entries.

The minimum receive queue size is 8192 entries.

Definition at line 251 of file thunderx.h.

◆ TXNIC_RQ_FILL

#define TXNIC_RQ_FILL 32

Receive queue maximum fill level.

This is a policy decision. Must not exceed TXNIC_RQES.

Definition at line 257 of file thunderx.h.

◆ TXNIC_RQE_SIZE

#define TXNIC_RQE_SIZE

Value:

( ( ETH_DATA_ALIGN + ETH_FRAME_LEN +            \
                           4 /* VLAN */ + TXNIC_LINE_SIZE - 1 )         \
                         & ~( TXNIC_LINE_SIZE - 1 ) )

Receive queue entry size.

This is a policy decision.

Definition at line 263 of file thunderx.h.

◆ TXNIC_RQ_ALIGN

#define TXNIC_RQ_ALIGN TXNIC_LINE_SIZE

Receive queue alignment.

Definition at line 268 of file thunderx.h.

◆ TXNIC_RQ_STRIDE

#define TXNIC_RQ_STRIDE sizeof ( struct txnic_rqe )

Receive queue stride.

Definition at line 271 of file thunderx.h.

◆ TXNIC_RQ_SIZE

#define TXNIC_RQ_SIZE ( TXNIC_RQES * TXNIC_RQ_STRIDE )

Receive queue size.

Definition at line 274 of file thunderx.h.

◆ TXNIC_QS_CQ_CFG

#define TXNIC_QS_CQ_CFG ( q ) ( ( (q) << 18 ) | 0x010400 )

Completion queue configuration.

Definition at line 296 of file thunderx.h.

◆ TXNIC_QS_CQ_CFG_ENA

#define TXNIC_QS_CQ_CFG_ENA ( 1ULL << 42 )

Definition at line 297 of file thunderx.h.

◆ TXNIC_QS_CQ_CFG_RESET

#define TXNIC_QS_CQ_CFG_RESET ( 1ULL << 41 )

Definition at line 298 of file thunderx.h.

◆ TXNIC_QS_CQ_CFG_QSIZE

#define TXNIC_QS_CQ_CFG_QSIZE ( sz ) ( ( ( uint64_t ) (sz) ) << 32 )

Definition at line 299 of file thunderx.h.

◆ TXNIC_QS_CQ_CFG_QSIZE_256

#define TXNIC_QS_CQ_CFG_QSIZE_256 TXNIC_QS_CQ_CFG_QSIZE ( 7 )

Definition at line 300 of file thunderx.h.

◆ TXNIC_CQ_DISABLE_MAX_WAIT_MS

#define TXNIC_CQ_DISABLE_MAX_WAIT_MS 100

Maximum time to wait for a completion queue to disable.

This is a policy decision.

Definition at line 307 of file thunderx.h.

◆ TXNIC_QS_CQ_BASE

#define TXNIC_QS_CQ_BASE ( q ) ( ( (q) << 18 ) | 0x010420 )

Completion queue base address.

Definition at line 310 of file thunderx.h.

◆ TXNIC_QS_CQ_HEAD

#define TXNIC_QS_CQ_HEAD ( q ) ( ( (q) << 18 ) | 0x010428 )

Completion queue head pointer.

Definition at line 313 of file thunderx.h.

◆ TXNIC_QS_CQ_TAIL

#define TXNIC_QS_CQ_TAIL ( q ) ( ( (q) << 18 ) | 0x010430 )

Completion queue tail pointer.

Definition at line 316 of file thunderx.h.

◆ TXNIC_QS_CQ_DOOR

#define TXNIC_QS_CQ_DOOR ( q ) ( ( (q) << 18 ) | 0x010438 )

Completion queue doorbell.

Definition at line 319 of file thunderx.h.

◆ TXNIC_QS_CQ_STATUS

#define TXNIC_QS_CQ_STATUS ( q ) ( ( (q) << 18 ) | 0x010440 )

Completion queue status.

Definition at line 322 of file thunderx.h.

◆ TXNIC_QS_CQ_STATUS_QCOUNT

#define TXNIC_QS_CQ_STATUS_QCOUNT ( status ) ( ( (status) >> 0 ) & 0xffff )

Definition at line 323 of file thunderx.h.

◆ TXNIC_QS_CQ_STATUS2

#define TXNIC_QS_CQ_STATUS2 ( q ) ( ( (q) << 18 ) | 0x010448 )

Completion queue status 2.

Definition at line 327 of file thunderx.h.

◆ TXNIC_CQE_TYPE_SEND

#define TXNIC_CQE_TYPE_SEND 0x80

Send completion queue entry type.

Definition at line 342 of file thunderx.h.

◆ TXNIC_CQE_TYPE_RX

#define TXNIC_CQE_TYPE_RX 0x20

Receive completion queue entry type.

Definition at line 363 of file thunderx.h.

◆ TXNIC_CQE_RX_APAD_LEN

#define TXNIC_CQE_RX_APAD_LEN ( apad ) ( (apad) >> 5 )

Applied padding.

Definition at line 366 of file thunderx.h.

◆ TXNIC_CQES

#define TXNIC_CQES 256

Number of completion queue entries.

The minimum completion queue size is 256 entries.

Definition at line 390 of file thunderx.h.

◆ TXNIC_CQ_ALIGN

#define TXNIC_CQ_ALIGN 512

Completion queue alignment.

Definition at line 393 of file thunderx.h.

◆ TXNIC_CQ_STRIDE

#define TXNIC_CQ_STRIDE 512

Completion queue stride.

Definition at line 396 of file thunderx.h.

◆ TXNIC_CQ_SIZE

#define TXNIC_CQ_SIZE ( TXNIC_CQES * TXNIC_CQ_STRIDE )

Completion queue size.

Definition at line 399 of file thunderx.h.

◆ TXNIC_PF_CFG

#define TXNIC_PF_CFG 0x000000

Physical function configuration.

Definition at line 441 of file thunderx.h.

◆ TXNIC_PF_CFG_ENA

#define TXNIC_PF_CFG_ENA ( 1ULL << 0 )

Definition at line 442 of file thunderx.h.

◆ TXNIC_PF_BP_CFG

#define TXNIC_PF_BP_CFG 0x000080

Backpressure configuration.

Definition at line 445 of file thunderx.h.

◆ TXNIC_PF_BP_CFG_BP_POLL_ENA

#define TXNIC_PF_BP_CFG_BP_POLL_ENA ( 1ULL << 6 )

Definition at line 446 of file thunderx.h.

◆ TXNIC_PF_BP_CFG_BP_POLL_DLY

#define TXNIC_PF_BP_CFG_BP_POLL_DLY ( dl ) ( ( ( uint64_t ) (dl) ) << 0 )

Definition at line 447 of file thunderx.h.

◆ TXNIC_PF_BP_CFG_BP_POLL_DLY_DEFAULT

#define TXNIC_PF_BP_CFG_BP_POLL_DLY_DEFAULT TXNIC_PF_BP_CFG_BP_POLL_DLY ( 3 )

Definition at line 448 of file thunderx.h.

◆ TXNIC_PF_INTF_SEND_CFG

#define TXNIC_PF_INTF_SEND_CFG ( in ) ( ( (in) << 8 ) | 0x000200 )

Interface send configuration.

Definition at line 452 of file thunderx.h.

◆ TXNIC_PF_INTF_SEND_CFG_BLOCK_BGX

#define TXNIC_PF_INTF_SEND_CFG_BLOCK_BGX ( 1ULL << 3 )

Definition at line 453 of file thunderx.h.

◆ TXNIC_PF_INTF_SEND_CFG_BLOCK

#define TXNIC_PF_INTF_SEND_CFG_BLOCK ( bl ) ( ( ( uint64_t ) (bl) ) << 0 )

Definition at line 454 of file thunderx.h.

◆ TXNIC_PF_INTF_BP_CFG

#define TXNIC_PF_INTF_BP_CFG ( in ) ( ( (in) << 8 ) | 0x000208 )

Interface backpressure configuration.

Definition at line 457 of file thunderx.h.

◆ TXNIC_PF_INTF_BP_CFG_BP_ENA

#define TXNIC_PF_INTF_BP_CFG_BP_ENA ( 1ULL << 63 )

Definition at line 458 of file thunderx.h.

◆ TXNIC_PF_INTF_BP_CFG_BP_ID_BGX

#define TXNIC_PF_INTF_BP_CFG_BP_ID_BGX ( 1ULL << 3 )

Definition at line 459 of file thunderx.h.

◆ TXNIC_PF_INTF_BP_CFG_BP_ID

#define TXNIC_PF_INTF_BP_CFG_BP_ID ( bp ) ( ( ( uint64_t ) (bp) ) << 0 )

Definition at line 460 of file thunderx.h.

◆ TXNIC_PF_PKIND_CFG

#define TXNIC_PF_PKIND_CFG ( pk ) ( ( (pk) << 3 ) | 0x000600 )

Port kind configuration.

Definition at line 463 of file thunderx.h.

◆ TXNIC_PF_PKIND_CFG_LENERR_EN

#define TXNIC_PF_PKIND_CFG_LENERR_EN ( 1ULL << 33 )

Definition at line 464 of file thunderx.h.

◆ TXNIC_PF_PKIND_CFG_MAXLEN

#define TXNIC_PF_PKIND_CFG_MAXLEN ( ct ) ( ( ( uint64_t ) (ct) ) << 16 )

Definition at line 465 of file thunderx.h.

◆ TXNIC_PF_PKIND_CFG_MAXLEN_DISABLE

#define TXNIC_PF_PKIND_CFG_MAXLEN_DISABLE TXNIC_PF_PKIND_CFG_MAXLEN ( 0xffff )

Definition at line 466 of file thunderx.h.

◆ TXNIC_PF_PKIND_CFG_MINLEN

#define TXNIC_PF_PKIND_CFG_MINLEN ( ct ) ( ( ( uint64_t ) (ct) ) << 0 )

Definition at line 468 of file thunderx.h.

◆ TXNIC_PF_PKIND_CFG_MINLEN_DISABLE

#define TXNIC_PF_PKIND_CFG_MINLEN_DISABLE TXNIC_PF_PKIND_CFG_MINLEN ( 0x0000 )

Definition at line 469 of file thunderx.h.

◆ TXNIC_PF_MPI_CFG

#define TXNIC_PF_MPI_CFG ( ix ) ( ( (ix) << 3 ) | 0x210000 )

Match parse index configuration.

Definition at line 473 of file thunderx.h.

◆ TXNIC_PF_MPI_CFG_VNIC

#define TXNIC_PF_MPI_CFG_VNIC ( vn ) ( ( ( uint64_t ) (vn) ) << 24 )

Definition at line 474 of file thunderx.h.

◆ TXNIC_PF_MPI_CFG_RSSI_BASE

#define TXNIC_PF_MPI_CFG_RSSI_BASE ( ix ) ( ( ( uint64_t ) (ix) ) << 0 )

Definition at line 475 of file thunderx.h.

◆ TXNIC_PF_RSSI_RQ

#define TXNIC_PF_RSSI_RQ ( ix ) ( ( (ix) << 3 ) | 0x220000 )

RSS indirection receive queue.

Definition at line 478 of file thunderx.h.

◆ TXNIC_PF_RSSI_RQ_RQ_QS

#define TXNIC_PF_RSSI_RQ_RQ_QS ( qs ) ( ( ( uint64_t ) (qs) ) << 3 )

Definition at line 479 of file thunderx.h.

◆ TXNIC_PF_LMAC

#define TXNIC_PF_LMAC ( lm ) ( ( (lm) << 3 ) | 0x240000 )

LMAC registers.

Definition at line 482 of file thunderx.h.

◆ TXNIC_PF_LMAC_CFG

#define TXNIC_PF_LMAC_CFG 0x000000

LMAC configuration.

Definition at line 485 of file thunderx.h.

◆ TXNIC_PF_LMAC_CFG_ADJUST

#define TXNIC_PF_LMAC_CFG_ADJUST ( ad ) ( ( ( uint64_t ) (ad) ) << 8 )

Definition at line 486 of file thunderx.h.

◆ TXNIC_PF_LMAC_CFG_ADJUST_DEFAULT

#define TXNIC_PF_LMAC_CFG_ADJUST_DEFAULT TXNIC_PF_LMAC_CFG_ADJUST ( 6 )

Definition at line 487 of file thunderx.h.

◆ TXNIC_PF_LMAC_CFG_MIN_PKT_SIZE

#define TXNIC_PF_LMAC_CFG_MIN_PKT_SIZE ( sz ) ( ( ( uint64_t ) (sz) ) << 0 )

Definition at line 489 of file thunderx.h.

◆ TXNIC_PF_LMAC_CFG2

#define TXNIC_PF_LMAC_CFG2 0x000100

LMAC configuration 2.

Definition at line 492 of file thunderx.h.

◆ TXNIC_PF_LMAC_CFG2_MAX_PKT_SIZE

#define TXNIC_PF_LMAC_CFG2_MAX_PKT_SIZE ( sz ) ( ( ( uint64_t ) (sz) ) << 0 )

Definition at line 493 of file thunderx.h.

◆ TXNIC_PF_LMAC_CREDIT

#define TXNIC_PF_LMAC_CREDIT 0x004000

LMAC credit.

Definition at line 496 of file thunderx.h.

◆ TXNIC_PF_LMAC_CREDIT_CC_UNIT_CNT

#define TXNIC_PF_LMAC_CREDIT_CC_UNIT_CNT ( ct ) ( ( ( uint64_t ) (ct) ) << 12 )

Definition at line 497 of file thunderx.h.

◆ TXNIC_PF_LMAC_CREDIT_CC_UNIT_CNT_DEFAULT

#define TXNIC_PF_LMAC_CREDIT_CC_UNIT_CNT_DEFAULT TXNIC_PF_LMAC_CREDIT_CC_UNIT_CNT ( 192 )

Definition at line 498 of file thunderx.h.

◆ TXNIC_PF_LMAC_CREDIT_CC_PACKET_CNT

#define TXNIC_PF_LMAC_CREDIT_CC_PACKET_CNT ( ct ) ( ( ( uint64_t ) (ct) ) << 2 )

Definition at line 500 of file thunderx.h.

◆ TXNIC_PF_LMAC_CREDIT_CC_PACKET_CNT_DEFAULT

#define TXNIC_PF_LMAC_CREDIT_CC_PACKET_CNT_DEFAULT TXNIC_PF_LMAC_CREDIT_CC_PACKET_CNT ( 511 )

Definition at line 501 of file thunderx.h.

◆ TXNIC_PF_LMAC_CREDIT_CC_ENABLE

#define TXNIC_PF_LMAC_CREDIT_CC_ENABLE ( 1ULL << 1 )

Definition at line 503 of file thunderx.h.

◆ TXNIC_PF_CHAN

#define TXNIC_PF_CHAN ( ch ) ( ( (ch) << 3 ) | 0x400000 )

Channel registers.

Definition at line 506 of file thunderx.h.

◆ TXNIC_PF_CHAN_TX_CFG

#define TXNIC_PF_CHAN_TX_CFG 0x000000

Channel transmit configuration.

Definition at line 509 of file thunderx.h.

◆ TXNIC_PF_CHAN_TX_CFG_BP_ENA

#define TXNIC_PF_CHAN_TX_CFG_BP_ENA ( 1ULL << 0 )

Definition at line 510 of file thunderx.h.

◆ TXNIC_PF_CHAN_RX_CFG

#define TXNIC_PF_CHAN_RX_CFG 0x020000

Channel receive configuration.

Definition at line 513 of file thunderx.h.

◆ TXNIC_PF_CHAN_RX_CFG_CPI_BASE

#define TXNIC_PF_CHAN_RX_CFG_CPI_BASE ( ix ) ( ( ( uint64_t ) (ix) ) << 48 )

Definition at line 514 of file thunderx.h.

◆ TXNIC_PF_CHAN_RX_BP_CFG

#define TXNIC_PF_CHAN_RX_BP_CFG 0x080000

Channel receive backpressure configuration.

Definition at line 517 of file thunderx.h.

◆ TXNIC_PF_CHAN_RX_BP_CFG_ENA

#define TXNIC_PF_CHAN_RX_BP_CFG_ENA ( 1ULL << 63 )

Definition at line 518 of file thunderx.h.

◆ TXNIC_PF_CHAN_RX_BP_CFG_BPID

#define TXNIC_PF_CHAN_RX_BP_CFG_BPID ( bp ) ( ( ( uint64_t ) (bp) ) << 0 )

Definition at line 519 of file thunderx.h.

◆ TXNIC_PF_TL2_CFG

#define TXNIC_PF_TL2_CFG ( tl ) ( ( (tl) << 3 ) | 0x500000 )

Traffic limiter 2 configuration.

Definition at line 522 of file thunderx.h.

◆ TXNIC_PF_TL2_CFG_RR_QUANTUM

#define TXNIC_PF_TL2_CFG_RR_QUANTUM ( rr ) ( ( ( uint64_t ) (rr) ) << 0 )

Definition at line 523 of file thunderx.h.

◆ TXNIC_PF_TL2_CFG_RR_QUANTUM_DEFAULT

#define TXNIC_PF_TL2_CFG_RR_QUANTUM_DEFAULT TXNIC_PF_TL2_CFG_RR_QUANTUM ( 0x905 )

Definition at line 524 of file thunderx.h.

◆ TXNIC_PF_TL3_CFG

#define TXNIC_PF_TL3_CFG ( tl ) ( ( (tl) << 3 ) | 0x600000 )

Traffic limiter 3 configuration.

Definition at line 528 of file thunderx.h.

◆ TXNIC_PF_TL3_CFG_RR_QUANTUM

#define TXNIC_PF_TL3_CFG_RR_QUANTUM ( rr ) ( ( ( uint64_t ) (rr) ) << 0 )

Definition at line 529 of file thunderx.h.

◆ TXNIC_PF_TL3_CFG_RR_QUANTUM_DEFAULT

#define TXNIC_PF_TL3_CFG_RR_QUANTUM_DEFAULT TXNIC_PF_TL3_CFG_RR_QUANTUM ( 0x905 )

Definition at line 530 of file thunderx.h.

◆ TXNIC_PF_TL3_CHAN

#define TXNIC_PF_TL3_CHAN ( tl ) ( ( (tl) << 3 ) | 0x620000 )

Traffic limiter 3 channel mapping.

Definition at line 534 of file thunderx.h.

◆ TXNIC_PF_TL3_CHAN_CHAN

#define TXNIC_PF_TL3_CHAN_CHAN ( ch ) ( ( (ch) & 0x7f ) << 0 )

Definition at line 535 of file thunderx.h.

◆ TXNIC_PF_TL4_CFG

#define TXNIC_PF_TL4_CFG ( tl ) ( ( (tl) << 3 ) | 0x800000 )

Traffic limiter 4 configuration.

Definition at line 538 of file thunderx.h.

◆ TXNIC_PF_TL4_CFG_SQ_QS

#define TXNIC_PF_TL4_CFG_SQ_QS ( qs ) ( ( ( uint64_t ) (qs) ) << 27 )

Definition at line 539 of file thunderx.h.

◆ TXNIC_PF_TL4_CFG_RR_QUANTUM

#define TXNIC_PF_TL4_CFG_RR_QUANTUM ( rr ) ( ( ( uint64_t ) (rr) ) << 0 )

Definition at line 540 of file thunderx.h.

◆ TXNIC_PF_TL4_CFG_RR_QUANTUM_DEFAULT

#define TXNIC_PF_TL4_CFG_RR_QUANTUM_DEFAULT TXNIC_PF_TL4_CFG_RR_QUANTUM ( 0x905 )

Definition at line 541 of file thunderx.h.

◆ TXNIC_PF_QS

#define TXNIC_PF_QS ( qs ) ( ( (qs) << 21 ) | 0x20000000UL )

Queue set registers.

Definition at line 545 of file thunderx.h.

◆ TXNIC_PF_QS_CFG

#define TXNIC_PF_QS_CFG 0x010000

Queue set configuration.

Definition at line 548 of file thunderx.h.

◆ TXNIC_PF_QS_CFG_ENA

#define TXNIC_PF_QS_CFG_ENA ( 1ULL << 31 )

Definition at line 549 of file thunderx.h.

◆ TXNIC_PF_QS_CFG_VNIC

#define TXNIC_PF_QS_CFG_VNIC ( vn ) ( ( ( uint64_t ) (vn) ) << 0 )

Definition at line 550 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_CFG

#define TXNIC_PF_QS_RQ_CFG ( q ) ( ( (q) << 18 ) | 0x010400 )

Receive queue configuration.

Definition at line 553 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_CFG_CACHING

#define TXNIC_PF_QS_RQ_CFG_CACHING ( cx ) ( ( ( uint64_t ) (cx) ) << 26 )

Definition at line 554 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_CFG_CACHING_ALL

#define TXNIC_PF_QS_RQ_CFG_CACHING_ALL TXNIC_PF_QS_RQ_CFG_CACHING ( 1 )

Definition at line 555 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_CFG_CQ_QS

#define TXNIC_PF_QS_RQ_CFG_CQ_QS ( qs ) ( ( ( uint64_t ) (qs) ) << 19 )

Definition at line 557 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_CFG_RBDR_CONT_QS

#define TXNIC_PF_QS_RQ_CFG_RBDR_CONT_QS ( qs ) ( ( ( uint64_t ) (qs) ) << 9 )

Definition at line 558 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_CFG_RBDR_STRT_QS

#define TXNIC_PF_QS_RQ_CFG_RBDR_STRT_QS ( qs ) ( ( ( uint64_t ) (qs) ) << 1 )

Definition at line 559 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_DROP_CFG

#define TXNIC_PF_QS_RQ_DROP_CFG ( q ) ( ( (q) << 18 ) | 0x010420 )

Receive queue drop configuration.

Definition at line 562 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_BP_CFG

#define TXNIC_PF_QS_RQ_BP_CFG ( q ) ( ( (q) << 18 ) | 0x010500 )

Receive queue backpressure configuration.

Definition at line 565 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_BP_CFG_RBDR_BP_ENA

#define TXNIC_PF_QS_RQ_BP_CFG_RBDR_BP_ENA ( 1ULL << 63 )

Definition at line 566 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_BP_CFG_CQ_BP_ENA

#define TXNIC_PF_QS_RQ_BP_CFG_CQ_BP_ENA ( 1ULL << 62 )

Definition at line 567 of file thunderx.h.

◆ TXNIC_PF_QS_RQ_BP_CFG_BPID

#define TXNIC_PF_QS_RQ_BP_CFG_BPID ( bp ) ( ( ( uint64_t ) (bp) ) << 0 )

Definition at line 568 of file thunderx.h.

◆ TXNIC_PF_QS_SQ_CFG

#define TXNIC_PF_QS_SQ_CFG ( q ) ( ( (q) << 18 ) | 0x010c00 )

Send queue configuration.

Definition at line 571 of file thunderx.h.

◆ TXNIC_PF_QS_SQ_CFG_CQ_QS

#define TXNIC_PF_QS_SQ_CFG_CQ_QS ( qs ) ( ( ( uint64_t ) (qs) ) << 3 )

Definition at line 572 of file thunderx.h.

◆ TXNIC_PF_QS_SQ_CFG2

#define TXNIC_PF_QS_SQ_CFG2 ( q ) ( ( (q) << 18 ) | 0x010c08 )

Send queue configuration 2.

Definition at line 575 of file thunderx.h.

◆ TXNIC_PF_QS_SQ_CFG2_TL4

#define TXNIC_PF_QS_SQ_CFG2_TL4 ( tl ) ( ( ( uint64_t ) (tl) ) << 0 )

Definition at line 576 of file thunderx.h.

◆ TXNIC_VNIC_IDX

#define TXNIC_VNIC_IDX	(	bgx_idx,
		lmac_idx
	)	( ( (bgx_idx) * TXNIC_NUM_LMAC ) + (lmac_idx) )

Calculate virtual NIC index.

Parameters

bgx_idx	BGX Ethernet interface index
lmac_idx	Logical MAC index

Return values

vnic_idx Virtual NIC index

Definition at line 605 of file thunderx.h.

◆ TXNIC_BGX_IDX

#define TXNIC_BGX_IDX ( vnic_idx ) ( (vnic_idx) / TXNIC_NUM_LMAC )

Calculate BGX Ethernet interface index.

Parameters

vnic_idx Virtual NIC index

Return values

bgx_idx BGX Ethernet interface index

Definition at line 614 of file thunderx.h.

◆ TXNIC_LMAC_IDX

#define TXNIC_LMAC_IDX ( vnic_idx ) ( (vnic_idx) % TXNIC_NUM_LMAC )

Calculate logical MAC index.

Parameters

vnic_idx Virtual NIC index

Return values

lmac_idx Logical MAC index

Definition at line 622 of file thunderx.h.

◆ TXNIC_TL2_IDX

#define TXNIC_TL2_IDX ( vnic_idx ) ( (vnic_idx) << 3 )

Calculate traffic limiter 2 index.

Parameters

vnic_idx	Virtual NIC index
tl2_idx	Traffic limiter 2 index

Definition at line 630 of file thunderx.h.

◆ TXNIC_TL3_IDX

#define TXNIC_TL3_IDX ( vnic_idx ) ( (vnic_idx) << 5 )

Calculate traffic limiter 3 index.

Parameters

vnic_idx	Virtual NIC index
tl3_idx	Traffic limiter 3 index

Definition at line 638 of file thunderx.h.

◆ TXNIC_TL4_IDX

#define TXNIC_TL4_IDX ( vnic_idx ) ( (vnic_idx) << 7 )

Calculate traffic limiter 4 index.

Parameters

vnic_idx	Virtual NIC index
tl4_idx	Traffic limiter 4 index

Definition at line 646 of file thunderx.h.

◆ TXNIC_CHAN_IDX

#define TXNIC_CHAN_IDX ( vnic_idx )

Value:

( ( TXNIC_BGX_IDX (vnic_idx) << 7 ) | \

( TXNIC_LMAC_IDX (vnic_idx) << 4 ) )

TXNIC_BGX_IDX

#define TXNIC_BGX_IDX(vnic_idx)

Calculate BGX Ethernet interface index.

Definition: thunderx.h:614

TXNIC_LMAC_IDX

#define TXNIC_LMAC_IDX(vnic_idx)

Calculate logical MAC index.

Definition: thunderx.h:622

Calculate channel index.

Parameters

vnic_idx	Virtual NIC index
chan_idx	Channel index

Definition at line 654 of file thunderx.h.

◆ BGX_LMAC

#define BGX_LMAC ( lm ) ( ( (lm) << 20 ) | 0x00000000UL )

Per-LMAC registers.

Definition at line 665 of file thunderx.h.

◆ BGX_CMR_CONFIG

#define BGX_CMR_CONFIG 0x000000

CMR configuration.

Definition at line 668 of file thunderx.h.

◆ BGX_CMR_CONFIG_ENABLE

#define BGX_CMR_CONFIG_ENABLE ( 1ULL << 15 )

Definition at line 669 of file thunderx.h.

◆ BGX_CMR_CONFIG_DATA_PKT_RX_EN

#define BGX_CMR_CONFIG_DATA_PKT_RX_EN ( 1ULL << 14 )

Definition at line 670 of file thunderx.h.

◆ BGX_CMR_CONFIG_DATA_PKT_TX_EN

#define BGX_CMR_CONFIG_DATA_PKT_TX_EN ( 1ULL << 13 )

Definition at line 671 of file thunderx.h.

◆ BGX_CMR_CONFIG_LMAC_TYPE_GET

#define BGX_CMR_CONFIG_LMAC_TYPE_GET ( config ) ( ( (config) >> 8 ) & 0x7 )

Definition at line 672 of file thunderx.h.

◆ BGX_CMR_CONFIG_LMAC_TYPE_SET

#define BGX_CMR_CONFIG_LMAC_TYPE_SET ( ty ) ( ( ( uint64_t ) (ty) ) << 8 )

Definition at line 674 of file thunderx.h.

◆ BGX_CMR_CONFIG_LANE_TO_SDS

#define BGX_CMR_CONFIG_LANE_TO_SDS ( ls ) ( ( ( uint64_t ) (ls) ) << 0 )

Definition at line 675 of file thunderx.h.

◆ BGX_CMR_GLOBAL_CONFIG

#define BGX_CMR_GLOBAL_CONFIG 0x000008

CMR global configuration.

Definition at line 678 of file thunderx.h.

◆ BGX_CMR_GLOBAL_CONFIG_FCS_STRIP

#define BGX_CMR_GLOBAL_CONFIG_FCS_STRIP ( 1ULL << 6 )

Definition at line 679 of file thunderx.h.

◆ BGX_CMR_RX_STAT0

#define BGX_CMR_RX_STAT0 0x000070

CMR receive statistics 0.

Definition at line 682 of file thunderx.h.

◆ BGX_CMR_RX_STAT1

#define BGX_CMR_RX_STAT1 0x000078

CMR receive statistics 1.

Definition at line 685 of file thunderx.h.

◆ BGX_CMR_RX_STAT2

#define BGX_CMR_RX_STAT2 0x000080

CMR receive statistics 2.

Definition at line 688 of file thunderx.h.

◆ BGX_CMR_RX_STAT3

#define BGX_CMR_RX_STAT3 0x000088

CMR receive statistics 3.

Definition at line 691 of file thunderx.h.

◆ BGX_CMR_RX_STAT4

#define BGX_CMR_RX_STAT4 0x000090

CMR receive statistics 4.

Definition at line 694 of file thunderx.h.

◆ BGX_CMR_RX_STAT5

#define BGX_CMR_RX_STAT5 0x000098

CMR receive statistics 5.

Definition at line 697 of file thunderx.h.

◆ BGX_CMR_RX_STAT6

#define BGX_CMR_RX_STAT6 0x0000a0

CMR receive statistics 6.

Definition at line 700 of file thunderx.h.

◆ BGX_CMR_RX_STAT7

#define BGX_CMR_RX_STAT7 0x0000a8

CMR receive statistics 7.

Definition at line 703 of file thunderx.h.

◆ BGX_CMR_RX_STAT8

#define BGX_CMR_RX_STAT8 0x0000b0

CMR receive statistics 8.

Definition at line 706 of file thunderx.h.

◆ BGX_CMR_RX_STAT9

#define BGX_CMR_RX_STAT9 0x0000b8

CMR receive statistics 9.

Definition at line 709 of file thunderx.h.

◆ BGX_CMR_RX_STAT10

#define BGX_CMR_RX_STAT10 0x0000c0

CMR receive statistics 10.

Definition at line 712 of file thunderx.h.

◆ BGX_CMR_RX_DMAC_CTL

#define BGX_CMR_RX_DMAC_CTL 0x0000e8

CMR destination MAC control.

Definition at line 715 of file thunderx.h.

◆ BGX_CMR_RX_DMAC_CTL_MCST_MODE

#define BGX_CMR_RX_DMAC_CTL_MCST_MODE ( md ) ( ( ( uint64_t ) (md) ) << 1 )

Definition at line 716 of file thunderx.h.

◆ BGX_CMR_RX_DMAC_CTL_MCST_MODE_ACCEPT

#define BGX_CMR_RX_DMAC_CTL_MCST_MODE_ACCEPT BGX_CMR_RX_DMAC_CTL_MCST_MODE ( 1 )

Definition at line 717 of file thunderx.h.

◆ BGX_CMR_RX_DMAC_CTL_BCST_ACCEPT

#define BGX_CMR_RX_DMAC_CTL_BCST_ACCEPT ( 1ULL << 0 )

Definition at line 719 of file thunderx.h.

◆ BGX_CMR_RX_DMAC_CAM

#define BGX_CMR_RX_DMAC_CAM ( i ) ( ( (i) << 3 ) | 0x000200 )

CMR destination MAC CAM.

Definition at line 722 of file thunderx.h.

◆ BGX_CMR_RX_STEERING

#define BGX_CMR_RX_STEERING ( i ) ( ( (i) << 3 ) | 0x000300 )

CMR receive steering.

Definition at line 725 of file thunderx.h.

◆ BGX_CMR_CHAN_MSK_AND

#define BGX_CMR_CHAN_MSK_AND 0x000450

CMR backpressure channel mask AND.

Definition at line 728 of file thunderx.h.

◆ BGX_CMR_CHAN_MSK_AND_ALL

#define BGX_CMR_CHAN_MSK_AND_ALL ( count ) ( 0xffffffffffffffffULL >> ( 16 * ( 4 - (count) ) ) )

Definition at line 729 of file thunderx.h.

◆ BGX_CMR_TX_STAT0

#define BGX_CMR_TX_STAT0 0x000600

CMR transmit statistics 0.

Definition at line 733 of file thunderx.h.

◆ BGX_CMR_TX_STAT1

#define BGX_CMR_TX_STAT1 0x000608

CMR transmit statistics 1.

Definition at line 736 of file thunderx.h.

◆ BGX_CMR_TX_STAT2

#define BGX_CMR_TX_STAT2 0x000610

CMR transmit statistics 2.

Definition at line 739 of file thunderx.h.

◆ BGX_CMR_TX_STAT3

#define BGX_CMR_TX_STAT3 0x000618

CMR transmit statistics 3.

Definition at line 742 of file thunderx.h.

◆ BGX_CMR_TX_STAT4

#define BGX_CMR_TX_STAT4 0x000620

CMR transmit statistics 4.

Definition at line 745 of file thunderx.h.

◆ BGX_CMR_TX_STAT5

#define BGX_CMR_TX_STAT5 0x000628

CMR transmit statistics 5.

Definition at line 748 of file thunderx.h.

◆ BGX_CMR_TX_STAT6

#define BGX_CMR_TX_STAT6 0x000630

CMR transmit statistics 6.

Definition at line 751 of file thunderx.h.

◆ BGX_CMR_TX_STAT7

#define BGX_CMR_TX_STAT7 0x000638

CMR transmit statistics 7.

Definition at line 754 of file thunderx.h.

◆ BGX_CMR_TX_STAT8

#define BGX_CMR_TX_STAT8 0x000640

CMR transmit statistics 8.

Definition at line 757 of file thunderx.h.

◆ BGX_CMR_TX_STAT9

#define BGX_CMR_TX_STAT9 0x000648

CMR transmit statistics 9.

Definition at line 760 of file thunderx.h.

◆ BGX_CMR_TX_STAT10

#define BGX_CMR_TX_STAT10 0x000650

CMR transmit statistics 10.

Definition at line 763 of file thunderx.h.

◆ BGX_CMR_TX_STAT11

#define BGX_CMR_TX_STAT11 0x000658

CMR transmit statistics 11.

Definition at line 766 of file thunderx.h.

◆ BGX_CMR_TX_STAT12

#define BGX_CMR_TX_STAT12 0x000660

CMR transmit statistics 12.

Definition at line 769 of file thunderx.h.

◆ BGX_CMR_TX_STAT13

#define BGX_CMR_TX_STAT13 0x000668

CMR transmit statistics 13.

Definition at line 772 of file thunderx.h.

◆ BGX_CMR_TX_STAT14

#define BGX_CMR_TX_STAT14 0x000670

CMR transmit statistics 14.

Definition at line 775 of file thunderx.h.

◆ BGX_CMR_TX_STAT15

#define BGX_CMR_TX_STAT15 0x000678

CMR transmit statistics 15.

Definition at line 778 of file thunderx.h.

◆ BGX_CMR_TX_STAT16

#define BGX_CMR_TX_STAT16 0x000680

CMR transmit statistics 16.

Definition at line 781 of file thunderx.h.

◆ BGX_CMR_TX_STAT17

#define BGX_CMR_TX_STAT17 0x000688

CMR transmit statistics 17.

Definition at line 784 of file thunderx.h.

◆ BGX_CMR_RX_LMACS

#define BGX_CMR_RX_LMACS 0x000468

CMR receive logical MACs.

Definition at line 787 of file thunderx.h.

◆ BGX_CMR_RX_LMACS_LMACS_GET

#define BGX_CMR_RX_LMACS_LMACS_GET ( lmacs ) ( ( (lmacs) >> 0 ) & 0x7 )

Definition at line 788 of file thunderx.h.

◆ BGX_CMR_RX_LMACS_LMACS_SET

#define BGX_CMR_RX_LMACS_LMACS_SET ( ct ) ( ( ( uint64_t ) (ct) ) << 0 )

Definition at line 790 of file thunderx.h.

◆ BGX_CMR_TX_LMACS

#define BGX_CMR_TX_LMACS 0x001000

CMR transmit logical MACs.

Definition at line 793 of file thunderx.h.

◆ BGX_CMR_TX_LMACS_LMACS_GET

#define BGX_CMR_TX_LMACS_LMACS_GET ( lmacs ) ( ( (lmacs) >> 0 ) & 0x7 )

Definition at line 794 of file thunderx.h.

◆ BGX_CMR_TX_LMACS_LMACS_SET

#define BGX_CMR_TX_LMACS_LMACS_SET ( ct ) ( ( ( uint64_t ) (ct) ) << 0 )

Definition at line 796 of file thunderx.h.

◆ BGX_SPU_CONTROL1

#define BGX_SPU_CONTROL1 0x010000

SPU control 1.

Definition at line 799 of file thunderx.h.

◆ BGX_SPU_CONTROL1_RESET

#define BGX_SPU_CONTROL1_RESET ( 1ULL << 15 )

Definition at line 800 of file thunderx.h.

◆ BGX_SPU_CONTROL1_LO_PWR

#define BGX_SPU_CONTROL1_LO_PWR ( 1ULL << 11 )

Definition at line 801 of file thunderx.h.

◆ BGX_SPU_RESET_DELAY_MS

#define BGX_SPU_RESET_DELAY_MS 10

SPU reset delay.

Definition at line 804 of file thunderx.h.

◆ BGX_SPU_STATUS1

#define BGX_SPU_STATUS1 0x010008

SPU status 1.

Definition at line 807 of file thunderx.h.

◆ BGX_SPU_STATUS1_FLT

#define BGX_SPU_STATUS1_FLT ( 1ULL << 7 )

Definition at line 808 of file thunderx.h.

◆ BGX_SPU_STATUS1_RCV_LNK

#define BGX_SPU_STATUS1_RCV_LNK ( 1ULL << 2 )

Definition at line 809 of file thunderx.h.

◆ BGX_SPU_STATUS2

#define BGX_SPU_STATUS2 0x010020

SPU status 2.

Definition at line 812 of file thunderx.h.

◆ BGX_SPU_STATUS2_RCVFLT

#define BGX_SPU_STATUS2_RCVFLT ( 1ULL << 10 )

Definition at line 813 of file thunderx.h.

◆ BGX_SPU_BR_STATUS1

#define BGX_SPU_BR_STATUS1 0x010030

SPU BASE-R status 1.

Definition at line 816 of file thunderx.h.

◆ BGX_SPU_BR_STATUS1_RCV_LNK

#define BGX_SPU_BR_STATUS1_RCV_LNK ( 1ULL << 12 )

Definition at line 817 of file thunderx.h.

◆ BGX_SPU_BR_STATUS1_HI_BER

#define BGX_SPU_BR_STATUS1_HI_BER ( 1ULL << 1 )

Definition at line 818 of file thunderx.h.

◆ BGX_SPU_BR_STATUS1_BLK_LOCK

#define BGX_SPU_BR_STATUS1_BLK_LOCK ( 1ULL << 0 )

Definition at line 819 of file thunderx.h.

◆ BGX_SPU_BR_STATUS2

#define BGX_SPU_BR_STATUS2 0x010038

SPU BASE-R status 2.

Definition at line 822 of file thunderx.h.

◆ BGX_SPU_BR_STATUS2_LATCHED_LOCK

#define BGX_SPU_BR_STATUS2_LATCHED_LOCK ( 1ULL << 15 )

Definition at line 823 of file thunderx.h.

◆ BGX_SPU_BR_STATUS2_LATCHED_BER

#define BGX_SPU_BR_STATUS2_LATCHED_BER ( 1ULL << 14 )

Definition at line 824 of file thunderx.h.

◆ BGX_SPU_BR_ALGN_STATUS

#define BGX_SPU_BR_ALGN_STATUS 0x010050

SPU BASE-R alignment status.

Definition at line 827 of file thunderx.h.

◆ BGX_SPU_BR_ALGN_STATUS_ALIGND

#define BGX_SPU_BR_ALGN_STATUS_ALIGND ( 1ULL << 12 )

Definition at line 828 of file thunderx.h.

◆ BGX_SPU_BR_PMD_CONTROL

#define BGX_SPU_BR_PMD_CONTROL 0x010068

SPU BASE-R link training control.

Definition at line 831 of file thunderx.h.

◆ BGX_SPU_BR_PMD_CONTROL_TRAIN_EN

#define BGX_SPU_BR_PMD_CONTROL_TRAIN_EN ( 1ULL << 1 )

Definition at line 832 of file thunderx.h.

◆ BGX_SPU_BR_PMD_STATUS

#define BGX_SPU_BR_PMD_STATUS 0x010070

SPU BASE-R link training status.

Definition at line 835 of file thunderx.h.

◆ BGX_SPU_BR_PMD_LP_CUP

#define BGX_SPU_BR_PMD_LP_CUP 0x010078

SPU link partner coefficient update.

Definition at line 838 of file thunderx.h.

◆ BGX_SPU_BR_PMD_LD_CUP

#define BGX_SPU_BR_PMD_LD_CUP 0x010088

SPU local device coefficient update.

Definition at line 841 of file thunderx.h.

◆ BGX_SPU_BR_PMD_LD_REP

#define BGX_SPU_BR_PMD_LD_REP 0x010090

SPU local device status report.

Definition at line 844 of file thunderx.h.

◆ BGX_SPU_FEC_CONTROL

#define BGX_SPU_FEC_CONTROL 0x0100a0

SPU forward error correction control.

Definition at line 847 of file thunderx.h.

◆ BGX_SPU_AN_CONTROL

#define BGX_SPU_AN_CONTROL 0x0100c8

SPU autonegotation control.

Definition at line 850 of file thunderx.h.

◆ BGX_SPU_AN_STATUS

#define BGX_SPU_AN_STATUS 0x0100d0

SPU autonegotiation status.

Definition at line 853 of file thunderx.h.

◆ BGX_SPU_AN_STATUS_XNP_STAT

#define BGX_SPU_AN_STATUS_XNP_STAT ( 1ULL << 7 )

Definition at line 854 of file thunderx.h.

◆ BGX_SPU_AN_STATUS_PAGE_RX

#define BGX_SPU_AN_STATUS_PAGE_RX ( 1ULL << 6 )

Definition at line 855 of file thunderx.h.

◆ BGX_SPU_AN_STATUS_AN_COMPLETE

#define BGX_SPU_AN_STATUS_AN_COMPLETE ( 1ULL << 5 )

Definition at line 856 of file thunderx.h.

◆ BGX_SPU_AN_STATUS_LINK_STATUS

#define BGX_SPU_AN_STATUS_LINK_STATUS ( 1ULL << 2 )

Definition at line 857 of file thunderx.h.

◆ BGX_SPU_AN_STATUS_LP_AN_ABLE

#define BGX_SPU_AN_STATUS_LP_AN_ABLE ( 1ULL << 0 )

Definition at line 858 of file thunderx.h.

◆ BGX_SPU_INT

#define BGX_SPU_INT 0x010220

SPU interrupt.

Definition at line 861 of file thunderx.h.

◆ BGX_SPU_INT_TRAINING_FAIL

#define BGX_SPU_INT_TRAINING_FAIL ( 1ULL << 14 )

Definition at line 862 of file thunderx.h.

◆ BGX_SPU_INT_TRAINING_DONE

#define BGX_SPU_INT_TRAINING_DONE ( 1ULL << 13 )

Definition at line 863 of file thunderx.h.

◆ BGX_SPU_INT_AN_COMPLETE

#define BGX_SPU_INT_AN_COMPLETE ( 1ULL << 12 )

Definition at line 864 of file thunderx.h.

◆ BGX_SPU_INT_AN_LINK_GOOD

#define BGX_SPU_INT_AN_LINK_GOOD ( 1ULL << 11 )

Definition at line 865 of file thunderx.h.

◆ BGX_SPU_INT_AN_PAGE_RX

#define BGX_SPU_INT_AN_PAGE_RX ( 1ULL << 10 )

Definition at line 866 of file thunderx.h.

◆ BGX_SPU_INT_FEC_UNCORR

#define BGX_SPU_INT_FEC_UNCORR ( 1ULL << 9 )

Definition at line 867 of file thunderx.h.

◆ BGX_SPU_INT_FEC_CORR

#define BGX_SPU_INT_FEC_CORR ( 1ULL << 8 )

Definition at line 868 of file thunderx.h.

◆ BGX_SPU_INT_BIP_ERR

#define BGX_SPU_INT_BIP_ERR ( 1ULL << 7 )

Definition at line 869 of file thunderx.h.

◆ BGX_SPU_INT_DBG_SYNC

#define BGX_SPU_INT_DBG_SYNC ( 1ULL << 6 )

Definition at line 870 of file thunderx.h.

◆ BGX_SPU_INT_ALGNLOS

#define BGX_SPU_INT_ALGNLOS ( 1ULL << 5 )

Definition at line 871 of file thunderx.h.

◆ BGX_SPU_INT_SYNLOS

#define BGX_SPU_INT_SYNLOS ( 1ULL << 4 )

Definition at line 872 of file thunderx.h.

◆ BGX_SPU_INT_BITLCKLS

#define BGX_SPU_INT_BITLCKLS ( 1ULL << 3 )

Definition at line 873 of file thunderx.h.

◆ BGX_SPU_INT_ERR_BLK

#define BGX_SPU_INT_ERR_BLK ( 1ULL << 2 )

Definition at line 874 of file thunderx.h.

◆ BGX_SPU_INT_RX_LINK_DOWN

#define BGX_SPU_INT_RX_LINK_DOWN ( 1ULL << 1 )

Definition at line 875 of file thunderx.h.

◆ BGX_SPU_INT_RX_LINK_UP

#define BGX_SPU_INT_RX_LINK_UP ( 1ULL << 0 )

Definition at line 876 of file thunderx.h.

Enumeration Type Documentation

◆ txnic_lmac_types

enum txnic_lmac_types

LMAC types.

Enumerator
TXNIC_LMAC_SGMII	SGMII/1000BASE-X.
TXNIC_LMAC_XAUI	10GBASE-X/XAUI or DXAUI
TXNIC_LMAC_RXAUI	Reduced XAUI.
TXNIC_LMAC_10G_R	10GBASE-R
TXNIC_LMAC_40G_R	40GBASE-R

Definition at line 879 of file thunderx.h.

                       {
         TXNIC_LMAC_SGMII        = 0x0,          /**< SGMII/1000BASE-X */
         TXNIC_LMAC_XAUI         = 0x1,          /**< 10GBASE-X/XAUI or DXAUI */
         TXNIC_LMAC_RXAUI        = 0x2,          /**< Reduced XAUI */
         TXNIC_LMAC_10G_R        = 0x3,          /**< 10GBASE-R */
         TXNIC_LMAC_40G_R        = 0x4,          /**< 40GBASE-R */
 };

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL )

◆ txnic_address_node()

static unsigned int txnic_address_node ( uint64_t addr )

inlinestatic

Calculate node ID.

Parameters

addr	PCI BAR base address

Return values

node Node ID

Definition at line 54 of file thunderx.h.

                                                                 {
 
         /* Node ID is in bits [45:44] of the hardcoded BAR address */
         return ( ( addr >> 44 ) & 0x3 );
 }

References addr.

Referenced by txnic_bgx_probe(), and txnic_pf_probe().

◆ txnic_address_bgx()

static unsigned int txnic_address_bgx ( uint64_t addr )

inlinestatic

Calculate BGX Ethernet interface index.

Parameters

addr	PCI BAR base address

Return values

index Index

Definition at line 66 of file thunderx.h.

                                                                {
 
         /* Index is in bit 24 of the hardcoded BAR address */
         return ( ( addr >> 24 ) & 0x1 );
 }

References addr.

Referenced by txnic_bgx_probe().

Data Structures

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ TXNIC_LINE_SIZE

◆ TXNIC_VF_BAR_SIZE

◆ TXNIC_PF_BAR_SIZE

◆ TXNIC_BGX_BAR_SIZE

◆ TXNIC_NUM_BGX

◆ TXNIC_NUM_LMAC

◆ TXNIC_NUM_DMAC

◆ TXNIC_NUM_STEERING

◆ TXNIC_QS_SQ_CFG

◆ TXNIC_QS_SQ_CFG_ENA

◆ TXNIC_QS_SQ_CFG_RESET

◆ TXNIC_QS_SQ_CFG_QSIZE

◆ TXNIC_QS_SQ_CFG_QSIZE_1K

◆ TXNIC_QS_SQ_BASE

◆ TXNIC_QS_SQ_HEAD

◆ TXNIC_QS_SQ_TAIL

◆ TXNIC_QS_SQ_DOOR

◆ TXNIC_QS_SQ_STATUS

◆ TXNIC_QS_SQ_STATUS_STOPPED

◆ TXNIC_SQ_STOP_MAX_WAIT_MS

◆ TXNIC_SEND_HDR_FLAGS

◆ TXNIC_SEND_GATHER_FLAGS

◆ TXNIC_SQE_SUBDESCS

◆ TXNIC_SQES

◆ TXNIC_SQ_FILL

◆ TXNIC_SQ_ALIGN

◆ TXNIC_SQ_STRIDE

◆ TXNIC_SQ_SIZE

◆ TXNIC_QS_RQ_CFG

◆ TXNIC_QS_RQ_CFG_ENA

◆ TXNIC_RQ_DISABLE_MAX_WAIT_MS

◆ TXNIC_QS_RBDR_CFG

◆ TXNIC_QS_RBDR_CFG_ENA

◆ TXNIC_QS_RBDR_CFG_RESET

◆ TXNIC_QS_RBDR_CFG_QSIZE

◆ TXNIC_QS_RBDR_CFG_QSIZE_8K

◆ TXNIC_QS_RBDR_CFG_LINES

◆ TXNIC_QS_RBDR_BASE

◆ TXNIC_QS_RBDR_HEAD

◆ TXNIC_QS_RBDR_TAIL

◆ TXNIC_QS_RBDR_DOOR

◆ TXNIC_QS_RBDR_STATUS0

◆ TXNIC_RQES

◆ TXNIC_RQ_FILL

◆ TXNIC_RQE_SIZE

◆ TXNIC_RQ_ALIGN

◆ TXNIC_RQ_STRIDE

◆ TXNIC_RQ_SIZE

◆ TXNIC_QS_CQ_CFG

◆ TXNIC_QS_CQ_CFG_ENA

◆ TXNIC_QS_CQ_CFG_RESET

◆ TXNIC_QS_CQ_CFG_QSIZE

◆ TXNIC_QS_CQ_CFG_QSIZE_256

◆ TXNIC_CQ_DISABLE_MAX_WAIT_MS

◆ TXNIC_QS_CQ_BASE

◆ TXNIC_QS_CQ_HEAD

◆ TXNIC_QS_CQ_TAIL

◆ TXNIC_QS_CQ_DOOR

◆ TXNIC_QS_CQ_STATUS

◆ TXNIC_QS_CQ_STATUS_QCOUNT

◆ TXNIC_QS_CQ_STATUS2

◆ TXNIC_CQE_TYPE_SEND

◆ TXNIC_CQE_TYPE_RX

◆ TXNIC_CQE_RX_APAD_LEN

◆ TXNIC_CQES

◆ TXNIC_CQ_ALIGN

◆ TXNIC_CQ_STRIDE

◆ TXNIC_CQ_SIZE

◆ TXNIC_PF_CFG

◆ TXNIC_PF_CFG_ENA

◆ TXNIC_PF_BP_CFG

◆ TXNIC_PF_BP_CFG_BP_POLL_ENA

◆ TXNIC_PF_BP_CFG_BP_POLL_DLY

◆ TXNIC_PF_BP_CFG_BP_POLL_DLY_DEFAULT