iPXE
thunderx.c
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2016 Michael Brown <mbrown@fensystems.co.uk>.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of the
7  * License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17  * 02110-1301, USA.
18  *
19  * You can also choose to distribute this program under the terms of
20  * the Unmodified Binary Distribution Licence (as given in the file
21  * COPYING.UBDL), provided that you have satisfied its requirements.
22  */
23 
24 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25 
26 #include <stdint.h>
27 #include <string.h>
28 #include <strings.h>
29 #include <stdio.h>
30 #include <unistd.h>
31 #include <errno.h>
32 #include <assert.h>
33 #include <byteswap.h>
34 #include <ipxe/netdevice.h>
35 #include <ipxe/ethernet.h>
36 #include <ipxe/if_ether.h>
37 #include <ipxe/iobuf.h>
38 #include <ipxe/malloc.h>
39 #include <ipxe/pci.h>
40 #include <ipxe/pciea.h>
41 #include <ipxe/umalloc.h>
42 #include "thunderx.h"
43 #include "thunderxcfg.h"
44 
45 /** @file
46  *
47  * Cavium ThunderX Ethernet driver
48  *
49  */
50 
51 /** List of BGX Ethernet interfaces */
52 static LIST_HEAD ( txnic_bgxs );
53 
54 /** List of physical functions */
55 static LIST_HEAD ( txnic_pfs );
56 
57 /** Debug colour for physical function and BGX messages */
58 #define TXNICCOL(x) ( &txnic_pfs + (x)->node )
59 
60 /** Board configuration protocol */
63 
64 /******************************************************************************
65  *
66  * Diagnostics
67  *
68  ******************************************************************************
69  */
70 
71 /**
72  * Show virtual NIC diagnostics (for debugging)
73  *
74  * @v vnic Virtual NIC
75  */
76 static __attribute__ (( unused )) void txnic_diag ( struct txnic *vnic ) {
77 
78  DBGC ( vnic, "TXNIC %s SQ %05zx(%05llx)/%05zx(%05llx) %08llx\n",
79  vnic->name,
80  ( ( vnic->sq.prod % TXNIC_SQES ) * TXNIC_SQ_STRIDE ),
81  readq ( vnic->regs + TXNIC_QS_SQ_TAIL(0) ),
82  ( ( vnic->sq.cons % TXNIC_SQES ) * TXNIC_SQ_STRIDE ),
83  readq ( vnic->regs + TXNIC_QS_SQ_HEAD(0) ),
84  readq ( vnic->regs + TXNIC_QS_SQ_STATUS(0) ) );
85  DBGC ( vnic, "TXNIC %s RQ %05zx(%05llx)/%05zx(%05llx) %016llx\n",
86  vnic->name,
87  ( ( vnic->rq.prod % TXNIC_RQES ) * TXNIC_RQ_STRIDE ),
88  readq ( vnic->regs + TXNIC_QS_RBDR_TAIL(0) ),
89  ( ( vnic->rq.cons % TXNIC_RQES ) * TXNIC_RQ_STRIDE ),
90  readq ( vnic->regs + TXNIC_QS_RBDR_HEAD(0) ),
91  readq ( vnic->regs + TXNIC_QS_RBDR_STATUS0(0) ) );
92  DBGC ( vnic, "TXNIC %s CQ xxxxx(%05llx)/%05zx(%05llx) %08llx:%08llx\n",
93  vnic->name, readq ( vnic->regs + TXNIC_QS_CQ_TAIL(0) ),
94  ( ( vnic->cq.cons % TXNIC_CQES ) * TXNIC_CQ_STRIDE ),
95  readq ( vnic->regs + TXNIC_QS_CQ_HEAD(0) ),
96  readq ( vnic->regs + TXNIC_QS_CQ_STATUS(0) ),
97  readq ( vnic->regs + TXNIC_QS_CQ_STATUS2(0) ) );
98 }
99 
100 /******************************************************************************
101  *
102  * Send queue
103  *
104  ******************************************************************************
105  */
106 
107 /**
108  * Create send queue
109  *
110  * @v vnic Virtual NIC
111  * @ret rc Return status code
112  */
113 static int txnic_create_sq ( struct txnic *vnic ) {
114 
115  /* Reset send queue */
116  vnic->sq.prod = 0;
117  vnic->sq.cons = 0;
118  writeq ( TXNIC_QS_SQ_CFG_RESET, ( vnic->regs + TXNIC_QS_SQ_CFG(0) ) );
119 
120  /* Configure and enable send queue */
121  writeq ( virt_to_phys ( vnic->sq.sqe ),
122  ( vnic->regs + TXNIC_QS_SQ_BASE(0) ) );
124  ( vnic->regs + TXNIC_QS_SQ_CFG(0) ) );
125 
126  DBGC ( vnic, "TXNIC %s SQ at [%08lx,%08lx)\n",
127  vnic->name, virt_to_phys ( vnic->sq.sqe ),
128  ( virt_to_phys ( vnic->sq.sqe ) + TXNIC_SQ_SIZE ) );
129  return 0;
130 }
131 
132 /**
133  * Disable send queue
134  *
135  * @v vnic Virtual NIC
136  * @ret rc Return status code
137  */
138 static int txnic_disable_sq ( struct txnic *vnic ) {
140  unsigned int i;
141 
142  /* Disable send queue */
143  writeq ( 0, ( vnic->regs + TXNIC_QS_SQ_CFG(0) ) );
144 
145  /* Wait for send queue to be stopped */
146  for ( i = 0 ; i < TXNIC_SQ_STOP_MAX_WAIT_MS ; i++ ) {
147 
148  /* Check if send queue is stopped */
149  status = readq ( vnic->regs + TXNIC_QS_SQ_STATUS(0) );
151  return 0;
152 
153  /* Delay */
154  mdelay ( 1 );
155  }
156 
157  DBGC ( vnic, "TXNIC %s SQ disable timed out\n", vnic->name );
158  return -ETIMEDOUT;
159 }
160 
161 /**
162  * Destroy send queue
163  *
164  * @v vnic Virtual NIC
165  */
166 static void txnic_destroy_sq ( struct txnic *vnic ) {
167  int rc;
168 
169  /* Disable send queue */
170  if ( ( rc = txnic_disable_sq ( vnic ) ) != 0 ) {
171  /* Nothing else we can do */
172  return;
173  }
174 
175  /* Reset send queue */
176  writeq ( TXNIC_QS_SQ_CFG_RESET, ( vnic->regs + TXNIC_QS_SQ_CFG(0) ) );
177 }
178 
179 /**
180  * Send packet
181  *
182  * @v vnic Virtual NIC
183  * @v iobuf I/O buffer
184  * @ret rc Return status code
185  */
186 static int txnic_send ( struct txnic *vnic, struct io_buffer *iobuf ) {
187  struct txnic_sqe *sqe;
188  unsigned int sq_idx;
189  size_t len;
190 
191  /* Get next send queue entry */
192  if ( ( vnic->sq.prod - vnic->sq.cons ) >= TXNIC_SQ_FILL ) {
193  DBGC ( vnic, "TXNIC %s out of send queue entries\n",
194  vnic->name );
195  return -ENOBUFS;
196  }
197  sq_idx = ( vnic->sq.prod++ % TXNIC_SQES );
198  sqe = &vnic->sq.sqe[sq_idx];
199 
200  /* Populate send descriptor */
201  len = iob_len ( iobuf );
202  memset ( sqe, 0, sizeof ( *sqe ) );
203  sqe->hdr.total = cpu_to_le32 ( ( len >= ETH_ZLEN ) ? len : ETH_ZLEN );
204  sqe->hdr.subdcnt = ( TXNIC_SQE_SUBDESCS - 1 );
206  sqe->gather.size = cpu_to_le16 ( len );
208  sqe->gather.addr = cpu_to_le64 ( virt_to_bus ( iobuf->data ) );
209  DBGC2 ( vnic, "TXNIC %s SQE %#03x is [%08lx,%08lx)\n",
210  vnic->name, sq_idx, virt_to_bus ( iobuf->data ),
211  ( virt_to_bus ( iobuf->data ) + len ) );
212 
213  /* Ring doorbell */
214  wmb();
215  writeq ( TXNIC_SQE_SUBDESCS, ( vnic->regs + TXNIC_QS_SQ_DOOR(0) ) );
216 
217  return 0;
218 }
219 
220 /**
221  * Complete send queue entry
222  *
223  * @v vnic Virtual NIC
224  * @v cqe Send completion queue entry
225  */
226 static void txnic_complete_sqe ( struct txnic *vnic,
227  struct txnic_cqe_send *cqe ) {
228  struct net_device *netdev = vnic->netdev;
229  unsigned int sq_idx;
230  unsigned int status;
231 
232  /* Parse completion */
233  sq_idx = ( le16_to_cpu ( cqe->sqe_ptr ) / TXNIC_SQE_SUBDESCS );
234  status = cqe->send_status;
235 
236  /* Sanity check */
237  assert ( sq_idx == ( vnic->sq.cons % TXNIC_SQES ) );
238 
239  /* Free send queue entry */
240  vnic->sq.cons++;
241 
242  /* Complete transmission */
243  if ( status ) {
244  DBGC ( vnic, "TXNIC %s SQE %#03x complete (status %#02x)\n",
245  vnic->name, sq_idx, status );
247  } else {
248  DBGC2 ( vnic, "TXNIC %s SQE %#03x complete\n",
249  vnic->name, sq_idx );
251  }
252 }
253 
254 /******************************************************************************
255  *
256  * Receive queue
257  *
258  ******************************************************************************
259  */
260 
261 /**
262  * Create receive queue
263  *
264  * @v vnic Virtual NIC
265  * @ret rc Return status code
266  */
267 static int txnic_create_rq ( struct txnic *vnic ) {
268 
269  /* Reset receive buffer descriptor ring */
270  vnic->rq.prod = 0;
271  vnic->rq.cons = 0;
273  ( vnic->regs + TXNIC_QS_RBDR_CFG(0) ) );
274 
275  /* Configure and enable receive buffer descriptor ring */
276  writeq ( virt_to_phys ( vnic->rq.rqe ),
277  ( vnic->regs + TXNIC_QS_RBDR_BASE(0) ) );
280  TXNIC_LINE_SIZE ) ),
281  ( vnic->regs + TXNIC_QS_RBDR_CFG(0) ) );
282 
283  /* Enable receive queue */
284  writeq ( TXNIC_QS_RQ_CFG_ENA, ( vnic->regs + TXNIC_QS_RQ_CFG(0) ) );
285 
286  DBGC ( vnic, "TXNIC %s RQ at [%08lx,%08lx)\n",
287  vnic->name, virt_to_phys ( vnic->rq.rqe ),
288  ( virt_to_phys ( vnic->rq.rqe ) + TXNIC_RQ_SIZE ) );
289  return 0;
290 }
291 
292 /**
293  * Disable receive queue
294  *
295  * @v vnic Virtual NIC
296  * @ret rc Return status code
297  */
298 static int txnic_disable_rq ( struct txnic *vnic ) {
299  uint64_t cfg;
300  unsigned int i;
301 
302  /* Disable receive queue */
303  writeq ( 0, ( vnic->regs + TXNIC_QS_RQ_CFG(0) ) );
304 
305  /* Wait for receive queue to be disabled */
306  for ( i = 0 ; i < TXNIC_RQ_DISABLE_MAX_WAIT_MS ; i++ ) {
307 
308  /* Check if receive queue is disabled */
309  cfg = readq ( vnic->regs + TXNIC_QS_RQ_CFG(0) );
310  if ( ! ( cfg & TXNIC_QS_RQ_CFG_ENA ) )
311  return 0;
312 
313  /* Delay */
314  mdelay ( 1 );
315  }
316 
317  DBGC ( vnic, "TXNIC %s RQ disable timed out\n", vnic->name );
318  return -ETIMEDOUT;
319 }
320 
321 /**
322  * Destroy receive queue
323  *
324  * @v vnic Virtual NIC
325  */
326 static void txnic_destroy_rq ( struct txnic *vnic ) {
327  unsigned int i;
328  int rc;
329 
330  /* Disable receive queue */
331  if ( ( rc = txnic_disable_rq ( vnic ) ) != 0 ) {
332  /* Leak memory; there's nothing else we can do */
333  return;
334  }
335 
336  /* Disable receive buffer descriptor ring */
337  writeq ( 0, ( vnic->regs + TXNIC_QS_RBDR_CFG(0) ) );
338 
339  /* Reset receive buffer descriptor ring */
341  ( vnic->regs + TXNIC_QS_RBDR_CFG(0) ) );
342 
343  /* Free any unused I/O buffers */
344  for ( i = 0 ; i < TXNIC_RQ_FILL ; i++ ) {
345  if ( vnic->rq.iobuf[i] )
346  free_iob ( vnic->rq.iobuf[i] );
347  vnic->rq.iobuf[i] = NULL;
348  }
349 }
350 
351 /**
352  * Refill receive queue
353  *
354  * @v vnic Virtual NIC
355  */
356 static void txnic_refill_rq ( struct txnic *vnic ) {
357  struct io_buffer *iobuf;
358  struct txnic_rqe *rqe;
359  unsigned int rq_idx;
360  unsigned int rq_iobuf_idx;
361  unsigned int refilled = 0;
362 
363  /* Refill ring */
364  while ( ( vnic->rq.prod - vnic->rq.cons ) < TXNIC_RQ_FILL ) {
365 
366  /* Allocate I/O buffer */
367  iobuf = alloc_iob ( TXNIC_RQE_SIZE );
368  if ( ! iobuf ) {
369  /* Wait for next refill */
370  break;
371  }
372 
373  /* Get next receive descriptor */
374  rq_idx = ( vnic->rq.prod++ % TXNIC_RQES );
375  rqe = &vnic->rq.rqe[rq_idx];
376 
377  /* Populate receive descriptor */
378  rqe->rbdre.addr = cpu_to_le64 ( virt_to_bus ( iobuf->data ) );
379  DBGC2 ( vnic, "TXNIC %s RQE %#03x is [%08lx,%08lx)\n",
380  vnic->name, rq_idx, virt_to_bus ( iobuf->data ),
381  ( virt_to_bus ( iobuf->data ) + TXNIC_RQE_SIZE ) );
382 
383  /* Record number of refills for doorbell */
384  refilled++;
385 
386  /* Record I/O buffer */
387  rq_iobuf_idx = ( rq_idx % TXNIC_RQ_FILL );
388  assert ( vnic->rq.iobuf[rq_iobuf_idx] == NULL );
389  vnic->rq.iobuf[rq_iobuf_idx] = iobuf;
390  }
391 
392  /* Ring doorbell */
393  wmb();
394  writeq ( refilled, ( vnic->regs + TXNIC_QS_RBDR_DOOR(0) ) );
395 }
396 
397 /**
398  * Complete receive queue entry
399  *
400  * @v vnic Virtual NIC
401  * @v cqe Receive completion queue entry
402  */
403 static void txnic_complete_rqe ( struct txnic *vnic,
404  struct txnic_cqe_rx *cqe ) {
405  struct net_device *netdev = vnic->netdev;
406  struct io_buffer *iobuf;
407  unsigned int errop;
408  unsigned int rq_idx;
409  unsigned int rq_iobuf_idx;
410  size_t apad_len;
411  size_t len;
412 
413  /* Parse completion */
414  errop = cqe->errop;
415  apad_len = TXNIC_CQE_RX_APAD_LEN ( cqe->apad );
416  len = le16_to_cpu ( cqe->len );
417 
418  /* Get next receive I/O buffer */
419  rq_idx = ( vnic->rq.cons++ % TXNIC_RQES );
420  rq_iobuf_idx = ( rq_idx % TXNIC_RQ_FILL );
421  iobuf = vnic->rq.iobuf[rq_iobuf_idx];
422  vnic->rq.iobuf[rq_iobuf_idx] = NULL;
423 
424  /* Populate I/O buffer */
425  iob_reserve ( iobuf, apad_len );
426  iob_put ( iobuf, len );
427 
428  /* Hand off to network stack */
429  if ( errop ) {
430  DBGC ( vnic, "TXNIC %s RQE %#03x error (length %zd, errop "
431  "%#02x)\n", vnic->name, rq_idx, len, errop );
432  netdev_rx_err ( netdev, iobuf, -EIO );
433  } else {
434  DBGC2 ( vnic, "TXNIC %s RQE %#03x complete (length %zd)\n",
435  vnic->name, rq_idx, len );
436  netdev_rx ( netdev, iobuf );
437  }
438 }
439 
440 /******************************************************************************
441  *
442  * Completion queue
443  *
444  ******************************************************************************
445  */
446 
447 /**
448  * Create completion queue
449  *
450  * @v vnic Virtual NIC
451  * @ret rc Return status code
452  */
453 static int txnic_create_cq ( struct txnic *vnic ) {
454 
455  /* Reset completion queue */
456  vnic->cq.cons = 0;
457  writeq ( TXNIC_QS_CQ_CFG_RESET, ( vnic->regs + TXNIC_QS_CQ_CFG(0) ) );
458 
459  /* Configure and enable completion queue */
460  writeq ( virt_to_phys ( vnic->cq.cqe ),
461  ( vnic->regs + TXNIC_QS_CQ_BASE(0) ) );
463  ( vnic->regs + TXNIC_QS_CQ_CFG(0) ) );
464 
465  DBGC ( vnic, "TXNIC %s CQ at [%08lx,%08lx)\n",
466  vnic->name, virt_to_phys ( vnic->cq.cqe ),
467  ( virt_to_phys ( vnic->cq.cqe ) + TXNIC_CQ_SIZE ) );
468  return 0;
469 }
470 
471 /**
472  * Disable completion queue
473  *
474  * @v vnic Virtual NIC
475  * @ret rc Return status code
476  */
477 static int txnic_disable_cq ( struct txnic *vnic ) {
478  uint64_t cfg;
479  unsigned int i;
480 
481  /* Disable completion queue */
482  writeq ( 0, ( vnic->regs + TXNIC_QS_CQ_CFG(0) ) );
483 
484  /* Wait for completion queue to be disabled */
485  for ( i = 0 ; i < TXNIC_CQ_DISABLE_MAX_WAIT_MS ; i++ ) {
486 
487  /* Check if completion queue is disabled */
488  cfg = readq ( vnic->regs + TXNIC_QS_CQ_CFG(0) );
489  if ( ! ( cfg & TXNIC_QS_CQ_CFG_ENA ) )
490  return 0;
491 
492  /* Delay */
493  mdelay ( 1 );
494  }
495 
496  DBGC ( vnic, "TXNIC %s CQ disable timed out\n", vnic->name );
497  return -ETIMEDOUT;
498 }
499 
500 /**
501  * Destroy completion queue
502  *
503  * @v vnic Virtual NIC
504  */
505 static void txnic_destroy_cq ( struct txnic *vnic ) {
506  int rc;
507 
508  /* Disable completion queue */
509  if ( ( rc = txnic_disable_cq ( vnic ) ) != 0 ) {
510  /* Leak memory; there's nothing else we can do */
511  return;
512  }
513 
514  /* Reset completion queue */
515  writeq ( TXNIC_QS_CQ_CFG_RESET, ( vnic->regs + TXNIC_QS_CQ_CFG(0) ) );
516 }
517 
518 /**
519  * Poll completion queue
520  *
521  * @v vnic Virtual NIC
522  */
523 static void txnic_poll_cq ( struct txnic *vnic ) {
524  union txnic_cqe *cqe;
526  unsigned int qcount;
527  unsigned int cq_idx;
528  unsigned int i;
529 
530  /* Get number of completions */
531  status = readq ( vnic->regs + TXNIC_QS_CQ_STATUS(0) );
532  qcount = TXNIC_QS_CQ_STATUS_QCOUNT ( status );
533  if ( ! qcount )
534  return;
535 
536  /* Process completion queue entries */
537  for ( i = 0 ; i < qcount ; i++ ) {
538 
539  /* Get completion queue entry */
540  cq_idx = ( vnic->cq.cons++ % TXNIC_CQES );
541  cqe = &vnic->cq.cqe[cq_idx];
542 
543  /* Process completion queue entry */
544  switch ( cqe->common.cqe_type ) {
545  case TXNIC_CQE_TYPE_SEND:
546  txnic_complete_sqe ( vnic, &cqe->send );
547  break;
548  case TXNIC_CQE_TYPE_RX:
549  txnic_complete_rqe ( vnic, &cqe->rx );
550  break;
551  default:
552  DBGC ( vnic, "TXNIC %s unknown completion type %d\n",
553  vnic->name, cqe->common.cqe_type );
554  DBGC_HDA ( vnic, virt_to_phys ( cqe ), cqe,
555  sizeof ( *cqe ) );
556  break;
557  }
558  }
559 
560  /* Ring doorbell */
561  writeq ( qcount, ( vnic->regs + TXNIC_QS_CQ_DOOR(0) ) );
562 }
563 
564 /******************************************************************************
565  *
566  * Virtual NIC
567  *
568  ******************************************************************************
569  */
570 
571 /**
572  * Open virtual NIC
573  *
574  * @v vnic Virtual NIC
575  * @ret rc Return status code
576  */
577 static int txnic_open ( struct txnic *vnic ) {
578  int rc;
579 
580  /* Create completion queue */
581  if ( ( rc = txnic_create_cq ( vnic ) ) != 0 )
582  goto err_create_cq;
583 
584  /* Create send queue */
585  if ( ( rc = txnic_create_sq ( vnic ) ) != 0 )
586  goto err_create_sq;
587 
588  /* Create receive queue */
589  if ( ( rc = txnic_create_rq ( vnic ) ) != 0 )
590  goto err_create_rq;
591 
592  /* Refill receive queue */
593  txnic_refill_rq ( vnic );
594 
595  return 0;
596 
597  txnic_destroy_rq ( vnic );
598  err_create_rq:
599  txnic_destroy_sq ( vnic );
600  err_create_sq:
601  txnic_destroy_cq ( vnic );
602  err_create_cq:
603  return rc;
604 }
605 
606 /**
607  * Close virtual NIC
608  *
609  * @v vnic Virtual NIC
610  */
611 static void txnic_close ( struct txnic *vnic ) {
612 
613  /* Destroy receive queue */
614  txnic_destroy_rq ( vnic );
615 
616  /* Destroy send queue */
617  txnic_destroy_sq ( vnic );
618 
619  /* Destroy completion queue */
620  txnic_destroy_cq ( vnic );
621 }
622 
623 /**
624  * Poll virtual NIC
625  *
626  * @v vnic Virtual NIC
627  */
628 static void txnic_poll ( struct txnic *vnic ) {
629 
630  /* Poll completion queue */
631  txnic_poll_cq ( vnic );
632 
633  /* Refill receive queue */
634  txnic_refill_rq ( vnic );
635 }
636 
637 /**
638  * Allocate virtual NIC
639  *
640  * @v pci Underlying PCI device
641  * @v membase Register base address
642  * @ret vnic Virtual NIC, or NULL on failure
643  */
644 static struct txnic * txnic_alloc ( struct pci_device *pci,
645  unsigned long membase ) {
646  struct net_device *netdev;
647  struct txnic *vnic;
648 
649  /* Allocate network device */
650  netdev = alloc_etherdev ( sizeof ( *vnic ) );
651  if ( ! netdev )
652  goto err_alloc_netdev;
653  netdev->dev = &pci->dev;
654  vnic = netdev->priv;
655  vnic->netdev = netdev;
656  vnic->name = pci->dev.name;
657 
658  /* Allow caller to reuse netdev->priv. (The generic virtual
659  * NIC code never assumes that netdev->priv==vnic.)
660  */
661  netdev->priv = NULL;
662 
663  /* Allocate completion queue */
664  vnic->cq.cqe = umalloc ( TXNIC_CQ_SIZE );
665  if ( ! vnic->cq.cqe )
666  goto err_alloc_cq;
667 
668  /* Allocate send queue */
669  vnic->sq.sqe = umalloc ( TXNIC_SQ_SIZE );
670  if ( ! vnic->sq.sqe )
671  goto err_alloc_sq;
672 
673  /* Allocate receive queue */
674  vnic->rq.rqe = umalloc ( TXNIC_RQ_SIZE );
675  if ( ! vnic->rq.rqe )
676  goto err_alloc_rq;
677 
678  /* Map registers */
679  vnic->regs = pci_ioremap ( pci, membase, TXNIC_VF_BAR_SIZE );
680  if ( ! vnic->regs )
681  goto err_ioremap;
682 
683  return vnic;
684 
685  iounmap ( vnic->regs );
686  err_ioremap:
687  ufree ( vnic->rq.rqe );
688  err_alloc_rq:
689  ufree ( vnic->sq.sqe );
690  err_alloc_sq:
691  ufree ( vnic->cq.cqe );
692  err_alloc_cq:
694  netdev_put ( netdev );
695  err_alloc_netdev:
696  return NULL;
697 }
698 
699 /**
700  * Free virtual NIC
701  *
702  * @v vnic Virtual NIC
703  */
704 static void txnic_free ( struct txnic *vnic ) {
705  struct net_device *netdev = vnic->netdev;
706 
707  /* Unmap registers */
708  iounmap ( vnic->regs );
709 
710  /* Free receive queue */
711  ufree ( vnic->rq.rqe );
712 
713  /* Free send queue */
714  ufree ( vnic->sq.sqe );
715 
716  /* Free completion queue */
717  ufree ( vnic->cq.cqe );
718 
719  /* Free network device */
721  netdev_put ( netdev );
722 }
723 
724 /******************************************************************************
725  *
726  * Logical MAC virtual NICs
727  *
728  ******************************************************************************
729  */
730 
731 /**
732  * Show LMAC diagnostics (for debugging)
733  *
734  * @v lmac Logical MAC
735  */
736 static __attribute__ (( unused )) void
737 txnic_lmac_diag ( struct txnic_lmac *lmac ) {
738  struct txnic *vnic = lmac->vnic;
741  uint64_t br_status1;
742  uint64_t br_status2;
743  uint64_t br_algn_status;
744  uint64_t br_pmd_status;
745  uint64_t an_status;
746 
747  /* Read status (clearing latching bits) */
750  status1 = readq ( lmac->regs + BGX_SPU_STATUS1 );
751  status2 = readq ( lmac->regs + BGX_SPU_STATUS2 );
752  DBGC ( vnic, "TXNIC %s SPU %02llx:%04llx%s%s%s\n",
753  vnic->name, status1, status2,
754  ( ( status1 & BGX_SPU_STATUS1_FLT ) ? " FLT" : "" ),
755  ( ( status1 & BGX_SPU_STATUS1_RCV_LNK ) ? " RCV_LNK" : "" ),
756  ( ( status2 & BGX_SPU_STATUS2_RCVFLT ) ? " RCVFLT" : "" ) );
757 
758  /* Read BASE-R status (clearing latching bits) */
761  ( lmac->regs + BGX_SPU_BR_STATUS2 ) );
762  br_status1 = readq ( lmac->regs + BGX_SPU_BR_STATUS1 );
763  br_status2 = readq ( lmac->regs + BGX_SPU_BR_STATUS2 );
764  DBGC ( vnic, "TXNIC %s BR %04llx:%04llx%s%s%s%s%s\n",
765  vnic->name, br_status2, br_status2,
766  ( ( br_status1 & BGX_SPU_BR_STATUS1_RCV_LNK ) ? " RCV_LNK" : ""),
767  ( ( br_status1 & BGX_SPU_BR_STATUS1_HI_BER ) ? " HI_BER" : "" ),
768  ( ( br_status1 & BGX_SPU_BR_STATUS1_BLK_LOCK ) ?
769  " BLK_LOCK" : "" ),
770  ( ( br_status2 & BGX_SPU_BR_STATUS2_LATCHED_LOCK ) ?
771  " LATCHED_LOCK" : "" ),
772  ( ( br_status2 & BGX_SPU_BR_STATUS2_LATCHED_BER ) ?
773  " LATCHED_BER" : "" ) );
774 
775  /* Read BASE-R alignment status */
776  br_algn_status = readq ( lmac->regs + BGX_SPU_BR_ALGN_STATUS );
777  DBGC ( vnic, "TXNIC %s BR ALGN %016llx%s\n", vnic->name, br_algn_status,
778  ( ( br_algn_status & BGX_SPU_BR_ALGN_STATUS_ALIGND ) ?
779  " ALIGND" : "" ) );
780 
781  /* Read BASE-R link training status */
782  br_pmd_status = readq ( lmac->regs + BGX_SPU_BR_PMD_STATUS );
783  DBGC ( vnic, "TXNIC %s BR PMD %04llx\n", vnic->name, br_pmd_status );
784 
785  /* Read autonegotiation status (clearing latching bits) */
787  ( lmac->regs + BGX_SPU_AN_STATUS ) );
788  an_status = readq ( lmac->regs + BGX_SPU_AN_STATUS );
789  DBGC ( vnic, "TXNIC %s BR AN %04llx%s%s%s%s%s\n", vnic->name, an_status,
790  ( ( an_status & BGX_SPU_AN_STATUS_XNP_STAT ) ? " XNP_STAT" : ""),
791  ( ( an_status & BGX_SPU_AN_STATUS_PAGE_RX ) ? " PAGE_RX" : "" ),
792  ( ( an_status & BGX_SPU_AN_STATUS_AN_COMPLETE ) ?
793  " AN_COMPLETE" : "" ),
794  ( ( an_status & BGX_SPU_AN_STATUS_LINK_STATUS ) ?
795  " LINK_STATUS" : "" ),
796  ( ( an_status & BGX_SPU_AN_STATUS_LP_AN_ABLE ) ?
797  " LP_AN_ABLE" : "" ) );
798 
799  /* Read transmit statistics */
800  DBGC ( vnic, "TXNIC %s TXF xc %#llx xd %#llx mc %#llx sc %#llx ok "
801  "%#llx bc %#llx mc %#llx un %#llx pa %#llx\n", vnic->name,
802  readq ( lmac->regs + BGX_CMR_TX_STAT0 ),
803  readq ( lmac->regs + BGX_CMR_TX_STAT1 ),
804  readq ( lmac->regs + BGX_CMR_TX_STAT2 ),
805  readq ( lmac->regs + BGX_CMR_TX_STAT3 ),
806  readq ( lmac->regs + BGX_CMR_TX_STAT5 ),
807  readq ( lmac->regs + BGX_CMR_TX_STAT14 ),
808  readq ( lmac->regs + BGX_CMR_TX_STAT15 ),
809  readq ( lmac->regs + BGX_CMR_TX_STAT16 ),
810  readq ( lmac->regs + BGX_CMR_TX_STAT17 ) );
811  DBGC ( vnic, "TXNIC %s TXB ok %#llx hist %#llx:%#llx:%#llx:%#llx:"
812  "%#llx:%#llx:%#llx:%#llx\n", vnic->name,
813  readq ( lmac->regs + BGX_CMR_TX_STAT4 ),
814  readq ( lmac->regs + BGX_CMR_TX_STAT6 ),
815  readq ( lmac->regs + BGX_CMR_TX_STAT7 ),
816  readq ( lmac->regs + BGX_CMR_TX_STAT8 ),
817  readq ( lmac->regs + BGX_CMR_TX_STAT9 ),
818  readq ( lmac->regs + BGX_CMR_TX_STAT10 ),
819  readq ( lmac->regs + BGX_CMR_TX_STAT11 ),
820  readq ( lmac->regs + BGX_CMR_TX_STAT12 ),
821  readq ( lmac->regs + BGX_CMR_TX_STAT13 ) );
822 
823  /* Read receive statistics */
824  DBGC ( vnic, "TXNIC %s RXF ok %#llx pa %#llx nm %#llx ov %#llx er "
825  "%#llx nc %#llx\n", vnic->name,
826  readq ( lmac->regs + BGX_CMR_RX_STAT0 ),
827  readq ( lmac->regs + BGX_CMR_RX_STAT2 ),
828  readq ( lmac->regs + BGX_CMR_RX_STAT4 ),
829  readq ( lmac->regs + BGX_CMR_RX_STAT6 ),
830  readq ( lmac->regs + BGX_CMR_RX_STAT8 ),
831  readq ( lmac->regs + BGX_CMR_RX_STAT9 ) );
832  DBGC ( vnic, "TXNIC %s RXB ok %#llx pa %#llx nm %#llx ov %#llx nc "
833  "%#llx\n", vnic->name,
834  readq ( lmac->regs + BGX_CMR_RX_STAT1 ),
835  readq ( lmac->regs + BGX_CMR_RX_STAT3 ),
836  readq ( lmac->regs + BGX_CMR_RX_STAT5 ),
837  readq ( lmac->regs + BGX_CMR_RX_STAT7 ),
838  readq ( lmac->regs + BGX_CMR_RX_STAT10 ) );
839 }
840 
841 /**
842  * Update LMAC link state
843  *
844  * @v lmac Logical MAC
845  */
846 static void txnic_lmac_update_link ( struct txnic_lmac *lmac ) {
847  struct txnic *vnic = lmac->vnic;
848  struct net_device *netdev = vnic->netdev;
850 
851  /* Read status (clearing latching bits) */
853  status1 = readq ( lmac->regs + BGX_SPU_STATUS1 );
854 
855  /* Report link status */
858  } else {
860  }
861 }
862 
863 /**
864  * Poll LMAC link state
865  *
866  * @v lmac Logical MAC
867  */
868 static void txnic_lmac_poll_link ( struct txnic_lmac *lmac ) {
869  struct txnic *vnic = lmac->vnic;
870  uint64_t intr;
871 
872  /* Get interrupt status */
873  intr = readq ( lmac->regs + BGX_SPU_INT );
874  if ( ! intr )
875  return;
876  DBGC ( vnic, "TXNIC %s INT %04llx%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
877  vnic->name, intr,
878  ( ( intr & BGX_SPU_INT_TRAINING_FAIL ) ? " TRAINING_FAIL" : "" ),
879  ( ( intr & BGX_SPU_INT_TRAINING_DONE ) ? " TRAINING_DONE" : "" ),
880  ( ( intr & BGX_SPU_INT_AN_COMPLETE ) ? " AN_COMPLETE" : "" ),
881  ( ( intr & BGX_SPU_INT_AN_LINK_GOOD ) ? " AN_LINK_GOOD" : "" ),
882  ( ( intr & BGX_SPU_INT_AN_PAGE_RX ) ? " AN_PAGE_RX" : "" ),
883  ( ( intr & BGX_SPU_INT_FEC_UNCORR ) ? " FEC_UNCORR" : "" ),
884  ( ( intr & BGX_SPU_INT_FEC_CORR ) ? " FEC_CORR" : "" ),
885  ( ( intr & BGX_SPU_INT_BIP_ERR ) ? " BIP_ERR" : "" ),
886  ( ( intr & BGX_SPU_INT_DBG_SYNC ) ? " DBG_SYNC" : "" ),
887  ( ( intr & BGX_SPU_INT_ALGNLOS ) ? " ALGNLOS" : "" ),
888  ( ( intr & BGX_SPU_INT_SYNLOS ) ? " SYNLOS" : "" ),
889  ( ( intr & BGX_SPU_INT_BITLCKLS ) ? " BITLCKLS" : "" ),
890  ( ( intr & BGX_SPU_INT_ERR_BLK ) ? " ERR_BLK" : "" ),
891  ( ( intr & BGX_SPU_INT_RX_LINK_DOWN ) ? " RX_LINK_DOWN" : "" ),
892  ( ( intr & BGX_SPU_INT_RX_LINK_UP ) ? " RX_LINK_UP" : "" ) );
893 
894  /* Clear interrupt status */
895  writeq ( intr, ( lmac->regs + BGX_SPU_INT ) );
896 
897  /* Update link state */
898  txnic_lmac_update_link ( lmac );
899 }
900 
901 /**
902  * Reset LMAC
903  *
904  * @v lmac Logical MAC
905  */
906 static void txnic_lmac_reset ( struct txnic_lmac *lmac ) {
907  struct txnic_bgx *bgx = lmac->bgx;
908  struct txnic_pf *pf = bgx->pf;
909  void *qsregs = ( pf->regs + TXNIC_PF_QS ( lmac->idx ) );
910 
911  /* There is no reset available for the physical function
912  * aspects of a virtual NIC; we have to explicitly reload a
913  * sensible set of default values.
914  */
915  writeq ( 0, ( qsregs + TXNIC_PF_QS_CFG ) );
916  writeq ( 0, ( qsregs + TXNIC_PF_QS_RQ_CFG(0) ) );
917  writeq ( 0, ( qsregs + TXNIC_PF_QS_RQ_DROP_CFG(0) ) );
918  writeq ( 0, ( qsregs + TXNIC_PF_QS_RQ_BP_CFG(0) ) );
919  writeq ( 0, ( qsregs + TXNIC_PF_QS_SQ_CFG(0) ) );
920 }
921 
922 /**
923  * Open network device
924  *
925  * @v netdev Network device
926  * @ret rc Return status code
927  */
928 static int txnic_lmac_open ( struct net_device *netdev ) {
929  struct txnic_lmac *lmac = netdev->priv;
930  struct txnic_bgx *bgx = lmac->bgx;
931  struct txnic_pf *pf = bgx->pf;
932  struct txnic *vnic = lmac->vnic;
933  unsigned int vnic_idx = lmac->idx;
934  unsigned int chan_idx = TXNIC_CHAN_IDX ( vnic_idx );
935  unsigned int tl4_idx = TXNIC_TL4_IDX ( vnic_idx );
936  unsigned int tl3_idx = TXNIC_TL3_IDX ( vnic_idx );
937  unsigned int tl2_idx = TXNIC_TL2_IDX ( vnic_idx );
938  void *lmregs = ( pf->regs + TXNIC_PF_LMAC ( vnic_idx ) );
939  void *chregs = ( pf->regs + TXNIC_PF_CHAN ( chan_idx ) );
940  void *qsregs = ( pf->regs + TXNIC_PF_QS ( vnic_idx ) );
941  size_t max_pkt_size;
942  int rc;
943 
944  /* Configure channel/match parse indices */
945  writeq ( ( TXNIC_PF_MPI_CFG_VNIC ( vnic_idx ) |
946  TXNIC_PF_MPI_CFG_RSSI_BASE ( vnic_idx ) ),
947  ( TXNIC_PF_MPI_CFG ( vnic_idx ) + pf->regs ) );
948  writeq ( ( TXNIC_PF_RSSI_RQ_RQ_QS ( vnic_idx ) ),
949  ( TXNIC_PF_RSSI_RQ ( vnic_idx ) + pf->regs ) );
950 
951  /* Configure LMAC */
952  max_pkt_size = ( netdev->max_pkt_len + 4 /* possible VLAN */ );
955  ( TXNIC_PF_LMAC_CFG + lmregs ) );
956  writeq ( ( TXNIC_PF_LMAC_CFG2_MAX_PKT_SIZE ( max_pkt_size ) ),
957  ( TXNIC_PF_LMAC_CFG2 + lmregs ) );
961  ( TXNIC_PF_LMAC_CREDIT + lmregs ) );
962 
963  /* Configure channels */
965  ( TXNIC_PF_CHAN_TX_CFG + chregs ) );
966  writeq ( ( TXNIC_PF_CHAN_RX_CFG_CPI_BASE ( vnic_idx ) ),
967  ( TXNIC_PF_CHAN_RX_CFG + chregs ) );
969  TXNIC_PF_CHAN_RX_BP_CFG_BPID ( vnic_idx ) ),
970  ( TXNIC_PF_CHAN_RX_BP_CFG + chregs ) );
971 
972  /* Configure traffic limiters */
974  ( TXNIC_PF_TL2_CFG ( tl2_idx ) + pf->regs ) );
976  ( TXNIC_PF_TL3_CFG ( tl3_idx ) + pf->regs ) );
977  writeq ( ( TXNIC_PF_TL3_CHAN_CHAN ( chan_idx ) ),
978  ( TXNIC_PF_TL3_CHAN ( tl3_idx ) + pf->regs ) );
979  writeq ( ( TXNIC_PF_TL4_CFG_SQ_QS ( vnic_idx ) |
981  ( TXNIC_PF_TL4_CFG ( tl4_idx ) + pf->regs ) );
982 
983  /* Configure send queue */
984  writeq ( ( TXNIC_PF_QS_SQ_CFG_CQ_QS ( vnic_idx ) ),
985  ( TXNIC_PF_QS_SQ_CFG(0) + qsregs ) );
986  writeq ( ( TXNIC_PF_QS_SQ_CFG2_TL4 ( tl4_idx ) ),
987  ( TXNIC_PF_QS_SQ_CFG2(0) + qsregs ) );
988 
989  /* Configure receive queue */
991  TXNIC_PF_QS_RQ_CFG_CQ_QS ( vnic_idx ) |
992  TXNIC_PF_QS_RQ_CFG_RBDR_CONT_QS ( vnic_idx ) |
993  TXNIC_PF_QS_RQ_CFG_RBDR_STRT_QS ( vnic_idx ) ),
994  ( TXNIC_PF_QS_RQ_CFG(0) + qsregs ) );
997  TXNIC_PF_QS_RQ_BP_CFG_BPID ( vnic_idx ) ),
998  ( TXNIC_PF_QS_RQ_BP_CFG(0) + qsregs ) );
999 
1000  /* Enable queue set */
1001  writeq ( ( TXNIC_PF_QS_CFG_ENA | TXNIC_PF_QS_CFG_VNIC ( vnic_idx ) ),
1002  ( TXNIC_PF_QS_CFG + qsregs ) );
1003 
1004  /* Open virtual NIC */
1005  if ( ( rc = txnic_open ( vnic ) ) != 0 )
1006  goto err_open;
1007 
1008  /* Update link state */
1009  txnic_lmac_update_link ( lmac );
1010 
1011  return 0;
1012 
1013  txnic_close ( vnic );
1014  err_open:
1015  writeq ( 0, ( qsregs + TXNIC_PF_QS_CFG ) );
1016  return rc;
1017 }
1018 
1019 /**
1020  * Close network device
1021  *
1022  * @v netdev Network device
1023  */
1024 static void txnic_lmac_close ( struct net_device *netdev ) {
1025  struct txnic_lmac *lmac = netdev->priv;
1026  struct txnic_bgx *bgx = lmac->bgx;
1027  struct txnic_pf *pf = bgx->pf;
1028  struct txnic *vnic = lmac->vnic;
1029  void *qsregs = ( pf->regs + TXNIC_PF_QS ( lmac->idx ) );
1030 
1031  /* Close virtual NIC */
1032  txnic_close ( vnic );
1033 
1034  /* Disable queue set */
1035  writeq ( 0, ( qsregs + TXNIC_PF_QS_CFG ) );
1036 }
1037 
1038 /**
1039  * Transmit packet
1040  *
1041  * @v netdev Network device
1042  * @v iobuf I/O buffer
1043  * @ret rc Return status code
1044  */
1046  struct io_buffer *iobuf ) {
1047  struct txnic_lmac *lmac = netdev->priv;
1048  struct txnic *vnic = lmac->vnic;
1049 
1050  return txnic_send ( vnic, iobuf );
1051 }
1052 
1053 /**
1054  * Poll network device
1055  *
1056  * @v netdev Network device
1057  */
1058 static void txnic_lmac_poll ( struct net_device *netdev ) {
1059  struct txnic_lmac *lmac = netdev->priv;
1060  struct txnic *vnic = lmac->vnic;
1061 
1062  /* Poll virtual NIC */
1063  txnic_poll ( vnic );
1064 
1065  /* Poll link state */
1066  txnic_lmac_poll_link ( lmac );
1067 }
1068 
1069 /** Network device operations */
1071  .open = txnic_lmac_open,
1072  .close = txnic_lmac_close,
1073  .transmit = txnic_lmac_transmit,
1074  .poll = txnic_lmac_poll,
1075 };
1076 
1077 /**
1078  * Probe logical MAC virtual NIC
1079  *
1080  * @v lmac Logical MAC
1081  * @ret rc Return status code
1082  */
1083 static int txnic_lmac_probe ( struct txnic_lmac *lmac ) {
1084  struct txnic_bgx *bgx = lmac->bgx;
1085  struct txnic_pf *pf = bgx->pf;
1086  struct txnic *vnic;
1087  struct net_device *netdev;
1088  unsigned long membase;
1089  int rc;
1090 
1091  /* Sanity check */
1092  assert ( lmac->vnic == NULL );
1093 
1094  /* Calculate register base address */
1095  membase = ( pf->vf_membase + ( lmac->idx * pf->vf_stride ) );
1096 
1097  /* Allocate and initialise network device */
1098  vnic = txnic_alloc ( bgx->pci, membase );
1099  if ( ! vnic ) {
1100  rc = -ENOMEM;
1101  goto err_alloc;
1102  }
1103  netdev = vnic->netdev;
1105  netdev->priv = lmac;
1106  lmac->vnic = vnic;
1107 
1108  /* Reset device */
1109  txnic_lmac_reset ( lmac );
1110 
1111  /* Set MAC address */
1112  memcpy ( netdev->hw_addr, lmac->mac.raw, ETH_ALEN );
1113 
1114  /* Register network device */
1115  if ( ( rc = register_netdev ( netdev ) ) != 0 )
1116  goto err_register;
1117  vnic->name = netdev->name;
1118  DBGC ( TXNICCOL ( pf ), "TXNIC %d/%d/%d is %s (%s)\n", pf->node,
1119  bgx->idx, lmac->idx, vnic->name, eth_ntoa ( lmac->mac.raw ) );
1120 
1121  /* Update link state */
1122  txnic_lmac_update_link ( lmac );
1123 
1124  return 0;
1125 
1127  err_register:
1128  txnic_lmac_reset ( lmac );
1129  txnic_free ( vnic );
1130  lmac->vnic = NULL;
1131  err_alloc:
1132  return rc;
1133 }
1134 
1135 /**
1136  * Remove logical MAC virtual NIC
1137  *
1138  * @v lmac Logical MAC
1139  */
1140 static void txnic_lmac_remove ( struct txnic_lmac *lmac ) {
1141  uint64_t config;
1142 
1143  /* Sanity check */
1144  assert ( lmac->vnic != NULL );
1145 
1146  /* Disable packet receive and transmit */
1147  config = readq ( lmac->regs + BGX_CMR_CONFIG );
1148  config &= ~( BGX_CMR_CONFIG_DATA_PKT_TX_EN |
1150  writeq ( config, ( lmac->regs + BGX_CMR_CONFIG ) );
1151 
1152  /* Unregister network device */
1153  unregister_netdev ( lmac->vnic->netdev );
1154 
1155  /* Reset device */
1156  txnic_lmac_reset ( lmac );
1157 
1158  /* Free virtual NIC */
1159  txnic_free ( lmac->vnic );
1160  lmac->vnic = NULL;
1161 }
1162 
1163 /**
1164  * Probe all LMACs on a BGX Ethernet interface
1165  *
1166  * @v pf Physical function
1167  * @v bgx BGX Ethernet interface
1168  * @ret rc Return status code
1169  */
1170 static int txnic_lmac_probe_all ( struct txnic_pf *pf, struct txnic_bgx *bgx ) {
1171  unsigned int bgx_idx;
1172  int lmac_idx;
1173  int count;
1174  int rc;
1175 
1176  /* Sanity checks */
1177  bgx_idx = bgx->idx;
1178  assert ( pf->node == bgx->node );
1179  assert ( pf->bgx[bgx_idx] == NULL );
1180  assert ( bgx->pf == NULL );
1181 
1182  /* Associate BGX with physical function */
1183  pf->bgx[bgx_idx] = bgx;
1184  bgx->pf = pf;
1185 
1186  /* Probe all LMACs */
1187  count = bgx->count;
1188  for ( lmac_idx = 0 ; lmac_idx < count ; lmac_idx++ ) {
1189  if ( ( rc = txnic_lmac_probe ( &bgx->lmac[lmac_idx] ) ) != 0 )
1190  goto err_probe;
1191  }
1192 
1193  return 0;
1194 
1195  lmac_idx = count;
1196  err_probe:
1197  for ( lmac_idx-- ; lmac_idx >= 0 ; lmac_idx-- )
1198  txnic_lmac_remove ( &bgx->lmac[lmac_idx] );
1199  pf->bgx[bgx_idx] = NULL;
1200  bgx->pf = NULL;
1201  return rc;
1202 }
1203 
1204 /**
1205  * Remove all LMACs on a BGX Ethernet interface
1206  *
1207  * @v pf Physical function
1208  * @v bgx BGX Ethernet interface
1209  */
1210 static void txnic_lmac_remove_all ( struct txnic_pf *pf,
1211  struct txnic_bgx *bgx ) {
1212  unsigned int lmac_idx;
1213 
1214  /* Sanity checks */
1215  assert ( pf->bgx[bgx->idx] == bgx );
1216  assert ( bgx->pf == pf );
1217 
1218  /* Remove all LMACs */
1219  for ( lmac_idx = 0 ; lmac_idx < bgx->count ; lmac_idx++ )
1220  txnic_lmac_remove ( &bgx->lmac[lmac_idx] );
1221 
1222  /* Disassociate BGX from physical function */
1223  pf->bgx[bgx->idx] = NULL;
1224  bgx->pf = NULL;
1225 }
1226 
1227 /******************************************************************************
1228  *
1229  * NIC physical function interface
1230  *
1231  ******************************************************************************
1232  */
1233 
1234 /**
1235  * Probe PCI device
1236  *
1237  * @v pci PCI device
1238  * @ret rc Return status code
1239  */
1240 static int txnic_pf_probe ( struct pci_device *pci ) {
1241  struct txnic_pf *pf;
1242  struct txnic_bgx *bgx;
1243  unsigned long membase;
1244  unsigned int i;
1245  int rc;
1246 
1247  /* Allocate and initialise structure */
1248  pf = zalloc ( sizeof ( *pf ) );
1249  if ( ! pf ) {
1250  rc = -ENOMEM;
1251  goto err_alloc;
1252  }
1253  pf->pci = pci;
1254  pci_set_drvdata ( pci, pf );
1255 
1256  /* Get base addresses */
1257  membase = pciea_bar_start ( pci, PCIEA_BEI_BAR_0 );
1260 
1261  /* Calculate node ID */
1262  pf->node = txnic_address_node ( membase );
1263  DBGC ( TXNICCOL ( pf ), "TXNIC %d/*/* PF %s at %#lx (VF %#lx+%#lx)\n",
1264  pf->node, pci->dev.name, membase, pf->vf_membase, pf->vf_stride);
1265 
1266  /* Fix up PCI device */
1267  adjust_pci_device ( pci );
1268 
1269  /* Map registers */
1270  pf->regs = pci_ioremap ( pci, membase, TXNIC_PF_BAR_SIZE );
1271  if ( ! pf->regs ) {
1272  rc = -ENODEV;
1273  goto err_ioremap;
1274  }
1275 
1276  /* Configure physical function */
1280  ( pf->regs + TXNIC_PF_BP_CFG ) );
1281  for ( i = 0 ; i < TXNIC_NUM_BGX ; i++ ) {
1284  ( pf->regs + TXNIC_PF_INTF_SEND_CFG ( i ) ) );
1288  ( pf->regs + TXNIC_PF_INTF_BP_CFG ( i ) ) );
1289  }
1293  ( pf->regs + TXNIC_PF_PKIND_CFG(0) ) );
1294 
1295  /* Add to list of physical functions */
1296  list_add_tail ( &pf->list, &txnic_pfs );
1297 
1298  /* Probe all LMACs, if applicable */
1299  list_for_each_entry ( bgx, &txnic_bgxs, list ) {
1300  if ( bgx->node != pf->node )
1301  continue;
1302  if ( ( rc = txnic_lmac_probe_all ( pf, bgx ) ) != 0 )
1303  goto err_probe;
1304  }
1305 
1306  return 0;
1307 
1308  err_probe:
1309  for ( i = 0 ; i < TXNIC_NUM_BGX ; i++ ) {
1310  if ( pf->bgx[i] )
1311  txnic_lmac_remove_all ( pf, pf->bgx[i] );
1312  }
1313  list_del ( &pf->list );
1314  writeq ( 0, ( pf->regs + TXNIC_PF_CFG ) );
1315  iounmap ( pf->regs );
1316  err_ioremap:
1317  free ( pf );
1318  err_alloc:
1319  return rc;
1320 }
1321 
1322 /**
1323  * Remove PCI device
1324  *
1325  * @v pci PCI device
1326  */
1327 static void txnic_pf_remove ( struct pci_device *pci ) {
1328  struct txnic_pf *pf = pci_get_drvdata ( pci );
1329  unsigned int i;
1330 
1331  /* Remove all LMACs, if applicable */
1332  for ( i = 0 ; i < TXNIC_NUM_BGX ; i++ ) {
1333  if ( pf->bgx[i] )
1334  txnic_lmac_remove_all ( pf, pf->bgx[i] );
1335  }
1336 
1337  /* Remove from list of physical functions */
1338  list_del ( &pf->list );
1339 
1340  /* Unmap registers */
1341  iounmap ( pf->regs );
1342 
1343  /* Free physical function */
1344  free ( pf );
1345 }
1346 
1347 /** NIC physical function PCI device IDs */
1348 static struct pci_device_id txnic_pf_ids[] = {
1349  PCI_ROM ( 0x177d, 0xa01e, "thunder-pf", "ThunderX NIC PF", 0 ),
1350 };
1351 
1352 /** NIC physical function PCI driver */
1353 struct pci_driver txnic_pf_driver __pci_driver = {
1354  .ids = txnic_pf_ids,
1355  .id_count = ( sizeof ( txnic_pf_ids ) / sizeof ( txnic_pf_ids[0] ) ),
1356  .probe = txnic_pf_probe,
1358 };
1359 
1360 /******************************************************************************
1361  *
1362  * BGX interface
1363  *
1364  ******************************************************************************
1365  */
1366 
1367 /** LMAC types */
1369  [TXNIC_LMAC_XAUI] = {
1370  .name = "XAUI",
1371  .count = 1,
1372  .lane_to_sds = 0xe4,
1373  },
1374  [TXNIC_LMAC_RXAUI] = {
1375  .name = "RXAUI",
1376  .count = 2,
1377  .lane_to_sds = 0x0e04,
1378  },
1379  [TXNIC_LMAC_10G_R] = {
1380  .name = "10GBASE-R",
1381  .count = 4,
1382  .lane_to_sds = 0x00000000,
1383  },
1384  [TXNIC_LMAC_40G_R] = {
1385  .name = "40GBASE-R",
1386  .count = 1,
1387  .lane_to_sds = 0xe4,
1388  },
1389 };
1390 
1391 /**
1392  * Detect BGX Ethernet interface LMAC type
1393  *
1394  * @v bgx BGX Ethernet interface
1395  * @ret type LMAC type, or negative error
1396  */
1397 static int txnic_bgx_detect ( struct txnic_bgx *bgx ) {
1398  uint64_t config;
1399  uint64_t br_pmd_control;
1400  uint64_t rx_lmacs;
1401  unsigned int type;
1402 
1403  /* We assume that the early (pre-UEFI) firmware will have
1404  * configured at least the LMAC 0 type and use of link
1405  * training, and may have overridden the number of LMACs.
1406  */
1407 
1408  /* Determine type from LMAC 0 */
1409  config = readq ( bgx->regs + BGX_CMR_CONFIG );
1410  type = BGX_CMR_CONFIG_LMAC_TYPE_GET ( config );
1411  if ( ( type >= ( sizeof ( txnic_lmac_types ) /
1412  sizeof ( txnic_lmac_types[0] ) ) ) ||
1413  ( txnic_lmac_types[type].count == 0 ) ) {
1414  DBGC ( TXNICCOL ( bgx ), "TXNIC %d/%d/* BGX unknown type %d\n",
1415  bgx->node, bgx->idx, type );
1416  return -ENOTTY;
1417  }
1418  bgx->type = &txnic_lmac_types[type];
1419 
1420  /* Check whether link training is required */
1421  br_pmd_control = readq ( bgx->regs + BGX_SPU_BR_PMD_CONTROL );
1422  bgx->training =
1423  ( !! ( br_pmd_control & BGX_SPU_BR_PMD_CONTROL_TRAIN_EN ) );
1424 
1425  /* Determine number of LMACs */
1426  rx_lmacs = readq ( bgx->regs + BGX_CMR_RX_LMACS );
1427  bgx->count = BGX_CMR_RX_LMACS_LMACS_GET ( rx_lmacs );
1428  if ( ( bgx->count == TXNIC_NUM_LMAC ) &&
1429  ( bgx->type->count != TXNIC_NUM_LMAC ) ) {
1430  DBGC ( TXNICCOL ( bgx ), "TXNIC %d/%d/* assuming %d LMACs\n",
1431  bgx->node, bgx->idx, bgx->type->count );
1432  bgx->count = bgx->type->count;
1433  }
1434 
1435  return type;
1436 }
1437 
1438 /**
1439  * Initialise BGX Ethernet interface
1440  *
1441  * @v bgx BGX Ethernet interface
1442  * @v type LMAC type
1443  */
1444 static void txnic_bgx_init ( struct txnic_bgx *bgx, unsigned int type ) {
1445  uint64_t global_config;
1447  unsigned int i;
1448 
1449  /* Set number of LMACs */
1451  ( bgx->regs + BGX_CMR_RX_LMACS ) );
1453  ( bgx->regs + BGX_CMR_TX_LMACS ) );
1454 
1455  /* Set LMAC types and lane mappings, and disable all LMACs */
1456  lane_to_sds = bgx->type->lane_to_sds;
1457  for ( i = 0 ; i < bgx->count ; i++ ) {
1460  ( bgx->regs + BGX_LMAC ( i ) + BGX_CMR_CONFIG ) );
1461  lane_to_sds >>= 8;
1462  }
1463 
1464  /* Reset all MAC address filtering */
1465  for ( i = 0 ; i < TXNIC_NUM_DMAC ; i++ )
1466  writeq ( 0, ( bgx->regs + BGX_CMR_RX_DMAC_CAM ( i ) ) );
1467 
1468  /* Reset NCSI steering */
1469  for ( i = 0 ; i < TXNIC_NUM_STEERING ; i++ )
1470  writeq ( 0, ( bgx->regs + BGX_CMR_RX_STEERING ( i ) ) );
1471 
1472  /* Enable backpressure to all channels */
1474  ( bgx->regs + BGX_CMR_CHAN_MSK_AND ) );
1475 
1476  /* Strip FCS */
1477  global_config = readq ( bgx->regs + BGX_CMR_GLOBAL_CONFIG );
1478  global_config |= BGX_CMR_GLOBAL_CONFIG_FCS_STRIP;
1479  writeq ( global_config, ( bgx->regs + BGX_CMR_GLOBAL_CONFIG ) );
1480 }
1481 
1482 /**
1483  * Get MAC address
1484  *
1485  * @v lmac Logical MAC
1486  */
1487 static void txnic_bgx_mac ( struct txnic_lmac *lmac ) {
1488  struct txnic_bgx *bgx = lmac->bgx;
1489  unsigned int lmac_idx = TXNIC_LMAC_IDX ( lmac->idx );
1490  uint64_t mac;
1491  EFI_STATUS efirc;
1492  int rc;
1493 
1494  /* Extract MAC from Board Configuration protocol, if available */
1495  if ( txcfg ) {
1496  if ( ( efirc = txcfg->GetLmacProp ( txcfg, bgx->node, bgx->idx,
1497  lmac_idx, MAC_ADDRESS,
1498  sizeof ( mac ),
1499  &mac ) ) == 0 ) {
1500  lmac->mac.be64 = cpu_to_be64 ( mac );
1501  } else {
1502  rc = -EEFI ( efirc );
1503  DBGC ( TXNICCOL ( bgx ), "TXNIC %d/%d/%d could not get "
1504  "MAC address: %s\n", bgx->node, bgx->idx,
1505  lmac->idx, strerror ( rc ) );
1506  }
1507  } else {
1508  DBGC ( TXNICCOL ( bgx ), "TXNIC %d/%d/%d has no board "
1509  "configuration protocol\n", bgx->node, bgx->idx,
1510  lmac->idx );
1511  }
1512 
1513  /* Use random MAC address if none available */
1514  if ( ! lmac->mac.be64 ) {
1515  DBGC ( TXNICCOL ( bgx ), "TXNIC %d/%d/%d has no MAC address\n",
1516  bgx->node, bgx->idx, lmac->idx );
1517  eth_random_addr ( lmac->mac.raw );
1518  }
1519 }
1520 
1521 /**
1522  * Initialise Super PHY Unit (SPU)
1523  *
1524  * @v lmac Logical MAC
1525  */
1526 static void txnic_bgx_spu_init ( struct txnic_lmac *lmac ) {
1527  struct txnic_bgx *bgx = lmac->bgx;
1528 
1529  /* Reset PHY */
1532 
1533  /* Power down PHY */
1535 
1536  /* Configure training, if applicable */
1537  if ( bgx->training ) {
1538  writeq ( 0, ( lmac->regs + BGX_SPU_BR_PMD_LP_CUP ) );
1539  writeq ( 0, ( lmac->regs + BGX_SPU_BR_PMD_LD_CUP ) );
1540  writeq ( 0, ( lmac->regs + BGX_SPU_BR_PMD_LD_REP ) );
1542  ( lmac->regs + BGX_SPU_BR_PMD_CONTROL ) );
1543  }
1544 
1545  /* Disable forward error correction */
1546  writeq ( 0, ( lmac->regs + BGX_SPU_FEC_CONTROL ) );
1547 
1548  /* Disable autonegotiation */
1549  writeq ( 0, ( lmac->regs + BGX_SPU_AN_CONTROL ) );
1550 
1551  /* Power up PHY */
1552  writeq ( 0, ( lmac->regs + BGX_SPU_CONTROL1 ) );
1553 }
1554 
1555 /**
1556  * Initialise LMAC
1557  *
1558  * @v bgx BGX Ethernet interface
1559  * @v lmac_idx LMAC index
1560  */
1561 static void txnic_bgx_lmac_init ( struct txnic_bgx *bgx,
1562  unsigned int lmac_idx ) {
1563  struct txnic_lmac *lmac = &bgx->lmac[lmac_idx];
1564  uint64_t config;
1565 
1566  /* Record associated BGX */
1567  lmac->bgx = bgx;
1568 
1569  /* Set register base address (already mapped) */
1570  lmac->regs = ( bgx->regs + BGX_LMAC ( lmac_idx ) );
1571 
1572  /* Calculate virtual NIC index */
1573  lmac->idx = TXNIC_VNIC_IDX ( bgx->idx, lmac_idx );
1574 
1575  /* Set MAC address */
1576  txnic_bgx_mac ( lmac );
1577 
1578  /* Initialise PHY */
1579  txnic_bgx_spu_init ( lmac );
1580 
1581  /* Accept all multicasts and broadcasts */
1584  ( lmac->regs + BGX_CMR_RX_DMAC_CTL ) );
1585 
1586  /* Enable LMAC */
1587  config = readq ( lmac->regs + BGX_CMR_CONFIG );
1588  config |= ( BGX_CMR_CONFIG_ENABLE |
1591  writeq ( config, ( lmac->regs + BGX_CMR_CONFIG ) );
1592 }
1593 
1594 /**
1595  * Probe PCI device
1596  *
1597  * @v pci PCI device
1598  * @ret rc Return status code
1599  */
1600 static int txnic_bgx_probe ( struct pci_device *pci ) {
1601  struct txnic_bgx *bgx;
1602  struct txnic_pf *pf;
1603  unsigned long membase;
1604  unsigned int i;
1605  int type;
1606  int rc;
1607 
1608  /* Allocate and initialise structure */
1609  bgx = zalloc ( sizeof ( *bgx ) );
1610  if ( ! bgx ) {
1611  rc = -ENOMEM;
1612  goto err_alloc;
1613  }
1614  bgx->pci = pci;
1615  pci_set_drvdata ( pci, bgx );
1616 
1617  /* Get base address */
1618  membase = pciea_bar_start ( pci, PCIEA_BEI_BAR_0 );
1619 
1620  /* Calculate node ID and index */
1621  bgx->node = txnic_address_node ( membase );
1622  bgx->idx = txnic_address_bgx ( membase );
1623 
1624  /* Fix up PCI device */
1625  adjust_pci_device ( pci );
1626 
1627  /* Map registers */
1628  bgx->regs = pci_ioremap ( pci, membase, TXNIC_BGX_BAR_SIZE );
1629  if ( ! bgx->regs ) {
1630  rc = -ENODEV;
1631  goto err_ioremap;
1632  }
1633 
1634  /* Detect LMAC type */
1635  if ( ( type = txnic_bgx_detect ( bgx ) ) < 0 ) {
1636  rc = type;
1637  goto err_detect;
1638  }
1639  DBGC ( TXNICCOL ( bgx ), "TXNIC %d/%d/* BGX %s at %#lx %dx %s%s\n",
1640  bgx->node, bgx->idx, pci->dev.name, membase, bgx->count,
1641  bgx->type->name, ( bgx->training ? "(training)" : "" ) );
1642 
1643  /* Initialise interface */
1644  txnic_bgx_init ( bgx, type );
1645 
1646  /* Initialise all LMACs */
1647  for ( i = 0 ; i < bgx->count ; i++ )
1648  txnic_bgx_lmac_init ( bgx, i );
1649 
1650  /* Add to list of BGX devices */
1651  list_add_tail ( &bgx->list, &txnic_bgxs );
1652 
1653  /* Probe all LMACs, if applicable */
1654  list_for_each_entry ( pf, &txnic_pfs, list ) {
1655  if ( pf->node != bgx->node )
1656  continue;
1657  if ( ( rc = txnic_lmac_probe_all ( pf, bgx ) ) != 0 )
1658  goto err_probe;
1659  }
1660 
1661  return 0;
1662 
1663  if ( bgx->pf )
1665  list_del ( &bgx->list );
1666  err_probe:
1667  err_detect:
1668  iounmap ( bgx->regs );
1669  err_ioremap:
1670  free ( bgx );
1671  err_alloc:
1672  return rc;
1673 }
1674 
1675 /**
1676  * Remove PCI device
1677  *
1678  * @v pci PCI device
1679  */
1680 static void txnic_bgx_remove ( struct pci_device *pci ) {
1681  struct txnic_bgx *bgx = pci_get_drvdata ( pci );
1682 
1683  /* Remove all LMACs, if applicable */
1684  if ( bgx->pf )
1685  txnic_lmac_remove_all ( bgx->pf, bgx );
1686 
1687  /* Remove from list of BGX devices */
1688  list_del ( &bgx->list );
1689 
1690  /* Unmap registers */
1691  iounmap ( bgx->regs );
1692 
1693  /* Free BGX device */
1694  free ( bgx );
1695 }
1696 
1697 /** BGX PCI device IDs */
1698 static struct pci_device_id txnic_bgx_ids[] = {
1699  PCI_ROM ( 0x177d, 0xa026, "thunder-bgx", "ThunderX BGX", 0 ),
1700 };
1701 
1702 /** BGX PCI driver */
1703 struct pci_driver txnic_bgx_driver __pci_driver = {
1704  .ids = txnic_bgx_ids,
1705  .id_count = ( sizeof ( txnic_bgx_ids ) / sizeof ( txnic_bgx_ids[0] ) ),
1708 };
#define BGX_SPU_STATUS2_RCVFLT
Definition: thunderx.h:814
static void txnic_bgx_remove(struct pci_device *pci)
Remove PCI device.
Definition: thunderx.c:1680
#define TXNIC_PF_PKIND_CFG(pk)
Port kind configuration.
Definition: thunderx.h:464
#define TXNIC_PF_BAR_SIZE
Physical function BAR size.
Definition: thunderx.h:30
#define BGX_CMR_TX_STAT12
CMR transmit statistics 12.
Definition: thunderx.h:770
unsigned int idx
BGX index.
Definition: thunderx.h:932
#define BGX_CMR_TX_STAT3
CMR transmit statistics 3.
Definition: thunderx.h:743
#define TXNIC_PF_INTF_BP_CFG(in)
Interface backpressure configuration.
Definition: thunderx.h:458
#define BGX_CMR_CONFIG_LMAC_TYPE_GET(config)
Definition: thunderx.h:673
static int txnic_lmac_open(struct net_device *netdev)
Open network device.
Definition: thunderx.c:928
#define BGX_CMR_TX_STAT14
CMR transmit statistics 14.
Definition: thunderx.h:776
#define __attribute__(x)
Definition: compiler.h:10
static __always_inline void ufree(void *ptr)
Free external memory.
Definition: umalloc.h:67
static void txnic_lmac_close(struct net_device *netdev)
Close network device.
Definition: thunderx.c:1024
static void txnic_bgx_init(struct txnic_bgx *bgx, unsigned int type)
Initialise BGX Ethernet interface.
Definition: thunderx.c:1444
#define TXNIC_QS_RQ_CFG_ENA
Definition: thunderx.h:202
static void txnic_complete_rqe(struct txnic *vnic, struct txnic_cqe_rx *cqe)
Complete receive queue entry.
Definition: thunderx.c:403
#define BGX_SPU_AN_STATUS
SPU autonegotiation status.
Definition: thunderx.h:854
static EFI_THUNDER_CONFIG_PROTOCOL * txcfg
Board configuration protocol.
Definition: thunderx.c:61
#define TXNIC_PF_QS_SQ_CFG_CQ_QS(qs)
Definition: thunderx.h:573
A receive completion queue entry.
Definition: thunderx.h:344
struct txnic * vnic
Virtual NIC (if applicable)
Definition: thunderx.h:920
struct txnic_sqe * sqe
Send queue entries.
Definition: thunderx.h:190
#define TXNIC_PF_TL4_CFG_RR_QUANTUM_DEFAULT
Definition: thunderx.h:542
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
#define TXNIC_PF_INTF_BP_CFG_BP_ENA
Definition: thunderx.h:459
wmb()
static int txnic_bgx_probe(struct pci_device *pci)
Probe PCI device.
Definition: thunderx.c:1600
40GBASE-R
Definition: thunderx.h:885
uint16_t sqe_ptr
Send queue entry pointer.
Definition: thunderx.h:335
#define BGX_SPU_BR_STATUS1_RCV_LNK
Definition: thunderx.h:818
#define iob_put(iobuf, len)
Definition: iobuf.h:124
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:586
#define EEFI(efirc)
Convert an EFI status code to an iPXE status code.
Definition: efi.h:174
#define BGX_CMR_CONFIG
CMR configuration.
Definition: thunderx.h:669
A physical function.
Definition: thunderx.h:580
#define TXNIC_PF_TL3_CFG(tl)
Traffic limiter 3 configuration.
Definition: thunderx.h:529
#define TXNIC_PF_CHAN_RX_BP_CFG_BPID(bp)
Definition: thunderx.h:520
#define TXNIC_PF_CHAN_RX_CFG_CPI_BASE(ix)
Definition: thunderx.h:515
#define TXNIC_RQE_SIZE
Receive queue entry size.
Definition: thunderx.h:262
#define BGX_SPU_BR_ALGN_STATUS_ALIGND
Definition: thunderx.h:829
A PCI driver.
Definition: pci.h:251
unsigned int count
Number of LMACs.
Definition: thunderx.h:937
#define BGX_SPU_STATUS1_RCV_LNK
Definition: thunderx.h:810
10GBASE-R
Definition: thunderx.h:884
static int txnic_create_sq(struct txnic *vnic)
Create send queue.
Definition: thunderx.c:113
#define TXNIC_PF_LMAC_CFG2_MAX_PKT_SIZE(sz)
Definition: thunderx.h:494
#define TXNIC_QS_RQ_CFG(q)
Receive queue configuration.
Definition: thunderx.h:201
#define TXNIC_QS_SQ_DOOR(q)
Send queue doorbell.
Definition: thunderx.h:96
int(* open)(struct net_device *netdev)
Open network device.
Definition: netdevice.h:222
#define TXNIC_QS_CQ_HEAD(q)
Completion queue head pointer.
Definition: thunderx.h:312
#define BGX_CMR_TX_STAT15
CMR transmit statistics 15.
Definition: thunderx.h:779
#define TXNIC_QS_RBDR_CFG_QSIZE_8K
Definition: thunderx.h:215
#define BGX_CMR_RX_STAT3
CMR receive statistics 3.
Definition: thunderx.h:692
#define BGX_SPU_INT
SPU interrupt.
Definition: thunderx.h:862
#define TXNIC_PF_RSSI_RQ(ix)
RSS indirection receive queue.
Definition: thunderx.h:479
#define BGX_CMR_TX_STAT10
CMR transmit statistics 10.
Definition: thunderx.h:764
#define BGX_CMR_CHAN_MSK_AND_ALL(count)
Definition: thunderx.h:730
Error codes.
#define BGX_SPU_BR_STATUS1_HI_BER
Definition: thunderx.h:819
#define TXNIC_NUM_DMAC
Maximum number of destination MAC addresses (per BGX)
Definition: thunderx.h:42
#define BGX_CMR_RX_STEERING(i)
CMR receive steering.
Definition: thunderx.h:726
#define TXNIC_QS_RBDR_DOOR(q)
Receive buffer descriptor ring doorbell.
Definition: thunderx.h:229
uint64_t readq(volatile uint64_t *io_addr)
Read 64-bit qword from memory-mapped device.
#define TXNIC_PF_QS_RQ_BP_CFG_CQ_BP_ENA
Definition: thunderx.h:568
#define TXNIC_QS_SQ_BASE(q)
Send queue base address.
Definition: thunderx.h:87
static struct pci_device_id txnic_bgx_ids[]
BGX PCI device IDs.
Definition: thunderx.c:1698
static void netdev_tx_complete_next(struct net_device *netdev)
Complete network transmission.
Definition: netdevice.h:778
I/O buffers.
void free_iob(struct io_buffer *iobuf)
Free I/O buffer.
Definition: iobuf.c:152
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:253
#define TXNIC_LINE_SIZE
Size of a cache line.
Definition: thunderx.h:24
#define BGX_CMR_RX_STAT2
CMR receive statistics 2.
Definition: thunderx.h:689
uint32_t type
Operating system type.
Definition: ena.h:12
const char * name
Device name (for debugging)
Definition: thunderx.h:422
#define BGX_CMR_RX_DMAC_CTL_MCST_MODE_ACCEPT
Definition: thunderx.h:718
#define BGX_SPU_FEC_CONTROL
SPU forward error correction control.
Definition: thunderx.h:848
#define BGX_SPU_AN_CONTROL
SPU autonegotation control.
Definition: thunderx.h:851
static int txnic_lmac_probe(struct txnic_lmac *lmac)
Probe logical MAC virtual NIC.
Definition: thunderx.c:1083
#define TXNIC_QS_CQ_CFG_QSIZE_256
Definition: thunderx.h:299
static void txnic_lmac_reset(struct txnic_lmac *lmac)
Reset LMAC.
Definition: thunderx.c:906
A Logical MAC (LMAC)
Definition: thunderx.h:908
static void txnic_lmac_diag(struct txnic_lmac *lmac)
Show LMAC diagnostics (for debugging)
Definition: thunderx.c:737
static int txnic_disable_sq(struct txnic *vnic)
Disable send queue.
Definition: thunderx.c:138
#define TXNIC_QS_SQ_CFG_RESET
Definition: thunderx.h:81
static struct pci_device_id txnic_pf_ids[]
NIC physical function PCI device IDs.
Definition: thunderx.c:1348
#define TXNIC_NUM_BGX
Maximum number of BGX Ethernet interfaces (per node)
Definition: thunderx.h:36
#define DBGC(...)
Definition: compiler.h:505
#define TXNIC_PF_CFG
Physical function configuration.
Definition: thunderx.h:442
#define BGX_CMR_TX_STAT0
CMR transmit statistics 0.
Definition: thunderx.h:734
char name[40]
Name.
Definition: device.h:78
static void txnic_destroy_sq(struct txnic *vnic)
Destroy send queue.
Definition: thunderx.c:166
#define BGX_SPU_BR_STATUS2_LATCHED_BER
Definition: thunderx.h:825
#define TXNIC_PF_INTF_BP_CFG_BP_ID(bp)
Definition: thunderx.h:461
static void txnic_destroy_cq(struct txnic *vnic)
Destroy completion queue.
Definition: thunderx.c:505
#define TXNIC_PF_RSSI_RQ_RQ_QS(qs)
Definition: thunderx.h:480
struct txnic_rqe * rqe
Receive queue entries.
Definition: thunderx.h:282
unsigned long long uint64_t
Definition: stdint.h:13
#define BGX_SPU_INT_FEC_UNCORR
Definition: thunderx.h:868
uint8_t errop
Error opcode.
Definition: thunderx.h:346
Virtual function BAR 0.
Definition: pciea.h:39
#define BGX_SPU_STATUS1_FLT
Definition: thunderx.h:809
#define BGX_SPU_BR_PMD_LD_REP
SPU local device status report.
Definition: thunderx.h:845
#define TXNIC_CQE_TYPE_SEND
Send completion queue entry type.
Definition: thunderx.h:341
#define TXNIC_PF_PKIND_CFG_MAXLEN_DISABLE
Definition: thunderx.h:467
unsigned long vf_stride
Virtual function BAR stride.
Definition: thunderx.h:591
static void txnic_poll_cq(struct txnic *vnic)
Poll completion queue.
Definition: thunderx.c:523
struct txnic_rbdr_entry rbdre
Receive buffer descriptor ring entry.
Definition: thunderx.h:243
#define cpu_to_le64(value)
Definition: byteswap.h:108
#define BGX_SPU_AN_STATUS_XNP_STAT
Definition: thunderx.h:855
#define BGX_CMR_TX_STAT7
CMR transmit statistics 7.
Definition: thunderx.h:755
void netdev_tx_complete_next_err(struct net_device *netdev, int rc)
Complete network transmission.
Definition: netdevice.c:509
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:230
#define TXNIC_QS_SQ_CFG_QSIZE_1K
Definition: thunderx.h:83
#define TXNIC_PF_PKIND_CFG_MINLEN_DISABLE
Definition: thunderx.h:470
#define BGX_SPU_INT_AN_PAGE_RX
Definition: thunderx.h:867
union txnic_cqe * cqe
Completion queue entries.
Definition: thunderx.h:407
uint8_t mac[ETH_ALEN]
MAC address.
Definition: ena.h:24
#define TXNIC_RQ_SIZE
Receive queue size.
Definition: thunderx.h:273
struct txnic_sq sq
Send queue.
Definition: thunderx.h:427
#define TXNIC_PF_BP_CFG_BP_POLL_DLY_DEFAULT
Definition: thunderx.h:449
#define BGX_SPU_CONTROL1
SPU control 1.
Definition: thunderx.h:800
#define BGX_SPU_BR_PMD_STATUS
SPU BASE-R link training status.
Definition: thunderx.h:836
uint8_t send_status
Status.
Definition: thunderx.h:331
#define TXNIC_SEND_HDR_FLAGS
Flags for send header subdescriptor.
Definition: thunderx.h:126
#define BGX_CMR_TX_STAT6
CMR transmit statistics 6.
Definition: thunderx.h:752
unsigned int cons
Consumer counter.
Definition: thunderx.h:280
#define TXNIC_PF_TL2_CFG(tl)
Traffic limiter 2 configuration.
Definition: thunderx.h:523
#define TXNIC_QS_CQ_CFG_RESET
Definition: thunderx.h:297
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:240
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:130
unsigned int prod
Producer counter.
Definition: thunderx.h:278
#define TXNIC_PF_LMAC_CFG
LMAC configuration.
Definition: thunderx.h:486
#define TXNIC_QS_RBDR_CFG_RESET
Definition: thunderx.h:213
#define BGX_SPU_INT_ERR_BLK
Definition: thunderx.h:875
static void txnic_poll(struct txnic *vnic)
Poll virtual NIC.
Definition: thunderx.c:628
#define BGX_SPU_INT_BIP_ERR
Definition: thunderx.h:870
struct device dev
Generic device.
Definition: pci.h:212
#define BGX_SPU_RESET_DELAY_MS
SPU reset delay.
Definition: thunderx.h:805
#define BGX_SPU_AN_STATUS_PAGE_RX
Definition: thunderx.h:856
#define TXNIC_PF_QS_RQ_CFG_RBDR_STRT_QS(qs)
Definition: thunderx.h:560
#define TXNIC_PF_LMAC_CFG2
LMAC configuration 2.
Definition: thunderx.h:493
#define TXNIC_SQ_STRIDE
Send queue stride.
Definition: thunderx.h:178
#define TXNIC_PF_INTF_SEND_CFG(in)
Interface send configuration.
Definition: thunderx.h:453
uint32_t lane_to_sds
Lane-to-SDS mapping.
Definition: thunderx.h:895
#define TXNIC_PF_QS_SQ_CFG2_TL4(tl)
Definition: thunderx.h:577
#define TXNIC_PF_TL4_CFG_SQ_QS(qs)
Definition: thunderx.h:540
Dynamic memory allocation.
#define BGX_SPU_BR_STATUS1_BLK_LOCK
Definition: thunderx.h:820
void * regs
Registers.
Definition: thunderx.h:910
static int txnic_send(struct txnic *vnic, struct io_buffer *iobuf)
Send packet.
Definition: thunderx.c:186
#define BGX_CMR_RX_DMAC_CTL_BCST_ACCEPT
Definition: thunderx.h:720
#define TXNIC_SEND_GATHER_FLAGS
Flags for send gather subdescriptor.
Definition: thunderx.h:144
Protocol structure.
Definition: thunderxcfg.h:148
#define TXNIC_SQE_SUBDESCS
Number of subdescriptors per send queue entry.
Definition: thunderx.h:159
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
Definition: netdevice.h:518
#define BGX_SPU_BR_PMD_CONTROL_TRAIN_EN
Definition: thunderx.h:833
#define list_del(list)
Delete an entry from a list.
Definition: list.h:119
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:365
An LMAC type.
Definition: thunderx.h:889
#define BGX_SPU_BR_STATUS2_LATCHED_LOCK
Definition: thunderx.h:824
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define TXNIC_QS_CQ_BASE(q)
Completion queue base address.
Definition: thunderx.h:309
static struct net_device_operations txnic_lmac_operations
Network device operations.
Definition: thunderx.c:1070
#define TXNIC_PF_QS_SQ_CFG2(q)
Send queue configuration 2.
Definition: thunderx.h:576
#define TXNIC_TL2_IDX(vnic_idx)
Calculate traffic limiter 2 index.
Definition: thunderx.h:631
#define BGX_SPU_INT_TRAINING_FAIL
Definition: thunderx.h:863
static int txnic_create_cq(struct txnic *vnic)
Create completion queue.
Definition: thunderx.c:453
struct txnic_pf * pf
Physical function (if known)
Definition: thunderx.h:944
void * memcpy(void *dest, const void *src, size_t len) __nonnull
static int txnic_open(struct txnic *vnic)
Open virtual NIC.
Definition: thunderx.c:577
#define TXNIC_QS_SQ_STATUS(q)
Send queue status.
Definition: thunderx.h:99
static int txnic_disable_cq(struct txnic *vnic)
Disable completion queue.
Definition: thunderx.c:477
#define BGX_CMR_TX_STAT2
CMR transmit statistics 2.
Definition: thunderx.h:740
A receive queue entry.
Definition: thunderx.h:241
#define TXNIC_QS_CQ_DOOR(q)
Completion queue doorbell.
Definition: thunderx.h:318
#define TXNIC_PF_QS_RQ_CFG_RBDR_CONT_QS(qs)
Definition: thunderx.h:559
A send queue entry.
Definition: thunderx.h:151
unsigned int cons
Consumer counter.
Definition: thunderx.h:188
#define BGX_SPU_INT_AN_LINK_GOOD
Definition: thunderx.h:866
#define BGX_CMR_RX_DMAC_CAM(i)
CMR destination MAC CAM.
Definition: thunderx.h:723
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define BGX_SPU_BR_ALGN_STATUS
SPU BASE-R alignment status.
Definition: thunderx.h:828
#define TXNIC_PF_MPI_CFG(ix)
Match parse index configuration.
Definition: thunderx.h:474
unsigned int node
Node ID.
Definition: thunderx.h:930
struct pci_device * pci
PCI device.
Definition: thunderx.h:928
Assertions.
#define TXNIC_VNIC_IDX(bgx_idx, lmac_idx)
Calculate virtual NIC index.
Definition: thunderx.h:606
#define TXNIC_PF_QS_CFG_ENA
Definition: thunderx.h:550
#define TXNIC_CQE_RX_APAD_LEN(apad)
Applied padding.
Definition: thunderx.h:365
#define TXNIC_QS_CQ_STATUS_QCOUNT(status)
Definition: thunderx.h:322
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
#define TXNIC_CQE_TYPE_RX
Receive completion queue entry type.
Definition: thunderx.h:362
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:575
Ethernet protocol.
#define TXNIC_PF_PKIND_CFG_LENERR_EN
Definition: thunderx.h:465
#define BGX_CMR_RX_STAT5
CMR receive statistics 5.
Definition: thunderx.h:698
#define TXNIC_QS_SQ_STATUS_STOPPED
Definition: thunderx.h:100
uint8_t intr
Interrupts enabled.
Definition: ena.h:14
EFI_THUNDER_CONFIG_PROTOCOL_GET_LMAC_PROP GetLmacProp
Definition: thunderxcfg.h:151
#define TXNIC_PF_TL3_CHAN_CHAN(ch)
Definition: thunderx.h:536
#define list_for_each_entry(pos, head, member)
Iterate over entries in a list.
Definition: list.h:431
void * priv
Driver private data.
Definition: netdevice.h:431
#define TXNIC_PF_CFG_ENA
Definition: thunderx.h:443
#define DBGC_HDA(...)
Definition: compiler.h:506
static LIST_HEAD(txnic_bgxs)
List of BGX Ethernet interfaces.
#define list_add_tail(new, head)
Add a new entry to the tail of a list.
Definition: list.h:93
#define TXNIC_PF_LMAC(lm)
LMAC registers.
Definition: thunderx.h:483
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:788
#define TXNIC_PF_CHAN_RX_BP_CFG_ENA
Definition: thunderx.h:519
#define TXNIC_PF_QS_RQ_DROP_CFG(q)
Receive queue drop configuration.
Definition: thunderx.h:563
ring len
Length.
Definition: dwmac.h:231
unsigned int cons
Consumer counter.
Definition: thunderx.h:405
#define BGX_SPU_INT_SYNLOS
Definition: thunderx.h:873
static void txnic_lmac_remove_all(struct txnic_pf *pf, struct txnic_bgx *bgx)
Remove all LMACs on a BGX Ethernet interface.
Definition: thunderx.c:1210
#define TXNIC_PF_INTF_SEND_CFG_BLOCK_BGX
Definition: thunderx.h:454
Standard BAR 0.
Definition: pciea.h:32
static struct net_device * netdev
Definition: gdbudp.c:52
#define BGX_SPU_BR_STATUS1
SPU BASE-R status 1.
Definition: thunderx.h:817
#define TXNIC_CQ_STRIDE
Completion queue stride.
Definition: thunderx.h:397
static unsigned int count
Number of entries.
Definition: dwmac.h:225
static void txnic_bgx_mac(struct txnic_lmac *lmac)
Get MAC address.
Definition: thunderx.c:1487
#define TXNIC_QS_RBDR_BASE(q)
Receive buffer descriptor ring base address.
Definition: thunderx.h:220
#define BGX_SPU_BR_PMD_LD_CUP
SPU local device coefficient update.
Definition: thunderx.h:842
#define TXNIC_PF_LMAC_CREDIT
LMAC credit.
Definition: thunderx.h:497
struct txnic_rq rq
Receive queue.
Definition: thunderx.h:429
#define TXNIC_QS_RBDR_CFG_ENA
Definition: thunderx.h:212
#define BGX_SPU_INT_AN_COMPLETE
Definition: thunderx.h:865
void unregister_netdev(struct net_device *netdev)
Unregister network device.
Definition: netdevice.c:941
static void txnic_bgx_lmac_init(struct txnic_bgx *bgx, unsigned int lmac_idx)
Initialise LMAC.
Definition: thunderx.c:1561
#define TXNIC_TL3_IDX(vnic_idx)
Calculate traffic limiter 3 index.
Definition: thunderx.h:639
u32 status1
Definition: ar9003_mac.h:68
#define cpu_to_le32(value)
Definition: byteswap.h:107
static void txnic_pf_remove(struct pci_device *pci)
Remove PCI device.
Definition: thunderx.c:1327
#define TXNIC_PF_QS_RQ_CFG_CQ_QS(qs)
Definition: thunderx.h:558
#define TXNIC_QS_CQ_CFG(q)
Completion queue configuration.
Definition: thunderx.h:295
#define TXNIC_PF_CHAN_RX_CFG
Channel receive configuration.
Definition: thunderx.h:514
#define TXNIC_PF_QS_CFG_VNIC(vn)
Definition: thunderx.h:551
A send completion queue entry.
Definition: thunderx.h:329
#define BGX_CMR_RX_LMACS_LMACS_GET(lmacs)
Definition: thunderx.h:789
#define TXNIC_PF_CHAN(ch)
Channel registers.
Definition: thunderx.h:507
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:78
static void(* free)(struct refcnt *refcnt))
Definition: refcnt.h:54
#define BGX_SPU_STATUS2
SPU status 2.
Definition: thunderx.h:813
struct list_head list
List of physical functions.
Definition: thunderx.h:594
#define TXNIC_RQ_DISABLE_MAX_WAIT_MS
Maximum time to wait for a receive queue to disable.
Definition: thunderx.h:208
void * zalloc(size_t size)
Allocate cleared memory.
Definition: malloc.c:661
uint8_t flags
Flags.
Definition: ena.h:626
#define BGX_CMR_CONFIG_DATA_PKT_RX_EN
Definition: thunderx.h:671
#define BGX_CMR_GLOBAL_CONFIG
CMR global configuration.
Definition: thunderx.h:679
void * regs
Registers.
Definition: thunderx.h:926
const char * name
Name.
Definition: thunderx.h:891
PCI bus.
#define TXNIC_PF_QS_RQ_BP_CFG_BPID(bp)
Definition: thunderx.h:569
Cavium ThunderX Board Configuration.
A PCI device.
Definition: pci.h:210
int register_netdev(struct net_device *netdev)
Register network device.
Definition: netdevice.c:759
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:159
const char * eth_ntoa(const void *ll_addr)
Transcribe Ethernet address.
Definition: ethernet.c:175
static void txnic_free(struct txnic *vnic)
Free virtual NIC.
Definition: thunderx.c:704
#define TXNIC_PF_MPI_CFG_VNIC(vn)
Definition: thunderx.h:475
#define BGX_SPU_BR_PMD_LP_CUP
SPU link partner coefficient update.
Definition: thunderx.h:839
#define TXNICCOL(x)
Debug colour for physical function and BGX messages.
Definition: thunderx.c:58
#define BGX_LMAC(lm)
Per-LMAC registers.
Definition: thunderx.h:666
#define TXNIC_PF_QS_RQ_BP_CFG(q)
Receive queue backpressure configuration.
Definition: thunderx.h:566
struct txnic_bgx * bgx[TXNIC_NUM_BGX]
BGX Ethernet interfaces (if known)
Definition: thunderx.h:596
A virtual NIC.
Definition: thunderx.h:418
User memory allocation.
static void txnic_lmac_remove(struct txnic_lmac *lmac)
Remove logical MAC virtual NIC.
Definition: thunderx.c:1140
static struct txnic * txnic_alloc(struct pci_device *pci, unsigned long membase)
Allocate virtual NIC.
Definition: thunderx.c:644
#define BGX_CMR_RX_STAT6
CMR receive statistics 6.
Definition: thunderx.h:701
EFI_REQUEST_PROTOCOL(EFI_THUNDER_CONFIG_PROTOCOL, &txcfg)
A network device.
Definition: netdevice.h:352
static int txnic_disable_rq(struct txnic *vnic)
Disable receive queue.
Definition: thunderx.c:298
#define TXNIC_QS_CQ_TAIL(q)
Completion queue tail pointer.
Definition: thunderx.h:315
#define ENODEV
No such device.
Definition: errno.h:509
#define BGX_SPU_BR_STATUS2
SPU BASE-R status 2.
Definition: thunderx.h:823
#define TXNIC_QS_SQ_HEAD(q)
Send queue head pointer.
Definition: thunderx.h:90
#define BGX_CMR_RX_STAT1
CMR receive statistics 1.
Definition: thunderx.h:686
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
Definition: netdevice.h:531
#define TXNIC_TL4_IDX(vnic_idx)
Calculate traffic limiter 4 index.
Definition: thunderx.h:647
#define BGX_CMR_TX_STAT13
CMR transmit statistics 13.
Definition: thunderx.h:773
#define BGX_CMR_CHAN_MSK_AND
CMR backpressure channel mask AND.
Definition: thunderx.h:729
#define BGX_CMR_TX_STAT1
CMR transmit statistics 1.
Definition: thunderx.h:737
unsigned long pciea_bar_size(struct pci_device *pci, unsigned int bei)
Find the size of a PCI Enhanced Allocation BAR equivalent.
Definition: pciea.c:144
#define TXNIC_PF_LMAC_CREDIT_CC_PACKET_CNT_DEFAULT
Definition: thunderx.h:502
#define BGX_SPU_AN_STATUS_AN_COMPLETE
Definition: thunderx.h:857
#define BGX_CMR_CONFIG_LMAC_TYPE_SET(ty)
Definition: thunderx.h:675
#define TXNIC_CHAN_IDX(vnic_idx)
Calculate channel index.
Definition: thunderx.h:655
#define TXNIC_RQES
Number of receive queue entries.
Definition: thunderx.h:250
#define TXNIC_PF_INTF_SEND_CFG_BLOCK(bl)
Definition: thunderx.h:455
#define TXNIC_RQ_FILL
Receive queue maximum fill level.
Definition: thunderx.h:256
#define TXNIC_PF_BP_CFG
Backpressure configuration.
Definition: thunderx.h:446
#define BGX_SPU_INT_DBG_SYNC
Definition: thunderx.h:871
Cavium ThunderX Ethernet driver.
#define ETH_ALEN
Definition: if_ether.h:8
#define ETH_ZLEN
Definition: if_ether.h:10
A PCI device ID list entry.
Definition: pci.h:174
uint8_t raw[ETH_ALEN]
Definition: thunderx.h:902
#define le16_to_cpu(value)
Definition: byteswap.h:112
A BGX Ethernet interface.
Definition: thunderx.h:924
unsigned int uint32_t
Definition: stdint.h:12
#define BGX_CMR_TX_STAT9
CMR transmit statistics 9.
Definition: thunderx.h:761
#define TXNIC_CQES
Number of completion queue entries.
Definition: thunderx.h:391
static void txnic_bgx_spu_init(struct txnic_lmac *lmac)
Initialise Super PHY Unit (SPU)
Definition: thunderx.c:1526
#define BGX_CMR_RX_STAT9
CMR receive statistics 9.
Definition: thunderx.h:710
#define TXNIC_NUM_STEERING
Maximum number of steering rules (per BGX)
Definition: thunderx.h:45
#define TXNIC_PF_TL2_CFG_RR_QUANTUM_DEFAULT
Definition: thunderx.h:525
#define BGX_SPU_INT_FEC_CORR
Definition: thunderx.h:869
struct txnic_lmac_type * type
LMAC type.
Definition: thunderx.h:935
#define TXNIC_PF_CHAN_TX_CFG_BP_ENA
Definition: thunderx.h:511
#define BGX_SPU_STATUS1
SPU status 1.
Definition: thunderx.h:808
static struct xen_remove_from_physmap * remove
Definition: xenmem.h:39
uint8_t unused
Unused.
Definition: librm.h:140
#define BGX_CMR_RX_LMACS_LMACS_SET(ct)
Definition: thunderx.h:791
struct io_buffer * iobuf[TXNIC_RQ_FILL]
I/O buffers.
Definition: thunderx.h:284
#define TXNIC_LMAC_IDX(vnic_idx)
Calculate logical MAC index.
Definition: thunderx.h:623
#define TXNIC_PF_QS_RQ_CFG(q)
Receive queue configuration.
Definition: thunderx.h:554
#define BGX_CMR_TX_STAT4
CMR transmit statistics 4.
Definition: thunderx.h:746
txnic_lmac_types
LMAC types.
Definition: thunderx.h:880
uint8_t status
Status.
Definition: ena.h:16
Network device operations.
Definition: netdevice.h:213
static unsigned int txnic_address_node(uint64_t addr)
Calculate node ID.
Definition: thunderx.h:53
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:548
struct device * dev
Underlying hardware device.
Definition: netdevice.h:364
void * regs
Registers.
Definition: thunderx.h:420
struct txnic_cqe_common common
Common fields.
Definition: thunderx.h:378
#define TXNIC_PF_BP_CFG_BP_POLL_ENA
Definition: thunderx.h:447
uint8_t count
Number of LMACs.
Definition: thunderx.h:893
#define BGX_SPU_BR_PMD_CONTROL
SPU BASE-R link training control.
Definition: thunderx.h:832
10GBASE-X/XAUI or DXAUI
Definition: thunderx.h:882
Network device management.
#define BGX_CMR_TX_STAT17
CMR transmit statistics 17.
Definition: thunderx.h:785
#define BGX_CMR_RX_STAT10
CMR receive statistics 10.
Definition: thunderx.h:713
struct txnic_lmac lmac[TXNIC_NUM_LMAC]
Logical MACs.
Definition: thunderx.h:947
#define BGX_CMR_TX_STAT16
CMR transmit statistics 16.
Definition: thunderx.h:782
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:375
#define BGX_CMR_RX_STAT4
CMR receive statistics 4.
Definition: thunderx.h:695
static void txnic_lmac_update_link(struct txnic_lmac *lmac)
Update LMAC link state.
Definition: thunderx.c:846
unsigned int node
Node ID.
Definition: thunderx.h:586
uint8_t apad
Padding.
Definition: thunderx.h:354
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
Definition: timer.c:78
Definition: sis900.h:23
#define iob_reserve(iobuf, len)
Definition: iobuf.h:71
#define TXNIC_PF_LMAC_CFG_MIN_PKT_SIZE(sz)
Definition: thunderx.h:490
#define TXNIC_QS_CQ_STATUS2(q)
Completion queue status 2.
Definition: thunderx.h:326
#define TXNIC_SQ_FILL
Send queue maximum fill level.
Definition: thunderx.h:172
#define TXNIC_QS_SQ_CFG(q)
Send queue configuration.
Definition: thunderx.h:79
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:362
#define BGX_SPU_CONTROL1_LO_PWR
Definition: thunderx.h:802
#define TXNIC_QS_RBDR_CFG_LINES(sz)
Definition: thunderx.h:217
#define TXNIC_PF_QS_RQ_BP_CFG_RBDR_BP_ENA
Definition: thunderx.h:567
#define TXNIC_PF_INTF_BP_CFG_BP_ID_BGX
Definition: thunderx.h:460
#define TXNIC_PF_LMAC_CFG_ADJUST_DEFAULT
Definition: thunderx.h:488
#define BGX_SPU_INT_BITLCKLS
Definition: thunderx.h:874
#define TXNIC_QS_CQ_STATUS(q)
Completion queue status.
Definition: thunderx.h:321
#define ENOBUFS
No buffer space available.
Definition: errno.h:498
#define DBGC2(...)
Definition: compiler.h:522
unsigned long pciea_bar_start(struct pci_device *pci, unsigned int bei)
Find the start of a PCI Enhanced Allocation BAR equivalent.
Definition: pciea.c:130
#define ENOTTY
Inappropriate I/O control operation.
Definition: errno.h:594
static int txnic_create_rq(struct txnic *vnic)
Create receive queue.
Definition: thunderx.c:267
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:264
#define TXNIC_QS_RBDR_STATUS0(q)
Receive buffer descriptor ring status 0.
Definition: thunderx.h:232
unsigned long vf_membase
Virtual function BAR base.
Definition: thunderx.h:589
#define BGX_SPU_INT_RX_LINK_UP
Definition: thunderx.h:877
void * regs
Registers.
Definition: thunderx.h:582
static void txnic_lmac_poll_link(struct txnic_lmac *lmac)
Poll LMAC link state.
Definition: thunderx.c:868
static void txnic_lmac_poll(struct net_device *netdev)
Poll network device.
Definition: thunderx.c:1058
void * data
Start of data.
Definition: iobuf.h:52
#define BGX_CMR_TX_STAT8
CMR transmit statistics 8.
Definition: thunderx.h:758
RETURN_STATUS EFI_STATUS
Function return status for EFI API.
Definition: UefiBaseType.h:31
static __always_inline void * umalloc(size_t size)
Allocate external memory.
Definition: umalloc.h:56
struct pci_device * pci
PCI device.
Definition: thunderx.h:584
#define EIO
Input/output error.
Definition: errno.h:433
#define TXNIC_PF_CHAN_TX_CFG
Channel transmit configuration.
Definition: thunderx.h:510
#define BGX_CMR_CONFIG_LANE_TO_SDS(ls)
Definition: thunderx.h:676
#define TXNIC_QS_RBDR_TAIL(q)
Receive buffer descriptor ring tail pointer.
Definition: thunderx.h:226
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
Definition: ethernet.c:264
uint8_t cqe_type
Type.
Definition: thunderx.h:372
#define BGX_SPU_INT_RX_LINK_DOWN
Definition: thunderx.h:876
uint16_t len
Length.
Definition: thunderx.h:358
static void txnic_diag(struct txnic *vnic)
Show virtual NIC diagnostics (for debugging)
Definition: thunderx.c:76
PCI Enhanced Allocation.
#define cpu_to_le16(value)
Definition: byteswap.h:106
static void txnic_complete_sqe(struct txnic *vnic, struct txnic_cqe_send *cqe)
Complete send queue entry.
Definition: thunderx.c:226
struct txnic_cqe_send send
Send completion.
Definition: thunderx.h:380
void iounmap(volatile const void *io_addr)
Unmap I/O address.
#define cpu_to_be64(value)
Definition: byteswap.h:111
static void txnic_close(struct txnic *vnic)
Close virtual NIC.
Definition: thunderx.c:611
#define BGX_CMR_RX_STAT0
CMR receive statistics 0.
Definition: thunderx.h:683
#define TXNIC_PF_MPI_CFG_RSSI_BASE(ix)
Definition: thunderx.h:476
#define BGX_CMR_CONFIG_DATA_PKT_TX_EN
Definition: thunderx.h:672
#define BGX_CMR_CONFIG_ENABLE
Definition: thunderx.h:670
unsigned int idx
Virtual NIC index.
Definition: thunderx.h:914
struct ena_tx_sqe sqe
Transmit descriptor.
Definition: ena.h:14
uint64_t addr
Address.
Definition: thunderx.h:237
#define TXNIC_PF_LMAC_CREDIT_CC_ENABLE
Definition: thunderx.h:504
static void txnic_refill_rq(struct txnic *vnic)
Refill receive queue.
Definition: thunderx.c:356
#define TXNIC_SQES
Number of send queue entries.
Definition: thunderx.h:166
#define TXNIC_SQ_SIZE
Send queue size.
Definition: thunderx.h:181
#define BGX_SPU_AN_STATUS_LINK_STATUS
Definition: thunderx.h:858
struct pci_driver txnic_pf_driver __pci_driver
NIC physical function PCI driver.
Definition: thunderx.c:1353
#define TXNIC_VF_BAR_SIZE
Virtual function BAR size.
Definition: thunderx.h:27
#define TXNIC_PF_TL3_CHAN(tl)
Traffic limiter 3 channel mapping.
Definition: thunderx.h:535
#define TXNIC_NUM_LMAC
Maximum number of Logical MACs (per BGX)
Definition: thunderx.h:39
u32 status2
Definition: ar9003_mac.h:69
#define TXNIC_PF_TL3_CFG_RR_QUANTUM_DEFAULT
Definition: thunderx.h:531
struct net_device * netdev
Network device.
Definition: thunderx.h:424
#define BGX_SPU_INT_TRAINING_DONE
Definition: thunderx.h:864
#define TXNIC_PF_CHAN_RX_BP_CFG
Channel receive backpressure configuration.
Definition: thunderx.h:518
#define BGX_CMR_RX_LMACS
CMR receive logical MACs.
Definition: thunderx.h:788
#define TXNIC_BGX_BAR_SIZE
BGX BAR size.
Definition: thunderx.h:33
#define TXNIC_PF_QS_SQ_CFG(q)
Send queue configuration.
Definition: thunderx.h:572
size_t max_pkt_len
Maximum packet length.
Definition: netdevice.h:409
#define TXNIC_PF_QS(qs)
Queue set registers.
Definition: thunderx.h:546
#define BGX_SPU_CONTROL1_RESET
Definition: thunderx.h:801
int training
Link training is in use.
Definition: thunderx.h:939
struct list_head list
List of BGX Ethernet interfaces.
Definition: thunderx.h:942
#define BGX_CMR_TX_LMACS
CMR transmit logical MACs.
Definition: thunderx.h:794
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.
#define TXNIC_PF_TL4_CFG(tl)
Traffic limiter 4 configuration.
Definition: thunderx.h:539
static void txnic_destroy_rq(struct txnic *vnic)
Destroy receive queue.
Definition: thunderx.c:326
struct txnic_cq cq
Completion queue.
Definition: thunderx.h:431
#define BGX_CMR_GLOBAL_CONFIG_FCS_STRIP
Definition: thunderx.h:680
#define TXNIC_PF_LMAC_CREDIT_CC_UNIT_CNT_DEFAULT
Definition: thunderx.h:499
#define BGX_CMR_RX_STAT7
CMR receive statistics 7.
Definition: thunderx.h:704
#define TXNIC_CQ_DISABLE_MAX_WAIT_MS
Maximum time to wait for a completion queue to disable.
Definition: thunderx.h:306
#define TXNIC_QS_RBDR_CFG(q)
Receive buffer descriptor ring configuration.
Definition: thunderx.h:211
A completion queue entry.
Definition: thunderx.h:376
unsigned int prod
Producer counter.
Definition: thunderx.h:186
union txnic_lmac_address mac
MAC address.
Definition: thunderx.h:917
uint8_t hw_addr[MAX_HW_ADDR_LEN]
Hardware address.
Definition: netdevice.h:381
#define NULL
NULL pointer (VOID *)
Definition: Base.h:321
#define ETIMEDOUT
Connection timed out.
Definition: errno.h:669
static int txnic_lmac_transmit(struct net_device *netdev, struct io_buffer *iobuf)
Transmit packet.
Definition: thunderx.c:1045
#define TXNIC_QS_SQ_CFG_ENA
Definition: thunderx.h:80
String functions.
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:307
#define BGX_CMR_TX_STAT5
CMR transmit statistics 5.
Definition: thunderx.h:749
static int txnic_pf_probe(struct pci_device *pci)
Probe PCI device.
Definition: thunderx.c:1240
#define TXNIC_CQ_SIZE
Completion queue size.
Definition: thunderx.h:400
void writeq(uint64_t data, volatile uint64_t *io_addr)
Write 64-bit qword to memory-mapped device.
static int txnic_lmac_probe_all(struct txnic_pf *pf, struct txnic_bgx *bgx)
Probe all LMACs on a BGX Ethernet interface.
Definition: thunderx.c:1170
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
#define TXNIC_PF_QS_CFG
Queue set configuration.
Definition: thunderx.h:549
void eth_random_addr(void *hw_addr)
Generate random Ethernet address.
Definition: ethernet.c:159
#define BGX_CMR_RX_DMAC_CTL
CMR destination MAC control.
Definition: thunderx.h:716
struct txnic_bgx * bgx
Containing BGX Ethernet interface.
Definition: thunderx.h:912
#define TXNIC_PF_QS_RQ_CFG_CACHING_ALL
Definition: thunderx.h:556
Reduced XAUI.
Definition: thunderx.h:883
static int txnic_bgx_detect(struct txnic_bgx *bgx)
Detect BGX Ethernet interface LMAC type.
Definition: thunderx.c:1397
#define BGX_CMR_TX_LMACS_LMACS_SET(ct)
Definition: thunderx.h:797
#define TXNIC_RQ_STRIDE
Receive queue stride.
Definition: thunderx.h:270
#define TXNIC_QS_RBDR_HEAD(q)
Receive buffer descriptor ring head pointer.
Definition: thunderx.h:223
#define TXNIC_QS_CQ_CFG_ENA
Definition: thunderx.h:296
#define BGX_SPU_AN_STATUS_LP_AN_ABLE
Definition: thunderx.h:859
String functions.
#define TXNIC_QS_SQ_TAIL(q)
Send queue tail pointer.
Definition: thunderx.h:93
#define BGX_SPU_INT_ALGNLOS
Definition: thunderx.h:872
struct txnic_cqe_rx rx
Receive completion.
Definition: thunderx.h:382
void * memset(void *dest, int character, size_t len) __nonnull
A persistent I/O buffer.
Definition: iobuf.h:37
#define TXNIC_SQ_STOP_MAX_WAIT_MS
Maximum time to wait for a send queue to stop.
Definition: thunderx.h:106
#define BGX_CMR_TX_STAT11
CMR transmit statistics 11.
Definition: thunderx.h:767
static unsigned int txnic_address_bgx(uint64_t addr)
Calculate BGX Ethernet interface index.
Definition: thunderx.h:65
#define BGX_CMR_RX_STAT8
CMR receive statistics 8.
Definition: thunderx.h:707