iPXE
depca.c
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00001 /* #warning "depca.c: FIXME: fix relocation" */
00002 
00003 FILE_LICENCE ( GPL_ANY );
00004 
00005 #if 0
00006 /* Not fixed for relocation yet. Probably won't work relocated above 16MB */
00007 #ifdef ALLMULTI
00008 #error multicast support is not yet implemented
00009 #endif
00010 /* Etherboot: depca.h merged, comments from Linux driver retained */
00011 /*  depca.c: A DIGITAL DEPCA  & EtherWORKS ethernet driver for linux.
00012 
00013     Written 1994, 1995 by David C. Davies.
00014 
00015 
00016                       Copyright 1994 David C. Davies
00017                                    and 
00018                          United States Government
00019          (as represented by the Director, National Security Agency).  
00020 
00021                Copyright 1995  Digital Equipment Corporation.
00022 
00023 
00024     This software may be used and distributed according to the terms of
00025     the GNU Public License, incorporated herein by reference.
00026 
00027     This driver is written for the Digital Equipment Corporation series
00028     of DEPCA and EtherWORKS ethernet cards:
00029 
00030         DEPCA       (the original)
00031         DE100
00032         DE101
00033         DE200 Turbo
00034         DE201 Turbo
00035         DE202 Turbo (TP BNC)
00036         DE210
00037         DE422       (EISA)
00038 
00039     The  driver has been tested on DE100, DE200 and DE202 cards  in  a
00040     relatively busy network. The DE422 has been tested a little.
00041 
00042     This  driver will NOT work   for the DE203,  DE204  and DE205 series  of
00043     cards,  since they have  a  new custom ASIC in   place of the AMD  LANCE
00044     chip.  See the 'ewrk3.c'   driver in the  Linux  source tree for running
00045     those cards.
00046 
00047     I have benchmarked the driver with a  DE100 at 595kB/s to (542kB/s from)
00048     a DECstation 5000/200.
00049 
00050     The author may be reached at davies@maniac.ultranet.com
00051 
00052     =========================================================================
00053 
00054     The  driver was originally based  on   the 'lance.c' driver from  Donald
00055     Becker   which  is included with  the  standard  driver distribution for
00056     linux.  V0.4  is  a complete  re-write  with only  the kernel  interface
00057     remaining from the original code.
00058 
00059     1) Lance.c code in /linux/drivers/net/
00060     2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook",
00061        AMD, 1992 [(800) 222-9323].
00062     3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
00063        AMD, Pub. #17881, May 1993.
00064     4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA",
00065        AMD, Pub. #16907, May 1992
00066     5) "DEC EtherWORKS LC Ethernet Controller Owners Manual",
00067        Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003
00068     6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual",
00069        Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003
00070     7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR
00071        Digital Equipment Corporation, 1989
00072     8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual",
00073        Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001
00074     
00075 
00076     Peter Bauer's depca.c (V0.5) was referred to when debugging V0.1 of this
00077     driver.
00078 
00079     The original DEPCA  card requires that the  ethernet ROM address counter
00080     be enabled to count and has an 8 bit NICSR.  The ROM counter enabling is
00081     only  done when a  0x08 is read as the  first address octet (to minimise
00082     the chances  of writing over some  other hardware's  I/O register).  The
00083     NICSR accesses   have been changed  to  byte accesses  for all the cards
00084     supported by this driver, since there is only one  useful bit in the MSB
00085     (remote boot timeout) and it  is not used.  Also, there  is a maximum of
00086     only 48kB network  RAM for this  card.  My thanks  to Torbjorn Lindh for
00087     help debugging all this (and holding my feet to  the fire until I got it
00088     right).
00089 
00090     The DE200  series  boards have  on-board 64kB  RAM for  use  as a shared
00091     memory network  buffer. Only the DE100  cards make use  of a  2kB buffer
00092     mode which has not  been implemented in  this driver (only the 32kB  and
00093     64kB modes are supported [16kB/48kB for the original DEPCA]).
00094 
00095     At the most only 2 DEPCA cards can  be supported on  the ISA bus because
00096     there is only provision  for two I/O base addresses  on each card (0x300
00097     and 0x200). The I/O address is detected by searching for a byte sequence
00098     in the Ethernet station address PROM at the expected I/O address for the
00099     Ethernet  PROM.   The shared memory  base   address  is 'autoprobed'  by
00100     looking  for the self  test PROM  and detecting the  card name.   When a
00101     second  DEPCA is  detected,  information  is   placed in the   base_addr
00102     variable of the  next device structure (which  is created if necessary),
00103     thus  enabling ethif_probe  initialization  for the device.  More than 2
00104     EISA cards can  be  supported, but  care will  be  needed assigning  the
00105     shared memory to ensure that each slot has the  correct IRQ, I/O address
00106     and shared memory address assigned.
00107 
00108     ************************************************************************
00109 
00110     NOTE: If you are using two  ISA DEPCAs, it is  important that you assign
00111     the base memory addresses correctly.   The  driver autoprobes I/O  0x300
00112     then 0x200.  The  base memory address for  the first device must be less
00113     than that of the second so that the auto probe will correctly assign the
00114     I/O and memory addresses on the same card.  I can't think of a way to do
00115     this unambiguously at the moment, since there is nothing on the cards to
00116     tie I/O and memory information together.
00117 
00118     I am unable  to  test  2 cards   together for now,    so this  code   is
00119     unchecked. All reports, good or bad, are welcome.
00120 
00121     ************************************************************************
00122 
00123     The board IRQ   setting must be  at an  unused IRQ which  is auto-probed
00124     using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are
00125     {2,3,4,5,7}, whereas the  DE200 is at {5,9,10,11,15}.  Note that IRQ2 is
00126     really IRQ9 in machines with 16 IRQ lines.
00127 
00128     No 16MB memory  limitation should exist with this  driver as DMA is  not
00129     used and the common memory area is in low memory on the network card (my
00130     current system has 20MB and I've not had problems yet).
00131 
00132     The ability to load this driver as a loadable module has been added. To
00133     utilise this ability, you have to do <8 things:
00134 
00135     0) have a copy of the loadable modules code installed on your system.
00136     1) copy depca.c from the  /linux/drivers/net directory to your favourite
00137     temporary directory.
00138     2) if you wish, edit the  source code near  line 1530 to reflect the I/O
00139     address and IRQ you're using (see also 5).
00140     3) compile  depca.c, but include -DMODULE in  the command line to ensure
00141     that the correct bits are compiled (see end of source code).
00142     4) if you are wanting to add a new  card, goto 5. Otherwise, recompile a
00143     kernel with the depca configuration turned off and reboot.
00144     5) insmod depca.o [irq=7] [io=0x200] [mem=0xd0000] [adapter_name=DE100]
00145        [Alan Cox: Changed the code to allow command line irq/io assignments]
00146        [Dave Davies: Changed the code to allow command line mem/name
00147                                                                 assignments]
00148     6) run the net startup bits for your eth?? interface manually 
00149     (usually /etc/rc.inet[12] at boot time). 
00150     7) enjoy!
00151 
00152     Note that autoprobing is not allowed in loadable modules - the system is
00153     already up and running and you're messing with interrupts.
00154 
00155     To unload a module, turn off the associated interface 
00156     'ifconfig eth?? down' then 'rmmod depca'.
00157 
00158     To assign a base memory address for the shared memory  when running as a
00159     loadable module, see 5 above.  To include the adapter  name (if you have
00160     no PROM  but know the card name)  also see 5  above. Note that this last
00161     option  will not work  with kernel  built-in  depca's. 
00162 
00163     The shared memory assignment for a loadable module  makes sense to avoid
00164     the 'memory autoprobe' picking the wrong shared memory  (for the case of
00165     2 depca's in a PC).
00166 
00167     ************************************************************************
00168     Support for MCA EtherWORKS cards added 11-3-98.
00169     Verified to work with up to 2 DE212 cards in a system (although not
00170       fully stress-tested).  
00171 
00172     Currently known bugs/limitations:
00173 
00174     Note:  with the MCA stuff as a module, it trusts the MCA configuration,
00175            not the command line for IRQ and memory address.  You can
00176            specify them if you want, but it will throw your values out.
00177            You still have to pass the IO address it was configured as
00178            though.
00179 
00180     ************************************************************************
00181     TO DO:
00182     ------
00183 
00184 
00185     Revision History
00186     ----------------
00187 
00188     Version   Date        Description
00189   
00190       0.1     25-jan-94   Initial writing.
00191       0.2     27-jan-94   Added LANCE TX hardware buffer chaining.
00192       0.3      1-feb-94   Added multiple DEPCA support.
00193       0.31     4-feb-94   Added DE202 recognition.
00194       0.32    19-feb-94   Tidy up. Improve multi-DEPCA support.
00195       0.33    25-feb-94   Fix DEPCA ethernet ROM counter enable.
00196                           Add jabber packet fix from murf@perftech.com
00197                           and becker@super.org
00198       0.34     7-mar-94   Fix DEPCA max network memory RAM & NICSR access.
00199       0.35     8-mar-94   Added DE201 recognition. Tidied up.
00200       0.351   30-apr-94   Added EISA support. Added DE422 recognition.
00201       0.36    16-may-94   DE422 fix released.
00202       0.37    22-jul-94   Added MODULE support
00203       0.38    15-aug-94   Added DBR ROM switch in depca_close(). 
00204                           Multi DEPCA bug fix.
00205       0.38axp 15-sep-94   Special version for Alpha AXP Linux V1.0.
00206       0.381   12-dec-94   Added DE101 recognition, fix multicast bug.
00207       0.382    9-feb-95   Fix recognition bug reported by <bkm@star.rl.ac.uk>.
00208       0.383   22-feb-95   Fix for conflict with VESA SCSI reported by
00209                           <stromain@alf.dec.com>
00210       0.384   17-mar-95   Fix a ring full bug reported by <bkm@star.rl.ac.uk>
00211       0.385    3-apr-95   Fix a recognition bug reported by 
00212                                                 <ryan.niemi@lastfrontier.com>
00213       0.386   21-apr-95   Fix the last fix...sorry, must be galloping senility
00214       0.40    25-May-95   Rewrite for portability & updated.
00215                           ALPHA support from <jestabro@amt.tay1.dec.com>
00216       0.41    26-Jun-95   Added verify_area() calls in depca_ioctl() from
00217                           suggestion by <heiko@colossus.escape.de>
00218       0.42    27-Dec-95   Add 'mem' shared memory assignment for loadable 
00219                           modules.
00220                           Add 'adapter_name' for loadable modules when no PROM.
00221                           Both above from a suggestion by 
00222                           <pchen@woodruffs121.residence.gatech.edu>.
00223                           Add new multicasting code.
00224       0.421   22-Apr-96   Fix alloc_device() bug <jari@markkus2.fimr.fi>
00225       0.422   29-Apr-96   Fix depca_hw_init() bug <jari@markkus2.fimr.fi>
00226       0.423    7-Jun-96   Fix module load bug <kmg@barco.be>
00227       0.43    16-Aug-96   Update alloc_device() to conform to de4x5.c
00228       0.44     1-Sep-97   Fix *_probe() to test check_region() first - bug
00229                            reported by <mmogilvi@elbert.uccs.edu>
00230       0.45     3-Nov-98   Added support for MCA EtherWORKS (DE210/DE212) cards
00231                            by <tymm@computer.org> 
00232       0.451    5-Nov-98   Fixed mca stuff cuz I'm a dummy. <tymm@computer.org>
00233       0.5     14-Nov-98   Re-spin for 2.1.x kernels.
00234       0.51    27-Jun-99   Correct received packet length for CRC from
00235                            report by <worm@dkik.dk>
00236 
00237     =========================================================================
00238 */
00239 
00240 #include "etherboot.h"
00241 #include "nic.h"
00242 #include <ipxe/isa.h>
00243 #include <ipxe/ethernet.h>
00244 
00245 /*
00246 ** I/O addresses. Note that the 2k buffer option is not supported in
00247 ** this driver.
00248 */
00249 #define DEPCA_NICSR 0x00   /* Network interface CSR */
00250 #define DEPCA_RBI   0x02   /* RAM buffer index (2k buffer mode) */
00251 #define DEPCA_DATA  0x04   /* LANCE registers' data port */
00252 #define DEPCA_ADDR  0x06   /* LANCE registers' address port */
00253 #define DEPCA_HBASE 0x08   /* EISA high memory base address reg. */
00254 #define DEPCA_PROM  0x0c   /* Ethernet address ROM data port */
00255 #define DEPCA_CNFG  0x0c   /* EISA Configuration port */
00256 #define DEPCA_RBSA  0x0e   /* RAM buffer starting address (2k buff.) */
00257 
00258 /*
00259 ** These are LANCE registers addressable through nic->ioaddr + DEPCA_ADDR 
00260 */
00261 #define CSR0       0
00262 #define CSR1       1
00263 #define CSR2       2
00264 #define CSR3       3
00265 
00266 /* 
00267 ** NETWORK INTERFACE CSR (NI_CSR) bit definitions 
00268 */
00269  
00270 #define TO              0x0100  /* Time Out for remote boot */
00271 #define SHE             0x0080  /* SHadow memory Enable */
00272 #define BS              0x0040  /* Bank Select */
00273 #define BUF             0x0020  /* BUFfer size (1->32k, 0->64k) */
00274 #define RBE             0x0010  /* Remote Boot Enable (1->net boot) */
00275 #define AAC             0x0008  /* Address ROM Address Counter (1->enable) */
00276 #define _128KB          0x0008  /* 128kB Network RAM (1->enable) */
00277 #define IM              0x0004  /* Interrupt Mask (1->mask) */
00278 #define IEN             0x0002  /* Interrupt tristate ENable (1->enable) */
00279 #define LED             0x0001  /* LED control */
00280 
00281 /* 
00282 ** Control and Status Register 0 (CSR0) bit definitions 
00283 */
00284 
00285 #define ERR             0x8000  /* Error summary */
00286 #define BABL            0x4000  /* Babble transmitter timeout error  */
00287 #define CERR            0x2000  /* Collision Error */
00288 #define MISS            0x1000  /* Missed packet */
00289 #define MERR            0x0800  /* Memory Error */
00290 #define RINT            0x0400  /* Receiver Interrupt */
00291 #define TINT            0x0200  /* Transmit Interrupt */
00292 #define IDON            0x0100  /* Initialization Done */
00293 #define INTR            0x0080  /* Interrupt Flag */
00294 #define INEA            0x0040  /* Interrupt Enable */
00295 #define RXON            0x0020  /* Receiver on */
00296 #define TXON            0x0010  /* Transmitter on */
00297 #define TDMD            0x0008  /* Transmit Demand */
00298 #define STOP            0x0004  /* Stop */
00299 #define STRT            0x0002  /* Start */
00300 #define INIT            0x0001  /* Initialize */
00301 #define INTM            0xff00  /* Interrupt Mask */
00302 #define INTE            0xfff0  /* Interrupt Enable */
00303 
00304 /*
00305 ** CONTROL AND STATUS REGISTER 3 (CSR3)
00306 */
00307 
00308 #define BSWP            0x0004  /* Byte SWaP */
00309 #define ACON            0x0002  /* ALE control */
00310 #define BCON            0x0001  /* Byte CONtrol */
00311 
00312 /*
00313 ** Initialization Block Mode Register 
00314 */
00315 
00316 #define PROM            0x8000  /* Promiscuous Mode */
00317 #define EMBA            0x0080  /* Enable Modified Back-off Algorithm */
00318 #define INTL            0x0040  /* Internal Loopback */
00319 #define DRTY            0x0020  /* Disable Retry */
00320 #define COLL            0x0010  /* Force Collision */
00321 #define DTCR            0x0008  /* Disable Transmit CRC */
00322 #define LOOP            0x0004  /* Loopback */
00323 #define DTX             0x0002  /* Disable the Transmitter */
00324 #define DRX             0x0001  /* Disable the Receiver */
00325 
00326 /*
00327 ** Receive Message Descriptor 1 (RMD1) bit definitions. 
00328 */
00329 
00330 #define R_OWN       0x80000000  /* Owner bit 0 = host, 1 = lance */
00331 #define R_ERR           0x4000  /* Error Summary */
00332 #define R_FRAM          0x2000  /* Framing Error */
00333 #define R_OFLO          0x1000  /* Overflow Error */
00334 #define R_CRC           0x0800  /* CRC Error */
00335 #define R_BUFF          0x0400  /* Buffer Error */
00336 #define R_STP           0x0200  /* Start of Packet */
00337 #define R_ENP           0x0100  /* End of Packet */
00338 
00339 /*
00340 ** Transmit Message Descriptor 1 (TMD1) bit definitions. 
00341 */
00342 
00343 #define T_OWN       0x80000000  /* Owner bit 0 = host, 1 = lance */
00344 #define T_ERR           0x4000  /* Error Summary */
00345 #define T_ADD_FCS       0x2000  /* More the 1 retry needed to Xmit */
00346 #define T_MORE          0x1000  /* >1 retry to transmit packet */
00347 #define T_ONE           0x0800  /* 1 try needed to transmit the packet */
00348 #define T_DEF           0x0400  /* Deferred */
00349 #define T_STP       0x02000000  /* Start of Packet */
00350 #define T_ENP       0x01000000  /* End of Packet */
00351 #define T_FLAGS     0xff000000  /* TX Flags Field */
00352 
00353 /*
00354 ** Transmit Message Descriptor 3 (TMD3) bit definitions.
00355 */
00356 
00357 #define TMD3_BUFF    0x8000     /* BUFFer error */
00358 #define TMD3_UFLO    0x4000     /* UnderFLOw error */
00359 #define TMD3_RES     0x2000     /* REServed */
00360 #define TMD3_LCOL    0x1000     /* Late COLlision */
00361 #define TMD3_LCAR    0x0800     /* Loss of CARrier */
00362 #define TMD3_RTRY    0x0400     /* ReTRY error */
00363 
00364 /*
00365 ** Ethernet PROM defines
00366 */
00367 #define PROBE_LENGTH    32
00368 
00369 /*
00370 ** Set the number of Tx and Rx buffers. Ensure that the memory requested
00371 ** here is <= to the amount of shared memory set up by the board switches.
00372 ** The number of descriptors MUST BE A POWER OF 2.
00373 **
00374 ** total_memory = NUM_RX_DESC*(8+RX_BUFF_SZ) + NUM_TX_DESC*(8+TX_BUFF_SZ)
00375 */
00376 #define NUM_RX_DESC     2               /* Number of RX descriptors */
00377 #define NUM_TX_DESC     2               /* Number of TX descriptors */
00378 #define RX_BUFF_SZ      1536            /* Buffer size for each Rx buffer */
00379 #define TX_BUFF_SZ      1536            /* Buffer size for each Tx buffer */
00380 
00381 /*
00382 ** ISA Bus defines
00383 */
00384 #ifndef DEPCA_MODEL
00385 #define DEPCA_MODEL     DEPCA
00386 #endif
00387 
00388 static enum {
00389         DEPCA, DE100, DE101, DE200, DE201, DE202, DE210, DE212, DE422, unknown
00390 } adapter = DEPCA_MODEL;
00391 
00392 /*
00393 ** Name <-> Adapter mapping
00394 */
00395 
00396 static char *adapter_name[] = {
00397         "DEPCA",
00398         "DE100","DE101",
00399         "DE200","DE201","DE202",
00400         "DE210","DE212",
00401         "DE422",
00402         ""
00403 };
00404 
00405 #ifndef DEPCA_RAM_BASE
00406 #define DEPCA_RAM_BASE  0xd0000
00407 #endif
00408 
00409 /*
00410 ** Memory Alignment. Each descriptor is 4 longwords long. To force a
00411 ** particular alignment on the TX descriptor, adjust DESC_SKIP_LEN and
00412 ** DESC_ALIGN. ALIGN aligns the start address of the private memory area
00413 ** and hence the RX descriptor ring's first entry. 
00414 */
00415 #define ALIGN4      ((u32)4 - 1)       /* 1 longword align */
00416 #define ALIGN8      ((u32)8 - 1)       /* 2 longword (quadword) align */
00417 #define ALIGN         ALIGN8              /* Keep the LANCE happy... */
00418 
00419 /*
00420 ** The DEPCA Rx and Tx ring descriptors. 
00421 */
00422 struct depca_rx_desc {
00423     volatile s32 base;
00424     s16 buf_length;             /* This length is negative 2's complement! */
00425     s16 msg_length;             /* This length is "normal". */
00426 };
00427 
00428 struct depca_tx_desc {
00429     volatile s32 base;
00430     s16 length;                 /* This length is negative 2's complement! */
00431     s16 misc;                   /* Errors and TDR info */
00432 };
00433 
00434 #define LA_MASK 0x0000ffff      /* LANCE address mask for mapping network RAM
00435                                    to LANCE memory address space */
00436 
00437 /*
00438 ** The Lance initialization block, described in databook, in common memory.
00439 */
00440 struct depca_init {
00441     u16 mode;                   /* Mode register */
00442     u8  phys_addr[ETH_ALEN];    /* Physical ethernet address */
00443     u8  mcast_table[8];         /* Multicast Hash Table. */
00444     u32 rx_ring;                /* Rx ring base pointer & ring length */
00445     u32 tx_ring;                /* Tx ring base pointer & ring length */
00446 };
00447 
00448 struct depca_private {
00449         struct depca_rx_desc    *rx_ring;
00450         struct depca_tx_desc    *tx_ring;
00451         struct depca_init       init_block;     /* Shadow init block */
00452         char                    *rx_memcpy[NUM_RX_DESC];
00453         char                    *tx_memcpy[NUM_TX_DESC];
00454         u32                     bus_offset;     /* ISA bus address offset */
00455         u32                     sh_mem;         /* address of shared mem */
00456         u32                     dma_buffs;      /* Rx & Tx buffer start */
00457         int                     rx_cur, tx_cur; /* Next free ring entry */
00458         int                     txRingMask, rxRingMask;
00459         s32                     rx_rlen, tx_rlen;
00460         /* log2([rt]xRingMask+1) for the descriptors */
00461 };
00462 
00463 static Address          mem_start = DEPCA_RAM_BASE;
00464 static Address          mem_len, offset;
00465 static struct depca_private     lp;
00466 
00467 /*
00468 ** Miscellaneous defines...
00469 */
00470 #define STOP_DEPCA(ioaddr) \
00471     outw(CSR0, ioaddr + DEPCA_ADDR);\
00472     outw(STOP, ioaddr + DEPCA_DATA)
00473 
00474 /* Initialize the lance Rx and Tx descriptor rings. */
00475 static void depca_init_ring(struct nic *nic)
00476 {
00477         int     i;
00478         u32     p;
00479 
00480         lp.rx_cur = lp.tx_cur = 0;
00481         /* Initialize the base addresses and length of each buffer in the ring */
00482         for (i = 0; i <= lp.rxRingMask; i++) {
00483                 writel((p = lp.dma_buffs + i * RX_BUFF_SZ) | R_OWN, &lp.rx_ring[i].base);
00484                 writew(-RX_BUFF_SZ, &lp.rx_ring[i].buf_length);
00485                 lp.rx_memcpy[i] = (char *) (p + lp.bus_offset);
00486         }
00487         for (i = 0; i <= lp.txRingMask; i++) {
00488                 writel((p = lp.dma_buffs + (i + lp.txRingMask + 1) * TX_BUFF_SZ) & 0x00ffffff, &lp.tx_ring[i].base);
00489                 lp.tx_memcpy[i] = (char *) (p + lp.bus_offset);
00490         }
00491 
00492         /* Set up the initialization block */
00493         lp.init_block.rx_ring = ((u32) ((u32) lp.rx_ring) & LA_MASK) | lp.rx_rlen;
00494         lp.init_block.tx_ring = ((u32) ((u32) lp.tx_ring) & LA_MASK) | lp.tx_rlen;
00495         for (i = 0; i < ETH_ALEN; i++)
00496                 lp.init_block.phys_addr[i] = nic->node_addr[i];
00497         lp.init_block.mode = 0x0000;    /* Enable the Tx and Rx */
00498         memset(lp.init_block.mcast_table, 0, sizeof(lp.init_block.mcast_table));
00499 }
00500 
00501 static inline void LoadCSRs(struct nic *nic)
00502 {
00503         outw(CSR1, nic->ioaddr + DEPCA_ADDR);   /* initialisation block address LSW */
00504         outw((u16) (lp.sh_mem & LA_MASK), nic->ioaddr + DEPCA_DATA);
00505         outw(CSR2, nic->ioaddr + DEPCA_ADDR);   /* initialisation block address MSW */
00506         outw((u16) ((lp.sh_mem & LA_MASK) >> 16), nic->ioaddr + DEPCA_DATA);
00507         outw(CSR3, nic->ioaddr + DEPCA_ADDR);   /* ALE control */
00508         outw(ACON, nic->ioaddr + DEPCA_DATA);
00509         outw(CSR0, nic->ioaddr + DEPCA_ADDR);   /* Point back to CSR0 */
00510 }
00511 
00512 static inline int InitRestartDepca(struct nic *nic)
00513 {
00514         int             i;
00515 
00516         /* Copy the shadow init_block to shared memory */
00517         memcpy_toio((char *)lp.sh_mem, &lp.init_block, sizeof(struct depca_init));
00518         outw(CSR0, nic->ioaddr + DEPCA_ADDR);           /* point back to CSR0 */
00519         outw(INIT, nic->ioaddr + DEPCA_DATA);           /* initialise DEPCA */
00520 
00521         for (i = 0; i < 100 && !(inw(nic->ioaddr + DEPCA_DATA) & IDON); i++)
00522                 ;
00523         if (i < 100) {
00524                 /* clear IDON by writing a 1, and start LANCE */
00525                 outw(IDON | STRT, nic->ioaddr + DEPCA_DATA);
00526         } else {
00527                 printf("DEPCA not initialised\n");
00528                 return (1);
00529         }
00530         return (0);
00531 }
00532 
00533 /**************************************************************************
00534 RESET - Reset adapter
00535 ***************************************************************************/
00536 static void depca_reset(struct nic *nic)
00537 {
00538         s16     nicsr;
00539         int     i, j;
00540 
00541         STOP_DEPCA(nic->ioaddr);
00542         nicsr = inb(nic->ioaddr + DEPCA_NICSR);
00543         nicsr = ((nicsr & ~SHE & ~RBE & ~IEN) | IM);
00544         outb(nicsr, nic->ioaddr + DEPCA_NICSR);
00545         if (inw(nic->ioaddr + DEPCA_DATA) != STOP)
00546         {
00547                 printf("depca: Cannot stop NIC\n");
00548                 return;
00549         }
00550 
00551         /* Initialisation block */
00552         lp.sh_mem = mem_start;
00553         mem_start += sizeof(struct depca_init);
00554         /* Tx & Rx descriptors (aligned to a quadword boundary) */
00555         mem_start = (mem_start + ALIGN) & ~ALIGN;
00556         lp.rx_ring = (struct depca_rx_desc *) mem_start;
00557         mem_start += (sizeof(struct depca_rx_desc) * NUM_RX_DESC);
00558         lp.tx_ring = (struct depca_tx_desc *) mem_start;
00559         mem_start += (sizeof(struct depca_tx_desc) * NUM_TX_DESC);
00560 
00561         lp.bus_offset = mem_start & 0x00ff0000;
00562         /* LANCE re-mapped start address */
00563         lp.dma_buffs = mem_start & LA_MASK;
00564 
00565         /* Finish initialising the ring information. */
00566         lp.rxRingMask = NUM_RX_DESC - 1;
00567         lp.txRingMask = NUM_TX_DESC - 1;
00568 
00569         /* Calculate Tx/Rx RLEN size for the descriptors. */
00570         for (i = 0, j = lp.rxRingMask; j > 0; i++) {
00571                 j >>= 1;
00572         }
00573         lp.rx_rlen = (s32) (i << 29);
00574         for (i = 0, j = lp.txRingMask; j > 0; i++) {
00575                 j >>= 1;
00576         }
00577         lp.tx_rlen = (s32) (i << 29);
00578 
00579         /* Load the initialisation block */
00580         depca_init_ring(nic);
00581         LoadCSRs(nic);
00582         InitRestartDepca(nic);
00583 }
00584 
00585 /**************************************************************************
00586 POLL - Wait for a frame
00587 ***************************************************************************/
00588 static int depca_poll(struct nic *nic, int retrieve)
00589 {
00590         int             entry;
00591         u32             status;
00592 
00593         entry = lp.rx_cur;
00594         if ((status = readl(&lp.rx_ring[entry].base) & R_OWN))
00595                 return (0);
00596 
00597         if ( ! retrieve ) return 1;
00598 
00599         memcpy(nic->packet, lp.rx_memcpy[entry], nic->packetlen = lp.rx_ring[entry].msg_length);
00600         lp.rx_ring[entry].base |= R_OWN;
00601         lp.rx_cur = (++lp.rx_cur) & lp.rxRingMask;
00602         return (1);
00603 }
00604 
00605 /**************************************************************************
00606 TRANSMIT - Transmit a frame
00607 ***************************************************************************/
00608 static void depca_transmit(
00609         struct nic *nic,
00610         const char *d,                  /* Destination */
00611         unsigned int t,                 /* Type */
00612         unsigned int s,                 /* size */
00613         const char *p)                  /* Packet */
00614 {
00615         int             entry, len;
00616         char            *mem;
00617 
00618         /* send the packet to destination */
00619         /*
00620         ** Caution: the right order is important here... dont
00621         ** setup the ownership rights until all the other
00622         ** information is in place
00623         */
00624         mem = lp.tx_memcpy[entry = lp.tx_cur];
00625         memcpy_toio(mem, d, ETH_ALEN);
00626         memcpy_toio(mem + ETH_ALEN, nic->node_addr, ETH_ALEN);
00627         mem[ETH_ALEN * 2] = t >> 8;
00628         mem[ETH_ALEN * 2 + 1] = t;
00629         memcpy_toio(mem + ETH_HLEN, p, s);
00630         s += ETH_HLEN;
00631         len = (s < ETH_ZLEN ? ETH_ZLEN : s);
00632         /* clean out flags */
00633         writel(readl(&lp.tx_ring[entry].base) & ~T_FLAGS, &lp.tx_ring[entry].base);
00634         /* clears other error flags */
00635         writew(0x0000, &lp.tx_ring[entry].misc);
00636         /* packet length in buffer */
00637         writew(-len, &lp.tx_ring[entry].length);
00638         /* start and end of packet, ownership */
00639         writel(readl(&lp.tx_ring[entry].base) | (T_STP|T_ENP|T_OWN), &lp.tx_ring[entry].base);
00640         /* update current pointers */
00641         lp.tx_cur = (++lp.tx_cur) & lp.txRingMask;
00642 }
00643 
00644 /**************************************************************************
00645 DISABLE - Turn off ethernet interface
00646 ***************************************************************************/
00647 static void depca_disable ( struct nic *nic ) {
00648         depca_reset(nic);
00649 
00650         STOP_DEPCA(nic->ioaddr);
00651 }
00652 
00653 /**************************************************************************
00654 IRQ - Interrupt Control
00655 ***************************************************************************/
00656 static void depca_irq(struct nic *nic __unused, irq_action_t action __unused)
00657 {
00658   switch ( action ) {
00659   case DISABLE :
00660     break;
00661   case ENABLE :
00662     break;
00663   case FORCE :
00664     break;
00665   }
00666 }
00667 
00668 /*
00669 ** Look for a special sequence in the Ethernet station address PROM that
00670 ** is common across all DEPCA products. Note that the original DEPCA needs
00671 ** its ROM address counter to be initialized and enabled. Only enable
00672 ** if the first address octet is a 0x08 - this minimises the chances of
00673 ** messing around with some other hardware, but it assumes that this DEPCA
00674 ** card initialized itself correctly.
00675 **
00676 ** Search the Ethernet address ROM for the signature. Since the ROM address
00677 ** counter can start at an arbitrary point, the search must include the entire
00678 ** probe sequence length plus the (length_of_the_signature - 1).
00679 ** Stop the search IMMEDIATELY after the signature is found so that the
00680 ** PROM address counter is correctly positioned at the start of the
00681 ** ethernet address for later read out.
00682 */
00683 
00684 
00685 /*
00686  * Ugly, ugly, ugly.  I can't quite make out where the split should be
00687  * between probe1 and probe()...
00688  *
00689  */
00690 static u8 nicsr;
00691 
00692 
00693 static int depca_probe1 ( isa_probe_addr_t ioaddr ) {
00694         u8      data;
00695         /* This is only correct for little endian machines, but then
00696            Etherboot doesn't work on anything but a PC */
00697         u8      sig[] = { 0xFF, 0x00, 0x55, 0xAA, 0xFF, 0x00, 0x55, 0xAA };
00698         int     i, j;
00699 
00700         data = inb(ioaddr + DEPCA_PROM);                /* clear counter on DEPCA */
00701         data = inb(ioaddr + DEPCA_PROM);                /* read data */
00702         if (data == 0x8) {
00703                 nicsr = inb(ioaddr + DEPCA_NICSR);
00704                 nicsr |= AAC;
00705                 outb(nicsr, ioaddr + DEPCA_NICSR);
00706         }
00707         for (i = 0, j = 0; j < (int)sizeof(sig) && i < PROBE_LENGTH+((int)sizeof(sig))-1; ++i) {
00708                 data = inb(ioaddr + DEPCA_PROM);
00709                 if (data == sig[j])             /* track signature */
00710                         ++j;
00711                 else
00712                         j = (data == sig[0]) ? 1 : 0;
00713         }
00714         if (j != sizeof(sig))
00715                 return (0);
00716         /* put the card in its initial state */
00717         STOP_DEPCA(ioaddr);
00718         nicsr = ((inb(ioaddr + DEPCA_NICSR) & ~SHE & ~RBE & ~IEN) | IM);
00719         outb(nicsr, ioaddr + DEPCA_NICSR);
00720         if (inw(ioaddr + DEPCA_DATA) != STOP)
00721                 return (0);
00722         memcpy((char *)mem_start, sig, sizeof(sig));
00723         if (memcmp((char *)mem_start, sig, sizeof(sig)) != 0)
00724                 return (0);
00725 
00726         return 1;
00727 }
00728 
00729 static struct nic_operations depca_operations = {
00730         .connect        = dummy_connect,
00731         .poll           = depca_poll,
00732         .transmit       = depca_transmit,
00733         .irq            = depca_irq,
00734 
00735 };
00736 
00737 /**************************************************************************
00738 PROBE - Look for an adapter, this routine's visible to the outside
00739 ***************************************************************************/
00740 static int depca_probe ( struct nic *nic, struct isa_device *isa ) {
00741 
00742         int     i, j;
00743         long    sum, chksum;
00744 
00745         nic->irqno    = 0;
00746         nic->ioaddr   = isa->ioaddr;
00747 
00748         for (i = 0, j = 0, sum = 0; j < 3; j++) {
00749                 sum <<= 1;
00750                 if (sum > 0xFFFF)
00751                         sum -= 0xFFFF;
00752                 sum += (u8)(nic->node_addr[i++] = inb(nic->ioaddr + DEPCA_PROM));
00753                 sum += (u16)((nic->node_addr[i++] = inb(nic->ioaddr + DEPCA_PROM)) << 8);
00754                 if (sum > 0xFFFF)
00755                         sum -= 0xFFFF;
00756         }
00757         if (sum == 0xFFFF)
00758                 sum = 0;
00759         chksum = (u8)inb(nic->ioaddr + DEPCA_PROM);
00760         chksum |= (u16)(inb(nic->ioaddr + DEPCA_PROM) << 8);
00761         mem_len = (adapter == DEPCA) ? (48 << 10) : (64 << 10);
00762         offset = 0;
00763         if (nicsr & BUF) {
00764                 offset = 0x8000;
00765                 nicsr &= ~BS;
00766                 mem_len -= (32 << 10);
00767         }
00768         if (adapter != DEPCA)   /* enable shadow RAM */
00769                 outb(nicsr |= SHE, nic->ioaddr + DEPCA_NICSR);
00770         DBG ( "%s base %4.4x, memory [%4.4lx-%4.4lx] addr %s",
00771                adapter_name[adapter], nic->ioaddr, mem_start,
00772                mem_start + mem_len, eth_ntoa ( nic->node_addr ) );
00773         if (sum != chksum)
00774                 printf(" (bad checksum)");
00775         putchar('\n');
00776 
00777         depca_reset(nic);
00778 
00779         /* point to NIC specific routines */
00780         nic->nic_op     = &depca_operations;
00781         return 1;
00782 }
00783 
00784 static isa_probe_addr_t depca_probe_addrs[] = {
00785         0x300, 0x200,
00786 };
00787 
00788 ISA_DRIVER ( depca_driver, depca_probe_addrs, depca_probe1,
00789                      GENERIC_ISAPNP_VENDOR, 0x80f7 );
00790 
00791 DRIVER ( "depce", nic_driver, isa_driver, depca_driver,
00792          depca_probe, depca_disable );
00793 
00794 ISA_ROM ( "depca", "Digital DE100 and DE200" );
00795 
00796 #endif
00797 
00798 /*
00799  * Local variables:
00800  *  c-basic-offset: 8
00801  *  c-indent-level: 8
00802  *  tab-width: 8
00803  * End:
00804  */