iPXE
Data Structures | Macros | Enumerations | Functions
golan.h File Reference
#include <ipxe/pci.h>
#include <ipxe/pcibackup.h>
#include <byteswap.h>
#include <errno.h>
#include <ipxe/io.h>
#include <stdio.h>
#include <unistd.h>
#include "CIB_PRM.h"
#include "mlx_utils/include/public/mlx_utils.h"

Go to the source code of this file.

Data Structures

struct  golan_cmdq_md
 
struct  golan_uar
 
struct  golan_firmware_area
 
struct  golan_send_wqe_ud
 
union  golan_send_wqe
 
struct  golan_recv_wqe_ud
 
struct  golan_recv_wq
 
struct  golan_send_wq
 
struct  golan_queue_pair
 
struct  golan_completion_queue
 
struct  golan_event_queue
 
struct  golan_port
 
struct  golan_mboxes
 
struct  golan
 

Macros

#define GOLAN_PCI_CONFIG_BAR_SIZE   0x100000
 
#define GOLAN_PAS_SIZE   sizeof(uint64_t)
 
#define GOLAN_INVALID_LKEY   0x00000100UL
 
#define GOLAN_MAX_PORTS   2
 
#define GOLAN_PORT_BASE   1
 
#define MELLANOX_VID   0x15b3
 
#define GOLAN_HCA_BAR   PCI_BASE_ADDRESS_0
 
#define GOLAN_HCR_MAX_WAIT_MS   10000
 
#define min(a, b)   ((a)<(b)?(a):(b))
 
#define GOLAN_PAGE_SHIFT   12
 
#define GOLAN_PAGE_SIZE   (1 << GOLAN_PAGE_SHIFT)
 
#define GOLAN_PAGE_MASK   (GOLAN_PAGE_SIZE - 1)
 
#define MAX_MBOX   ( GOLAN_PAGE_SIZE / MAILBOX_STRIDE )
 
#define DEF_CMD_IDX   1
 
#define MEM_CMD_IDX   0
 
#define NO_MBOX   0xffff
 
#define MEM_MBOX   MEM_CMD_IDX
 
#define GEN_MBOX   DEF_CMD_IDX
 
#define CMD_IF_REV   4
 
#define MAX_PASE_MBOX   ((GOLAN_CMD_PAS_CNT) - 2)
 
#define CMD_STATUS(golan, idx)   ((struct golan_outbox_hdr *)(get_cmd( (golan) , (idx) )->out))->status
 
#define CMD_SYND(golan, idx)   ((struct golan_outbox_hdr *)(get_cmd( (golan) , (idx) )->out))->syndrome
 
#define QRY_PAGES_OUT(golan, idx)   ((struct golan_query_pages_outbox *)(get_cmd( (golan) , (idx) )->out))
 
#define VIRT_2_BE64_BUS(addr)   cpu_to_be64(((unsigned long long )virt_to_bus(addr)))
 
#define BE64_BUS_2_VIRT(addr)   bus_to_virt(be64_to_cpu(addr))
 
#define USR_2_BE64_BUS(addr)   cpu_to_be64(((unsigned long long )user_to_phys(addr, 0)))
 
#define BE64_BUS_2_USR(addr)   be64_to_cpu(phys_to_user(addr))
 
#define GET_INBOX(golan, idx)   (&(((struct mbox *)(golan->mboxes.inbox))[idx]))
 
#define GET_OUTBOX(golan, idx)   (&(((struct mbox *)(golan->mboxes.outbox))[idx]))
 
#define GOLAN_MBOX_IN(cmd_ptr, in_ptr)
 
#define DIV_ROUND_UP(n, d)   (((n) + (d) - 1) / (d))
 
#define GOLAN_SEND_WQE_BB_SIZE   64
 
#define GOLAN_SEND_UD_WQE_SIZE   sizeof(struct golan_send_wqe_ud)
 
#define GOLAN_RECV_WQE_SIZE   sizeof(struct golan_recv_wqe_ud)
 
#define GOLAN_WQEBBS_PER_SEND_UD_WQE   DIV_ROUND_UP(GOLAN_SEND_UD_WQE_SIZE, GOLAN_SEND_WQE_BB_SIZE)
 
#define GOLAN_SEND_OPCODE   0x0a
 
#define GOLAN_WQE_CTRL_WQE_IDX_BIT   8
 
#define GOLAN_CQE_OPCODE_NOT_VALID   0x0f
 
#define GOLAN_CQE_OPCODE_BIT   4
 
#define GOLAN_CQ_DB_RECORD_SIZE   sizeof(uint64_t)
 
#define GOLAN_CQE_OWNER_MASK   1
 
#define MANAGE_PAGES_PSA_OFFSET   0
 
#define PXE_CMDIF_REF   5
 
#define GOLAN_EQE_SIZE   sizeof(struct golan_eqe)
 
#define GOLAN_NUM_EQES   8
 
#define GOLAN_EQ_DOORBELL_OFFSET   0x40
 
#define DB_BUFFER0_EVEN_OFFSET   0x800
 
#define DB_BUFFER0_ODD_OFFSET   0x900
 
#define GOLAN_EQ_MAP_ALL_EVENTS
 
#define GOLAN_OPEN   0x1
 
#define GOLAN_FW_AREAS_NUM   2
 

Enumerations

enum  return_hdr_t {
  NO_ERRORS = 0x0, SIGNATURE_ERROR = 0x1, TOKEN_ERROR = 0x2, BAD_BLOCK_NUMBER = 0x3,
  BAD_OUTPUT_POINTER = 0x4, BAD_INPUT_POINTER = 0x5, INTERNAL_ERROR = 0x6, INPUT_LEN_ERROR = 0x7,
  OUTPUT_LEN_ERROR = 0x8, RESERVE_NOT_ZERO = 0x9, BAD_CMD_TYPE = 0x10
}
 
enum  golan_ib_qp_state {
  GOLAN_IB_QPS_RESET, GOLAN_IB_QPS_INIT, GOLAN_IB_QPS_RTR, GOLAN_IB_QPS_RTS,
  GOLAN_IB_QPS_SQD, GOLAN_IB_QPS_SQE, GOLAN_IB_QPS_ERR
}
 
enum  { GOLAN_CQE_SW_OWNERSHIP = 0x0, GOLAN_CQE_HW_OWNERSHIP = 0x1 }
 
enum  { GOLAN_CQE_SIZE_64 = 0, GOLAN_CQE_SIZE_128 = 1 }
 
enum  golan_event {
  GOLAN_EVENT_TYPE_COMP = 0x0, GOLAN_EVENT_TYPE_PATH_MIG = 0x01, GOLAN_EVENT_TYPE_COMM_EST = 0x02, GOLAN_EVENT_TYPE_SQ_DRAINED = 0x03,
  GOLAN_EVENT_TYPE_SRQ_LAST_WQE = 0x13, GOLAN_EVENT_TYPE_SRQ_RQ_LIMIT = 0x14, GOLAN_EVENT_TYPE_CQ_ERROR = 0x04, GOLAN_EVENT_TYPE_WQ_CATAS_ERROR = 0x05,
  GOLAN_EVENT_TYPE_PATH_MIG_FAILED = 0x07, GOLAN_EVENT_TYPE_WQ_INVAL_REQ_ERROR = 0x10, GOLAN_EVENT_TYPE_WQ_ACCESS_ERROR = 0x11, GOLAN_EVENT_TYPE_SRQ_CATAS_ERROR = 0x12,
  GOLAN_EVENT_TYPE_INTERNAL_ERROR = 0x08, GOLAN_EVENT_TYPE_PORT_CHANGE = 0x09, GOLAN_EVENT_TYPE_GPIO_EVENT = 0x15, GOLAN_EVENT_TYPE_REMOTE_CONFIG = 0x19,
  GOLAN_EVENT_TYPE_DB_BF_CONGESTION = 0x1a, GOLAN_EVENT_TYPE_STALL_EVENT = 0x1b, GOLAN_EVENT_TYPE_PACKET_DROPPED = 0x1f, GOLAN_EVENT_TYPE_CMD = 0x0a,
  GOLAN_EVENT_TYPE_PAGE_REQUEST = 0x0b, GOLAN_EVENT_TYPE_PAGE_FAULT = 0x0C
}
 
enum  golan_port_sub_event {
  GOLAN_PORT_CHANGE_SUBTYPE_DOWN = 1, GOLAN_PORT_CHANGE_SUBTYPE_ACTIVE = 4, GOLAN_PORT_CHANGE_SUBTYPE_INITIALIZED = 5, GOLAN_PORT_CHANGE_SUBTYPE_LID = 6,
  GOLAN_PORT_CHANGE_SUBTYPE_PKEY = 7, GOLAN_PORT_CHANGE_SUBTYPE_GUID = 8, GOLAN_PORT_CHANGE_SUBTYPE_CLIENT_REREG = 9
}
 
enum  { GOLAN_EQE_SW_OWNERSHIP = 0x0, GOLAN_EQE_HW_OWNERSHIP = 0x1 }
 
enum  { GOLAN_EQ_UNARMED = 0, GOLAN_EQ_ARMED = 1 }
 

Functions

 FILE_LICENCE (GPL2_OR_LATER)
 

Macro Definition Documentation

◆ GOLAN_PCI_CONFIG_BAR_SIZE

#define GOLAN_PCI_CONFIG_BAR_SIZE   0x100000

Definition at line 35 of file golan.h.

◆ GOLAN_PAS_SIZE

#define GOLAN_PAS_SIZE   sizeof(uint64_t)

Definition at line 37 of file golan.h.

◆ GOLAN_INVALID_LKEY

#define GOLAN_INVALID_LKEY   0x00000100UL

Definition at line 39 of file golan.h.

◆ GOLAN_MAX_PORTS

#define GOLAN_MAX_PORTS   2

Definition at line 41 of file golan.h.

◆ GOLAN_PORT_BASE

#define GOLAN_PORT_BASE   1

Definition at line 42 of file golan.h.

◆ MELLANOX_VID

#define MELLANOX_VID   0x15b3

Definition at line 44 of file golan.h.

◆ GOLAN_HCA_BAR

#define GOLAN_HCA_BAR   PCI_BASE_ADDRESS_0

Definition at line 45 of file golan.h.

◆ GOLAN_HCR_MAX_WAIT_MS

#define GOLAN_HCR_MAX_WAIT_MS   10000

Definition at line 47 of file golan.h.

◆ min

#define min (   a,
  b 
)    ((a)<(b)?(a):(b))

Definition at line 49 of file golan.h.

◆ GOLAN_PAGE_SHIFT

#define GOLAN_PAGE_SHIFT   12

Definition at line 51 of file golan.h.

◆ GOLAN_PAGE_SIZE

#define GOLAN_PAGE_SIZE   (1 << GOLAN_PAGE_SHIFT)

Definition at line 52 of file golan.h.

◆ GOLAN_PAGE_MASK

#define GOLAN_PAGE_MASK   (GOLAN_PAGE_SIZE - 1)

Definition at line 53 of file golan.h.

◆ MAX_MBOX

#define MAX_MBOX   ( GOLAN_PAGE_SIZE / MAILBOX_STRIDE )

Definition at line 55 of file golan.h.

◆ DEF_CMD_IDX

#define DEF_CMD_IDX   1

Definition at line 56 of file golan.h.

◆ MEM_CMD_IDX

#define MEM_CMD_IDX   0

Definition at line 57 of file golan.h.

◆ NO_MBOX

#define NO_MBOX   0xffff

Definition at line 58 of file golan.h.

◆ MEM_MBOX

#define MEM_MBOX   MEM_CMD_IDX

Definition at line 59 of file golan.h.

◆ GEN_MBOX

#define GEN_MBOX   DEF_CMD_IDX

Definition at line 60 of file golan.h.

◆ CMD_IF_REV

#define CMD_IF_REV   4

Definition at line 62 of file golan.h.

◆ MAX_PASE_MBOX

#define MAX_PASE_MBOX   ((GOLAN_CMD_PAS_CNT) - 2)

Definition at line 64 of file golan.h.

◆ CMD_STATUS

#define CMD_STATUS (   golan,
  idx 
)    ((struct golan_outbox_hdr *)(get_cmd( (golan) , (idx) )->out))->status

Definition at line 66 of file golan.h.

◆ CMD_SYND

#define CMD_SYND (   golan,
  idx 
)    ((struct golan_outbox_hdr *)(get_cmd( (golan) , (idx) )->out))->syndrome

Definition at line 67 of file golan.h.

◆ QRY_PAGES_OUT

#define QRY_PAGES_OUT (   golan,
  idx 
)    ((struct golan_query_pages_outbox *)(get_cmd( (golan) , (idx) )->out))

Definition at line 68 of file golan.h.

◆ VIRT_2_BE64_BUS

#define VIRT_2_BE64_BUS (   addr)    cpu_to_be64(((unsigned long long )virt_to_bus(addr)))

Definition at line 70 of file golan.h.

◆ BE64_BUS_2_VIRT

#define BE64_BUS_2_VIRT (   addr)    bus_to_virt(be64_to_cpu(addr))

Definition at line 71 of file golan.h.

◆ USR_2_BE64_BUS

#define USR_2_BE64_BUS (   addr)    cpu_to_be64(((unsigned long long )user_to_phys(addr, 0)))

Definition at line 72 of file golan.h.

◆ BE64_BUS_2_USR

#define BE64_BUS_2_USR (   addr)    be64_to_cpu(phys_to_user(addr))

Definition at line 73 of file golan.h.

◆ GET_INBOX

#define GET_INBOX (   golan,
  idx 
)    (&(((struct mbox *)(golan->mboxes.inbox))[idx]))

Definition at line 75 of file golan.h.

◆ GET_OUTBOX

#define GET_OUTBOX (   golan,
  idx 
)    (&(((struct mbox *)(golan->mboxes.outbox))[idx]))

Definition at line 76 of file golan.h.

◆ GOLAN_MBOX_IN

#define GOLAN_MBOX_IN (   cmd_ptr,
  in_ptr 
)
Value:
( { \
union { \
__be32 raw[4]; \
typeof ( *(in_ptr) ) cooked; \
} *u = container_of ( &(cmd_ptr)->in[0], typeof ( *u ), raw[0] ); \
&u->cooked; } )
__be32 in[4]
Definition: CIB_PRM.h:35
#define container_of(ptr, type, field)
Get containing structure.
Definition: stddef.h:35
__be32 raw[7]
Definition: CIB_PRM.h:28
union @16 u
__be64 in_ptr
Definition: CIB_PRM.h:32

Definition at line 78 of file golan.h.

◆ DIV_ROUND_UP

#define DIV_ROUND_UP (   n,
  d 
)    (((n) + (d) - 1) / (d))

Definition at line 85 of file golan.h.

◆ GOLAN_SEND_WQE_BB_SIZE

#define GOLAN_SEND_WQE_BB_SIZE   64

Definition at line 127 of file golan.h.

◆ GOLAN_SEND_UD_WQE_SIZE

#define GOLAN_SEND_UD_WQE_SIZE   sizeof(struct golan_send_wqe_ud)

Definition at line 128 of file golan.h.

◆ GOLAN_RECV_WQE_SIZE

#define GOLAN_RECV_WQE_SIZE   sizeof(struct golan_recv_wqe_ud)

Definition at line 129 of file golan.h.

◆ GOLAN_WQEBBS_PER_SEND_UD_WQE

#define GOLAN_WQEBBS_PER_SEND_UD_WQE   DIV_ROUND_UP(GOLAN_SEND_UD_WQE_SIZE, GOLAN_SEND_WQE_BB_SIZE)

Definition at line 130 of file golan.h.

◆ GOLAN_SEND_OPCODE

#define GOLAN_SEND_OPCODE   0x0a

Definition at line 131 of file golan.h.

◆ GOLAN_WQE_CTRL_WQE_IDX_BIT

#define GOLAN_WQE_CTRL_WQE_IDX_BIT   8

Definition at line 132 of file golan.h.

◆ GOLAN_CQE_OPCODE_NOT_VALID

#define GOLAN_CQE_OPCODE_NOT_VALID   0x0f

Definition at line 190 of file golan.h.

◆ GOLAN_CQE_OPCODE_BIT

#define GOLAN_CQE_OPCODE_BIT   4

Definition at line 191 of file golan.h.

◆ GOLAN_CQ_DB_RECORD_SIZE

#define GOLAN_CQ_DB_RECORD_SIZE   sizeof(uint64_t)

Definition at line 192 of file golan.h.

◆ GOLAN_CQE_OWNER_MASK

#define GOLAN_CQE_OWNER_MASK   1

Definition at line 193 of file golan.h.

◆ MANAGE_PAGES_PSA_OFFSET

#define MANAGE_PAGES_PSA_OFFSET   0

Definition at line 195 of file golan.h.

◆ PXE_CMDIF_REF

#define PXE_CMDIF_REF   5

Definition at line 196 of file golan.h.

◆ GOLAN_EQE_SIZE

#define GOLAN_EQE_SIZE   sizeof(struct golan_eqe)

Definition at line 216 of file golan.h.

◆ GOLAN_NUM_EQES

#define GOLAN_NUM_EQES   8

Definition at line 217 of file golan.h.

◆ GOLAN_EQ_DOORBELL_OFFSET

#define GOLAN_EQ_DOORBELL_OFFSET   0x40

Definition at line 218 of file golan.h.

◆ DB_BUFFER0_EVEN_OFFSET

#define DB_BUFFER0_EVEN_OFFSET   0x800

Definition at line 219 of file golan.h.

◆ DB_BUFFER0_ODD_OFFSET

#define DB_BUFFER0_ODD_OFFSET   0x900

Definition at line 220 of file golan.h.

◆ GOLAN_EQ_MAP_ALL_EVENTS

#define GOLAN_EQ_MAP_ALL_EVENTS
Value:
(1 << GOLAN_EVENT_TYPE_CLIENT_RE_REGISTER )| \

Definition at line 222 of file golan.h.

◆ GOLAN_OPEN

#define GOLAN_OPEN   0x1

Definition at line 321 of file golan.h.

◆ GOLAN_FW_AREAS_NUM

#define GOLAN_FW_AREAS_NUM   2

Definition at line 340 of file golan.h.

Enumeration Type Documentation

◆ return_hdr_t

Enumerator
NO_ERRORS 
SIGNATURE_ERROR 
TOKEN_ERROR 
BAD_BLOCK_NUMBER 
BAD_OUTPUT_POINTER 
BAD_INPUT_POINTER 
INTERNAL_ERROR 
INPUT_LEN_ERROR 
OUTPUT_LEN_ERROR 
RESERVE_NOT_ZERO 
BAD_CMD_TYPE 

Definition at line 88 of file golan.h.

88  {
89  NO_ERRORS = 0x0,
90  SIGNATURE_ERROR = 0x1,
91  TOKEN_ERROR = 0x2,
92  BAD_BLOCK_NUMBER = 0x3,
93  BAD_OUTPUT_POINTER = 0x4, // pointer not align to mailbox size
94  BAD_INPUT_POINTER = 0x5, // pointer not align to mailbox size
95  INTERNAL_ERROR = 0x6,
96  INPUT_LEN_ERROR = 0x7, // input length less than 0x8.
97  OUTPUT_LEN_ERROR = 0x8, // output length less than 0x8.
98  RESERVE_NOT_ZERO = 0x9,
99  BAD_CMD_TYPE = 0x10,
100 } return_hdr_t;
return_hdr_t
Definition: golan.h:88

◆ golan_ib_qp_state

Enumerator
GOLAN_IB_QPS_RESET 
GOLAN_IB_QPS_INIT 
GOLAN_IB_QPS_RTR 
GOLAN_IB_QPS_RTS 
GOLAN_IB_QPS_SQD 
GOLAN_IB_QPS_SQE 
GOLAN_IB_QPS_ERR 

Definition at line 134 of file golan.h.

◆ anonymous enum

anonymous enum
Enumerator
GOLAN_CQE_SW_OWNERSHIP 
GOLAN_CQE_HW_OWNERSHIP 

Definition at line 198 of file golan.h.

◆ anonymous enum

anonymous enum
Enumerator
GOLAN_CQE_SIZE_64 
GOLAN_CQE_SIZE_128 

Definition at line 203 of file golan.h.

203  {
204  GOLAN_CQE_SIZE_64 = 0,
206 };

◆ golan_event

Enumerator
GOLAN_EVENT_TYPE_COMP 
GOLAN_EVENT_TYPE_PATH_MIG 
GOLAN_EVENT_TYPE_COMM_EST 
GOLAN_EVENT_TYPE_SQ_DRAINED 
GOLAN_EVENT_TYPE_SRQ_LAST_WQE 
GOLAN_EVENT_TYPE_SRQ_RQ_LIMIT 
GOLAN_EVENT_TYPE_CQ_ERROR 
GOLAN_EVENT_TYPE_WQ_CATAS_ERROR 
GOLAN_EVENT_TYPE_PATH_MIG_FAILED 
GOLAN_EVENT_TYPE_WQ_INVAL_REQ_ERROR 
GOLAN_EVENT_TYPE_WQ_ACCESS_ERROR 
GOLAN_EVENT_TYPE_SRQ_CATAS_ERROR 
GOLAN_EVENT_TYPE_INTERNAL_ERROR 
GOLAN_EVENT_TYPE_PORT_CHANGE 
GOLAN_EVENT_TYPE_GPIO_EVENT 
GOLAN_EVENT_TYPE_REMOTE_CONFIG 
GOLAN_EVENT_TYPE_DB_BF_CONGESTION 
GOLAN_EVENT_TYPE_STALL_EVENT 
GOLAN_EVENT_TYPE_PACKET_DROPPED 
GOLAN_EVENT_TYPE_CMD 
GOLAN_EVENT_TYPE_PAGE_REQUEST 
GOLAN_EVENT_TYPE_PAGE_FAULT 

Definition at line 245 of file golan.h.

245  {
246  GOLAN_EVENT_TYPE_COMP = 0x0,
247 
253 
260 
264 // GOLAN_EVENT_TYPE_CLIENT_RE_REGISTER = 0x16,
266 
269 
271 
272  GOLAN_EVENT_TYPE_CMD = 0x0a,
275 };

◆ golan_port_sub_event

Enumerator
GOLAN_PORT_CHANGE_SUBTYPE_DOWN 
GOLAN_PORT_CHANGE_SUBTYPE_ACTIVE 
GOLAN_PORT_CHANGE_SUBTYPE_INITIALIZED 
GOLAN_PORT_CHANGE_SUBTYPE_LID 
GOLAN_PORT_CHANGE_SUBTYPE_PKEY 
GOLAN_PORT_CHANGE_SUBTYPE_GUID 
GOLAN_PORT_CHANGE_SUBTYPE_CLIENT_REREG 

Definition at line 277 of file golan.h.

◆ anonymous enum

anonymous enum
Enumerator
GOLAN_EQE_SW_OWNERSHIP 
GOLAN_EQE_HW_OWNERSHIP 

Definition at line 288 of file golan.h.

◆ anonymous enum

anonymous enum
Enumerator
GOLAN_EQ_UNARMED 
GOLAN_EQ_ARMED 

Definition at line 293 of file golan.h.

293  {
294  GOLAN_EQ_UNARMED = 0,
295  GOLAN_EQ_ARMED = 1,
296 };

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER  )