20 #ifndef AR9003_EEPROM_H 21 #define AR9003_EEPROM_H 25 #define AR9300_EEP_VER 0xD000 26 #define AR9300_EEP_VER_MINOR_MASK 0xFFF 27 #define AR9300_EEP_MINOR_VER_1 0x1 28 #define AR9300_EEP_MINOR_VER AR9300_EEP_MINOR_VER_1 31 #define AR9300_EEP_START_LOC 256 32 #define AR9300_NUM_5G_CAL_PIERS 8 33 #define AR9300_NUM_2G_CAL_PIERS 3 34 #define AR9300_NUM_5G_20_TARGET_POWERS 8 35 #define AR9300_NUM_5G_40_TARGET_POWERS 8 36 #define AR9300_NUM_2G_CCK_TARGET_POWERS 2 37 #define AR9300_NUM_2G_20_TARGET_POWERS 3 38 #define AR9300_NUM_2G_40_TARGET_POWERS 3 40 #define AR9300_NUM_CTLS_5G 9 41 #define AR9300_NUM_CTLS_2G 12 42 #define AR9300_NUM_BAND_EDGES_5G 8 43 #define AR9300_NUM_BAND_EDGES_2G 4 44 #define AR9300_EEPMISC_BIG_ENDIAN 0x01 45 #define AR9300_EEPMISC_WOW 0x02 46 #define AR9300_CUSTOMER_DATA_SIZE 20 48 #define FBIN2FREQ(x, y) ((y) ? (2300 + x) : (4800 + 5 * x)) 49 #define AR9300_MAX_CHAINS 3 50 #define AR9300_ANT_16S 25 51 #define AR9300_FUTURE_MODAL_SZ 6 53 #define AR9300_PAPRD_RATE_MASK 0x01ffffff 54 #define AR9300_PAPRD_SCALE_1 0x0e000000 55 #define AR9300_PAPRD_SCALE_1_S 25 56 #define AR9300_PAPRD_SCALE_2 0x70000000 57 #define AR9300_PAPRD_SCALE_2_S 28 66 #define AR9300_PWR_TABLE_OFFSET 0 69 #define AR9300_EEPROM_SIZE (16*1024) 71 #define AR9300_BASE_ADDR_4K 0xfff 72 #define AR9300_BASE_ADDR 0x3ff 73 #define AR9300_BASE_ADDR_512 0x1ff 75 #define AR9300_OTP_BASE 0x14000 76 #define AR9300_OTP_STATUS 0x15f18 77 #define AR9300_OTP_STATUS_TYPE 0x7 78 #define AR9300_OTP_STATUS_VALID 0x4 79 #define AR9300_OTP_STATUS_ACCESS_BUSY 0x2 80 #define AR9300_OTP_STATUS_SM_BUSY 0x1 81 #define AR9300_OTP_READ_DATA 0x15f1c #define AR9300_MAX_CHAINS
#define AR9300_CUSTOMER_DATA_SIZE
u8 ctlIndex_2G[AR9300_NUM_CTLS_2G]
#define AR9300_NUM_5G_CAL_PIERS
u8 calTarget_freqbin_2GHT20[AR9300_NUM_2G_20_TARGET_POWERS]
u8 calTarget_freqbin_2GHT40[AR9300_NUM_2G_40_TARGET_POWERS]
u8 calFreqPier2G[AR9300_NUM_2G_CAL_PIERS]
u8 calTarget_freqbin_2G[AR9300_NUM_2G_20_TARGET_POWERS]
u8 ctlEdges[AR9300_NUM_BAND_EDGES_2G]
#define AR9300_NUM_2G_CCK_TARGET_POWERS
#define AR_EEPROM_MODAL_SPURS
u8 ctlEdges[AR9300_NUM_BAND_EDGES_5G]
s32 ar9003_hw_get_rx_gain_idx(struct ath_hw *ah)
u8 xatten1DBLow[AR9300_MAX_CHAINS]
#define AR9300_NUM_5G_20_TARGET_POWERS
u8 xatten1MarginLow[AR9300_MAX_CHAINS]
struct eepFlags opCapFlags
struct cal_tgt_pow_legacy calTargetPowerCck[AR9300_NUM_2G_CCK_TARGET_POWERS]
u8 ctlIndex_5G[AR9300_NUM_CTLS_5G]
#define AR9300_NUM_BAND_EDGES_5G
u8 ctl_freqbin_2G[AR9300_NUM_CTLS_2G][AR9300_NUM_BAND_EDGES_2G]
struct cal_tgt_pow_ht calTargetPower5GHT20[AR9300_NUM_5G_20_TARGET_POWERS]
unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah, struct ath9k_channel *chan)
u8 xatten1MarginHigh[AR9300_MAX_CHAINS]
#define AR9300_NUM_CTLS_5G
u8 custData[AR9300_CUSTOMER_DATA_SIZE]
u8 calTarget_freqbin_5GHT20[AR9300_NUM_5G_20_TARGET_POWERS]
u8 * ar9003_get_spur_chan_ptr(struct ath_hw *ah, int is_2ghz)
struct cal_tgt_pow_ht calTargetPower2GHT20[AR9300_NUM_2G_20_TARGET_POWERS]
u8 xatten1DBHigh[AR9300_MAX_CHAINS]
u8 calTarget_freqbin_5GHT40[AR9300_NUM_5G_40_TARGET_POWERS]
struct ar9300_modal_eep_header modalHeader2G
struct ar9300_BaseExtension_1 base_ext1
struct ar9300_modal_eep_header modalHeader5G
#define AR9300_NUM_2G_20_TARGET_POWERS
u8 calTarget_freqbin_Cck[AR9300_NUM_2G_CCK_TARGET_POWERS]
s32 ar9003_hw_get_tx_gain_idx(struct ath_hw *ah)
struct ar9300_BaseExtension_2 base_ext2
struct cal_tgt_pow_ht calTargetPower5GHT40[AR9300_NUM_5G_40_TARGET_POWERS]
#define AR9300_NUM_BAND_EDGES_2G
struct cal_ctl_data_2g ctlPowerData_2G[AR9300_NUM_CTLS_2G]
struct cal_tgt_pow_legacy calTargetPower2G[AR9300_NUM_2G_20_TARGET_POWERS]
u8 calTarget_freqbin_5G[AR9300_NUM_5G_20_TARGET_POWERS]
u8 params_for_tuning_caps[2]
struct cal_tgt_pow_legacy calTargetPower5G[AR9300_NUM_5G_20_TARGET_POWERS]
enum CompressAlgorithm __attribute__
#define AR9300_NUM_2G_CAL_PIERS
struct ar9300_cal_data_per_freq_op_loop calPierData2G[AR9300_MAX_CHAINS][AR9300_NUM_2G_CAL_PIERS]
struct cal_ctl_data_5g ctlPowerData_5G[AR9300_NUM_CTLS_5G]
u8 calFreqPier5G[AR9300_NUM_5G_CAL_PIERS]
struct ar9300_base_eep_hdr baseEepHeader
#define AR9300_NUM_CTLS_2G
#define AR9300_NUM_5G_40_TARGET_POWERS
struct ar9300_cal_data_per_freq_op_loop calPierData5G[AR9300_MAX_CHAINS][AR9300_NUM_5G_CAL_PIERS]
#define AR9300_NUM_2G_40_TARGET_POWERS
struct cal_tgt_pow_ht calTargetPower2GHT40[AR9300_NUM_2G_40_TARGET_POWERS]
u8 ctl_freqbin_5G[AR9300_NUM_CTLS_5G][AR9300_NUM_BAND_EDGES_5G]