#include "../ath.h"
#include "ar9003_eeprom.h"

Data Structures
struct	base_eep_header
struct	base_eep_header_4k
struct	spur_chan
struct	modal_eep_header
struct	calDataPerFreqOpLoop
struct	modal_eep_4k_header
struct	base_eep_ar9287_header
struct	modal_eep_ar9287_header
struct	cal_data_per_freq
struct	cal_data_per_freq_4k
struct	cal_target_power_leg
struct	cal_target_power_ht
struct	cal_ctl_edges
struct	cal_data_op_loop_ar9287
struct	cal_data_per_freq_ar9287
union	cal_data_per_freq_ar9287_u
struct	cal_ctl_data_ar9287
struct	cal_ctl_data
struct	cal_ctl_data_4k
struct	ar5416_eeprom_def
struct	ar5416_eeprom_4k
struct	ar9287_eeprom
struct	ath9k_country_entry
struct	eeprom_ops

Macros
#define	AR_EEPROM_MODAL_SPURS 5
#define	AR5416_EEPROM_MAGIC 0x5aa5
#define	CTRY_DEBUG 0x1ff
#define	CTRY_DEFAULT 0
#define	AR_EEPROM_EEPCAP_COMPRESS_DIS 0x0001
#define	AR_EEPROM_EEPCAP_AES_DIS 0x0002
#define	AR_EEPROM_EEPCAP_FASTFRAME_DIS 0x0004
#define	AR_EEPROM_EEPCAP_BURST_DIS 0x0008
#define	AR_EEPROM_EEPCAP_MAXQCU 0x01F0
#define	AR_EEPROM_EEPCAP_MAXQCU_S 4
#define	AR_EEPROM_EEPCAP_HEAVY_CLIP_EN 0x0200
#define	AR_EEPROM_EEPCAP_KC_ENTRIES 0xF000
#define	AR_EEPROM_EEPCAP_KC_ENTRIES_S 12
#define	AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
#define	AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
#define	AR_EEPROM_EEREGCAP_EN_KK_U2 0x0100
#define	AR_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
#define	AR_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
#define	AR_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
#define	AR_EEPROM_EEREGCAP_EN_KK_U1_ODD_PRE4_0 0x4000
#define	AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0 0x8000
#define	AR5416_EEPROM_MAGIC_OFFSET 0x0
#define	AR5416_EEPROM_S 2
#define	AR5416_EEPROM_OFFSET 0x2000
#define	AR5416_EEPROM_MAX 0xae0
#define	AR5416_EEPROM_START_ADDR (AR_SREV_9100(ah)) ? 0x1fff1000 : 0x503f1200
#define	SD_NO_CTL 0xE0
#define	NO_CTL 0xff
#define	CTL_MODE_M 0xf
#define	CTL_11A 0
#define	CTL_11B 1
#define	CTL_11G 2
#define	CTL_2GHT20 5
#define	CTL_5GHT20 6
#define	CTL_2GHT40 7
#define	CTL_5GHT40 8
#define	EXT_ADDITIVE (0x8000)
#define	CTL_11A_EXT (CTL_11A \| EXT_ADDITIVE)
#define	CTL_11G_EXT (CTL_11G \| EXT_ADDITIVE)
#define	CTL_11B_EXT (CTL_11B \| EXT_ADDITIVE)
#define	SUB_NUM_CTL_MODES_AT_5G_40 2
#define	SUB_NUM_CTL_MODES_AT_2G_40 3
#define	INCREASE_MAXPOW_BY_TWO_CHAIN 6 /* 10log10(2)2 */
#define	INCREASE_MAXPOW_BY_THREE_CHAIN 10 /* 10log10(3)2 */
#define	AR9285_RDEXT_DEFAULT 0x1F
#define	ATH9K_POW_SM(_r, _s)
#define	FREQ2FBIN(x, y)
#define	ath9k_hw_use_flash(_ah)
#define	AR5416_VER_MASK (eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK)
#define	OLC_FOR_AR9280_20_LATER
#define	OLC_FOR_AR9287_10_LATER
#define	AR_EEPROM_RFSILENT_GPIO_SEL 0x001c
#define	AR_EEPROM_RFSILENT_GPIO_SEL_S 2
#define	AR_EEPROM_RFSILENT_POLARITY 0x0002
#define	AR_EEPROM_RFSILENT_POLARITY_S 1
#define	EEP_RFSILENT_ENABLED 0x0001
#define	EEP_RFSILENT_ENABLED_S 0
#define	EEP_RFSILENT_POLARITY 0x0002
#define	EEP_RFSILENT_POLARITY_S 1
#define	EEP_RFSILENT_GPIO_SEL 0x001c
#define	EEP_RFSILENT_GPIO_SEL_S 2
#define	AR5416_OPFLAGS_11A 0x01
#define	AR5416_OPFLAGS_11G 0x02
#define	AR5416_OPFLAGS_N_5G_HT40 0x04
#define	AR5416_OPFLAGS_N_2G_HT40 0x08
#define	AR5416_OPFLAGS_N_5G_HT20 0x10
#define	AR5416_OPFLAGS_N_2G_HT20 0x20
#define	AR5416_EEP_NO_BACK_VER 0x1
#define	AR5416_EEP_VER 0xE
#define	AR5416_EEP_VER_MINOR_MASK 0x0FFF
#define	AR5416_EEP_MINOR_VER_2 0x2
#define	AR5416_EEP_MINOR_VER_3 0x3
#define	AR5416_EEP_MINOR_VER_7 0x7
#define	AR5416_EEP_MINOR_VER_9 0x9
#define	AR5416_EEP_MINOR_VER_16 0x10
#define	AR5416_EEP_MINOR_VER_17 0x11
#define	AR5416_EEP_MINOR_VER_19 0x13
#define	AR5416_EEP_MINOR_VER_20 0x14
#define	AR5416_EEP_MINOR_VER_21 0x15
#define	AR5416_EEP_MINOR_VER_22 0x16
#define	AR5416_NUM_5G_CAL_PIERS 8
#define	AR5416_NUM_2G_CAL_PIERS 4
#define	AR5416_NUM_5G_20_TARGET_POWERS 8
#define	AR5416_NUM_5G_40_TARGET_POWERS 8
#define	AR5416_NUM_2G_CCK_TARGET_POWERS 3
#define	AR5416_NUM_2G_20_TARGET_POWERS 4
#define	AR5416_NUM_2G_40_TARGET_POWERS 4
#define	AR5416_NUM_CTLS 24
#define	AR5416_NUM_BAND_EDGES 8
#define	AR5416_NUM_PD_GAINS 4
#define	AR5416_PD_GAINS_IN_MASK 4
#define	AR5416_PD_GAIN_ICEPTS 5
#define	AR5416_NUM_PDADC_VALUES 128
#define	AR5416_BCHAN_UNUSED 0xFF
#define	AR5416_MAX_PWR_RANGE_IN_HALF_DB 64
#define	AR5416_MAX_CHAINS 3
#define	AR9300_MAX_CHAINS 3
#define	AR5416_PWR_TABLE_OFFSET_DB -5
#define	AR5416_EEP_RXGAIN_23DB_BACKOFF 0
#define	AR5416_EEP_RXGAIN_13DB_BACKOFF 1
#define	AR5416_EEP_RXGAIN_ORIG 2
#define	AR5416_EEP_TXGAIN_ORIGINAL 0
#define	AR5416_EEP_TXGAIN_HIGH_POWER 1
#define	AR5416_EEP4K_START_LOC 64
#define	AR5416_EEP4K_NUM_2G_CAL_PIERS 3
#define	AR5416_EEP4K_NUM_2G_CCK_TARGET_POWERS 3
#define	AR5416_EEP4K_NUM_2G_20_TARGET_POWERS 3
#define	AR5416_EEP4K_NUM_2G_40_TARGET_POWERS 3
#define	AR5416_EEP4K_NUM_CTLS 12
#define	AR5416_EEP4K_NUM_BAND_EDGES 4
#define	AR5416_EEP4K_NUM_PD_GAINS 2
#define	AR5416_EEP4K_MAX_CHAINS 1
#define	AR9280_TX_GAIN_TABLE_SIZE 22
#define	AR9287_EEP_VER 0xE
#define	AR9287_EEP_VER_MINOR_MASK 0xFFF
#define	AR9287_EEP_MINOR_VER_1 0x1
#define	AR9287_EEP_MINOR_VER_2 0x2
#define	AR9287_EEP_MINOR_VER_3 0x3
#define	AR9287_EEP_MINOR_VER AR9287_EEP_MINOR_VER_3
#define	AR9287_EEP_MINOR_VER_b AR9287_EEP_MINOR_VER
#define	AR9287_EEP_NO_BACK_VER AR9287_EEP_MINOR_VER_1
#define	AR9287_EEP_START_LOC 128
#define	AR9287_HTC_EEP_START_LOC 256
#define	AR9287_NUM_2G_CAL_PIERS 3
#define	AR9287_NUM_2G_CCK_TARGET_POWERS 3
#define	AR9287_NUM_2G_20_TARGET_POWERS 3
#define	AR9287_NUM_2G_40_TARGET_POWERS 3
#define	AR9287_NUM_CTLS 12
#define	AR9287_NUM_BAND_EDGES 4
#define	AR9287_PD_GAIN_ICEPTS 1
#define	AR9287_EEPMISC_BIG_ENDIAN 0x01
#define	AR9287_EEPMISC_WOW 0x02
#define	AR9287_MAX_CHAINS 2
#define	AR9287_ANT_16S 32
#define	AR9287_DATA_SZ 32
#define	AR9287_PWR_TABLE_OFFSET_DB -5
#define	AR9287_CHECKSUM_LOCATION (AR9287_EEP_START_LOC + 1)
#define	CTL_EDGE_TPOWER(_ctl)
#define	CTL_EDGE_FLAGS(_ctl)
#define	LNA_CTL_BUF_MODE BIT(0)
#define	LNA_CTL_ISEL_LO BIT(1)
#define	LNA_CTL_ISEL_HI BIT(2)
#define	LNA_CTL_BUF_IN BIT(3)
#define	LNA_CTL_FEM_BAND BIT(4)
#define	LNA_CTL_LOCAL_BIAS BIT(5)
#define	LNA_CTL_FORCE_XPA BIT(6)
#define	LNA_CTL_USE_ANT1 BIT(7)
#define	EEP_4K_BB_DESIRED_SCALE_MASK 0x1f
#define	ar5416_get_ntxchains(_txchainmask)

Enumerations
enum	eeprom_param { EEP_NFTHRESH_5 , EEP_NFTHRESH_2 , EEP_MAC_MSW , EEP_MAC_MID , EEP_MAC_LSW , EEP_REG_0 , EEP_REG_1 , EEP_OP_CAP , EEP_OP_MODE , EEP_RF_SILENT , EEP_OB_5 , EEP_DB_5 , EEP_OB_2 , EEP_DB_2 , EEP_MINOR_REV , EEP_TX_MASK , EEP_RX_MASK , EEP_FSTCLK_5G , EEP_RXGAIN_TYPE , EEP_OL_PWRCTRL , EEP_TXGAIN_TYPE , EEP_RC_CHAIN_MASK , EEP_DAC_HPWR_5G , EEP_FRAC_N_5G , EEP_DEV_TYPE , EEP_TEMPSENSE_SLOPE , EEP_TEMPSENSE_SLOPE_PAL_ON , EEP_PWR_TABLE_OFFSET , EEP_DRIVE_STRENGTH , EEP_INTERNAL_REGULATOR , EEP_SWREG , EEP_PAPRD , EEP_MODAL_VER , EEP_ANT_DIV_CTL1 , EEP_CHAIN_MASK_REDUCE }
enum	ar5416_rates { rate6mb , rate9mb , rate12mb , rate18mb , rate24mb , rate36mb , rate48mb , rate54mb , rate1l , rate2l , rate2s , rate5_5l , rate5_5s , rate11l , rate11s , rateXr , rateHt20_0 , rateHt20_1 , rateHt20_2 , rateHt20_3 , rateHt20_4 , rateHt20_5 , rateHt20_6 , rateHt20_7 , rateHt40_0 , rateHt40_1 , rateHt40_2 , rateHt40_3 , rateHt40_4 , rateHt40_5 , rateHt40_6 , rateHt40_7 , rateDupCck , rateDupOfdm , rateExtCck , rateExtOfdm , Ar5416RateSize }
enum	ath9k_hal_freq_band { ATH9K_HAL_FREQ_BAND_5GHZ = 0 , ATH9K_HAL_FREQ_BAND_2GHZ = 1 }
enum	reg_ext_bitmap { REG_EXT_FCC_MIDBAND = 0 , REG_EXT_JAPAN_MIDBAND = 1 , REG_EXT_FCC_DFS_HT40 = 2 , REG_EXT_JAPAN_NONDFS_HT40 = 3 , REG_EXT_JAPAN_DFS_HT40 = 4 }

Functions
	FILE_LICENCE (BSD2)
	FILE_SECBOOT (FORBIDDEN)
void	ath9k_hw_analog_shift_regwrite (struct ath_hw *ah, u32 reg, u32 val)
void	ath9k_hw_analog_shift_rmw (struct ath_hw *ah, u32 reg, u32 mask, u32 shift, u32 val)
int16_t	ath9k_hw_interpolate (u16 target, u16 srcLeft, u16 srcRight, int16_t targetLeft, int16_t targetRight)
int	ath9k_hw_get_lower_upper_index (u8 target, u8 pList, u16 listSize, u16 indexL, u16 *indexR)
int	ath9k_hw_nvram_read (struct ath_common common, u32 off, u16 data)
void	ath9k_hw_usb_gen_fill_eeprom (struct ath_hw ah, u16 eep_data, int eep_start_loc, int size)
void	ath9k_hw_fill_vpd_table (u8 pwrMin, u8 pwrMax, u8 pPwrList, u8 pVpdList, u16 numIntercepts, u8 *pRetVpdList)
void	ath9k_hw_get_legacy_target_powers (struct ath_hw ah, struct ath9k_channel chan, struct cal_target_power_leg powInfo, u16 numChannels, struct cal_target_power_leg pNewPower, u16 numRates, int isExtTarget)
void	ath9k_hw_get_target_powers (struct ath_hw ah, struct ath9k_channel chan, struct cal_target_power_ht powInfo, u16 numChannels, struct cal_target_power_ht pNewPower, u16 numRates, int isHt40Target)
u16	ath9k_hw_get_max_edge_power (u16 freq, struct cal_ctl_edges *pRdEdgesPower, int is2GHz, int num_band_edges)
void	ath9k_hw_update_regulatory_maxpower (struct ath_hw *ah)
int	ath9k_hw_eeprom_init (struct ath_hw *ah)
void	ath9k_hw_get_gain_boundaries_pdadcs (struct ath_hw ah, struct ath9k_channel chan, void pRawDataSet, u8 bChans, u16 availPiers, u16 tPdGainOverlap, u16 pPdGainBoundaries, u8 pPDADCValues, u16 numXpdGains)

Variables
const struct eeprom_ops	eep_def_ops
const struct eeprom_ops	eep_4k_ops
const struct eeprom_ops	eep_ar9287_ops
const struct eeprom_ops	eep_ar9300_ops

Macro Definition Documentation

◆ AR_EEPROM_MODAL_SPURS

#define AR_EEPROM_MODAL_SPURS 5

Definition at line 26 of file eeprom.h.

Referenced by ar5008_hw_spur_mitigate(), ar9002_hw_spur_mitigate(), ar9003_hw_spur_mitigate_ofdm(), ath9k_hw_4k_check_eeprom(), ath9k_hw_ar9287_check_eeprom(), ath9k_hw_def_check_eeprom(), and ath9k_hw_init_config().

◆ AR5416_EEPROM_MAGIC

#define AR5416_EEPROM_MAGIC 0x5aa5

Definition at line 32 of file eeprom.h.

Referenced by ath9k_hw_4k_check_eeprom(), ath9k_hw_ar9287_check_eeprom(), and ath9k_hw_def_check_eeprom().

◆ CTRY_DEBUG

#define CTRY_DEBUG 0x1ff

Definition at line 37 of file eeprom.h.

◆ CTRY_DEFAULT

#define CTRY_DEFAULT 0

Definition at line 38 of file eeprom.h.

Referenced by ath9k_hw_init_defaults().

◆ AR_EEPROM_EEPCAP_COMPRESS_DIS

#define AR_EEPROM_EEPCAP_COMPRESS_DIS 0x0001

Definition at line 40 of file eeprom.h.

◆ AR_EEPROM_EEPCAP_AES_DIS

#define AR_EEPROM_EEPCAP_AES_DIS 0x0002

Definition at line 41 of file eeprom.h.

◆ AR_EEPROM_EEPCAP_FASTFRAME_DIS

#define AR_EEPROM_EEPCAP_FASTFRAME_DIS 0x0004

Definition at line 42 of file eeprom.h.

◆ AR_EEPROM_EEPCAP_BURST_DIS

#define AR_EEPROM_EEPCAP_BURST_DIS 0x0008

Definition at line 43 of file eeprom.h.

◆ AR_EEPROM_EEPCAP_MAXQCU

#define AR_EEPROM_EEPCAP_MAXQCU 0x01F0

Definition at line 44 of file eeprom.h.

◆ AR_EEPROM_EEPCAP_MAXQCU_S

#define AR_EEPROM_EEPCAP_MAXQCU_S 4

Definition at line 45 of file eeprom.h.

◆ AR_EEPROM_EEPCAP_HEAVY_CLIP_EN

#define AR_EEPROM_EEPCAP_HEAVY_CLIP_EN 0x0200

Definition at line 46 of file eeprom.h.

◆ AR_EEPROM_EEPCAP_KC_ENTRIES

#define AR_EEPROM_EEPCAP_KC_ENTRIES 0xF000

Definition at line 47 of file eeprom.h.

◆ AR_EEPROM_EEPCAP_KC_ENTRIES_S

#define AR_EEPROM_EEPCAP_KC_ENTRIES_S 12

Definition at line 48 of file eeprom.h.

◆ AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND

#define AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040

Definition at line 50 of file eeprom.h.

◆ AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN

#define AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080

Definition at line 51 of file eeprom.h.

◆ AR_EEPROM_EEREGCAP_EN_KK_U2

#define AR_EEPROM_EEREGCAP_EN_KK_U2 0x0100

Definition at line 52 of file eeprom.h.

◆ AR_EEPROM_EEREGCAP_EN_KK_MIDBAND

#define AR_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200

Definition at line 53 of file eeprom.h.

◆ AR_EEPROM_EEREGCAP_EN_KK_U1_ODD

#define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400

Definition at line 54 of file eeprom.h.

◆ AR_EEPROM_EEREGCAP_EN_KK_NEW_11A

#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800

Definition at line 55 of file eeprom.h.

◆ AR_EEPROM_EEREGCAP_EN_KK_U1_ODD_PRE4_0

#define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD_PRE4_0 0x4000

Definition at line 57 of file eeprom.h.

◆ AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0

#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0 0x8000

Definition at line 58 of file eeprom.h.

◆ AR5416_EEPROM_MAGIC_OFFSET

#define AR5416_EEPROM_MAGIC_OFFSET 0x0

Definition at line 60 of file eeprom.h.

Referenced by ath9k_hw_4k_check_eeprom(), ath9k_hw_ar9287_check_eeprom(), and ath9k_hw_def_check_eeprom().

◆ AR5416_EEPROM_S

#define AR5416_EEPROM_S 2

Definition at line 61 of file eeprom.h.

Referenced by ath9k_hw_usb_gen_fill_eeprom(), and ath_pci_eeprom_read().

◆ AR5416_EEPROM_OFFSET

#define AR5416_EEPROM_OFFSET 0x2000

Definition at line 62 of file eeprom.h.

Referenced by ath9k_hw_usb_gen_fill_eeprom(), and ath_pci_eeprom_read().

◆ AR5416_EEPROM_MAX

#define AR5416_EEPROM_MAX 0xae0

Definition at line 63 of file eeprom.h.

◆ AR5416_EEPROM_START_ADDR

#define AR5416_EEPROM_START_ADDR (AR_SREV_9100(ah)) ? 0x1fff1000 : 0x503f1200

Definition at line 65 of file eeprom.h.

65#define AR5416_EEPROM_START_ADDR \

66 (AR_SREV_9100(ah)) ? 0x1fff1000 : 0x503f1200

◆ SD_NO_CTL

#define SD_NO_CTL 0xE0

Definition at line 68 of file eeprom.h.

Referenced by ar9003_hw_set_power_per_rate_table(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ NO_CTL

#define NO_CTL 0xff

Definition at line 69 of file eeprom.h.

Referenced by ath_regd_get_band_ctl().

◆ CTL_MODE_M

#define CTL_MODE_M 0xf

Definition at line 70 of file eeprom.h.

Referenced by ar9003_hw_set_power_per_rate_table(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ CTL_11A

#define CTL_11A 0

Definition at line 71 of file eeprom.h.

Referenced by ar9003_hw_set_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), ath9k_hw_set_def_power_per_rate_table(), and ath9k_regd_get_ctl().

◆ CTL_11B

#define CTL_11B 1

Definition at line 72 of file eeprom.h.

Referenced by ar9003_hw_set_power_per_rate_table(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), ath9k_hw_set_def_power_per_rate_table(), and ath9k_regd_get_ctl().

◆ CTL_11G

#define CTL_11G 2

Definition at line 73 of file eeprom.h.

Referenced by ar9003_hw_set_power_per_rate_table(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), ath9k_hw_set_def_power_per_rate_table(), and ath9k_regd_get_ctl().

◆ CTL_2GHT20

#define CTL_2GHT20 5

Definition at line 74 of file eeprom.h.

Referenced by ar9003_hw_set_power_per_rate_table(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ CTL_5GHT20

#define CTL_5GHT20 6

Definition at line 75 of file eeprom.h.

Referenced by ar9003_hw_set_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ CTL_2GHT40

#define CTL_2GHT40 7

Definition at line 76 of file eeprom.h.

Referenced by ar9003_hw_set_power_per_rate_table(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ CTL_5GHT40

#define CTL_5GHT40 8

Definition at line 77 of file eeprom.h.

Referenced by ar9003_hw_set_power_per_rate_table(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ EXT_ADDITIVE

#define EXT_ADDITIVE (0x8000)

Definition at line 79 of file eeprom.h.

◆ CTL_11A_EXT

#define CTL_11A_EXT (CTL_11A | EXT_ADDITIVE)

Definition at line 80 of file eeprom.h.

◆ CTL_11G_EXT

#define CTL_11G_EXT (CTL_11G | EXT_ADDITIVE)

Definition at line 81 of file eeprom.h.

◆ CTL_11B_EXT

#define CTL_11B_EXT (CTL_11B | EXT_ADDITIVE)

Definition at line 82 of file eeprom.h.

◆ SUB_NUM_CTL_MODES_AT_5G_40

#define SUB_NUM_CTL_MODES_AT_5G_40 2

Definition at line 84 of file eeprom.h.

◆ SUB_NUM_CTL_MODES_AT_2G_40

#define SUB_NUM_CTL_MODES_AT_2G_40 3

Definition at line 85 of file eeprom.h.

◆ INCREASE_MAXPOW_BY_TWO_CHAIN

#define INCREASE_MAXPOW_BY_TWO_CHAIN 6 /* 10*log10(2)*2 */

Definition at line 87 of file eeprom.h.

Referenced by ath9k_hw_def_set_txpower(), and ath9k_hw_update_regulatory_maxpower().

◆ INCREASE_MAXPOW_BY_THREE_CHAIN

#define INCREASE_MAXPOW_BY_THREE_CHAIN 10 /* 10*log10(3)*2 */

Definition at line 88 of file eeprom.h.

Referenced by ath9k_hw_def_set_txpower(), and ath9k_hw_update_regulatory_maxpower().

◆ AR9285_RDEXT_DEFAULT

#define AR9285_RDEXT_DEFAULT 0x1F

Definition at line 100 of file eeprom.h.

Referenced by ath9k_hw_fill_cap_info().

◆ ATH9K_POW_SM

#define ATH9K_POW_SM	(		_r,
			_s )

Value:

(((_r) & 0x3f) << (_s))

Definition at line 102 of file eeprom.h.

Referenced by ath9k_hw_4k_set_txpower(), ath9k_hw_ar9287_set_txpower(), and ath9k_hw_def_set_txpower().

◆ FREQ2FBIN

#define FREQ2FBIN	(		x,
			y )

Value:

((y) ? ((x) - 2300) : (((x) - 4800) / 5))

y

static unsigned int unsigned int y

Definition pixbuf.h:63

x

static unsigned int x

Definition pixbuf.h:63

Definition at line 103 of file eeprom.h.

Referenced by ar9287_eeprom_get_tx_gain_index(), ath9k_get_txgain_index(), ath9k_hw_def_set_addac(), and ath9k_hw_get_gain_boundaries_pdadcs().

◆ ath9k_hw_use_flash

#define ath9k_hw_use_flash ( _ah )

Value:

(!(_ah->ah_flags & AH_USE_EEPROM))

AH_USE_EEPROM

#define AH_USE_EEPROM

Definition hw.h:654

Definition at line 104 of file eeprom.h.

Referenced by ar9300_eeprom_restore_internal(), ath9k_hw_4k_check_eeprom(), ath9k_hw_4k_fill_eeprom(), ath9k_hw_ar9287_check_eeprom(), ath9k_hw_ar9287_fill_eeprom(), ath9k_hw_def_check_eeprom(), and ath9k_hw_def_fill_eeprom().

◆ AR5416_VER_MASK

#define AR5416_VER_MASK (eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK)

Definition at line 106 of file eeprom.h.

Referenced by ath9k_hw_def_get_eeprom(), ath9k_hw_def_set_board_values(), and ath9k_hw_def_set_gain().

◆ OLC_FOR_AR9280_20_LATER

#define OLC_FOR_AR9280_20_LATER

Value:

(AR_SREV_9280_20_OR_LATER(ah) && \

ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))

EEP_OL_PWRCTRL

@ EEP_OL_PWRCTRL

Definition eeprom.h:246

AR_SREV_9280_20_OR_LATER

#define AR_SREV_9280_20_OR_LATER(_ah)

Definition reg.h:825

ah

uint8_t ah

Definition registers.h:1

Definition at line 107 of file eeprom.h.

107#define OLC_FOR_AR9280_20_LATER (AR_SREV_9280_20_OR_LATER(ah) && \

108 ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))

Referenced by ar9002_hw_olc_temp_compensation(), ar9002_olc_init(), ath9k_hw_def_set_txpower(), and ath9k_hw_set_def_power_cal_table().

◆ OLC_FOR_AR9287_10_LATER

#define OLC_FOR_AR9287_10_LATER

Value:

(AR_SREV_9287_11_OR_LATER(ah) && \

ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))

AR_SREV_9287_11_OR_LATER

#define AR_SREV_9287_11_OR_LATER(_ah)

Definition reg.h:837

Definition at line 109 of file eeprom.h.

109#define OLC_FOR_AR9287_10_LATER (AR_SREV_9287_11_OR_LATER(ah) && \

110 ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))

Referenced by ar9002_hw_olc_temp_compensation(), and ar9002_olc_init().

◆ AR_EEPROM_RFSILENT_GPIO_SEL

#define AR_EEPROM_RFSILENT_GPIO_SEL 0x001c

Definition at line 112 of file eeprom.h.

◆ AR_EEPROM_RFSILENT_GPIO_SEL_S

#define AR_EEPROM_RFSILENT_GPIO_SEL_S 2

Definition at line 113 of file eeprom.h.

◆ AR_EEPROM_RFSILENT_POLARITY

#define AR_EEPROM_RFSILENT_POLARITY 0x0002

Definition at line 114 of file eeprom.h.

◆ AR_EEPROM_RFSILENT_POLARITY_S

#define AR_EEPROM_RFSILENT_POLARITY_S 1

Definition at line 115 of file eeprom.h.

◆ EEP_RFSILENT_ENABLED

#define EEP_RFSILENT_ENABLED 0x0001

Definition at line 117 of file eeprom.h.

Referenced by ath9k_hw_fill_cap_info().

◆ EEP_RFSILENT_ENABLED_S

#define EEP_RFSILENT_ENABLED_S 0

Definition at line 118 of file eeprom.h.

◆ EEP_RFSILENT_POLARITY

#define EEP_RFSILENT_POLARITY 0x0002

Definition at line 119 of file eeprom.h.

Referenced by ath9k_hw_fill_cap_info().

◆ EEP_RFSILENT_POLARITY_S

#define EEP_RFSILENT_POLARITY_S 1

Definition at line 120 of file eeprom.h.

◆ EEP_RFSILENT_GPIO_SEL

#define EEP_RFSILENT_GPIO_SEL 0x001c

Definition at line 121 of file eeprom.h.

Referenced by ath9k_hw_fill_cap_info().

◆ EEP_RFSILENT_GPIO_SEL_S

#define EEP_RFSILENT_GPIO_SEL_S 2

Definition at line 122 of file eeprom.h.

◆ AR5416_OPFLAGS_11A

#define AR5416_OPFLAGS_11A 0x01

Definition at line 124 of file eeprom.h.

Referenced by ath9k_hw_fill_cap_info().

◆ AR5416_OPFLAGS_11G

#define AR5416_OPFLAGS_11G 0x02

Definition at line 125 of file eeprom.h.

Referenced by ath9k_hw_fill_cap_info().

◆ AR5416_OPFLAGS_N_5G_HT40

#define AR5416_OPFLAGS_N_5G_HT40 0x04

Definition at line 126 of file eeprom.h.

◆ AR5416_OPFLAGS_N_2G_HT40

#define AR5416_OPFLAGS_N_2G_HT40 0x08

Definition at line 127 of file eeprom.h.

◆ AR5416_OPFLAGS_N_5G_HT20

#define AR5416_OPFLAGS_N_5G_HT20 0x10

Definition at line 128 of file eeprom.h.

◆ AR5416_OPFLAGS_N_2G_HT20

#define AR5416_OPFLAGS_N_2G_HT20 0x20

Definition at line 129 of file eeprom.h.

◆ AR5416_EEP_NO_BACK_VER

#define AR5416_EEP_NO_BACK_VER 0x1

Definition at line 131 of file eeprom.h.

Referenced by ath9k_hw_4k_check_eeprom(), ath9k_hw_ar9287_check_eeprom(), and ath9k_hw_def_check_eeprom().

◆ AR5416_EEP_VER

#define AR5416_EEP_VER 0xE

Definition at line 132 of file eeprom.h.

Referenced by ath9k_hw_4k_check_eeprom(), and ath9k_hw_def_check_eeprom().

◆ AR5416_EEP_VER_MINOR_MASK

#define AR5416_EEP_VER_MINOR_MASK 0x0FFF

Definition at line 133 of file eeprom.h.

Referenced by ath9k_hw_4k_get_eeprom(), ath9k_hw_4k_set_board_values(), ath9k_hw_4k_set_gain(), ath9k_hw_4k_set_txpower(), ath9k_hw_def_set_txpower(), ath9k_hw_set_4k_power_cal_table(), and ath9k_hw_set_def_power_cal_table().

◆ AR5416_EEP_MINOR_VER_2

#define AR5416_EEP_MINOR_VER_2 0x2

Definition at line 134 of file eeprom.h.

Referenced by ath9k_hw_4k_set_board_values(), ath9k_hw_4k_set_txpower(), ath9k_hw_def_set_board_values(), ath9k_hw_def_set_txpower(), ath9k_hw_set_4k_power_cal_table(), and ath9k_hw_set_def_power_cal_table().

◆ AR5416_EEP_MINOR_VER_3

#define AR5416_EEP_MINOR_VER_3 0x3

Definition at line 135 of file eeprom.h.

Referenced by ath9k_hw_4k_set_board_values(), ath9k_hw_4k_set_gain(), ath9k_hw_def_set_board_values(), and ath9k_hw_def_set_gain().

◆ AR5416_EEP_MINOR_VER_7

#define AR5416_EEP_MINOR_VER_7 0x7

Definition at line 136 of file eeprom.h.

Referenced by ath9k_hw_4k_set_addac(), and ath9k_hw_def_set_addac().

◆ AR5416_EEP_MINOR_VER_9

#define AR5416_EEP_MINOR_VER_9 0x9

Definition at line 137 of file eeprom.h.

◆ AR5416_EEP_MINOR_VER_16

#define AR5416_EEP_MINOR_VER_16 0x10

Definition at line 138 of file eeprom.h.

Referenced by ath9k_hw_fill_cap_info().

◆ AR5416_EEP_MINOR_VER_17

#define AR5416_EEP_MINOR_VER_17 0x11

Definition at line 139 of file eeprom.h.

Referenced by ar9280_20_hw_init_rxgain_ini().

◆ AR5416_EEP_MINOR_VER_19

#define AR5416_EEP_MINOR_VER_19 0x13

Definition at line 140 of file eeprom.h.

Referenced by ar9280_20_hw_init_txgain_ini(), ath9k_hw_4k_get_eeprom(), ath9k_hw_def_get_eeprom(), and ath9k_hw_def_set_board_values().

◆ AR5416_EEP_MINOR_VER_20

#define AR5416_EEP_MINOR_VER_20 0x14

Definition at line 141 of file eeprom.h.

Referenced by ath9k_hw_def_get_eeprom(), and ath9k_hw_def_set_board_values().

◆ AR5416_EEP_MINOR_VER_21

#define AR5416_EEP_MINOR_VER_21 0x15

Definition at line 142 of file eeprom.h.

Referenced by ath9k_hw_def_get_eeprom().

◆ AR5416_EEP_MINOR_VER_22

#define AR5416_EEP_MINOR_VER_22 0x16

Definition at line 143 of file eeprom.h.

Referenced by ath9k_hw_def_get_eeprom().

◆ AR5416_NUM_5G_CAL_PIERS

#define AR5416_NUM_5G_CAL_PIERS 8

Definition at line 145 of file eeprom.h.

Referenced by ath9k_hw_set_def_power_cal_table().

◆ AR5416_NUM_2G_CAL_PIERS

#define AR5416_NUM_2G_CAL_PIERS 4

Definition at line 146 of file eeprom.h.

Referenced by ath9k_hw_set_def_power_cal_table().

◆ AR5416_NUM_5G_20_TARGET_POWERS

#define AR5416_NUM_5G_20_TARGET_POWERS 8

Definition at line 147 of file eeprom.h.

Referenced by ath9k_hw_set_def_power_per_rate_table().

◆ AR5416_NUM_5G_40_TARGET_POWERS

#define AR5416_NUM_5G_40_TARGET_POWERS 8

Definition at line 148 of file eeprom.h.

Referenced by ath9k_hw_set_def_power_per_rate_table().

◆ AR5416_NUM_2G_CCK_TARGET_POWERS

#define AR5416_NUM_2G_CCK_TARGET_POWERS 3

Definition at line 149 of file eeprom.h.

Referenced by ath9k_hw_set_4k_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ AR5416_NUM_2G_20_TARGET_POWERS

#define AR5416_NUM_2G_20_TARGET_POWERS 4

Definition at line 150 of file eeprom.h.

Referenced by ath9k_hw_set_4k_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ AR5416_NUM_2G_40_TARGET_POWERS

#define AR5416_NUM_2G_40_TARGET_POWERS 4

Definition at line 151 of file eeprom.h.

Referenced by ath9k_hw_set_4k_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ AR5416_NUM_CTLS

#define AR5416_NUM_CTLS 24

Definition at line 152 of file eeprom.h.

Referenced by ath9k_hw_set_def_power_per_rate_table().

◆ AR5416_NUM_BAND_EDGES

#define AR5416_NUM_BAND_EDGES 8

Definition at line 153 of file eeprom.h.

Referenced by ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ AR5416_NUM_PD_GAINS

#define AR5416_NUM_PD_GAINS 4

Definition at line 154 of file eeprom.h.

Referenced by ath9k_hw_get_gain_boundaries_pdadcs(), ath9k_hw_set_ar9287_power_cal_table(), and ath9k_hw_set_def_power_cal_table().

◆ AR5416_PD_GAINS_IN_MASK

#define AR5416_PD_GAINS_IN_MASK 4

Definition at line 155 of file eeprom.h.

Referenced by ath9k_hw_get_gain_boundaries_pdadcs(), ath9k_hw_set_4k_power_cal_table(), ath9k_hw_set_ar9287_power_cal_table(), and ath9k_hw_set_def_power_cal_table().

◆ AR5416_PD_GAIN_ICEPTS

#define AR5416_PD_GAIN_ICEPTS 5

Definition at line 156 of file eeprom.h.

Referenced by ath9k_hw_get_gain_boundaries_pdadcs().

◆ AR5416_NUM_PDADC_VALUES

#define AR5416_NUM_PDADC_VALUES 128

Definition at line 157 of file eeprom.h.

Referenced by ath9k_hw_get_gain_boundaries_pdadcs(), ath9k_hw_set_4k_power_cal_table(), ath9k_hw_set_ar9287_power_cal_table(), ath9k_hw_set_def_power_cal_table(), and ath9k_olc_get_pdadcs().

◆ AR5416_BCHAN_UNUSED

#define AR5416_BCHAN_UNUSED 0xFF

Definition at line 158 of file eeprom.h.

Referenced by ar9003_hw_get_max_edge_power(), ar9287_eeprom_get_tx_gain_index(), ath9k_get_txgain_index(), ath9k_hw_fbin2freq(), ath9k_hw_fbin2freq(), ath9k_hw_get_gain_boundaries_pdadcs(), ath9k_hw_get_legacy_target_powers(), ath9k_hw_get_max_edge_power(), and ath9k_hw_get_target_powers().

◆ AR5416_MAX_PWR_RANGE_IN_HALF_DB

#define AR5416_MAX_PWR_RANGE_IN_HALF_DB 64

Definition at line 159 of file eeprom.h.

Referenced by ath9k_hw_get_gain_boundaries_pdadcs().

◆ AR5416_MAX_CHAINS

#define AR5416_MAX_CHAINS 3

Definition at line 160 of file eeprom.h.

Referenced by ar9002_hw_adc_dccal_collect(), ar9002_hw_adc_gaincal_collect(), ar9002_hw_iqcal_collect(), ar9002_hw_per_calibration(), ar9003_hw_iqcal_collect(), ath9k_hw_def_check_eeprom(), ath9k_hw_def_set_board_values(), ath9k_hw_loadnf(), ath9k_hw_reset_calibration(), ath9k_hw_set_def_power_cal_table(), and ath9k_hw_update_nfcal_hist_buffer().

◆ AR9300_MAX_CHAINS

#define AR9300_MAX_CHAINS 3

Definition at line 161 of file eeprom.h.

◆ AR5416_PWR_TABLE_OFFSET_DB

#define AR5416_PWR_TABLE_OFFSET_DB -5

Definition at line 162 of file eeprom.h.

Referenced by ath9k_adjust_pdadc_values(), ath9k_change_gain_boundary_setting(), ath9k_hw_4k_get_eeprom(), ath9k_hw_4k_set_txpower(), and ath9k_hw_def_get_eeprom().

◆ AR5416_EEP_RXGAIN_23DB_BACKOFF

#define AR5416_EEP_RXGAIN_23DB_BACKOFF 0

Definition at line 165 of file eeprom.h.

Referenced by ar9280_20_hw_init_rxgain_ini().

◆ AR5416_EEP_RXGAIN_13DB_BACKOFF

#define AR5416_EEP_RXGAIN_13DB_BACKOFF 1

Definition at line 166 of file eeprom.h.

Referenced by ar9280_20_hw_init_rxgain_ini().

◆ AR5416_EEP_RXGAIN_ORIG

#define AR5416_EEP_RXGAIN_ORIG 2

Definition at line 167 of file eeprom.h.

◆ AR5416_EEP_TXGAIN_ORIGINAL

#define AR5416_EEP_TXGAIN_ORIGINAL 0

Definition at line 170 of file eeprom.h.

Referenced by ath9k_hw_4k_get_eeprom().

◆ AR5416_EEP_TXGAIN_HIGH_POWER

#define AR5416_EEP_TXGAIN_HIGH_POWER 1

Definition at line 171 of file eeprom.h.

Referenced by ar9002_hw_init_mode_gain_regs(), ar9280_20_hw_init_txgain_ini(), and ar9285_hw_pa_cal().

◆ AR5416_EEP4K_START_LOC

#define AR5416_EEP4K_START_LOC 64

Definition at line 173 of file eeprom.h.

◆ AR5416_EEP4K_NUM_2G_CAL_PIERS

#define AR5416_EEP4K_NUM_2G_CAL_PIERS 3

Definition at line 174 of file eeprom.h.

Referenced by ath9k_hw_set_4k_power_cal_table().

◆ AR5416_EEP4K_NUM_2G_CCK_TARGET_POWERS

#define AR5416_EEP4K_NUM_2G_CCK_TARGET_POWERS 3

Definition at line 175 of file eeprom.h.

◆ AR5416_EEP4K_NUM_2G_20_TARGET_POWERS

#define AR5416_EEP4K_NUM_2G_20_TARGET_POWERS 3

Definition at line 176 of file eeprom.h.

◆ AR5416_EEP4K_NUM_2G_40_TARGET_POWERS

#define AR5416_EEP4K_NUM_2G_40_TARGET_POWERS 3

Definition at line 177 of file eeprom.h.

◆ AR5416_EEP4K_NUM_CTLS

#define AR5416_EEP4K_NUM_CTLS 12

Definition at line 178 of file eeprom.h.

Referenced by ath9k_hw_set_4k_power_per_rate_table().

◆ AR5416_EEP4K_NUM_BAND_EDGES

#define AR5416_EEP4K_NUM_BAND_EDGES 4

Definition at line 179 of file eeprom.h.

Referenced by ath9k_hw_set_4k_power_per_rate_table().

◆ AR5416_EEP4K_NUM_PD_GAINS

#define AR5416_EEP4K_NUM_PD_GAINS 2

Definition at line 180 of file eeprom.h.

Referenced by ath9k_hw_set_4k_power_cal_table().

◆ AR5416_EEP4K_MAX_CHAINS

#define AR5416_EEP4K_MAX_CHAINS 1

Definition at line 181 of file eeprom.h.

Referenced by ath9k_hw_4k_check_eeprom(), and ath9k_hw_set_4k_power_cal_table().

◆ AR9280_TX_GAIN_TABLE_SIZE

#define AR9280_TX_GAIN_TABLE_SIZE 22

Definition at line 183 of file eeprom.h.

Referenced by ar9002_olc_init(), ar9280_hw_olc_temp_compensation(), and ath9k_get_txgain_index().

◆ AR9287_EEP_VER

#define AR9287_EEP_VER 0xE

Definition at line 185 of file eeprom.h.

Referenced by ath9k_hw_ar9287_check_eeprom().

◆ AR9287_EEP_VER_MINOR_MASK

#define AR9287_EEP_VER_MINOR_MASK 0xFFF

Definition at line 186 of file eeprom.h.

Referenced by ath9k_hw_ar9287_get_eeprom(), ath9k_hw_ar9287_set_txpower(), and ath9k_hw_set_ar9287_power_cal_table().

◆ AR9287_EEP_MINOR_VER_1

#define AR9287_EEP_MINOR_VER_1 0x1

Definition at line 187 of file eeprom.h.

◆ AR9287_EEP_MINOR_VER_2

#define AR9287_EEP_MINOR_VER_2 0x2

Definition at line 188 of file eeprom.h.

Referenced by ath9k_hw_ar9287_get_eeprom(), ath9k_hw_ar9287_set_txpower(), and ath9k_hw_set_ar9287_power_cal_table().

◆ AR9287_EEP_MINOR_VER_3

#define AR9287_EEP_MINOR_VER_3 0x3

Definition at line 189 of file eeprom.h.

Referenced by ath9k_hw_ar9287_get_eeprom().

◆ AR9287_EEP_MINOR_VER

#define AR9287_EEP_MINOR_VER AR9287_EEP_MINOR_VER_3

Definition at line 190 of file eeprom.h.

◆ AR9287_EEP_MINOR_VER_b

#define AR9287_EEP_MINOR_VER_b AR9287_EEP_MINOR_VER

Definition at line 191 of file eeprom.h.

◆ AR9287_EEP_NO_BACK_VER

#define AR9287_EEP_NO_BACK_VER AR9287_EEP_MINOR_VER_1

Definition at line 192 of file eeprom.h.

◆ AR9287_EEP_START_LOC

#define AR9287_EEP_START_LOC 128

Definition at line 194 of file eeprom.h.

Referenced by __ath9k_hw_ar9287_fill_eeprom().

◆ AR9287_HTC_EEP_START_LOC

#define AR9287_HTC_EEP_START_LOC 256

Definition at line 195 of file eeprom.h.

Referenced by __ath9k_hw_usb_ar9287_fill_eeprom().

◆ AR9287_NUM_2G_CAL_PIERS

#define AR9287_NUM_2G_CAL_PIERS 3

Definition at line 196 of file eeprom.h.

Referenced by ath9k_hw_set_ar9287_power_cal_table().

◆ AR9287_NUM_2G_CCK_TARGET_POWERS

#define AR9287_NUM_2G_CCK_TARGET_POWERS 3

Definition at line 197 of file eeprom.h.

Referenced by ath9k_hw_set_ar9287_power_per_rate_table().

◆ AR9287_NUM_2G_20_TARGET_POWERS

#define AR9287_NUM_2G_20_TARGET_POWERS 3

Definition at line 198 of file eeprom.h.

Referenced by ath9k_hw_set_ar9287_power_per_rate_table().

◆ AR9287_NUM_2G_40_TARGET_POWERS

#define AR9287_NUM_2G_40_TARGET_POWERS 3

Definition at line 199 of file eeprom.h.

Referenced by ath9k_hw_set_ar9287_power_per_rate_table().

◆ AR9287_NUM_CTLS

#define AR9287_NUM_CTLS 12

Definition at line 200 of file eeprom.h.

Referenced by ath9k_hw_set_ar9287_power_per_rate_table().

◆ AR9287_NUM_BAND_EDGES

#define AR9287_NUM_BAND_EDGES 4

Definition at line 201 of file eeprom.h.

◆ AR9287_PD_GAIN_ICEPTS

#define AR9287_PD_GAIN_ICEPTS 1

Definition at line 202 of file eeprom.h.

Referenced by ath9k_hw_get_gain_boundaries_pdadcs().

◆ AR9287_EEPMISC_BIG_ENDIAN

#define AR9287_EEPMISC_BIG_ENDIAN 0x01

Definition at line 203 of file eeprom.h.

◆ AR9287_EEPMISC_WOW

#define AR9287_EEPMISC_WOW 0x02

Definition at line 204 of file eeprom.h.

◆ AR9287_MAX_CHAINS

#define AR9287_MAX_CHAINS 2

Definition at line 205 of file eeprom.h.

Referenced by ath9k_hw_ar9287_check_eeprom(), ath9k_hw_ar9287_set_board_values(), and ath9k_hw_set_ar9287_power_cal_table().

◆ AR9287_ANT_16S

#define AR9287_ANT_16S 32

Definition at line 206 of file eeprom.h.

◆ AR9287_DATA_SZ

#define AR9287_DATA_SZ 32

Definition at line 208 of file eeprom.h.

◆ AR9287_PWR_TABLE_OFFSET_DB

#define AR9287_PWR_TABLE_OFFSET_DB -5

Definition at line 210 of file eeprom.h.

Referenced by ath9k_hw_ar9287_set_txpower(), and ath9k_hw_set_ar9287_power_cal_table().

◆ AR9287_CHECKSUM_LOCATION

#define AR9287_CHECKSUM_LOCATION (AR9287_EEP_START_LOC + 1)

Definition at line 212 of file eeprom.h.

◆ CTL_EDGE_TPOWER

#define CTL_EDGE_TPOWER ( _ctl )

Value:

((_ctl) & 0x3f)

Definition at line 214 of file eeprom.h.

Referenced by ar9003_hw_get_direct_edge_power(), ar9003_hw_get_indirect_edge_power(), and ath9k_hw_get_max_edge_power().

◆ CTL_EDGE_FLAGS

#define CTL_EDGE_FLAGS ( _ctl )

Value:

(((_ctl) >> 6) & 0x03)

Definition at line 215 of file eeprom.h.

Referenced by ar9003_hw_get_indirect_edge_power(), and ath9k_hw_get_max_edge_power().

◆ LNA_CTL_BUF_MODE

#define LNA_CTL_BUF_MODE BIT(0)

Definition at line 217 of file eeprom.h.

◆ LNA_CTL_ISEL_LO

#define LNA_CTL_ISEL_LO BIT(1)

Definition at line 218 of file eeprom.h.

◆ LNA_CTL_ISEL_HI

#define LNA_CTL_ISEL_HI BIT(2)

Definition at line 219 of file eeprom.h.

◆ LNA_CTL_BUF_IN

#define LNA_CTL_BUF_IN BIT(3)

Definition at line 220 of file eeprom.h.

◆ LNA_CTL_FEM_BAND

#define LNA_CTL_FEM_BAND BIT(4)

Definition at line 221 of file eeprom.h.

◆ LNA_CTL_LOCAL_BIAS

#define LNA_CTL_LOCAL_BIAS BIT(5)

Definition at line 222 of file eeprom.h.

Referenced by ath9k_hw_def_set_board_values().

◆ LNA_CTL_FORCE_XPA

#define LNA_CTL_FORCE_XPA BIT(6)

Definition at line 223 of file eeprom.h.

Referenced by ath9k_hw_def_set_board_values().

◆ LNA_CTL_USE_ANT1

#define LNA_CTL_USE_ANT1 BIT(7)

Definition at line 224 of file eeprom.h.

◆ EEP_4K_BB_DESIRED_SCALE_MASK

#define EEP_4K_BB_DESIRED_SCALE_MASK 0x1f

Definition at line 447 of file eeprom.h.

Referenced by ath9k_hw_4k_set_board_values().

◆ ar5416_get_ntxchains

#define ar5416_get_ntxchains ( _txchainmask )

Value:

(((_txchainmask >> 2) & 1) + \

((_txchainmask >> 1) & 1) + (_txchainmask & 1))

Definition at line 707 of file eeprom.h.

#define ar5416_get_ntxchains(_txchainmask)                      \
        (((_txchainmask >> 2) & 1) +                            \
         ((_txchainmask >> 1) & 1) + (_txchainmask & 1))

Referenced by ar9003_hw_set_power_per_rate_table(), ath9k_hw_def_set_txpower(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), ath9k_hw_set_def_power_per_rate_table(), and ath9k_hw_update_regulatory_maxpower().

Enumeration Type Documentation

◆ eeprom_param

enum eeprom_param

Enumerator
EEP_NFTHRESH_5
EEP_NFTHRESH_2
EEP_MAC_MSW
EEP_MAC_MID
EEP_MAC_LSW
EEP_REG_0
EEP_REG_1
EEP_OP_CAP
EEP_OP_MODE
EEP_RF_SILENT
EEP_OB_5
EEP_DB_5
EEP_OB_2
EEP_DB_2
EEP_MINOR_REV
EEP_TX_MASK
EEP_RX_MASK
EEP_FSTCLK_5G
EEP_RXGAIN_TYPE
EEP_OL_PWRCTRL
EEP_TXGAIN_TYPE
EEP_RC_CHAIN_MASK
EEP_DAC_HPWR_5G
EEP_FRAC_N_5G
EEP_DEV_TYPE
EEP_TEMPSENSE_SLOPE
EEP_TEMPSENSE_SLOPE_PAL_ON
EEP_PWR_TABLE_OFFSET
EEP_DRIVE_STRENGTH
EEP_INTERNAL_REGULATOR
EEP_SWREG
EEP_PAPRD
EEP_MODAL_VER
EEP_ANT_DIV_CTL1
EEP_CHAIN_MASK_REDUCE

Definition at line 226 of file eeprom.h.

                  {
        EEP_NFTHRESH_5,
        EEP_NFTHRESH_2,
        EEP_MAC_MSW,
        EEP_MAC_MID,
        EEP_MAC_LSW,
        EEP_REG_0,
        EEP_REG_1,
        EEP_OP_CAP,
        EEP_OP_MODE,
        EEP_RF_SILENT,
        EEP_OB_5,
        EEP_DB_5,
        EEP_OB_2,
        EEP_DB_2,
        EEP_MINOR_REV,
        EEP_TX_MASK,
        EEP_RX_MASK,
        EEP_FSTCLK_5G,
        EEP_RXGAIN_TYPE,
        EEP_OL_PWRCTRL,
        EEP_TXGAIN_TYPE,
        EEP_RC_CHAIN_MASK,
        EEP_DAC_HPWR_5G,
        EEP_FRAC_N_5G,
        EEP_DEV_TYPE,
        EEP_TEMPSENSE_SLOPE,
        EEP_TEMPSENSE_SLOPE_PAL_ON,
        EEP_PWR_TABLE_OFFSET,
        EEP_DRIVE_STRENGTH,
        EEP_INTERNAL_REGULATOR,
        EEP_SWREG,
        EEP_PAPRD,
        EEP_MODAL_VER,
        EEP_ANT_DIV_CTL1,
        EEP_CHAIN_MASK_REDUCE
};

◆ ar5416_rates

enum ar5416_rates

Enumerator
rate6mb
rate9mb
rate12mb
rate18mb
rate24mb
rate36mb
rate48mb
rate54mb
rate1l
rate2l
rate2s
rate5_5l
rate5_5s
rate11l
rate11s
rateXr
rateHt20_0
rateHt20_1
rateHt20_2
rateHt20_3
rateHt20_4
rateHt20_5
rateHt20_6
rateHt20_7
rateHt40_0
rateHt40_1
rateHt40_2
rateHt40_3
rateHt40_4
rateHt40_5
rateHt40_6
rateHt40_7
rateDupCck
rateDupOfdm
rateExtCck
rateExtOfdm
Ar5416RateSize

Definition at line 264 of file eeprom.h.

                  {
        rate6mb, rate9mb, rate12mb, rate18mb,
        rate24mb, rate36mb, rate48mb, rate54mb,
        rate1l, rate2l, rate2s, rate5_5l,
        rate5_5s, rate11l, rate11s, rateXr,
        rateHt20_0, rateHt20_1, rateHt20_2, rateHt20_3,
        rateHt20_4, rateHt20_5, rateHt20_6, rateHt20_7,
        rateHt40_0, rateHt40_1, rateHt40_2, rateHt40_3,
        rateHt40_4, rateHt40_5, rateHt40_6, rateHt40_7,
        rateDupCck, rateDupOfdm, rateExtCck, rateExtOfdm,
        Ar5416RateSize
};

◆ ath9k_hal_freq_band

enum ath9k_hal_freq_band

Enumerator
ATH9K_HAL_FREQ_BAND_5GHZ
ATH9K_HAL_FREQ_BAND_2GHZ

Definition at line 277 of file eeprom.h.

                         {
        ATH9K_HAL_FREQ_BAND_5GHZ = 0,
        ATH9K_HAL_FREQ_BAND_2GHZ = 1
};

◆ reg_ext_bitmap

enum reg_ext_bitmap

Enumerator
REG_EXT_FCC_MIDBAND
REG_EXT_JAPAN_MIDBAND
REG_EXT_FCC_DFS_HT40
REG_EXT_JAPAN_NONDFS_HT40
REG_EXT_JAPAN_DFS_HT40

Definition at line 636 of file eeprom.h.

                    {
        REG_EXT_FCC_MIDBAND = 0,
        REG_EXT_JAPAN_MIDBAND = 1,
        REG_EXT_FCC_DFS_HT40 = 2,
        REG_EXT_JAPAN_NONDFS_HT40 = 3,
        REG_EXT_JAPAN_DFS_HT40 = 4
};

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( BSD2 )

◆ FILE_SECBOOT()

FILE_SECBOOT ( FORBIDDEN )

◆ ath9k_hw_analog_shift_regwrite()

void ath9k_hw_analog_shift_regwrite	(	struct ath_hw *	ah,
		u32	reg,
		u32	val )

Definition at line 34 of file ath9k_eeprom.c.

{
        REG_WRITE(ah, reg, val);
 
        if (ah->config.analog_shiftreg)
                udelay(100);
}

References ah, reg, REG_WRITE, u32, udelay(), and val.

Referenced by ath9k_hw_ar9287_set_board_values().

◆ ath9k_hw_analog_shift_rmw()

void ath9k_hw_analog_shift_rmw	(	struct ath_hw *	ah,
		u32	reg,
		u32	mask,
		u32	shift,
		u32	val )

Definition at line 42 of file ath9k_eeprom.c.

{
        u32 regVal;
 
        regVal = REG_READ(ah, reg) & ~mask;
        regVal |= (val << shift) & mask;
 
        REG_WRITE(ah, reg, regVal);
 
        if (ah->config.analog_shiftreg)
                udelay(100);
}

References ah, reg, REG_READ, REG_WRITE, u32, udelay(), and val.

Referenced by ar9002_olc_init(), ath9k_hw_4k_set_board_values(), ath9k_hw_ar9287_set_board_values(), and ath9k_hw_def_set_board_values().

◆ ath9k_hw_interpolate()

int16_t ath9k_hw_interpolate	(	u16	target,
		u16	srcLeft,
		u16	srcRight,
		int16_t	targetLeft,
		int16_t	targetRight )

Definition at line 56 of file ath9k_eeprom.c.

{
        int16_t rv;
 
        if (srcRight == srcLeft) {
                rv = targetLeft;
        } else {
                rv = (int16_t) (((target - srcLeft) * targetRight +
                                 (srcRight - target) * targetLeft) /
                                (srcRight - srcLeft));
        }
        return rv;
}

References u16.

Referenced by ath9k_hw_get_gain_boundaries_pdadcs(), ath9k_hw_get_legacy_target_powers(), and ath9k_hw_get_target_powers().

◆ ath9k_hw_get_lower_upper_index()

int ath9k_hw_get_lower_upper_index	(	u8	target,
		u8 *	pList,
		u16	listSize,
		u16 *	indexL,
		u16 *	indexR )

Definition at line 71 of file ath9k_eeprom.c.

{
        u16 i;
 
        if (target <= pList[0]) {
                *indexL = *indexR = 0;
                return 1;
        }
        if (target >= pList[listSize - 1]) {
                *indexL = *indexR = (u16) (listSize - 1);
                return 1;
        }
 
        for (i = 0; i < listSize - 1; i++) {
                if (pList[i] == target) {
                        *indexL = *indexR = i;
                        return 1;
                }
                if (target < pList[i + 1]) {
                        *indexL = i;
                        *indexR = (u16) (i + 1);
                        return 0;
                }
        }
        return 0;
}

References u16, and u8.

Referenced by ar9287_eeprom_get_tx_gain_index(), ath9k_get_txgain_index(), ath9k_hw_fill_vpd_table(), and ath9k_hw_get_gain_boundaries_pdadcs().

◆ ath9k_hw_nvram_read()

int ath9k_hw_nvram_read	(	struct ath_common *	common,
		u32	off,
		u16 *	data )

Definition at line 131 of file ath9k_eeprom.c.

{
        return common->bus_ops->eeprom_read(common, off, data);
}

References common, data, u16, and u32.

Referenced by __ath9k_hw_4k_fill_eeprom(), __ath9k_hw_ar9287_fill_eeprom(), __ath9k_hw_def_fill_eeprom(), ar9300_eeprom_read_byte(), ar9300_eeprom_read_word(), ar9300_eeprom_restore_flash(), ath9k_hw_4k_check_eeprom(), ath9k_hw_ar9287_check_eeprom(), and ath9k_hw_def_check_eeprom().

◆ ath9k_hw_usb_gen_fill_eeprom()

void ath9k_hw_usb_gen_fill_eeprom	(	struct ath_hw *	ah,
		u16 *	eep_data,
		int	eep_start_loc,
		int	size )

Definition at line 99 of file ath9k_eeprom.c.

{
        int i = 0, j, addr;
        u32 addrdata[8];
        u32 data[8];
 
        for (addr = 0; addr < size; addr++) {
                addrdata[i] = AR5416_EEPROM_OFFSET +
                        ((addr + eep_start_loc) << AR5416_EEPROM_S);
                i++;
                if (i == 8) {
                        REG_READ_MULTI(ah, addrdata, data, i);
 
                        for (j = 0; j < i; j++) {
                                *eep_data = data[j];
                                eep_data++;
                        }
                        i = 0;
                }
        }
 
        if (i != 0) {
                REG_READ_MULTI(ah, addrdata, data, i);
 
                for (j = 0; j < i; j++) {
                        *eep_data = data[j];
                        eep_data++;
                }
        }
}

References addr, ah, AR5416_EEPROM_OFFSET, AR5416_EEPROM_S, data, REG_READ_MULTI, size, u16, and u32.

Referenced by __ath9k_hw_usb_4k_fill_eeprom(), __ath9k_hw_usb_ar9287_fill_eeprom(), and __ath9k_hw_usb_def_fill_eeprom().

◆ ath9k_hw_fill_vpd_table()

void ath9k_hw_fill_vpd_table	(	u8	pwrMin,
		u8	pwrMax,
		u8 *	pPwrList,
		u8 *	pVpdList,
		u16	numIntercepts,
		u8 *	pRetVpdList )

Definition at line 136 of file ath9k_eeprom.c.

{
        u16 i, k;
        u8 currPwr = pwrMin;
        u16 idxL = 0, idxR = 0;
 
        for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) {
                ath9k_hw_get_lower_upper_index(currPwr, pPwrList,
                                               numIntercepts, &(idxL),
                                               &(idxR));
                if (idxR < 1)
                        idxR = 1;
                if (idxL == numIntercepts - 1)
                        idxL = (u16) (numIntercepts - 2);
                if (pPwrList[idxL] == pPwrList[idxR])
                        k = pVpdList[idxL];
                else
                        k = (u16)(((currPwr - pPwrList[idxL]) * pVpdList[idxR] +
                                   (pPwrList[idxR] - currPwr) * pVpdList[idxL]) /
                                  (pPwrList[idxR] - pPwrList[idxL]));
                pRetVpdList[i] = (u8) k;
                currPwr += 2;
        }
}

References ath9k_hw_get_lower_upper_index(), k, u16, and u8.

Referenced by ath9k_hw_get_gain_boundaries_pdadcs().

◆ ath9k_hw_get_legacy_target_powers()

void ath9k_hw_get_legacy_target_powers	(	struct ath_hw *	ah,
		struct ath9k_channel *	chan,
		struct cal_target_power_leg *	powInfo,
		u16	numChannels,
		struct cal_target_power_leg *	pNewPower,
		u16	numRates,
		int	isExtTarget )

Definition at line 163 of file ath9k_eeprom.c.

{
        struct chan_centers centers;
        u16 clo, chi;
        int i;
        int matchIndex = -1, lowIndex = -1;
        u16 freq;
 
        ath9k_hw_get_channel_centers(ah, chan, &centers);
        freq = (isExtTarget) ? centers.ext_center : centers.ctl_center;
 
        if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel,
                                       IS_CHAN_2GHZ(chan))) {
                matchIndex = 0;
        } else {
                for (i = 0; (i < numChannels) &&
                             (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
                        if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
                                                       IS_CHAN_2GHZ(chan))) {
                                matchIndex = i;
                                break;
                        } else if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
                                                IS_CHAN_2GHZ(chan)) && i > 0 &&
                                   freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
                                                IS_CHAN_2GHZ(chan))) {
                                lowIndex = i - 1;
                                break;
                        }
                }
                if ((matchIndex == -1) && (lowIndex == -1))
                        matchIndex = i - 1;
        }
 
        if (matchIndex != -1) {
                *pNewPower = powInfo[matchIndex];
        } else {
                clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
                                         IS_CHAN_2GHZ(chan));
                chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
                                         IS_CHAN_2GHZ(chan));
 
                for (i = 0; i < numRates; i++) {
                        pNewPower->tPow2x[i] =
                                (u8)ath9k_hw_interpolate(freq, clo, chi,
                                                powInfo[lowIndex].tPow2x[i],
                                                powInfo[lowIndex + 1].tPow2x[i]);
                }
        }
}

References ah, AR5416_BCHAN_UNUSED, ath9k_hw_fbin2freq(), ath9k_hw_get_channel_centers(), ath9k_hw_interpolate(), cal_target_power_leg::bChannel, chan_centers::ctl_center, chan_centers::ext_center, IS_CHAN_2GHZ, cal_target_power_leg::tPow2x, tPow2x, u16, and u8.

Referenced by ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ ath9k_hw_get_target_powers()

void ath9k_hw_get_target_powers	(	struct ath_hw *	ah,
		struct ath9k_channel *	chan,
		struct cal_target_power_ht *	powInfo,
		u16	numChannels,
		struct cal_target_power_ht *	pNewPower,
		u16	numRates,
		int	isHt40Target )

Definition at line 218 of file ath9k_eeprom.c.

{
        struct chan_centers centers;
        u16 clo, chi;
        int i;
        int matchIndex = -1, lowIndex = -1;
        u16 freq;
 
        ath9k_hw_get_channel_centers(ah, chan, &centers);
        freq = isHt40Target ? centers.synth_center : centers.ctl_center;
 
        if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) {
                matchIndex = 0;
        } else {
                for (i = 0; (i < numChannels) &&
                             (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
                        if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
                                                       IS_CHAN_2GHZ(chan))) {
                                matchIndex = i;
                                break;
                        } else
                                if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
                                                IS_CHAN_2GHZ(chan)) && i > 0 &&
                                    freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
                                                IS_CHAN_2GHZ(chan))) {
                                        lowIndex = i - 1;
                                        break;
                                }
                }
                if ((matchIndex == -1) && (lowIndex == -1))
                        matchIndex = i - 1;
        }
 
        if (matchIndex != -1) {
                *pNewPower = powInfo[matchIndex];
        } else {
                clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
                                         IS_CHAN_2GHZ(chan));
                chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
                                         IS_CHAN_2GHZ(chan));
 
                for (i = 0; i < numRates; i++) {
                        pNewPower->tPow2x[i] = (u8)ath9k_hw_interpolate(freq,
                                                clo, chi,
                                                powInfo[lowIndex].tPow2x[i],
                                                powInfo[lowIndex + 1].tPow2x[i]);
                }
        }
}

References ah, AR5416_BCHAN_UNUSED, ath9k_hw_fbin2freq(), ath9k_hw_get_channel_centers(), ath9k_hw_interpolate(), cal_target_power_ht::bChannel, chan_centers::ctl_center, IS_CHAN_2GHZ, chan_centers::synth_center, cal_target_power_ht::tPow2x, tPow2x, u16, and u8.

Referenced by ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ ath9k_hw_get_max_edge_power()

u16 ath9k_hw_get_max_edge_power	(	u16	freq,
		struct cal_ctl_edges *	pRdEdgesPower,
		int	is2GHz,
		int	num_band_edges )

Definition at line 273 of file ath9k_eeprom.c.

{
        u16 twiceMaxEdgePower = MAX_RATE_POWER;
        int i;
 
        for (i = 0; (i < num_band_edges) &&
                     (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
                if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
                        twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl);
                        break;
                } else if ((i > 0) &&
                           (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
                                                      is2GHz))) {
                        if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
                                               is2GHz) < freq &&
                            CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) {
                                twiceMaxEdgePower =
                                        CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl);
                        }
                        break;
                }
        }
 
        return twiceMaxEdgePower;
}

References AR5416_BCHAN_UNUSED, ath9k_hw_fbin2freq(), cal_ctl_edges::bChannel, CTL_EDGE_FLAGS, CTL_EDGE_TPOWER, MAX_RATE_POWER, and u16.

Referenced by ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_per_rate_table(), and ath9k_hw_set_def_power_per_rate_table().

◆ ath9k_hw_update_regulatory_maxpower()

void ath9k_hw_update_regulatory_maxpower ( struct ath_hw * ah )

Definition at line 300 of file ath9k_eeprom.c.

{
        struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
 
        switch (ar5416_get_ntxchains(ah->txchainmask)) {
        case 1:
                break;
        case 2:
                regulatory->max_power_level += INCREASE_MAXPOW_BY_TWO_CHAIN;
                break;
        case 3:
                regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;
                break;
        default:
                DBG2("ath9k: "
                        "Invalid chainmask configuration\n");
                break;
        }
}

References ah, ar5416_get_ntxchains, ath9k_hw_regulatory(), DBG2, INCREASE_MAXPOW_BY_THREE_CHAIN, INCREASE_MAXPOW_BY_TWO_CHAIN, and ath_regulatory::max_power_level.

◆ ath9k_hw_eeprom_init()

int ath9k_hw_eeprom_init ( struct ath_hw * ah )

Definition at line 532 of file ath9k_eeprom.c.

{
        int status;
 
        if (AR_SREV_9300_20_OR_LATER(ah))
                ah->eep_ops = &eep_ar9300_ops;
        else if (AR_SREV_9287(ah)) {
                ah->eep_ops = &eep_ar9287_ops;
        } else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
                ah->eep_ops = &eep_4k_ops;
        } else {
                ah->eep_ops = &eep_def_ops;
        }
 
        if (!ah->eep_ops->fill_eeprom(ah))
                return -EIO;
 
        status = ah->eep_ops->check_eeprom(ah);
 
        return status;
}

References ah, AR_SREV_9271, AR_SREV_9285, AR_SREV_9287, AR_SREV_9300_20_OR_LATER, eep_4k_ops, eep_ar9287_ops, eep_ar9300_ops, eep_def_ops, EIO, and status.

Referenced by ath9k_hw_post_init().

◆ ath9k_hw_get_gain_boundaries_pdadcs()

void ath9k_hw_get_gain_boundaries_pdadcs	(	struct ath_hw *	ah,
		struct ath9k_channel *	chan,
		void *	pRawDataSet,
		u8 *	bChans,
		u16	availPiers,
		u16	tPdGainOverlap,
		u16 *	pPdGainBoundaries,
		u8 *	pPDADCValues,
		u16	numXpdGains )

Definition at line 320 of file ath9k_eeprom.c.

{
        int i, j, k;
        int16_t ss;
        u16 idxL = 0, idxR = 0, numPiers;
        static u8 vpdTableL[AR5416_NUM_PD_GAINS]
                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
        static u8 vpdTableR[AR5416_NUM_PD_GAINS]
                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
        static u8 vpdTableI[AR5416_NUM_PD_GAINS]
                [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
 
        u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
        u8 minPwrT4[AR5416_NUM_PD_GAINS];
        u8 maxPwrT4[AR5416_NUM_PD_GAINS];
        int16_t vpdStep;
        int16_t tmpVal;
        u16 sizeCurrVpdTable, maxIndex, tgtIndex;
        int match;
        int16_t minDelta = 0;
        struct chan_centers centers;
        int pdgain_boundary_default;
        struct cal_data_per_freq *data_def = pRawDataSet;
        struct cal_data_per_freq_4k *data_4k = pRawDataSet;
        struct cal_data_per_freq_ar9287 *data_9287 = pRawDataSet;
        int eeprom_4k = AR_SREV_9285(ah) || AR_SREV_9271(ah);
        int intercepts;
 
        if (AR_SREV_9287(ah))
                intercepts = AR9287_PD_GAIN_ICEPTS;
        else
                intercepts = AR5416_PD_GAIN_ICEPTS;
 
        memset(&minPwrT4, 0, AR5416_NUM_PD_GAINS);
        ath9k_hw_get_channel_centers(ah, chan, &centers);
 
        for (numPiers = 0; numPiers < availPiers; numPiers++) {
                if (bChans[numPiers] == AR5416_BCHAN_UNUSED)
                        break;
        }
 
        match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center,
                                                             IS_CHAN_2GHZ(chan)),
                                               bChans, numPiers, &idxL, &idxR);
 
        if (match) {
                if (AR_SREV_9287(ah)) {
                        for (i = 0; i < numXpdGains; i++) {
                                minPwrT4[i] = data_9287[idxL].pwrPdg[i][0];
                                maxPwrT4[i] = data_9287[idxL].pwrPdg[i][intercepts - 1];
                                ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
                                                data_9287[idxL].pwrPdg[i],
                                                data_9287[idxL].vpdPdg[i],
                                                intercepts,
                                                vpdTableI[i]);
                        }
                } else if (eeprom_4k) {
                        for (i = 0; i < numXpdGains; i++) {
                                minPwrT4[i] = data_4k[idxL].pwrPdg[i][0];
                                maxPwrT4[i] = data_4k[idxL].pwrPdg[i][intercepts - 1];
                                ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
                                                data_4k[idxL].pwrPdg[i],
                                                data_4k[idxL].vpdPdg[i],
                                                intercepts,
                                                vpdTableI[i]);
                        }
                } else {
                        for (i = 0; i < numXpdGains; i++) {
                                minPwrT4[i] = data_def[idxL].pwrPdg[i][0];
                                maxPwrT4[i] = data_def[idxL].pwrPdg[i][intercepts - 1];
                                ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
                                                data_def[idxL].pwrPdg[i],
                                                data_def[idxL].vpdPdg[i],
                                                intercepts,
                                                vpdTableI[i]);
                        }
                }
        } else {
                for (i = 0; i < numXpdGains; i++) {
                        if (AR_SREV_9287(ah)) {
                                pVpdL = data_9287[idxL].vpdPdg[i];
                                pPwrL = data_9287[idxL].pwrPdg[i];
                                pVpdR = data_9287[idxR].vpdPdg[i];
                                pPwrR = data_9287[idxR].pwrPdg[i];
                        } else if (eeprom_4k) {
                                pVpdL = data_4k[idxL].vpdPdg[i];
                                pPwrL = data_4k[idxL].pwrPdg[i];
                                pVpdR = data_4k[idxR].vpdPdg[i];
                                pPwrR = data_4k[idxR].pwrPdg[i];
                        } else {
                                pVpdL = data_def[idxL].vpdPdg[i];
                                pPwrL = data_def[idxL].pwrPdg[i];
                                pVpdR = data_def[idxR].vpdPdg[i];
                                pPwrR = data_def[idxR].pwrPdg[i];
                        }
 
                        minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
 
                        maxPwrT4[i] =
                                min(pPwrL[intercepts - 1],
                                    pPwrR[intercepts - 1]);
 
 
                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
                                                pPwrL, pVpdL,
                                                intercepts,
                                                vpdTableL[i]);
                        ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
                                                pPwrR, pVpdR,
                                                intercepts,
                                                vpdTableR[i]);
 
                        for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
                                vpdTableI[i][j] =
                                        (u8)(ath9k_hw_interpolate((u16)
                                             FREQ2FBIN(centers.
                                                       synth_center,
                                                       IS_CHAN_2GHZ
                                                       (chan)),
                                             bChans[idxL], bChans[idxR],
                                             vpdTableL[i][j], vpdTableR[i][j]));
                        }
                }
        }
 
        k = 0;
 
        for (i = 0; i < numXpdGains; i++) {
                if (i == (numXpdGains - 1))
                        pPdGainBoundaries[i] =
                                (u16)(maxPwrT4[i] / 2);
                else
                        pPdGainBoundaries[i] =
                                (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4);
 
                pPdGainBoundaries[i] =
                        min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]);
 
                if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) {
                        minDelta = pPdGainBoundaries[0] - 23;
                        pPdGainBoundaries[0] = 23;
                } else {
                        minDelta = 0;
                }
 
                if (i == 0) {
                        if (AR_SREV_9280_20_OR_LATER(ah))
                                ss = (int16_t)(0 - (minPwrT4[i] / 2));
                        else
                                ss = 0;
                } else {
                        ss = (int16_t)((pPdGainBoundaries[i - 1] -
                                        (minPwrT4[i] / 2)) -
                                       tPdGainOverlap + 1 + minDelta);
                }
                vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]);
                vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
 
                while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
                        tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep);
                        pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal);
                        ss++;
                }
 
                sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
                tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap -
                                (minPwrT4[i] / 2));
                maxIndex = (tgtIndex < sizeCurrVpdTable) ?
                        tgtIndex : sizeCurrVpdTable;
 
                while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
                        pPDADCValues[k++] = vpdTableI[i][ss++];
                }
 
                vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] -
                                    vpdTableI[i][sizeCurrVpdTable - 2]);
                vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
 
                if (tgtIndex >= maxIndex) {
                        while ((ss <= tgtIndex) &&
                               (k < (AR5416_NUM_PDADC_VALUES - 1))) {
                                tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] +
                                                    (ss - maxIndex + 1) * vpdStep));
                                pPDADCValues[k++] = (u8)((tmpVal > 255) ?
                                                         255 : tmpVal);
                                ss++;
                        }
                }
        }
 
        if (eeprom_4k)
                pdgain_boundary_default = 58;
        else
                pdgain_boundary_default = pPdGainBoundaries[i - 1];
 
        while (i < AR5416_PD_GAINS_IN_MASK) {
                pPdGainBoundaries[i] = pdgain_boundary_default;
                i++;
        }
 
        while (k < AR5416_NUM_PDADC_VALUES) {
                pPDADCValues[k] = pPDADCValues[k - 1];
                k++;
        }
}

References ah, AR5416_BCHAN_UNUSED, AR5416_MAX_PWR_RANGE_IN_HALF_DB, AR5416_NUM_PD_GAINS, AR5416_NUM_PDADC_VALUES, AR5416_PD_GAIN_ICEPTS, AR5416_PD_GAINS_IN_MASK, AR9287_PD_GAIN_ICEPTS, AR_SREV_5416_20_OR_LATER, AR_SREV_9271, AR_SREV_9280_20_OR_LATER, AR_SREV_9285, AR_SREV_9287, ath9k_hw_fill_vpd_table(), ath9k_hw_get_channel_centers(), ath9k_hw_get_lower_upper_index(), ath9k_hw_interpolate(), FREQ2FBIN, IS_CHAN_2GHZ, k, max, MAX_RATE_POWER, memset(), min, cal_data_per_freq::pwrPdg, cal_data_per_freq_4k::pwrPdg, cal_data_per_freq_ar9287::pwrPdg, ss, chan_centers::synth_center, u16, u8, cal_data_per_freq::vpdPdg, cal_data_per_freq_4k::vpdPdg, and cal_data_per_freq_ar9287::vpdPdg.

Referenced by ath9k_hw_set_4k_power_cal_table(), ath9k_hw_set_ar9287_power_cal_table(), and ath9k_hw_set_def_power_cal_table().

Variable Documentation

◆ eep_def_ops

const struct eeprom_ops eep_def_ops

extern

Definition at line 1343 of file ath9k_eeprom_def.c.

                                      {
        .check_eeprom           = ath9k_hw_def_check_eeprom,
        .get_eeprom             = ath9k_hw_def_get_eeprom,
        .fill_eeprom            = ath9k_hw_def_fill_eeprom,
        .get_eeprom_ver         = ath9k_hw_def_get_eeprom_ver,
        .get_eeprom_rev         = ath9k_hw_def_get_eeprom_rev,
        .set_board_values       = ath9k_hw_def_set_board_values,
        .set_addac              = ath9k_hw_def_set_addac,
        .set_txpower            = ath9k_hw_def_set_txpower,
        .get_spur_channel       = ath9k_hw_def_get_spur_channel
};

Referenced by ath9k_hw_eeprom_init().

◆ eep_4k_ops

const struct eeprom_ops eep_4k_ops

extern

Definition at line 1070 of file ath9k_eeprom_4k.c.

                                     {
        .check_eeprom           = ath9k_hw_4k_check_eeprom,
        .get_eeprom             = ath9k_hw_4k_get_eeprom,
        .fill_eeprom            = ath9k_hw_4k_fill_eeprom,
        .get_eeprom_ver         = ath9k_hw_4k_get_eeprom_ver,
        .get_eeprom_rev         = ath9k_hw_4k_get_eeprom_rev,
        .set_board_values       = ath9k_hw_4k_set_board_values,
        .set_addac              = ath9k_hw_4k_set_addac,
        .set_txpower            = ath9k_hw_4k_set_txpower,
        .get_spur_channel       = ath9k_hw_4k_get_spur_channel
};

Referenced by ath9k_hw_eeprom_init().

◆ eep_ar9287_ops

const struct eeprom_ops eep_ar9287_ops

extern

Definition at line 714 of file eeprom.h.

Referenced by ath9k_hw_eeprom_init().

◆ eep_ar9300_ops

const struct eeprom_ops eep_ar9300_ops

extern

Definition at line 4997 of file ath9k_ar9003_eeprom.c.

                                         {
        .check_eeprom = ath9k_hw_ar9300_check_eeprom,
        .get_eeprom = ath9k_hw_ar9300_get_eeprom,
        .fill_eeprom = ath9k_hw_ar9300_fill_eeprom,
        .get_eeprom_ver = ath9k_hw_ar9300_get_eeprom_ver,
        .get_eeprom_rev = ath9k_hw_ar9300_get_eeprom_rev,
        .set_board_values = ath9k_hw_ar9300_set_board_values,
        .set_addac = ath9k_hw_ar9300_set_addac,
        .set_txpower = ath9k_hw_ar9300_set_txpower,
        .get_spur_channel = ath9k_hw_ar9300_get_spur_channel
};

Referenced by ath9k_hw_eeprom_init().

Data Structures

Macros

Enumerations

Functions

Variables

Macro Definition Documentation

◆ AR_EEPROM_MODAL_SPURS

◆ AR5416_EEPROM_MAGIC

◆ CTRY_DEBUG

◆ CTRY_DEFAULT

◆ AR_EEPROM_EEPCAP_COMPRESS_DIS

◆ AR_EEPROM_EEPCAP_AES_DIS

◆ AR_EEPROM_EEPCAP_FASTFRAME_DIS

◆ AR_EEPROM_EEPCAP_BURST_DIS

◆ AR_EEPROM_EEPCAP_MAXQCU

◆ AR_EEPROM_EEPCAP_MAXQCU_S

◆ AR_EEPROM_EEPCAP_HEAVY_CLIP_EN

◆ AR_EEPROM_EEPCAP_KC_ENTRIES

◆ AR_EEPROM_EEPCAP_KC_ENTRIES_S

◆ AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND

◆ AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN

◆ AR_EEPROM_EEREGCAP_EN_KK_U2

◆ AR_EEPROM_EEREGCAP_EN_KK_MIDBAND

◆ AR_EEPROM_EEREGCAP_EN_KK_U1_ODD

◆ AR_EEPROM_EEREGCAP_EN_KK_NEW_11A

◆ AR_EEPROM_EEREGCAP_EN_KK_U1_ODD_PRE4_0

◆ AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0

◆ AR5416_EEPROM_MAGIC_OFFSET

◆ AR5416_EEPROM_S

◆ AR5416_EEPROM_OFFSET

◆ AR5416_EEPROM_MAX

◆ AR5416_EEPROM_START_ADDR

◆ SD_NO_CTL

◆ NO_CTL

◆ CTL_MODE_M

◆ CTL_11A

◆ CTL_11B

◆ CTL_11G

◆ CTL_2GHT20

◆ CTL_5GHT20

◆ CTL_2GHT40

◆ CTL_5GHT40

◆ EXT_ADDITIVE

◆ CTL_11A_EXT

◆ CTL_11G_EXT

◆ CTL_11B_EXT

◆ SUB_NUM_CTL_MODES_AT_5G_40

◆ SUB_NUM_CTL_MODES_AT_2G_40

◆ INCREASE_MAXPOW_BY_TWO_CHAIN

◆ INCREASE_MAXPOW_BY_THREE_CHAIN

◆ AR9285_RDEXT_DEFAULT

◆ ATH9K_POW_SM

◆ FREQ2FBIN

◆ ath9k_hw_use_flash

◆ AR5416_VER_MASK

◆ OLC_FOR_AR9280_20_LATER

◆ OLC_FOR_AR9287_10_LATER

◆ AR_EEPROM_RFSILENT_GPIO_SEL

◆ AR_EEPROM_RFSILENT_GPIO_SEL_S

◆ AR_EEPROM_RFSILENT_POLARITY

◆ AR_EEPROM_RFSILENT_POLARITY_S

◆ EEP_RFSILENT_ENABLED

◆ EEP_RFSILENT_ENABLED_S

◆ EEP_RFSILENT_POLARITY

◆ EEP_RFSILENT_POLARITY_S

◆ EEP_RFSILENT_GPIO_SEL

◆ EEP_RFSILENT_GPIO_SEL_S

◆ AR5416_OPFLAGS_11A

◆ AR5416_OPFLAGS_11G

◆ AR5416_OPFLAGS_N_5G_HT40

◆ AR5416_OPFLAGS_N_2G_HT40

◆ AR5416_OPFLAGS_N_5G_HT20

◆ AR5416_OPFLAGS_N_2G_HT20

◆ AR5416_EEP_NO_BACK_VER

◆ AR5416_EEP_VER

◆ AR5416_EEP_VER_MINOR_MASK

◆ AR5416_EEP_MINOR_VER_2

◆ AR5416_EEP_MINOR_VER_3

◆ AR5416_EEP_MINOR_VER_7

◆ AR5416_EEP_MINOR_VER_9