iPXE
eeprom.h
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1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011
5 * Original from Linux kernel 3.0.1
6 *
7 * Permission to use, copy, modify, and/or distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20#ifndef EEPROM_H
21#define EEPROM_H
22
23FILE_LICENCE ( BSD2 );
24FILE_SECBOOT ( FORBIDDEN );
25
26#define AR_EEPROM_MODAL_SPURS 5
27
28#include "../ath.h"
29#include "ar9003_eeprom.h"
30
31#if __BYTE_ORDER == __BIG_ENDIAN
32#define AR5416_EEPROM_MAGIC 0x5aa5
33#else
34#define AR5416_EEPROM_MAGIC 0xa55a
35#endif
36
37#define CTRY_DEBUG 0x1ff
38#define CTRY_DEFAULT 0
39
40#define AR_EEPROM_EEPCAP_COMPRESS_DIS 0x0001
41#define AR_EEPROM_EEPCAP_AES_DIS 0x0002
42#define AR_EEPROM_EEPCAP_FASTFRAME_DIS 0x0004
43#define AR_EEPROM_EEPCAP_BURST_DIS 0x0008
44#define AR_EEPROM_EEPCAP_MAXQCU 0x01F0
45#define AR_EEPROM_EEPCAP_MAXQCU_S 4
46#define AR_EEPROM_EEPCAP_HEAVY_CLIP_EN 0x0200
47#define AR_EEPROM_EEPCAP_KC_ENTRIES 0xF000
48#define AR_EEPROM_EEPCAP_KC_ENTRIES_S 12
49
50#define AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
51#define AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
52#define AR_EEPROM_EEREGCAP_EN_KK_U2 0x0100
53#define AR_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
54#define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
55#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
56
57#define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD_PRE4_0 0x4000
58#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0 0x8000
59
60#define AR5416_EEPROM_MAGIC_OFFSET 0x0
61#define AR5416_EEPROM_S 2
62#define AR5416_EEPROM_OFFSET 0x2000
63#define AR5416_EEPROM_MAX 0xae0
64
65#define AR5416_EEPROM_START_ADDR \
66 (AR_SREV_9100(ah)) ? 0x1fff1000 : 0x503f1200
67
68#define SD_NO_CTL 0xE0
69#define NO_CTL 0xff
70#define CTL_MODE_M 0xf
71#define CTL_11A 0
72#define CTL_11B 1
73#define CTL_11G 2
74#define CTL_2GHT20 5
75#define CTL_5GHT20 6
76#define CTL_2GHT40 7
77#define CTL_5GHT40 8
78
79#define EXT_ADDITIVE (0x8000)
80#define CTL_11A_EXT (CTL_11A | EXT_ADDITIVE)
81#define CTL_11G_EXT (CTL_11G | EXT_ADDITIVE)
82#define CTL_11B_EXT (CTL_11B | EXT_ADDITIVE)
83
84#define SUB_NUM_CTL_MODES_AT_5G_40 2
85#define SUB_NUM_CTL_MODES_AT_2G_40 3
86
87#define INCREASE_MAXPOW_BY_TWO_CHAIN 6 /* 10*log10(2)*2 */
88#define INCREASE_MAXPOW_BY_THREE_CHAIN 10 /* 10*log10(3)*2 */
89
90/*
91 * For AR9285 and later chipsets, the following bits are not being programmed
92 * in EEPROM and so need to be enabled always.
93 *
94 * Bit 0: en_fcc_mid
95 * Bit 1: en_jap_mid
96 * Bit 2: en_fcc_dfs_ht40
97 * Bit 3: en_jap_ht40
98 * Bit 4: en_jap_dfs_ht40
99 */
100#define AR9285_RDEXT_DEFAULT 0x1F
101
102#define ATH9K_POW_SM(_r, _s) (((_r) & 0x3f) << (_s))
103#define FREQ2FBIN(x, y) ((y) ? ((x) - 2300) : (((x) - 4800) / 5))
104#define ath9k_hw_use_flash(_ah) (!(_ah->ah_flags & AH_USE_EEPROM))
105
106#define AR5416_VER_MASK (eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK)
107#define OLC_FOR_AR9280_20_LATER (AR_SREV_9280_20_OR_LATER(ah) && \
108 ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
109#define OLC_FOR_AR9287_10_LATER (AR_SREV_9287_11_OR_LATER(ah) && \
110 ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
111
112#define AR_EEPROM_RFSILENT_GPIO_SEL 0x001c
113#define AR_EEPROM_RFSILENT_GPIO_SEL_S 2
114#define AR_EEPROM_RFSILENT_POLARITY 0x0002
115#define AR_EEPROM_RFSILENT_POLARITY_S 1
116
117#define EEP_RFSILENT_ENABLED 0x0001
118#define EEP_RFSILENT_ENABLED_S 0
119#define EEP_RFSILENT_POLARITY 0x0002
120#define EEP_RFSILENT_POLARITY_S 1
121#define EEP_RFSILENT_GPIO_SEL 0x001c
122#define EEP_RFSILENT_GPIO_SEL_S 2
123
124#define AR5416_OPFLAGS_11A 0x01
125#define AR5416_OPFLAGS_11G 0x02
126#define AR5416_OPFLAGS_N_5G_HT40 0x04
127#define AR5416_OPFLAGS_N_2G_HT40 0x08
128#define AR5416_OPFLAGS_N_5G_HT20 0x10
129#define AR5416_OPFLAGS_N_2G_HT20 0x20
130
131#define AR5416_EEP_NO_BACK_VER 0x1
132#define AR5416_EEP_VER 0xE
133#define AR5416_EEP_VER_MINOR_MASK 0x0FFF
134#define AR5416_EEP_MINOR_VER_2 0x2
135#define AR5416_EEP_MINOR_VER_3 0x3
136#define AR5416_EEP_MINOR_VER_7 0x7
137#define AR5416_EEP_MINOR_VER_9 0x9
138#define AR5416_EEP_MINOR_VER_16 0x10
139#define AR5416_EEP_MINOR_VER_17 0x11
140#define AR5416_EEP_MINOR_VER_19 0x13
141#define AR5416_EEP_MINOR_VER_20 0x14
142#define AR5416_EEP_MINOR_VER_21 0x15
143#define AR5416_EEP_MINOR_VER_22 0x16
144
145#define AR5416_NUM_5G_CAL_PIERS 8
146#define AR5416_NUM_2G_CAL_PIERS 4
147#define AR5416_NUM_5G_20_TARGET_POWERS 8
148#define AR5416_NUM_5G_40_TARGET_POWERS 8
149#define AR5416_NUM_2G_CCK_TARGET_POWERS 3
150#define AR5416_NUM_2G_20_TARGET_POWERS 4
151#define AR5416_NUM_2G_40_TARGET_POWERS 4
152#define AR5416_NUM_CTLS 24
153#define AR5416_NUM_BAND_EDGES 8
154#define AR5416_NUM_PD_GAINS 4
155#define AR5416_PD_GAINS_IN_MASK 4
156#define AR5416_PD_GAIN_ICEPTS 5
157#define AR5416_NUM_PDADC_VALUES 128
158#define AR5416_BCHAN_UNUSED 0xFF
159#define AR5416_MAX_PWR_RANGE_IN_HALF_DB 64
160#define AR5416_MAX_CHAINS 3
161#define AR9300_MAX_CHAINS 3
162#define AR5416_PWR_TABLE_OFFSET_DB -5
163
164/* Rx gain type values */
165#define AR5416_EEP_RXGAIN_23DB_BACKOFF 0
166#define AR5416_EEP_RXGAIN_13DB_BACKOFF 1
167#define AR5416_EEP_RXGAIN_ORIG 2
168
169/* Tx gain type values */
170#define AR5416_EEP_TXGAIN_ORIGINAL 0
171#define AR5416_EEP_TXGAIN_HIGH_POWER 1
172
173#define AR5416_EEP4K_START_LOC 64
174#define AR5416_EEP4K_NUM_2G_CAL_PIERS 3
175#define AR5416_EEP4K_NUM_2G_CCK_TARGET_POWERS 3
176#define AR5416_EEP4K_NUM_2G_20_TARGET_POWERS 3
177#define AR5416_EEP4K_NUM_2G_40_TARGET_POWERS 3
178#define AR5416_EEP4K_NUM_CTLS 12
179#define AR5416_EEP4K_NUM_BAND_EDGES 4
180#define AR5416_EEP4K_NUM_PD_GAINS 2
181#define AR5416_EEP4K_MAX_CHAINS 1
182
183#define AR9280_TX_GAIN_TABLE_SIZE 22
184
185#define AR9287_EEP_VER 0xE
186#define AR9287_EEP_VER_MINOR_MASK 0xFFF
187#define AR9287_EEP_MINOR_VER_1 0x1
188#define AR9287_EEP_MINOR_VER_2 0x2
189#define AR9287_EEP_MINOR_VER_3 0x3
190#define AR9287_EEP_MINOR_VER AR9287_EEP_MINOR_VER_3
191#define AR9287_EEP_MINOR_VER_b AR9287_EEP_MINOR_VER
192#define AR9287_EEP_NO_BACK_VER AR9287_EEP_MINOR_VER_1
193
194#define AR9287_EEP_START_LOC 128
195#define AR9287_HTC_EEP_START_LOC 256
196#define AR9287_NUM_2G_CAL_PIERS 3
197#define AR9287_NUM_2G_CCK_TARGET_POWERS 3
198#define AR9287_NUM_2G_20_TARGET_POWERS 3
199#define AR9287_NUM_2G_40_TARGET_POWERS 3
200#define AR9287_NUM_CTLS 12
201#define AR9287_NUM_BAND_EDGES 4
202#define AR9287_PD_GAIN_ICEPTS 1
203#define AR9287_EEPMISC_BIG_ENDIAN 0x01
204#define AR9287_EEPMISC_WOW 0x02
205#define AR9287_MAX_CHAINS 2
206#define AR9287_ANT_16S 32
207
208#define AR9287_DATA_SZ 32
209
210#define AR9287_PWR_TABLE_OFFSET_DB -5
211
212#define AR9287_CHECKSUM_LOCATION (AR9287_EEP_START_LOC + 1)
213
214#define CTL_EDGE_TPOWER(_ctl) ((_ctl) & 0x3f)
215#define CTL_EDGE_FLAGS(_ctl) (((_ctl) >> 6) & 0x03)
216
217#define LNA_CTL_BUF_MODE BIT(0)
218#define LNA_CTL_ISEL_LO BIT(1)
219#define LNA_CTL_ISEL_HI BIT(2)
220#define LNA_CTL_BUF_IN BIT(3)
221#define LNA_CTL_FEM_BAND BIT(4)
222#define LNA_CTL_LOCAL_BIAS BIT(5)
223#define LNA_CTL_FORCE_XPA BIT(6)
224#define LNA_CTL_USE_ANT1 BIT(7)
225
263
276
281
311
329
330
336
379
381 u8 pwrPdg[2][5];
382 u8 vpdPdg[2][5];
383 u8 pcdac[2][5];
384 u8 empty[2][5];
385} __attribute__((packed));
386
407#ifdef __BIG_ENDIAN_BITFIELD
408 u8 ob_1:4, ob_0:4;
409 u8 db1_1:4, db1_0:4;
410#else
413#endif
423#ifdef __BIG_ENDIAN_BITFIELD
424 u8 db2_1:4, db2_0:4;
425#else
427#endif
429#ifdef __BIG_ENDIAN_BITFIELD
430 u8 ob_3:4, ob_2:4;
431 u8 antdiv_ctl1:4, ob_4:4;
432 u8 db1_3:4, db1_2:4;
433 u8 antdiv_ctl2:4, db1_4:4;
434 u8 db2_2:4, db2_3:4;
435 u8 reserved:4, db2_4:4;
436#else
443#endif
447#define EEP_4K_BB_DESIRED_SCALE_MASK 0x1f
450} __attribute__((packed));
451
473
509
514
519
524
529
534
536 u8 pwrPdg[2][5];
537 u8 vpdPdg[2][5];
538 u8 pcdac[2][5];
539 u8 empty[2][5];
540} __attribute__((packed));
541
546
551
556
561
566
595
615
635
643
652
654 int (*check_eeprom)(struct ath_hw *hw);
656 int (*fill_eeprom)(struct ath_hw *hw);
657 int (*get_eeprom_ver)(struct ath_hw *hw);
658 int (*get_eeprom_rev)(struct ath_hw *hw);
659 void (*set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan);
660 void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan);
661 void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan,
662 u16 cfgCtl, u8 twiceAntennaReduction,
663 u8 twiceMaxRegulatoryPower, u8 powerLimit,
664 int test);
665 u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, int is2GHz);
666};
667
669void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask,
670 u32 shift, u32 val);
671int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight,
672 int16_t targetLeft,
673 int16_t targetRight);
674int ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize,
675 u16 *indexL, u16 *indexR);
676int ath9k_hw_nvram_read(struct ath_common *common, u32 off, u16 *data);
677void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data,
678 int eep_start_loc, int size);
679void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
680 u8 *pVpdList, u16 numIntercepts,
681 u8 *pRetVpdList);
683 struct ath9k_channel *chan,
684 struct cal_target_power_leg *powInfo,
685 u16 numChannels,
686 struct cal_target_power_leg *pNewPower,
687 u16 numRates, int isExtTarget);
689 struct ath9k_channel *chan,
690 struct cal_target_power_ht *powInfo,
691 u16 numChannels,
692 struct cal_target_power_ht *pNewPower,
693 u16 numRates, int isHt40Target);
694u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
695 int is2GHz, int num_band_edges);
697int ath9k_hw_eeprom_init(struct ath_hw *ah);
698
700 struct ath9k_channel *chan,
701 void *pRawDataSet,
702 u8 *bChans, u16 availPiers,
703 u16 tPdGainOverlap,
704 u16 *pPdGainBoundaries, u8 *pPDADCValues,
705 u16 numXpdGains);
706
707#define ar5416_get_ntxchains(_txchainmask) \
708 (((_txchainmask >> 2) & 1) + \
709 ((_txchainmask >> 1) & 1) + (_txchainmask & 1))
710
711extern const struct eeprom_ops eep_def_ops;
712extern const struct eeprom_ops eep_4k_ops;
713extern const struct eeprom_ops eep_ar9287_ops;
714extern const struct eeprom_ops eep_ar9287_ops;
715extern const struct eeprom_ops eep_ar9300_ops;
716
717#endif /* EEPROM_H */
signed short int16_t
Definition stdint.h:16
signed char int8_t
Definition stdint.h:15
#define AR5416_EEP4K_NUM_PD_GAINS
Definition eeprom.h:180
#define AR9287_NUM_2G_20_TARGET_POWERS
Definition eeprom.h:198
int ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize, u16 *indexL, u16 *indexR)
void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah, struct ath9k_channel *chan, void *pRawDataSet, u8 *bChans, u16 availPiers, u16 tPdGainOverlap, u16 *pPdGainBoundaries, u8 *pPDADCValues, u16 numXpdGains)
#define AR5416_EEP4K_MAX_CHAINS
Definition eeprom.h:181
#define AR5416_PD_GAIN_ICEPTS
Definition eeprom.h:156
#define AR5416_NUM_5G_40_TARGET_POWERS
Definition eeprom.h:148
#define AR5416_NUM_2G_CAL_PIERS
Definition eeprom.h:146
#define AR9287_NUM_2G_CCK_TARGET_POWERS
Definition eeprom.h:197
#define AR5416_NUM_5G_CAL_PIERS
Definition eeprom.h:145
#define AR9287_NUM_BAND_EDGES
Definition eeprom.h:201
void ath9k_hw_get_target_powers(struct ath_hw *ah, struct ath9k_channel *chan, struct cal_target_power_ht *powInfo, u16 numChannels, struct cal_target_power_ht *pNewPower, u16 numRates, int isHt40Target)
#define AR5416_NUM_2G_40_TARGET_POWERS
Definition eeprom.h:151
int ath9k_hw_eeprom_init(struct ath_hw *ah)
void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)
#define AR5416_NUM_CTLS
Definition eeprom.h:152
#define AR9287_NUM_2G_40_TARGET_POWERS
Definition eeprom.h:199
#define AR_EEPROM_MODAL_SPURS
Definition eeprom.h:26
#define AR5416_EEP4K_NUM_2G_CCK_TARGET_POWERS
Definition eeprom.h:175
#define AR9287_NUM_CTLS
Definition eeprom.h:200
#define AR9287_MAX_CHAINS
Definition eeprom.h:205
eeprom_param
Definition eeprom.h:226
@ EEP_RXGAIN_TYPE
Definition eeprom.h:245
@ EEP_TXGAIN_TYPE
Definition eeprom.h:247
@ EEP_RC_CHAIN_MASK
Definition eeprom.h:248
@ EEP_PWR_TABLE_OFFSET
Definition eeprom.h:254
@ EEP_RF_SILENT
Definition eeprom.h:236
@ EEP_REG_0
Definition eeprom.h:232
@ EEP_DRIVE_STRENGTH
Definition eeprom.h:255
@ EEP_DEV_TYPE
Definition eeprom.h:251
@ EEP_MINOR_REV
Definition eeprom.h:241
@ EEP_OL_PWRCTRL
Definition eeprom.h:246
@ EEP_SWREG
Definition eeprom.h:257
@ EEP_OP_CAP
Definition eeprom.h:234
@ EEP_OB_2
Definition eeprom.h:239
@ EEP_MAC_MSW
Definition eeprom.h:229
@ EEP_MODAL_VER
Definition eeprom.h:259
@ EEP_FRAC_N_5G
Definition eeprom.h:250
@ EEP_NFTHRESH_5
Definition eeprom.h:227
@ EEP_OB_5
Definition eeprom.h:237
@ EEP_DB_2
Definition eeprom.h:240
@ EEP_DAC_HPWR_5G
Definition eeprom.h:249
@ EEP_TEMPSENSE_SLOPE
Definition eeprom.h:252
@ EEP_RX_MASK
Definition eeprom.h:243
@ EEP_MAC_LSW
Definition eeprom.h:231
@ EEP_INTERNAL_REGULATOR
Definition eeprom.h:256
@ EEP_MAC_MID
Definition eeprom.h:230
@ EEP_FSTCLK_5G
Definition eeprom.h:244
@ EEP_PAPRD
Definition eeprom.h:258
@ EEP_OP_MODE
Definition eeprom.h:235
@ EEP_NFTHRESH_2
Definition eeprom.h:228
@ EEP_TX_MASK
Definition eeprom.h:242
@ EEP_REG_1
Definition eeprom.h:233
@ EEP_DB_5
Definition eeprom.h:238
@ EEP_TEMPSENSE_SLOPE_PAL_ON
Definition eeprom.h:253
@ EEP_ANT_DIV_CTL1
Definition eeprom.h:260
@ EEP_CHAIN_MASK_REDUCE
Definition eeprom.h:261
#define AR5416_EEP4K_NUM_CTLS
Definition eeprom.h:178
#define AR5416_NUM_BAND_EDGES
Definition eeprom.h:153
int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight, int16_t targetLeft, int16_t targetRight)
#define AR5416_NUM_5G_20_TARGET_POWERS
Definition eeprom.h:147
void ath9k_hw_get_legacy_target_powers(struct ath_hw *ah, struct ath9k_channel *chan, struct cal_target_power_leg *powInfo, u16 numChannels, struct cal_target_power_leg *pNewPower, u16 numRates, int isExtTarget)
#define AR9287_PD_GAIN_ICEPTS
Definition eeprom.h:202
#define AR5416_NUM_PD_GAINS
Definition eeprom.h:154
ath9k_hal_freq_band
Definition eeprom.h:277
@ ATH9K_HAL_FREQ_BAND_2GHZ
Definition eeprom.h:279
@ ATH9K_HAL_FREQ_BAND_5GHZ
Definition eeprom.h:278
#define AR9287_NUM_2G_CAL_PIERS
Definition eeprom.h:196
#define AR5416_EEP4K_NUM_2G_CAL_PIERS
Definition eeprom.h:174
#define AR5416_EEP4K_NUM_2G_40_TARGET_POWERS
Definition eeprom.h:177
#define AR9287_DATA_SZ
Definition eeprom.h:208
#define AR5416_MAX_CHAINS
Definition eeprom.h:160
int ath9k_hw_nvram_read(struct ath_common *common, u32 off, u16 *data)
void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask, u32 shift, u32 val)
#define AR5416_NUM_2G_20_TARGET_POWERS
Definition eeprom.h:150
void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList, u8 *pVpdList, u16 numIntercepts, u8 *pRetVpdList)
reg_ext_bitmap
Definition eeprom.h:636
@ REG_EXT_JAPAN_NONDFS_HT40
Definition eeprom.h:640
@ REG_EXT_JAPAN_DFS_HT40
Definition eeprom.h:641
@ REG_EXT_JAPAN_MIDBAND
Definition eeprom.h:638
@ REG_EXT_FCC_MIDBAND
Definition eeprom.h:637
@ REG_EXT_FCC_DFS_HT40
Definition eeprom.h:639
#define AR5416_EEP4K_NUM_BAND_EDGES
Definition eeprom.h:179
ar5416_rates
Definition eeprom.h:264
@ Ar5416RateSize
Definition eeprom.h:274
@ rateHt20_5
Definition eeprom.h:270
@ rateHt40_2
Definition eeprom.h:271
@ rateExtCck
Definition eeprom.h:273
@ rate5_5s
Definition eeprom.h:268
@ rateHt20_4
Definition eeprom.h:270
@ rate48mb
Definition eeprom.h:266
@ rate12mb
Definition eeprom.h:265
@ rateExtOfdm
Definition eeprom.h:273
@ rate9mb
Definition eeprom.h:265
@ rateDupCck
Definition eeprom.h:273
@ rateHt40_4
Definition eeprom.h:272
@ rateDupOfdm
Definition eeprom.h:273
@ rate18mb
Definition eeprom.h:265
@ rateHt20_3
Definition eeprom.h:269
@ rateHt20_7
Definition eeprom.h:270
@ rateHt40_7
Definition eeprom.h:272
@ rate11l
Definition eeprom.h:268
@ rateHt20_0
Definition eeprom.h:269
@ rateHt40_6
Definition eeprom.h:272
@ rate6mb
Definition eeprom.h:265
@ rate36mb
Definition eeprom.h:266
@ rate5_5l
Definition eeprom.h:267
@ rate1l
Definition eeprom.h:267
@ rate54mb
Definition eeprom.h:266
@ rate24mb
Definition eeprom.h:266
@ rateHt40_1
Definition eeprom.h:271
@ rateHt20_1
Definition eeprom.h:269
@ rate2s
Definition eeprom.h:267
@ rateHt40_5
Definition eeprom.h:272
@ rateHt20_2
Definition eeprom.h:269
@ rate11s
Definition eeprom.h:268
@ rate2l
Definition eeprom.h:267
@ rateHt40_0
Definition eeprom.h:271
@ rateXr
Definition eeprom.h:268
@ rateHt20_6
Definition eeprom.h:270
@ rateHt40_3
Definition eeprom.h:271
u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower, int is2GHz, int num_band_edges)
void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val)
#define AR5416_NUM_2G_CCK_TARGET_POWERS
Definition eeprom.h:149
void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data, int eep_start_loc, int size)
#define AR5416_EEP4K_NUM_2G_20_TARGET_POWERS
Definition eeprom.h:176
const struct eeprom_ops eep_ar9300_ops
const struct eeprom_ops eep_4k_ops
const struct eeprom_ops eep_ar9287_ops
const struct eeprom_ops eep_def_ops
uint8_t data[48]
Additional event data.
Definition ena.h:11
static int test
Definition epic100.c:73
uint16_t size
Buffer size.
Definition dwmac.h:3
#define FILE_LICENCE(_licence)
Declare a particular licence as applying to a file.
Definition compiler.h:896
#define FILE_SECBOOT(_status)
Declare a file's UEFI Secure Boot permission status.
Definition compiler.h:926
struct ib_cm_common common
Definition ib_mad.h:0
#define u8
Definition igbvf_osdep.h:40
#define __attribute__(x)
Definition compiler.h:10
struct hv_monitor_parameter param[4][32]
Parameters.
Definition hyperv.h:13
void __asmcall int val
Definition setjmp.h:12
static unsigned int unsigned int reg
Definition myson.h:162
uint8_t ah
Definition registers.h:1
struct base_eep_header_4k baseEepHeader
Definition eeprom.h:597
struct cal_data_per_freq_4k calPierData2G[AR5416_EEP4K_MAX_CHAINS][AR5416_EEP4K_NUM_2G_CAL_PIERS]
Definition eeprom.h:601
u8 custData[20]
Definition eeprom.h:598
u8 ctlIndex[AR5416_EEP4K_NUM_CTLS]
Definition eeprom.h:611
struct cal_target_power_leg calTargetPower2G[AR5416_EEP4K_NUM_2G_20_TARGET_POWERS]
Definition eeprom.h:605
struct modal_eep_4k_header modalHeader
Definition eeprom.h:599
struct cal_ctl_data_4k ctlData[AR5416_EEP4K_NUM_CTLS]
Definition eeprom.h:612
struct cal_target_power_leg calTargetPowerCck[AR5416_EEP4K_NUM_2G_CCK_TARGET_POWERS]
Definition eeprom.h:603
struct cal_target_power_ht calTargetPower2GHT20[AR5416_EEP4K_NUM_2G_20_TARGET_POWERS]
Definition eeprom.h:607
u8 calFreqPier2G[AR5416_EEP4K_NUM_2G_CAL_PIERS]
Definition eeprom.h:600
struct cal_target_power_ht calTargetPower2GHT40[AR5416_EEP4K_NUM_2G_40_TARGET_POWERS]
Definition eeprom.h:609
struct modal_eep_header modalHeader[2]
Definition eeprom.h:570
u8 calFreqPier5G[AR5416_NUM_5G_CAL_PIERS]
Definition eeprom.h:571
struct cal_target_power_leg calTargetPowerCck[AR5416_NUM_2G_CCK_TARGET_POWERS]
Definition eeprom.h:583
struct cal_target_power_ht calTargetPower2GHT20[AR5416_NUM_2G_20_TARGET_POWERS]
Definition eeprom.h:587
struct base_eep_header baseEepHeader
Definition eeprom.h:568
u8 ctlIndex[AR5416_NUM_CTLS]
Definition eeprom.h:591
struct cal_target_power_ht calTargetPower5GHT20[AR5416_NUM_5G_20_TARGET_POWERS]
Definition eeprom.h:579
struct cal_target_power_ht calTargetPower2GHT40[AR5416_NUM_2G_40_TARGET_POWERS]
Definition eeprom.h:589
u8 custData[64]
Definition eeprom.h:569
struct cal_target_power_leg calTargetPower2G[AR5416_NUM_2G_20_TARGET_POWERS]
Definition eeprom.h:585
struct cal_ctl_data ctlData[AR5416_NUM_CTLS]
Definition eeprom.h:592
struct cal_data_per_freq calPierData2G[AR5416_MAX_CHAINS][AR5416_NUM_2G_CAL_PIERS]
Definition eeprom.h:575
struct cal_target_power_leg calTargetPower5G[AR5416_NUM_5G_20_TARGET_POWERS]
Definition eeprom.h:577
u8 calFreqPier2G[AR5416_NUM_2G_CAL_PIERS]
Definition eeprom.h:572
struct cal_target_power_ht calTargetPower5GHT40[AR5416_NUM_5G_40_TARGET_POWERS]
Definition eeprom.h:581
struct cal_data_per_freq calPierData5G[AR5416_MAX_CHAINS][AR5416_NUM_5G_CAL_PIERS]
Definition eeprom.h:573
struct base_eep_ar9287_header baseEepHeader
Definition eeprom.h:617
struct cal_target_power_ht calTargetPower2GHT40[AR9287_NUM_2G_40_TARGET_POWERS]
Definition eeprom.h:629
u8 calFreqPier2G[AR9287_NUM_2G_CAL_PIERS]
Definition eeprom.h:620
struct modal_eep_ar9287_header modalHeader
Definition eeprom.h:619
struct cal_ctl_data_ar9287 ctlData[AR9287_NUM_CTLS]
Definition eeprom.h:632
u8 ctlIndex[AR9287_NUM_CTLS]
Definition eeprom.h:631
union cal_data_per_freq_ar9287_u calPierData2G[AR9287_MAX_CHAINS][AR9287_NUM_2G_CAL_PIERS]
Definition eeprom.h:621
struct cal_target_power_leg calTargetPowerCck[AR9287_NUM_2G_CCK_TARGET_POWERS]
Definition eeprom.h:623
struct cal_target_power_ht calTargetPower2GHT20[AR9287_NUM_2G_20_TARGET_POWERS]
Definition eeprom.h:627
struct cal_target_power_leg calTargetPower2G[AR9287_NUM_2G_20_TARGET_POWERS]
Definition eeprom.h:625
u8 custData[AR9287_DATA_SZ]
Definition eeprom.h:618
Definition eeprom.h:644
u16 regDmn5G
Definition eeprom.h:647
u8 iso[3]
Definition eeprom.h:650
u8 isMultidomain
Definition eeprom.h:649
u16 regDmn2G
Definition eeprom.h:648
u16 countryCode
Definition eeprom.h:645
u16 regDmnEnum
Definition eeprom.h:646
Definition hw.h:657
int8_t tempSensSlopePalOn
Definition eeprom.h:470
u32 binBuildNumber
Definition eeprom.h:295
u16 blueToothOptions
Definition eeprom.h:293
u8 futureBase_3[21]
Definition eeprom.h:309
u8 pwr_table_offset
Definition eeprom.h:307
u16 regDmn[2]
Definition eeprom.h:288
u8 macAddr[6]
Definition eeprom.h:289
struct cal_ctl_edges ctlEdges[AR5416_EEP4K_MAX_CHAINS][AR5416_EEP4K_NUM_BAND_EDGES]
Definition eeprom.h:563
struct cal_ctl_edges ctlEdges[AR9287_MAX_CHAINS][AR9287_NUM_BAND_EDGES]
Definition eeprom.h:553
struct cal_ctl_edges ctlEdges[AR5416_MAX_CHAINS][AR5416_NUM_BAND_EDGES]
Definition eeprom.h:558
u8 pwrPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]
Definition eeprom.h:516
u8 vpdPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]
Definition eeprom.h:517
u8 pwrPdg[AR5416_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS]
Definition eeprom.h:543
u8 vpdPdg[AR5416_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS]
Definition eeprom.h:544
u8 vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]
Definition eeprom.h:512
u8 pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]
Definition eeprom.h:511
void(* set_board_values)(struct ath_hw *hw, struct ath9k_channel *chan)
Definition eeprom.h:659
u32(* get_eeprom)(struct ath_hw *hw, enum eeprom_param param)
Definition eeprom.h:655
int(* check_eeprom)(struct ath_hw *hw)
Definition eeprom.h:654
void(* set_addac)(struct ath_hw *hw, struct ath9k_channel *chan)
Definition eeprom.h:660
void(* set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan, u16 cfgCtl, u8 twiceAntennaReduction, u8 twiceMaxRegulatoryPower, u8 powerLimit, int test)
Definition eeprom.h:661
int(* fill_eeprom)(struct ath_hw *hw)
Definition eeprom.h:656
int(* get_eeprom_ver)(struct ath_hw *hw)
Definition eeprom.h:657
u16(* get_spur_channel)(struct ath_hw *ah, u16 i, int is2GHz)
Definition eeprom.h:665
int(* get_eeprom_rev)(struct ath_hw *hw)
Definition eeprom.h:658
Definition hw.c:16
u8 noiseFloorThreshCh[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:401
u8 xatten2Margin[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:422
u32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:388
u8 antennaGainCh[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:390
u8 txRxAttenCh[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:392
u8 rxTxMarginCh[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:393
u8 bswAtten[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:418
u8 iqCalQCh[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:405
struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS]
Definition eeprom.h:449
u8 iqCalICh[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:404
u8 bswMargin[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:419
u8 xlnaGainCh[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:396
u8 xatten2Db[AR5416_EEP4K_MAX_CHAINS]
Definition eeprom.h:421
u8 bswMargin[AR9287_MAX_CHAINS]
Definition eeprom.h:497
int8_t noiseFloorThreshCh[AR9287_MAX_CHAINS]
Definition eeprom.h:486
u32 antCtrlChain[AR9287_MAX_CHAINS]
Definition eeprom.h:475
u8 txRxAttenCh[AR9287_MAX_CHAINS]
Definition eeprom.h:479
u8 bswAtten[AR9287_MAX_CHAINS]
Definition eeprom.h:496
u8 rxTxMarginCh[AR9287_MAX_CHAINS]
Definition eeprom.h:480
struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS]
Definition eeprom.h:507
int8_t iqCalICh[AR9287_MAX_CHAINS]
Definition eeprom.h:489
int8_t antennaGainCh[AR9287_MAX_CHAINS]
Definition eeprom.h:477
int8_t iqCalQCh[AR9287_MAX_CHAINS]
Definition eeprom.h:490
u8 xlnaGainCh[AR5416_MAX_CHAINS]
Definition eeprom.h:346
u8 futureModal[6]
Definition eeprom.h:375
u8 iqCalICh[AR5416_MAX_CHAINS]
Definition eeprom.h:354
u8 txRxAttenCh[AR5416_MAX_CHAINS]
Definition eeprom.h:342
u8 pwrDecreaseFor3Chain
Definition eeprom.h:361
u8 xatten2Margin[AR5416_MAX_CHAINS]
Definition eeprom.h:369
u32 antCtrlChain[AR5416_MAX_CHAINS]
Definition eeprom.h:338
u8 iqCalQCh[AR5416_MAX_CHAINS]
Definition eeprom.h:355
u8 bswAtten[AR5416_MAX_CHAINS]
Definition eeprom.h:365
u8 xatten2Db[AR5416_MAX_CHAINS]
Definition eeprom.h:368
u16 xpaBiasLvlFreq[3]
Definition eeprom.h:374
u8 pwrDecreaseFor2Chain
Definition eeprom.h:360
u8 antennaGainCh[AR5416_MAX_CHAINS]
Definition eeprom.h:340
u8 ht40PowerIncForPdadc
Definition eeprom.h:364
struct spur_chan spurChans[AR_EEPROM_MODAL_SPURS]
Definition eeprom.h:377
u8 noiseFloorThreshCh[AR5416_MAX_CHAINS]
Definition eeprom.h:351
u8 bswMargin[AR5416_MAX_CHAINS]
Definition eeprom.h:366
u8 txFrameToDataStart
Definition eeprom.h:362
u8 rxTxMarginCh[AR5416_MAX_CHAINS]
Definition eeprom.h:343
u16 spurChan
Definition eeprom.h:332
u8 spurRangeHigh
Definition eeprom.h:334
u8 spurRangeLow
Definition eeprom.h:333
struct cal_data_op_loop_ar9287 calDataOpen
Definition eeprom.h:548
struct cal_data_per_freq_ar9287 calDataClose
Definition eeprom.h:549
#define u16
Definition vga.h:20
#define u32
Definition vga.h:21