25#define AR_DescId 0xffff0000
27#define AR_CtrlStat 0x00004000
28#define AR_CtrlStat_S 14
29#define AR_TxRxDesc 0x00008000
30#define AR_TxRxDesc_S 15
31#define AR_TxQcuNum 0x00000f00
32#define AR_TxQcuNum_S 8
34#define AR_BufLen 0x0fff0000
37#define AR_TxDescId 0xffff0000
38#define AR_TxDescId_S 16
39#define AR_TxPtrChkSum 0x0000ffff
41#define AR_LowRxChain 0x00004000
43#define AR_Not_Sounding 0x20000000
46#define AR_PAPRDChainMask 0x00000e00
47#define AR_PAPRDChainMask_S 9
49#define MAP_ISR_S2_CST 6
50#define MAP_ISR_S2_GTT 6
51#define MAP_ISR_S2_TIM 3
52#define MAP_ISR_S2_CABEND 0
53#define MAP_ISR_S2_DTIMSYNC 7
54#define MAP_ISR_S2_DTIM 7
55#define MAP_ISR_S2_TSFOOR 4
56#define MAP_ISR_S2_BB_WATCHDOG 6
58#define AR9003TXC_CONST(_ds) ((const struct ar9003_txc *) _ds)
int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs, void *buf_addr)
void ath9k_hw_setup_statusring(struct ath_hw *ah, void *ts_start, u32 ts_paddr_start, u8 size)
void ath9k_hw_reset_txstatus_ring(struct ath_hw *ah)
void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
void ath9k_hw_addrxbuf_edma(struct ath_hw *ah, u32 rxdp, enum ath9k_rx_qtype qtype)
void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)
uint16_t size
Buffer size.
#define FILE_SECBOOT(_status)
Declare a file's UEFI Secure Boot permission status.