iPXE
Data Structures | Macros | Enumerations | Functions
intel.h File Reference

Intel 10/100/1000 network card driver. More...

#include <stdint.h>
#include <ipxe/if_ether.h>
#include <ipxe/nvs.h>
#include <ipxe/dma.h>

Go to the source code of this file.

Data Structures

struct  intel_descriptor
 A packet descriptor. More...
 
union  intel_receive_address
 Receive address. More...
 
struct  intel_ring
 An Intel descriptor ring. More...
 
struct  intel_mailbox
 An Intel virtual function mailbox. More...
 
struct  intel_nic
 An Intel network card. More...
 

Macros

#define INTEL_BAR_SIZE   ( 128 * 1024 )
 Intel BAR size. More...
 
#define INTEL_DESC_FL_DTYP(dtyp)   ( (dtyp) << 4 )
 Descriptor type. More...
 
#define INTEL_DESC_FL_DTYP_DATA   INTEL_DESC_FL_DTYP ( 0x03 )
 
#define INTEL_DESC_CMD_DEXT   0x20
 Descriptor extension. More...
 
#define INTEL_DESC_CMD_RS   0x08
 Report status. More...
 
#define INTEL_DESC_CMD_IFCS   0x02
 Insert frame checksum (CRC) More...
 
#define INTEL_DESC_CMD_EOP   0x01
 End of packet. More...
 
#define INTEL_DESC_STATUS_DD   0x00000001UL
 Descriptor done. More...
 
#define INTEL_DESC_STATUS_RXE   0x00000100UL
 Receive error. More...
 
#define INTEL_DESC_STATUS_PAYLEN(len)   ( (len) << 14 )
 Payload length. More...
 
#define INTEL_CTRL   0x00000UL
 Device Control Register. More...
 
#define INTEL_CTRL_LRST   0x00000008UL
 Link reset. More...
 
#define INTEL_CTRL_ASDE   0x00000020UL
 Auto-speed detection. More...
 
#define INTEL_CTRL_SLU   0x00000040UL
 Set link up. More...
 
#define INTEL_CTRL_FRCSPD   0x00000800UL
 Force speed. More...
 
#define INTEL_CTRL_FRCDPLX   0x00001000UL
 Force duplex. More...
 
#define INTEL_CTRL_RST   0x04000000UL
 Device reset. More...
 
#define INTEL_CTRL_PHY_RST   0x80000000UL
 PHY reset. More...
 
#define INTEL_RESET_DELAY_MS   20
 Time to delay for device reset, in milliseconds. More...
 
#define INTEL_STATUS   0x00008UL
 Device Status Register. More...
 
#define INTEL_STATUS_LU   0x00000002UL
 Link up. More...
 
#define INTEL_EERD   0x00014UL
 EEPROM Read Register. More...
 
#define INTEL_EERD_START   0x00000001UL
 Start read. More...
 
#define INTEL_EERD_DONE_SMALL   0x00000010UL
 Read done (small EERD) More...
 
#define INTEL_EERD_DONE_LARGE   0x00000002UL
 Read done (large EERD) More...
 
#define INTEL_EERD_ADDR_SHIFT_SMALL   8
 Address shift (small) More...
 
#define INTEL_EERD_ADDR_SHIFT_LARGE   2
 Address shift (large) More...
 
#define INTEL_EERD_DATA(value)   ( (value) >> 16 )
 Read data. More...
 
#define INTEL_EEPROM_MAX_WAIT_MS   100
 Maximum time to wait for EEPROM read, in milliseconds. More...
 
#define INTEL_EEPROM_WORD_LEN_LOG2   1
 EEPROM word length. More...
 
#define INTEL_EEPROM_MIN_SIZE_WORDS   64
 Minimum EEPROM size, in words. More...
 
#define INTEL_EEPROM_MAC   0x00
 Offset of MAC address within EEPROM. More...
 
#define INTEL_ICR   0x000c0UL
 Interrupt Cause Read Register. More...
 
#define INTEL_IRQ_TXDW   0x00000001UL
 Transmit descriptor done. More...
 
#define INTEL_IRQ_TXQE   0x00000002UL
 Transmit queue empty. More...
 
#define INTEL_IRQ_LSC   0x00000004UL
 Link status change. More...
 
#define INTEL_IRQ_RXDMT0   0x00000010UL
 Receive queue low. More...
 
#define INTEL_IRQ_RXO   0x00000040UL
 Receive overrun. More...
 
#define INTEL_IRQ_RXT0   0x00000080UL
 Receive timer. More...
 
#define INTEL_IMS   0x000d0UL
 Interrupt Mask Set/Read Register. More...
 
#define INTEL_IMC   0x000d8UL
 Interrupt Mask Clear Register. More...
 
#define INTEL_RCTL   0x00100UL
 Receive Control Register. More...
 
#define INTEL_RCTL_EN   0x00000002UL
 Receive enable. More...
 
#define INTEL_RCTL_UPE   0x00000008UL
 Unicast promiscuous mode. More...
 
#define INTEL_RCTL_MPE   0x00000010UL
 Multicast promiscuous. More...
 
#define INTEL_RCTL_BAM   0x00008000UL
 Broadcast accept mode. More...
 
#define INTEL_RCTL_BSIZE_BSEX(bsex, bsize)   ( ( (bsize) << 16 ) | ( (bsex) << 25 ) )
 Buffer size. More...
 
#define INTEL_RCTL_BSIZE_2048   INTEL_RCTL_BSIZE_BSEX ( 0, 0 )
 
#define INTEL_RCTL_BSIZE_BSEX_MASK   INTEL_RCTL_BSIZE_BSEX ( 1, 3 )
 
#define INTEL_RCTL_SECRC   0x04000000UL
 Strip CRC. More...
 
#define INTEL_TCTL   0x00400UL
 Transmit Control Register. More...
 
#define INTEL_TCTL_EN   0x00000002UL
 Transmit enable. More...
 
#define INTEL_TCTL_PSP   0x00000008UL
 Pad short packets. More...
 
#define INTEL_TCTL_CT(x)   ( (x) << 4 )
 Collision threshold. More...
 
#define INTEL_TCTL_CT_DEFAULT   INTEL_TCTL_CT ( 0x0f )
 
#define INTEL_TCTL_CT_MASK   INTEL_TCTL_CT ( 0xff )
 
#define INTEL_TCTL_COLD(x)   ( (x) << 12 )
 Collision distance. More...
 
#define INTEL_TCTL_COLD_DEFAULT   INTEL_TCTL_COLD ( 0x040 )
 
#define INTEL_TCTL_COLD_MASK   INTEL_TCTL_COLD ( 0x3ff )
 
#define INTEL_PBA   0x01000UL
 Packet Buffer Allocation. More...
 
#define INTEL_PBS   0x01008UL
 Packet Buffer Size. More...
 
#define INTEL_RXPBS   0x02404UL
 Receive packet buffer size. More...
 
#define INTEL_RXPBS_I210   0x000000a2UL
 I210 power-up default. More...
 
#define INTEL_RD   0x02800UL
 Receive Descriptor register block. More...
 
#define INTEL_NUM_RX_DESC   16
 Number of receive descriptors. More...
 
#define INTEL_RX_FILL   8
 Receive descriptor ring fill level. More...
 
#define INTEL_RX_MAX_LEN   2048
 Receive buffer length. More...
 
#define INTEL_TXPBS   0x03404UL
 Transmit packet buffer size. More...
 
#define INTEL_TXPBS_I210   0x04000014UL
 I210 power-up default. More...
 
#define INTEL_TD   0x03800UL
 Transmit Descriptor register block. More...
 
#define INTEL_NUM_TX_DESC   16
 Number of transmit descriptors. More...
 
#define INTEL_TX_FILL   ( INTEL_NUM_TX_DESC - 1 )
 Transmit descriptor ring maximum fill level. More...
 
#define INTEL_xDBAL   0x00
 Receive/Transmit Descriptor Base Address Low (offset) More...
 
#define INTEL_xDBAH   0x04
 Receive/Transmit Descriptor Base Address High (offset) More...
 
#define INTEL_xDLEN   0x08
 Receive/Transmit Descriptor Length (offset) More...
 
#define INTEL_xDH   0x10
 Receive/Transmit Descriptor Head (offset) More...
 
#define INTEL_xDT   0x18
 Receive/Transmit Descriptor Tail (offset) More...
 
#define INTEL_xDCTL   0x28
 Receive/Transmit Descriptor Control (offset) More...
 
#define INTEL_xDCTL_ENABLE   0x02000000UL
 Queue enable. More...
 
#define INTEL_DISABLE_MAX_WAIT_MS   100
 Maximum time to wait for queue disable, in milliseconds. More...
 
#define INTEL_RAL0   0x05400UL
 Receive Address Low. More...
 
#define INTEL_RAH0   0x05404UL
 Receive Address High. More...
 
#define INTEL_RAH0_AV   0x80000000UL
 Address valid. More...
 
#define INTEL_FEXTNVM11   0x05bbcUL
 Future Extended NVM register 11. More...
 
#define INTEL_FEXTNVM11_WTF   0x00002000UL
 Don't ask. More...
 
#define INTEL_I219   ( INTEL_NO_PHY_RST | INTEL_RST_HANG )
 The i219 has a seriously broken reset mechanism. More...
 

Enumerations

enum  intel_flags {
  INTEL_PBS_ERRATA = 0x0001, INTEL_VMWARE = 0x0002, INTEL_NO_PHY_RST = 0x0004, INTEL_NO_ASDE = 0x0008,
  INTEL_RST_HANG = 0x0010, INTEL_PBSIZE_RST = 0x0020
}
 Driver flags. More...
 

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)
 
static void intel_init_ring (struct intel_ring *ring, unsigned int count, unsigned int reg, void(*describe)(struct intel_descriptor *desc, physaddr_t addr, size_t len))
 Initialise descriptor ring. More...
 
static void intel_init_mbox (struct intel_mailbox *mbox, unsigned int ctrl, unsigned int mem)
 Initialise mailbox. More...
 
static void intel_diag (struct intel_nic *intel)
 Dump diagnostic information. More...
 
void intel_describe_tx (struct intel_descriptor *tx, physaddr_t addr, size_t len)
 Populate transmit descriptor. More...
 
void intel_describe_tx_adv (struct intel_descriptor *tx, physaddr_t addr, size_t len)
 Populate advanced transmit descriptor. More...
 
void intel_describe_rx (struct intel_descriptor *rx, physaddr_t addr, size_t len)
 Populate receive descriptor. More...
 
void intel_reset_ring (struct intel_nic *intel, unsigned int reg)
 Reset descriptor ring. More...
 
int intel_create_ring (struct intel_nic *intel, struct intel_ring *ring)
 Create descriptor ring. More...
 
void intel_destroy_ring (struct intel_nic *intel, struct intel_ring *ring)
 Destroy descriptor ring. More...
 
void intel_refill_rx (struct intel_nic *intel)
 Refill receive descriptor ring. More...
 
void intel_empty_rx (struct intel_nic *intel)
 Discard unused receive I/O buffers. More...
 
int intel_transmit (struct net_device *netdev, struct io_buffer *iobuf)
 Transmit packet. More...
 
void intel_poll_tx (struct net_device *netdev)
 Poll for completed packets. More...
 
void intel_poll_rx (struct net_device *netdev)
 Poll for received packets. More...
 

Detailed Description

Intel 10/100/1000 network card driver.

Definition in file intel.h.

Macro Definition Documentation

◆ INTEL_BAR_SIZE

#define INTEL_BAR_SIZE   ( 128 * 1024 )

Intel BAR size.

Definition at line 18 of file intel.h.

◆ INTEL_DESC_FL_DTYP

#define INTEL_DESC_FL_DTYP (   dtyp)    ( (dtyp) << 4 )

Descriptor type.

Definition at line 35 of file intel.h.

◆ INTEL_DESC_FL_DTYP_DATA

#define INTEL_DESC_FL_DTYP_DATA   INTEL_DESC_FL_DTYP ( 0x03 )

Definition at line 36 of file intel.h.

◆ INTEL_DESC_CMD_DEXT

#define INTEL_DESC_CMD_DEXT   0x20

Descriptor extension.

Definition at line 39 of file intel.h.

◆ INTEL_DESC_CMD_RS

#define INTEL_DESC_CMD_RS   0x08

Report status.

Definition at line 42 of file intel.h.

◆ INTEL_DESC_CMD_IFCS

#define INTEL_DESC_CMD_IFCS   0x02

Insert frame checksum (CRC)

Definition at line 45 of file intel.h.

◆ INTEL_DESC_CMD_EOP

#define INTEL_DESC_CMD_EOP   0x01

End of packet.

Definition at line 48 of file intel.h.

◆ INTEL_DESC_STATUS_DD

#define INTEL_DESC_STATUS_DD   0x00000001UL

Descriptor done.

Definition at line 51 of file intel.h.

◆ INTEL_DESC_STATUS_RXE

#define INTEL_DESC_STATUS_RXE   0x00000100UL

Receive error.

Definition at line 54 of file intel.h.

◆ INTEL_DESC_STATUS_PAYLEN

#define INTEL_DESC_STATUS_PAYLEN (   len)    ( (len) << 14 )

Payload length.

Definition at line 57 of file intel.h.

◆ INTEL_CTRL

#define INTEL_CTRL   0x00000UL

Device Control Register.

Definition at line 60 of file intel.h.

◆ INTEL_CTRL_LRST

#define INTEL_CTRL_LRST   0x00000008UL

Link reset.

Definition at line 61 of file intel.h.

◆ INTEL_CTRL_ASDE

#define INTEL_CTRL_ASDE   0x00000020UL

Auto-speed detection.

Definition at line 62 of file intel.h.

◆ INTEL_CTRL_SLU

#define INTEL_CTRL_SLU   0x00000040UL

Set link up.

Definition at line 63 of file intel.h.

◆ INTEL_CTRL_FRCSPD

#define INTEL_CTRL_FRCSPD   0x00000800UL

Force speed.

Definition at line 64 of file intel.h.

◆ INTEL_CTRL_FRCDPLX

#define INTEL_CTRL_FRCDPLX   0x00001000UL

Force duplex.

Definition at line 65 of file intel.h.

◆ INTEL_CTRL_RST

#define INTEL_CTRL_RST   0x04000000UL

Device reset.

Definition at line 66 of file intel.h.

◆ INTEL_CTRL_PHY_RST

#define INTEL_CTRL_PHY_RST   0x80000000UL

PHY reset.

Definition at line 67 of file intel.h.

◆ INTEL_RESET_DELAY_MS

#define INTEL_RESET_DELAY_MS   20

Time to delay for device reset, in milliseconds.

Definition at line 70 of file intel.h.

◆ INTEL_STATUS

#define INTEL_STATUS   0x00008UL

Device Status Register.

Definition at line 73 of file intel.h.

◆ INTEL_STATUS_LU

#define INTEL_STATUS_LU   0x00000002UL

Link up.

Definition at line 74 of file intel.h.

◆ INTEL_EERD

#define INTEL_EERD   0x00014UL

EEPROM Read Register.

Definition at line 77 of file intel.h.

◆ INTEL_EERD_START

#define INTEL_EERD_START   0x00000001UL

Start read.

Definition at line 78 of file intel.h.

◆ INTEL_EERD_DONE_SMALL

#define INTEL_EERD_DONE_SMALL   0x00000010UL

Read done (small EERD)

Definition at line 79 of file intel.h.

◆ INTEL_EERD_DONE_LARGE

#define INTEL_EERD_DONE_LARGE   0x00000002UL

Read done (large EERD)

Definition at line 80 of file intel.h.

◆ INTEL_EERD_ADDR_SHIFT_SMALL

#define INTEL_EERD_ADDR_SHIFT_SMALL   8

Address shift (small)

Definition at line 81 of file intel.h.

◆ INTEL_EERD_ADDR_SHIFT_LARGE

#define INTEL_EERD_ADDR_SHIFT_LARGE   2

Address shift (large)

Definition at line 82 of file intel.h.

◆ INTEL_EERD_DATA

#define INTEL_EERD_DATA (   value)    ( (value) >> 16 )

Read data.

Definition at line 83 of file intel.h.

◆ INTEL_EEPROM_MAX_WAIT_MS

#define INTEL_EEPROM_MAX_WAIT_MS   100

Maximum time to wait for EEPROM read, in milliseconds.

Definition at line 86 of file intel.h.

◆ INTEL_EEPROM_WORD_LEN_LOG2

#define INTEL_EEPROM_WORD_LEN_LOG2   1

EEPROM word length.

Definition at line 89 of file intel.h.

◆ INTEL_EEPROM_MIN_SIZE_WORDS

#define INTEL_EEPROM_MIN_SIZE_WORDS   64

Minimum EEPROM size, in words.

Definition at line 92 of file intel.h.

◆ INTEL_EEPROM_MAC

#define INTEL_EEPROM_MAC   0x00

Offset of MAC address within EEPROM.

Definition at line 95 of file intel.h.

◆ INTEL_ICR

#define INTEL_ICR   0x000c0UL

Interrupt Cause Read Register.

Definition at line 98 of file intel.h.

◆ INTEL_IRQ_TXDW

#define INTEL_IRQ_TXDW   0x00000001UL

Transmit descriptor done.

Definition at line 99 of file intel.h.

◆ INTEL_IRQ_TXQE

#define INTEL_IRQ_TXQE   0x00000002UL

Transmit queue empty.

Definition at line 100 of file intel.h.

◆ INTEL_IRQ_LSC

#define INTEL_IRQ_LSC   0x00000004UL

Link status change.

Definition at line 101 of file intel.h.

◆ INTEL_IRQ_RXDMT0

#define INTEL_IRQ_RXDMT0   0x00000010UL

Receive queue low.

Definition at line 102 of file intel.h.

◆ INTEL_IRQ_RXO

#define INTEL_IRQ_RXO   0x00000040UL

Receive overrun.

Definition at line 103 of file intel.h.

◆ INTEL_IRQ_RXT0

#define INTEL_IRQ_RXT0   0x00000080UL

Receive timer.

Definition at line 104 of file intel.h.

◆ INTEL_IMS

#define INTEL_IMS   0x000d0UL

Interrupt Mask Set/Read Register.

Definition at line 107 of file intel.h.

◆ INTEL_IMC

#define INTEL_IMC   0x000d8UL

Interrupt Mask Clear Register.

Definition at line 110 of file intel.h.

◆ INTEL_RCTL

#define INTEL_RCTL   0x00100UL

Receive Control Register.

Definition at line 113 of file intel.h.

◆ INTEL_RCTL_EN

#define INTEL_RCTL_EN   0x00000002UL

Receive enable.

Definition at line 114 of file intel.h.

◆ INTEL_RCTL_UPE

#define INTEL_RCTL_UPE   0x00000008UL

Unicast promiscuous mode.

Definition at line 115 of file intel.h.

◆ INTEL_RCTL_MPE

#define INTEL_RCTL_MPE   0x00000010UL

Multicast promiscuous.

Definition at line 116 of file intel.h.

◆ INTEL_RCTL_BAM

#define INTEL_RCTL_BAM   0x00008000UL

Broadcast accept mode.

Definition at line 117 of file intel.h.

◆ INTEL_RCTL_BSIZE_BSEX

#define INTEL_RCTL_BSIZE_BSEX (   bsex,
  bsize 
)    ( ( (bsize) << 16 ) | ( (bsex) << 25 ) )

Buffer size.

Definition at line 118 of file intel.h.

◆ INTEL_RCTL_BSIZE_2048

#define INTEL_RCTL_BSIZE_2048   INTEL_RCTL_BSIZE_BSEX ( 0, 0 )

Definition at line 121 of file intel.h.

◆ INTEL_RCTL_BSIZE_BSEX_MASK

#define INTEL_RCTL_BSIZE_BSEX_MASK   INTEL_RCTL_BSIZE_BSEX ( 1, 3 )

Definition at line 122 of file intel.h.

◆ INTEL_RCTL_SECRC

#define INTEL_RCTL_SECRC   0x04000000UL

Strip CRC.

Definition at line 123 of file intel.h.

◆ INTEL_TCTL

#define INTEL_TCTL   0x00400UL

Transmit Control Register.

Definition at line 126 of file intel.h.

◆ INTEL_TCTL_EN

#define INTEL_TCTL_EN   0x00000002UL

Transmit enable.

Definition at line 127 of file intel.h.

◆ INTEL_TCTL_PSP

#define INTEL_TCTL_PSP   0x00000008UL

Pad short packets.

Definition at line 128 of file intel.h.

◆ INTEL_TCTL_CT

#define INTEL_TCTL_CT (   x)    ( (x) << 4 )

Collision threshold.

Definition at line 129 of file intel.h.

◆ INTEL_TCTL_CT_DEFAULT

#define INTEL_TCTL_CT_DEFAULT   INTEL_TCTL_CT ( 0x0f )

Definition at line 130 of file intel.h.

◆ INTEL_TCTL_CT_MASK

#define INTEL_TCTL_CT_MASK   INTEL_TCTL_CT ( 0xff )

Definition at line 131 of file intel.h.

◆ INTEL_TCTL_COLD

#define INTEL_TCTL_COLD (   x)    ( (x) << 12 )

Collision distance.

Definition at line 132 of file intel.h.

◆ INTEL_TCTL_COLD_DEFAULT

#define INTEL_TCTL_COLD_DEFAULT   INTEL_TCTL_COLD ( 0x040 )

Definition at line 133 of file intel.h.

◆ INTEL_TCTL_COLD_MASK

#define INTEL_TCTL_COLD_MASK   INTEL_TCTL_COLD ( 0x3ff )

Definition at line 134 of file intel.h.

◆ INTEL_PBA

#define INTEL_PBA   0x01000UL

Packet Buffer Allocation.

Definition at line 137 of file intel.h.

◆ INTEL_PBS

#define INTEL_PBS   0x01008UL

Packet Buffer Size.

Definition at line 140 of file intel.h.

◆ INTEL_RXPBS

#define INTEL_RXPBS   0x02404UL

Receive packet buffer size.

Definition at line 143 of file intel.h.

◆ INTEL_RXPBS_I210

#define INTEL_RXPBS_I210   0x000000a2UL

I210 power-up default.

Definition at line 144 of file intel.h.

◆ INTEL_RD

#define INTEL_RD   0x02800UL

Receive Descriptor register block.

Definition at line 147 of file intel.h.

◆ INTEL_NUM_RX_DESC

#define INTEL_NUM_RX_DESC   16

Number of receive descriptors.

Minimum value is 8, since the descriptor ring length must be a multiple of 128.

Definition at line 154 of file intel.h.

◆ INTEL_RX_FILL

#define INTEL_RX_FILL   8

Receive descriptor ring fill level.

Definition at line 157 of file intel.h.

◆ INTEL_RX_MAX_LEN

#define INTEL_RX_MAX_LEN   2048

Receive buffer length.

Definition at line 160 of file intel.h.

◆ INTEL_TXPBS

#define INTEL_TXPBS   0x03404UL

Transmit packet buffer size.

Definition at line 163 of file intel.h.

◆ INTEL_TXPBS_I210

#define INTEL_TXPBS_I210   0x04000014UL

I210 power-up default.

Definition at line 164 of file intel.h.

◆ INTEL_TD

#define INTEL_TD   0x03800UL

Transmit Descriptor register block.

Definition at line 167 of file intel.h.

◆ INTEL_NUM_TX_DESC

#define INTEL_NUM_TX_DESC   16

Number of transmit descriptors.

Descriptor ring length must be a multiple of 16. ICH8/9/10 requires a minimum of 16 TX descriptors.

Definition at line 174 of file intel.h.

◆ INTEL_TX_FILL

#define INTEL_TX_FILL   ( INTEL_NUM_TX_DESC - 1 )

Transmit descriptor ring maximum fill level.

Definition at line 177 of file intel.h.

◆ INTEL_xDBAL

#define INTEL_xDBAL   0x00

Receive/Transmit Descriptor Base Address Low (offset)

Definition at line 180 of file intel.h.

◆ INTEL_xDBAH

#define INTEL_xDBAH   0x04

Receive/Transmit Descriptor Base Address High (offset)

Definition at line 183 of file intel.h.

◆ INTEL_xDLEN

#define INTEL_xDLEN   0x08

Receive/Transmit Descriptor Length (offset)

Definition at line 186 of file intel.h.

◆ INTEL_xDH

#define INTEL_xDH   0x10

Receive/Transmit Descriptor Head (offset)

Definition at line 189 of file intel.h.

◆ INTEL_xDT

#define INTEL_xDT   0x18

Receive/Transmit Descriptor Tail (offset)

Definition at line 192 of file intel.h.

◆ INTEL_xDCTL

#define INTEL_xDCTL   0x28

Receive/Transmit Descriptor Control (offset)

Definition at line 195 of file intel.h.

◆ INTEL_xDCTL_ENABLE

#define INTEL_xDCTL_ENABLE   0x02000000UL

Queue enable.

Definition at line 196 of file intel.h.

◆ INTEL_DISABLE_MAX_WAIT_MS

#define INTEL_DISABLE_MAX_WAIT_MS   100

Maximum time to wait for queue disable, in milliseconds.

Definition at line 199 of file intel.h.

◆ INTEL_RAL0

#define INTEL_RAL0   0x05400UL

Receive Address Low.

Definition at line 202 of file intel.h.

◆ INTEL_RAH0

#define INTEL_RAH0   0x05404UL

Receive Address High.

Definition at line 205 of file intel.h.

◆ INTEL_RAH0_AV

#define INTEL_RAH0_AV   0x80000000UL

Address valid.

Definition at line 206 of file intel.h.

◆ INTEL_FEXTNVM11

#define INTEL_FEXTNVM11   0x05bbcUL

Future Extended NVM register 11.

Definition at line 209 of file intel.h.

◆ INTEL_FEXTNVM11_WTF

#define INTEL_FEXTNVM11_WTF   0x00002000UL

Don't ask.

Definition at line 210 of file intel.h.

◆ INTEL_I219

#define INTEL_I219   ( INTEL_NO_PHY_RST | INTEL_RST_HANG )

The i219 has a seriously broken reset mechanism.

Definition at line 336 of file intel.h.

Enumeration Type Documentation

◆ intel_flags

enum intel_flags

Driver flags.

Enumerator
INTEL_PBS_ERRATA 

PBS/PBA errata workaround required.

INTEL_VMWARE 

VMware missing interrupt workaround required.

INTEL_NO_PHY_RST 

PHY reset is broken.

INTEL_NO_ASDE 

ASDE is broken.

INTEL_RST_HANG 

Reset may cause a complete device hang.

INTEL_PBSIZE_RST 

PBSIZE registers must be explicitly reset.

Definition at line 320 of file intel.h.

342  {

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL  )

◆ intel_init_ring()

static void intel_init_ring ( struct intel_ring *  ring,
unsigned int  count,
unsigned int  reg,
void(*)(struct intel_descriptor *desc, physaddr_t addr, size_t len)  describe 
)
inlinestatic

Initialise descriptor ring.

Parameters
ringDescriptor ring
countNumber of descriptors
regDescriptor register block
describeMethod to populate descriptor

Definition at line 256 of file intel.h.

257  {
258 
259  ring->len = ( count * sizeof ( ring->desc[0] ) );
260  ring->reg = reg;
261  ring->describe = describe;
262 }
263 
reg
static unsigned int unsigned int reg
Definition: myson.h:162
intel_ring::len
size_t len
Length (in bytes)
Definition: intel.h:235
intel_ring::reg
unsigned int reg
Register block.
Definition: intel.h:233
count
static unsigned int count
Number of entries.
Definition: dwmac.h:225
intel_ring::describe
void(* describe)(struct intel_descriptor *desc, physaddr_t addr, size_t len)
Populate descriptor.
Definition: intel.h:243
intel_ring::desc
struct intel_descriptor * desc
Descriptors.
Definition: intel.h:224

References count, intel_ring::desc, intel_ring::describe, intel_ring::len, reg, and intel_ring::reg.

Referenced by intel_probe(), intelx_probe(), and intelxvf_probe().

◆ intel_init_mbox()

static void intel_init_mbox ( struct intel_mailbox *  mbox,
unsigned int  ctrl,
unsigned int  mem 
)
inlinestatic

Initialise mailbox.

Parameters
mboxMailbox
ctrlMailbox control register
memMailbox memory register base

Definition at line 281 of file intel.h.

281  {
282 
283  mbox->ctrl = ctrl;
284  mbox->mem = mem;
285 }
286 
mbox
Definition: golan.c:120
ctrl
uint8_t ctrl
Ring control.
Definition: dwmac.h:18

References ctrl.

Referenced by intelxvf_probe().

◆ intel_diag()

static void intel_diag ( struct intel_nic *  intel)
inlinestatic

Dump diagnostic information.

Parameters
intelIntel device

Definition at line 343 of file intel.h.

◆ intel_describe_tx()

void intel_describe_tx ( struct intel_descriptor *  tx,
physaddr_t  addr,
size_t  len 
)

Populate transmit descriptor.

Parameters
txTransmit descriptor
addrData buffer address
lenLength of data

Definition at line 395 of file intel.c.

396  {
397 
398  /* Populate transmit descriptor */
399  tx->address = cpu_to_le64 ( addr );
400  tx->length = cpu_to_le16 ( len );
401  tx->flags = 0;
402  tx->command = ( INTEL_DESC_CMD_RS | INTEL_DESC_CMD_IFCS |
403  INTEL_DESC_CMD_EOP );
404  tx->status = 0;
405 }
cpu_to_le64
#define cpu_to_le64(value)
Definition: byteswap.h:108
len
ring len
Length.
Definition: dwmac.h:231
INTEL_DESC_CMD_IFCS
#define INTEL_DESC_CMD_IFCS
Insert frame checksum (CRC)
Definition: intel.h:45
addr
uint32_t addr
Buffer address.
Definition: dwmac.h:20
INTEL_DESC_CMD_EOP
#define INTEL_DESC_CMD_EOP
End of packet.
Definition: intel.h:48
cpu_to_le16
#define cpu_to_le16(value)
Definition: byteswap.h:106
INTEL_DESC_CMD_RS
#define INTEL_DESC_CMD_RS
Report status.
Definition: intel.h:42
tx
u8 tx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets to the AP.
Definition: wpa.h:237

References addr, cpu_to_le16, cpu_to_le64, INTEL_DESC_CMD_EOP, INTEL_DESC_CMD_IFCS, INTEL_DESC_CMD_RS, len, and tx.

Referenced by intel_probe(), and intelx_probe().

◆ intel_describe_tx_adv()

void intel_describe_tx_adv ( struct intel_descriptor *  tx,
physaddr_t  addr,
size_t  len 
)

Populate advanced transmit descriptor.

Parameters
txTransmit descriptor
addrData buffer address
lenLength of data

Definition at line 414 of file intel.c.

415  {
416 
417  /* Populate advanced transmit descriptor */
418  tx->address = cpu_to_le64 ( addr );
419  tx->length = cpu_to_le16 ( len );
420  tx->flags = INTEL_DESC_FL_DTYP_DATA;
421  tx->command = ( INTEL_DESC_CMD_DEXT | INTEL_DESC_CMD_RS |
422  INTEL_DESC_CMD_IFCS | INTEL_DESC_CMD_EOP );
423  tx->status = cpu_to_le32 ( INTEL_DESC_STATUS_PAYLEN ( len ) );
424 }
INTEL_DESC_STATUS_PAYLEN
#define INTEL_DESC_STATUS_PAYLEN(len)
Payload length.
Definition: intel.h:57
cpu_to_le64
#define cpu_to_le64(value)
Definition: byteswap.h:108
INTEL_DESC_FL_DTYP_DATA
#define INTEL_DESC_FL_DTYP_DATA
Definition: intel.h:36
len
ring len
Length.
Definition: dwmac.h:231
INTEL_DESC_CMD_IFCS
#define INTEL_DESC_CMD_IFCS
Insert frame checksum (CRC)
Definition: intel.h:45
cpu_to_le32
#define cpu_to_le32(value)
Definition: byteswap.h:107
addr
uint32_t addr
Buffer address.
Definition: dwmac.h:20
INTEL_DESC_CMD_DEXT
#define INTEL_DESC_CMD_DEXT
Descriptor extension.
Definition: intel.h:39
INTEL_DESC_CMD_EOP
#define INTEL_DESC_CMD_EOP
End of packet.
Definition: intel.h:48
cpu_to_le16
#define cpu_to_le16(value)
Definition: byteswap.h:106
INTEL_DESC_CMD_RS
#define INTEL_DESC_CMD_RS
Report status.
Definition: intel.h:42
tx
u8 tx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets to the AP.
Definition: wpa.h:237

References addr, cpu_to_le16, cpu_to_le32, cpu_to_le64, INTEL_DESC_CMD_DEXT, INTEL_DESC_CMD_EOP, INTEL_DESC_CMD_IFCS, INTEL_DESC_CMD_RS, INTEL_DESC_FL_DTYP_DATA, INTEL_DESC_STATUS_PAYLEN, len, and tx.

Referenced by intelxvf_probe().

◆ intel_describe_rx()

void intel_describe_rx ( struct intel_descriptor *  rx,
physaddr_t  addr,
size_t len  __unused 
)

Populate receive descriptor.

Parameters
rxReceive descriptor
addrData buffer address
lenLength of data

Definition at line 433 of file intel.c.

434  {
435 
436  /* Populate transmit descriptor */
437  rx->address = cpu_to_le64 ( addr );
438  rx->length = 0;
439  rx->status = 0;
440 }
cpu_to_le64
#define cpu_to_le64(value)
Definition: byteswap.h:108
addr
uint32_t addr
Buffer address.
Definition: dwmac.h:20
rx
u8 rx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets from the AP.
Definition: wpa.h:234

References addr, cpu_to_le64, and rx.

Referenced by intel_probe(), intelx_probe(), and intelxvf_probe().

◆ intel_reset_ring()

void intel_reset_ring ( struct intel_nic *  intel,
unsigned int  reg 
)

Reset descriptor ring.

Parameters
intelIntel device
regRegister block
Return values
rcReturn status code

Definition at line 487 of file intel.c.

487  {
488 
489  /* Disable ring. Ignore errors and continue to reset the ring anyway */
490  intel_disable_ring ( intel, reg );
491 
492  /* Clear ring length */
493  writel ( 0, ( intel->regs + reg + INTEL_xDLEN ) );
494 
495  /* Clear ring address */
496  writel ( 0, ( intel->regs + reg + INTEL_xDBAH ) );
497  writel ( 0, ( intel->regs + reg + INTEL_xDBAL ) );
498 
499  /* Reset head and tail pointers */
500  writel ( 0, ( intel->regs + reg + INTEL_xDH ) );
501  writel ( 0, ( intel->regs + reg + INTEL_xDT ) );
502 }
intel_nic::regs
void * regs
Registers.
Definition: intel.h:291
reg
static unsigned int unsigned int reg
Definition: myson.h:162
INTEL_xDT
#define INTEL_xDT
Receive/Transmit Descriptor Tail (offset)
Definition: intel.h:192
INTEL_xDLEN
#define INTEL_xDLEN
Receive/Transmit Descriptor Length (offset)
Definition: intel.h:186
INTEL_xDH
#define INTEL_xDH
Receive/Transmit Descriptor Head (offset)
Definition: intel.h:189
INTEL_xDBAL
#define INTEL_xDBAL
Receive/Transmit Descriptor Base Address Low (offset)
Definition: intel.h:180
writel
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
intel_disable_ring
static int intel_disable_ring(struct intel_nic *intel, unsigned int reg)
Disable descriptor ring.
Definition: intel.c:456
INTEL_xDBAH
#define INTEL_xDBAH
Receive/Transmit Descriptor Base Address High (offset)
Definition: intel.h:183

References intel_disable_ring(), INTEL_xDBAH, INTEL_xDBAL, INTEL_xDH, INTEL_xDLEN, INTEL_xDT, reg, intel_nic::regs, and writel().

Referenced by intel_destroy_ring(), and intelxvf_open().

◆ intel_create_ring()

int intel_create_ring ( struct intel_nic *  intel,
struct intel_ring *  ring 
)

Create descriptor ring.

Parameters
intelIntel device
ringDescriptor ring
Return values
rcReturn status code

Definition at line 511 of file intel.c.

511  {
512  physaddr_t address;
513  uint32_t dctl;
514 
515  /* Allocate descriptor ring. Align ring on its own size to
516  * prevent any possible page-crossing errors due to hardware
517  * errata.
518  */
519  ring->desc = dma_alloc ( intel->dma, &ring->map, ring->len,
520  ring->len );
521  if ( ! ring->desc )
522  return -ENOMEM;
523 
524  /* Initialise descriptor ring */
525  memset ( ring->desc, 0, ring->len );
526 
527  /* Program ring address */
528  address = dma ( &ring->map, ring->desc );
529  writel ( ( address & 0xffffffffUL ),
530  ( intel->regs + ring->reg + INTEL_xDBAL ) );
531  if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
532  writel ( ( ( ( uint64_t ) address ) >> 32 ),
533  ( intel->regs + ring->reg + INTEL_xDBAH ) );
534  } else {
535  writel ( 0, intel->regs + ring->reg + INTEL_xDBAH );
536  }
537 
538  /* Program ring length */
539  writel ( ring->len, ( intel->regs + ring->reg + INTEL_xDLEN ) );
540 
541  /* Reset head and tail pointers */
542  writel ( 0, ( intel->regs + ring->reg + INTEL_xDH ) );
543  writel ( 0, ( intel->regs + ring->reg + INTEL_xDT ) );
544 
545  /* Enable ring */
546  dctl = readl ( intel->regs + ring->reg + INTEL_xDCTL );
547  dctl |= INTEL_xDCTL_ENABLE;
548  writel ( dctl, intel->regs + ring->reg + INTEL_xDCTL );
549 
550  DBGC ( intel, "INTEL %p ring %05x is at [%08lx,%08lx)\n",
551  intel, ring->reg, virt_to_phys ( ring->desc ),
552  ( virt_to_phys ( ring->desc ) + ring->len ) );
553 
554  return 0;
555 }
intel_nic::regs
void * regs
Registers.
Definition: intel.h:291
intel_ring::map
struct dma_mapping map
Descriptor ring DMA mapping.
Definition: intel.h:226
INTEL_xDCTL
#define INTEL_xDCTL
Receive/Transmit Descriptor Control (offset)
Definition: intel.h:195
address
uint64_t address
Base address.
Definition: ena.h:24
readl
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
DBGC
#define DBGC(...)
Definition: compiler.h:505
INTEL_xDT
#define INTEL_xDT
Receive/Transmit Descriptor Tail (offset)
Definition: intel.h:192
intel_ring::len
size_t len
Length (in bytes)
Definition: intel.h:235
uint64_t
unsigned long long uint64_t
Definition: stdint.h:13
INTEL_xDLEN
#define INTEL_xDLEN
Receive/Transmit Descriptor Length (offset)
Definition: intel.h:186
intel_ring::reg
unsigned int reg
Register block.
Definition: intel.h:233
INTEL_xDH
#define INTEL_xDH
Receive/Transmit Descriptor Head (offset)
Definition: intel.h:189
ENOMEM
#define ENOMEM
Not enough space.
Definition: errno.h:534
INTEL_xDBAL
#define INTEL_xDBAL
Receive/Transmit Descriptor Base Address Low (offset)
Definition: intel.h:180
writel
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
uint32_t
unsigned int uint32_t
Definition: stdint.h:12
dma_alloc
void * dma_alloc(struct dma_device *dma, struct dma_mapping *map, size_t len, size_t align)
Allocate and map DMA-coherent buffer.
physaddr_t
unsigned long physaddr_t
Definition: stdint.h:20
intel_nic::dma
struct dma_device * dma
DMA device.
Definition: intel.h:293
INTEL_xDCTL_ENABLE
#define INTEL_xDCTL_ENABLE
Queue enable.
Definition: intel.h:196
intel_ring::desc
struct intel_descriptor * desc
Descriptors.
Definition: intel.h:224
INTEL_xDBAH
#define INTEL_xDBAH
Receive/Transmit Descriptor Base Address High (offset)
Definition: intel.h:183
dma
physaddr_t dma(struct dma_mapping *map, void *addr)
Get DMA address from virtual address.
memset
void * memset(void *dest, int character, size_t len) __nonnull

References address, DBGC, intel_ring::desc, intel_nic::dma, dma(), dma_alloc(), ENOMEM, INTEL_xDBAH, INTEL_xDBAL, INTEL_xDCTL, INTEL_xDCTL_ENABLE, INTEL_xDH, INTEL_xDLEN, INTEL_xDT, intel_ring::len, intel_ring::map, memset(), readl(), intel_ring::reg, intel_nic::regs, and writel().

Referenced by intel_open(), intelx_open(), and intelxvf_open().

◆ intel_destroy_ring()

void intel_destroy_ring ( struct intel_nic *  intel,
struct intel_ring *  ring 
)

Destroy descriptor ring.

Parameters
intelIntel device
ringDescriptor ring

Definition at line 563 of file intel.c.

563  {
564 
565  /* Reset ring */
566  intel_reset_ring ( intel, ring->reg );
567 
568  /* Free descriptor ring */
569  dma_free ( &ring->map, ring->desc, ring->len );
570  ring->desc = NULL;
571  ring->prod = 0;
572  ring->cons = 0;
573 }
intel_reset_ring
void intel_reset_ring(struct intel_nic *intel, unsigned int reg)
Reset descriptor ring.
Definition: intel.c:487
intel_ring::map
struct dma_mapping map
Descriptor ring DMA mapping.
Definition: intel.h:226
intel_ring::len
size_t len
Length (in bytes)
Definition: intel.h:235
intel_ring::cons
unsigned int cons
Consumer index.
Definition: intel.h:230
intel_ring::reg
unsigned int reg
Register block.
Definition: intel.h:233
dma_free
void dma_free(struct dma_mapping *map, void *addr, size_t len)
Unmap and free DMA-coherent buffer.
intel_ring::prod
unsigned int prod
Producer index.
Definition: intel.h:228
intel_ring::desc
struct intel_descriptor * desc
Descriptors.
Definition: intel.h:224
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:321

References intel_ring::cons, intel_ring::desc, dma_free(), intel_reset_ring(), intel_ring::len, intel_ring::map, NULL, intel_ring::prod, and intel_ring::reg.

Referenced by intel_close(), intel_open(), intelx_close(), intelx_open(), intelxvf_close(), and intelxvf_open().

◆ intel_refill_rx()

void intel_refill_rx ( struct intel_nic *  intel)

Refill receive descriptor ring.

Parameters
intelIntel device

Definition at line 580 of file intel.c.

580  {
581  struct intel_descriptor *rx;
582  struct io_buffer *iobuf;
583  unsigned int rx_idx;
584  unsigned int rx_tail;
585  unsigned int refilled = 0;
586 
587  /* Refill ring */
588  while ( ( intel->rx.prod - intel->rx.cons ) < INTEL_RX_FILL ) {
589 
590  /* Allocate I/O buffer */
591  iobuf = alloc_rx_iob ( INTEL_RX_MAX_LEN, intel->dma );
592  if ( ! iobuf ) {
593  /* Wait for next refill */
594  break;
595  }
596 
597  /* Get next receive descriptor */
598  rx_idx = ( intel->rx.prod++ % INTEL_NUM_RX_DESC );
599  rx = &intel->rx.desc[rx_idx];
600 
601  /* Populate receive descriptor */
602  intel->rx.describe ( rx, iob_dma ( iobuf ), 0 );
603 
604  /* Record I/O buffer */
605  assert ( intel->rx_iobuf[rx_idx] == NULL );
606  intel->rx_iobuf[rx_idx] = iobuf;
607 
608  DBGC2 ( intel, "INTEL %p RX %d is [%lx,%lx)\n",
609  intel, rx_idx, virt_to_phys ( iobuf->data ),
610  ( virt_to_phys ( iobuf->data ) + INTEL_RX_MAX_LEN ) );
611  refilled++;
612  }
613 
614  /* Push descriptors to card, if applicable */
615  if ( refilled ) {
616  wmb();
617  rx_tail = ( intel->rx.prod % INTEL_NUM_RX_DESC );
618  profile_start ( &intel_vm_refill_profiler );
619  writel ( rx_tail, intel->regs + intel->rx.reg + INTEL_xDT );
620  profile_stop ( &intel_vm_refill_profiler );
621  profile_exclude ( &intel_vm_refill_profiler );
622  }
623 }
intel_nic::regs
void * regs
Registers.
Definition: intel.h:291
wmb
wmb()
INTEL_NUM_RX_DESC
#define INTEL_NUM_RX_DESC
Number of receive descriptors.
Definition: intel.h:154
intel_nic::rx
struct intel_ring rx
Receive descriptor ring.
Definition: intel.h:314
INTEL_xDT
#define INTEL_xDT
Receive/Transmit Descriptor Tail (offset)
Definition: intel.h:192
profile_stop
static void profile_stop(struct profiler *profiler)
Stop profiling.
Definition: profile.h:173
intel_ring::cons
unsigned int cons
Consumer index.
Definition: intel.h:230
intel_ring::reg
unsigned int reg
Register block.
Definition: intel.h:233
assert
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
writel
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
iob_dma
static __always_inline physaddr_t iob_dma(struct io_buffer *iobuf)
Get I/O buffer DMA address.
Definition: iobuf.h:267
intel_nic::rx_iobuf
struct io_buffer * rx_iobuf[INTEL_NUM_RX_DESC]
Receive I/O buffers.
Definition: intel.h:316
profile_start
static void profile_start(struct profiler *profiler)
Start profiling.
Definition: profile.h:160
alloc_rx_iob
struct io_buffer * alloc_rx_iob(size_t len, struct dma_device *dma)
Allocate and map I/O buffer for receive DMA.
Definition: iobuf.c:187
INTEL_RX_MAX_LEN
#define INTEL_RX_MAX_LEN
Receive buffer length.
Definition: intel.h:160
intel_ring::describe
void(* describe)(struct intel_descriptor *desc, physaddr_t addr, size_t len)
Populate descriptor.
Definition: intel.h:243
intel_nic::dma
struct dma_device * dma
DMA device.
Definition: intel.h:293
intel_descriptor
A packet descriptor.
Definition: intel.h:21
DBGC2
#define DBGC2(...)
Definition: compiler.h:522
io_buffer::data
void * data
Start of data.
Definition: iobuf.h:52
intel_ring::prod
unsigned int prod
Producer index.
Definition: intel.h:228
rx
u8 rx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets from the AP.
Definition: wpa.h:234
INTEL_RX_FILL
#define INTEL_RX_FILL
Receive descriptor ring fill level.
Definition: intel.h:157
intel_ring::desc
struct intel_descriptor * desc
Descriptors.
Definition: intel.h:224
profile_exclude
static void profile_exclude(struct profiler *profiler)
Exclude time from other ongoing profiling results.
Definition: profile.h:186
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:321
io_buffer
A persistent I/O buffer.
Definition: iobuf.h:37

References alloc_rx_iob(), assert(), intel_ring::cons, io_buffer::data, DBGC2, intel_ring::desc, intel_ring::describe, intel_nic::dma, INTEL_NUM_RX_DESC, INTEL_RX_FILL, INTEL_RX_MAX_LEN, INTEL_xDT, iob_dma(), NULL, intel_ring::prod, profile_exclude(), profile_start(), profile_stop(), intel_ring::reg, intel_nic::regs, rx, intel_nic::rx, intel_nic::rx_iobuf, wmb(), and writel().

Referenced by intel_open(), intel_poll(), intelx_open(), intelx_poll(), intelxvf_open(), and intelxvf_poll().

◆ intel_empty_rx()

void intel_empty_rx ( struct intel_nic *  intel)

Discard unused receive I/O buffers.

Parameters
intelIntel device

Definition at line 630 of file intel.c.

630  {
631  unsigned int i;
632 
633  /* Discard unused receive buffers */
634  for ( i = 0 ; i < INTEL_NUM_RX_DESC ; i++ ) {
635  if ( intel->rx_iobuf[i] )
636  free_rx_iob ( intel->rx_iobuf[i] );
637  intel->rx_iobuf[i] = NULL;
638  }
639 }
INTEL_NUM_RX_DESC
#define INTEL_NUM_RX_DESC
Number of receive descriptors.
Definition: intel.h:154
intel_nic::rx_iobuf
struct io_buffer * rx_iobuf[INTEL_NUM_RX_DESC]
Receive I/O buffers.
Definition: intel.h:316
free_rx_iob
void free_rx_iob(struct io_buffer *iobuf)
Unmap and free I/O buffer for receive DMA.
Definition: iobuf.c:214
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:321

References free_rx_iob(), INTEL_NUM_RX_DESC, NULL, and intel_nic::rx_iobuf.

Referenced by intel_close(), intelx_close(), and intelxvf_close().

◆ intel_transmit()

int intel_transmit ( struct net_device *  netdev,
struct io_buffer *  iobuf 
)

Transmit packet.

Parameters
netdevNetwork device
iobufI/O buffer
Return values
rcReturn status code

Definition at line 752 of file intel.c.

752  {
753  struct intel_nic *intel = netdev->priv;
754  struct intel_descriptor *tx;
755  unsigned int tx_idx;
756  unsigned int tx_tail;
757  size_t len;
758 
759  /* Get next transmit descriptor */
760  if ( ( intel->tx.prod - intel->tx.cons ) >= INTEL_TX_FILL ) {
761  DBGC ( intel, "INTEL %p out of transmit descriptors\n", intel );
762  return -ENOBUFS;
763  }
764  tx_idx = ( intel->tx.prod++ % INTEL_NUM_TX_DESC );
765  tx_tail = ( intel->tx.prod % INTEL_NUM_TX_DESC );
766  tx = &intel->tx.desc[tx_idx];
767 
768  /* Populate transmit descriptor */
769  len = iob_len ( iobuf );
770  intel->tx.describe ( tx, iob_dma ( iobuf ), len );
771  wmb();
772 
773  /* Notify card that there are packets ready to transmit */
774  profile_start ( &intel_vm_tx_profiler );
775  writel ( tx_tail, intel->regs + intel->tx.reg + INTEL_xDT );
776  profile_stop ( &intel_vm_tx_profiler );
777  profile_exclude ( &intel_vm_tx_profiler );
778 
779  DBGC2 ( intel, "INTEL %p TX %d is [%lx,%lx)\n",
780  intel, tx_idx, virt_to_phys ( iobuf->data ),
781  ( virt_to_phys ( iobuf->data ) + len ) );
782 
783  return 0;
784 }
intel_nic::regs
void * regs
Registers.
Definition: intel.h:291
wmb
wmb()
INTEL_NUM_TX_DESC
#define INTEL_NUM_TX_DESC
Number of transmit descriptors.
Definition: intel.h:174
DBGC
#define DBGC(...)
Definition: compiler.h:505
INTEL_xDT
#define INTEL_xDT
Receive/Transmit Descriptor Tail (offset)
Definition: intel.h:192
profile_stop
static void profile_stop(struct profiler *profiler)
Stop profiling.
Definition: profile.h:173
intel_ring::cons
unsigned int cons
Consumer index.
Definition: intel.h:230
intel_ring::reg
unsigned int reg
Register block.
Definition: intel.h:233
INTEL_TX_FILL
#define INTEL_TX_FILL
Transmit descriptor ring maximum fill level.
Definition: intel.h:177
net_device::priv
void * priv
Driver private data.
Definition: netdevice.h:431
len
ring len
Length.
Definition: dwmac.h:231
writel
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
netdev
static struct net_device * netdev
Definition: gdbudp.c:52
iob_dma
static __always_inline physaddr_t iob_dma(struct io_buffer *iobuf)
Get I/O buffer DMA address.
Definition: iobuf.h:267
profile_start
static void profile_start(struct profiler *profiler)
Start profiling.
Definition: profile.h:160
iob_len
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:159
intel_ring::describe
void(* describe)(struct intel_descriptor *desc, physaddr_t addr, size_t len)
Populate descriptor.
Definition: intel.h:243
intel_descriptor
A packet descriptor.
Definition: intel.h:21
ENOBUFS
#define ENOBUFS
No buffer space available.
Definition: errno.h:498
DBGC2
#define DBGC2(...)
Definition: compiler.h:522
io_buffer::data
void * data
Start of data.
Definition: iobuf.h:52
intel_ring::prod
unsigned int prod
Producer index.
Definition: intel.h:228
intel_nic
An Intel network card.
Definition: intel.h:289
intel_ring::desc
struct intel_descriptor * desc
Descriptors.
Definition: intel.h:224
intel_nic::tx
struct intel_ring tx
Transmit descriptor ring.
Definition: intel.h:312
profile_exclude
static void profile_exclude(struct profiler *profiler)
Exclude time from other ongoing profiling results.
Definition: profile.h:186
tx
u8 tx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets to the AP.
Definition: wpa.h:237

References intel_ring::cons, io_buffer::data, DBGC, DBGC2, intel_ring::desc, intel_ring::describe, ENOBUFS, INTEL_NUM_TX_DESC, INTEL_TX_FILL, INTEL_xDT, iob_dma(), iob_len(), len, netdev, net_device::priv, intel_ring::prod, profile_exclude(), profile_start(), profile_stop(), intel_ring::reg, intel_nic::regs, tx, intel_nic::tx, wmb(), and writel().

◆ intel_poll_tx()

void intel_poll_tx ( struct net_device *  netdev)

Poll for completed packets.

Parameters
netdevNetwork device

Definition at line 791 of file intel.c.

791  {
792  struct intel_nic *intel = netdev->priv;
793  struct intel_descriptor *tx;
794  unsigned int tx_idx;
795 
796  /* Check for completed packets */
797  while ( intel->tx.cons != intel->tx.prod ) {
798 
799  /* Get next transmit descriptor */
800  tx_idx = ( intel->tx.cons % INTEL_NUM_TX_DESC );
801  tx = &intel->tx.desc[tx_idx];
802 
803  /* Stop if descriptor is still in use */
804  if ( ! ( tx->status & cpu_to_le32 ( INTEL_DESC_STATUS_DD ) ) )
805  return;
806 
807  DBGC2 ( intel, "INTEL %p TX %d complete\n", intel, tx_idx );
808 
809  /* Complete TX descriptor */
810  netdev_tx_complete_next ( netdev );
811  intel->tx.cons++;
812  }
813 }
INTEL_DESC_STATUS_DD
#define INTEL_DESC_STATUS_DD
Descriptor done.
Definition: intel.h:51
netdev_tx_complete_next
static void netdev_tx_complete_next(struct net_device *netdev)
Complete network transmission.
Definition: netdevice.h:778
INTEL_NUM_TX_DESC
#define INTEL_NUM_TX_DESC
Number of transmit descriptors.
Definition: intel.h:174
intel_ring::cons
unsigned int cons
Consumer index.
Definition: intel.h:230
net_device::priv
void * priv
Driver private data.
Definition: netdevice.h:431
netdev
static struct net_device * netdev
Definition: gdbudp.c:52
cpu_to_le32
#define cpu_to_le32(value)
Definition: byteswap.h:107
intel_descriptor
A packet descriptor.
Definition: intel.h:21
DBGC2
#define DBGC2(...)
Definition: compiler.h:522
intel_ring::prod
unsigned int prod
Producer index.
Definition: intel.h:228
intel_nic
An Intel network card.
Definition: intel.h:289
intel_ring::desc
struct intel_descriptor * desc
Descriptors.
Definition: intel.h:224
intel_nic::tx
struct intel_ring tx
Transmit descriptor ring.
Definition: intel.h:312
tx
u8 tx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets to the AP.
Definition: wpa.h:237

References intel_ring::cons, cpu_to_le32, DBGC2, intel_ring::desc, INTEL_DESC_STATUS_DD, INTEL_NUM_TX_DESC, netdev, netdev_tx_complete_next(), net_device::priv, intel_ring::prod, tx, and intel_nic::tx.

Referenced by intel_poll(), intelx_poll(), and intelxvf_poll().

◆ intel_poll_rx()

void intel_poll_rx ( struct net_device *  netdev)

Poll for received packets.

Parameters
netdevNetwork device

Definition at line 820 of file intel.c.

820  {
821  struct intel_nic *intel = netdev->priv;
822  struct intel_descriptor *rx;
823  struct io_buffer *iobuf;
824  unsigned int rx_idx;
825  size_t len;
826 
827  /* Check for received packets */
828  while ( intel->rx.cons != intel->rx.prod ) {
829 
830  /* Get next receive descriptor */
831  rx_idx = ( intel->rx.cons % INTEL_NUM_RX_DESC );
832  rx = &intel->rx.desc[rx_idx];
833 
834  /* Stop if descriptor is still in use */
835  if ( ! ( rx->status & cpu_to_le32 ( INTEL_DESC_STATUS_DD ) ) )
836  return;
837 
838  /* Populate I/O buffer */
839  iobuf = intel->rx_iobuf[rx_idx];
840  intel->rx_iobuf[rx_idx] = NULL;
841  len = le16_to_cpu ( rx->length );
842  iob_put ( iobuf, len );
843 
844  /* Hand off to network stack */
845  if ( rx->status & cpu_to_le32 ( INTEL_DESC_STATUS_RXE ) ) {
846  DBGC ( intel, "INTEL %p RX %d error (length %zd, "
847  "status %08x)\n", intel, rx_idx, len,
848  le32_to_cpu ( rx->status ) );
849  netdev_rx_err ( netdev, iobuf, -EIO );
850  } else {
851  DBGC2 ( intel, "INTEL %p RX %d complete (length %zd)\n",
852  intel, rx_idx, len );
853  netdev_rx ( netdev, iobuf );
854  }
855  intel->rx.cons++;
856  }
857 }
INTEL_DESC_STATUS_DD
#define INTEL_DESC_STATUS_DD
Descriptor done.
Definition: intel.h:51
iob_put
#define iob_put(iobuf, len)
Definition: iobuf.h:124
INTEL_NUM_RX_DESC
#define INTEL_NUM_RX_DESC
Number of receive descriptors.
Definition: intel.h:154
netdev_rx_err
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:586
le32_to_cpu
#define le32_to_cpu(value)
Definition: byteswap.h:113
intel_nic::rx
struct intel_ring rx
Receive descriptor ring.
Definition: intel.h:314
DBGC
#define DBGC(...)
Definition: compiler.h:505
intel_ring::cons
unsigned int cons
Consumer index.
Definition: intel.h:230
net_device::priv
void * priv
Driver private data.
Definition: netdevice.h:431
len
ring len
Length.
Definition: dwmac.h:231
netdev
static struct net_device * netdev
Definition: gdbudp.c:52
intel_nic::rx_iobuf
struct io_buffer * rx_iobuf[INTEL_NUM_RX_DESC]
Receive I/O buffers.
Definition: intel.h:316
cpu_to_le32
#define cpu_to_le32(value)
Definition: byteswap.h:107
le16_to_cpu
#define le16_to_cpu(value)
Definition: byteswap.h:112
netdev_rx
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:548
intel_descriptor
A packet descriptor.
Definition: intel.h:21
DBGC2
#define DBGC2(...)
Definition: compiler.h:522
intel_ring::prod
unsigned int prod
Producer index.
Definition: intel.h:228
EIO
#define EIO
Input/output error.
Definition: errno.h:433
rx
u8 rx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets from the AP.
Definition: wpa.h:234
intel_nic
An Intel network card.
Definition: intel.h:289
intel_ring::desc
struct intel_descriptor * desc
Descriptors.
Definition: intel.h:224
INTEL_DESC_STATUS_RXE
#define INTEL_DESC_STATUS_RXE
Receive error.
Definition: intel.h:54
NULL
#define NULL
NULL pointer (VOID *)
Definition: Base.h:321
io_buffer
A persistent I/O buffer.
Definition: iobuf.h:37

References intel_ring::cons, cpu_to_le32, DBGC, DBGC2, intel_ring::desc, EIO, INTEL_DESC_STATUS_DD, INTEL_DESC_STATUS_RXE, INTEL_NUM_RX_DESC, iob_put, le16_to_cpu, le32_to_cpu, len, netdev, netdev_rx(), netdev_rx_err(), NULL, net_device::priv, intel_ring::prod, rx, intel_nic::rx, and intel_nic::rx_iobuf.

Referenced by intel_poll(), intelx_poll(), and intelxvf_poll().

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