iPXE
intelx.c
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1 /*
2  * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of the
7  * License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17  * 02110-1301, USA.
18  *
19  * You can also choose to distribute this program under the terms of
20  * the Unmodified Binary Distribution Licence (as given in the file
21  * COPYING.UBDL), provided that you have satisfied its requirements.
22  */
23 
24 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25 
26 #include <stdint.h>
27 #include <string.h>
28 #include <unistd.h>
29 #include <errno.h>
30 #include <byteswap.h>
31 #include <ipxe/netdevice.h>
32 #include <ipxe/ethernet.h>
33 #include <ipxe/if_ether.h>
34 #include <ipxe/iobuf.h>
35 #include <ipxe/malloc.h>
36 #include <ipxe/pci.h>
37 #include "intelx.h"
38 
39 /** @file
40  *
41  * Intel 10 Gigabit Ethernet network card driver
42  *
43  */
44 
45 /******************************************************************************
46  *
47  * MAC address
48  *
49  ******************************************************************************
50  */
51 
52 /**
53  * Try to fetch initial MAC address
54  *
55  * @v intel Intel device
56  * @v ral0 RAL0 register address
57  * @v hw_addr Hardware address to fill in
58  * @ret rc Return status code
59  */
60 static int intelx_try_fetch_mac ( struct intel_nic *intel, unsigned int ral0,
61  uint8_t *hw_addr ) {
63 
64  /* Read current address from RAL0/RAH0 */
65  mac.reg.low = cpu_to_le32 ( readl ( intel->regs + ral0 ) );
66  mac.reg.high = cpu_to_le32 ( readl ( intel->regs + ral0 +
67  ( INTELX_RAH0 - INTELX_RAL0 ) ) );
68 
69  /* Use current address if valid */
70  if ( is_valid_ether_addr ( mac.raw ) ) {
71  DBGC ( intel, "INTEL %p has autoloaded MAC address %s at "
72  "%#05x\n", intel, eth_ntoa ( mac.raw ), ral0 );
73  memcpy ( hw_addr, mac.raw, ETH_ALEN );
74  return 0;
75  }
76 
77  return -ENOENT;
78 }
79 
80 /**
81  * Fetch initial MAC address
82  *
83  * @v intel Intel device
84  * @v hw_addr Hardware address to fill in
85  * @ret rc Return status code
86  */
87 static int intelx_fetch_mac ( struct intel_nic *intel, uint8_t *hw_addr ) {
88  int rc;
89 
90  /* Try to fetch address from INTELX_RAL0 */
91  if ( ( rc = intelx_try_fetch_mac ( intel, INTELX_RAL0,
92  hw_addr ) ) == 0 ) {
93  return 0;
94  }
95 
96  /* Try to fetch address from INTELX_RAL0_ALT */
97  if ( ( rc = intelx_try_fetch_mac ( intel, INTELX_RAL0_ALT,
98  hw_addr ) ) == 0 ) {
99  return 0;
100  }
101 
102  DBGC ( intel, "INTEL %p has no MAC address to use\n", intel );
103  return -ENOENT;
104 }
105 
106 /******************************************************************************
107  *
108  * Device reset
109  *
110  ******************************************************************************
111  */
112 
113 /**
114  * Reset hardware
115  *
116  * @v intel Intel device
117  * @ret rc Return status code
118  */
119 static int intelx_reset ( struct intel_nic *intel ) {
120  uint32_t ctrl;
121 
122  /* Perform a global software reset */
123  ctrl = readl ( intel->regs + INTELX_CTRL );
125  intel->regs + INTELX_CTRL );
127 
128  DBGC ( intel, "INTEL %p reset (ctrl %08x)\n", intel, ctrl );
129  return 0;
130 }
131 
132 /******************************************************************************
133  *
134  * Link state
135  *
136  ******************************************************************************
137  */
138 
139 /**
140  * Check link state
141  *
142  * @v netdev Network device
143  */
144 static void intelx_check_link ( struct net_device *netdev ) {
145  struct intel_nic *intel = netdev->priv;
146  uint32_t links;
147 
148  /* Read link status */
149  links = readl ( intel->regs + INTELX_LINKS );
150  DBGC ( intel, "INTEL %p link status is %08x\n", intel, links );
151 
152  /* Update network device */
153  if ( links & INTELX_LINKS_UP ) {
155  } else {
157  }
158 }
159 
160 /******************************************************************************
161  *
162  * Network device interface
163  *
164  ******************************************************************************
165  */
166 
167 /**
168  * Open network device
169  *
170  * @v netdev Network device
171  * @ret rc Return status code
172  */
173 static int intelx_open ( struct net_device *netdev ) {
174  struct intel_nic *intel = netdev->priv;
176  uint32_t ral0;
177  uint32_t rah0;
178  uint32_t dmatxctl;
179  uint32_t fctrl;
180  uint32_t srrctl;
181  uint32_t hlreg0;
182  uint32_t maxfrs;
183  uint32_t rdrxctl;
184  uint32_t rxctrl;
185  uint32_t dca_rxctrl;
186  int rc;
187 
188  /* Create transmit descriptor ring */
189  if ( ( rc = intel_create_ring ( intel, &intel->tx ) ) != 0 )
190  goto err_create_tx;
191 
192  /* Create receive descriptor ring */
193  if ( ( rc = intel_create_ring ( intel, &intel->rx ) ) != 0 )
194  goto err_create_rx;
195 
196  /* Program MAC address */
197  memset ( &mac, 0, sizeof ( mac ) );
198  memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
199  ral0 = le32_to_cpu ( mac.reg.low );
200  rah0 = ( le32_to_cpu ( mac.reg.high ) | INTELX_RAH0_AV );
201  writel ( ral0, intel->regs + INTELX_RAL0 );
202  writel ( rah0, intel->regs + INTELX_RAH0 );
203  writel ( ral0, intel->regs + INTELX_RAL0_ALT );
204  writel ( rah0, intel->regs + INTELX_RAH0_ALT );
205 
206  /* Allocate interrupt vectors */
209  intel->regs + INTELX_IVAR );
210 
211  /* Enable transmitter */
212  dmatxctl = readl ( intel->regs + INTELX_DMATXCTL );
213  dmatxctl |= INTELX_DMATXCTL_TE;
214  writel ( dmatxctl, intel->regs + INTELX_DMATXCTL );
215 
216  /* Configure receive filter */
217  fctrl = readl ( intel->regs + INTELX_FCTRL );
219  writel ( fctrl, intel->regs + INTELX_FCTRL );
220 
221  /* Configure receive buffer sizes */
222  srrctl = readl ( intel->regs + INTELX_SRRCTL );
223  srrctl &= ~INTELX_SRRCTL_BSIZE_MASK;
224  srrctl |= INTELX_SRRCTL_BSIZE_DEFAULT;
225  writel ( srrctl, intel->regs + INTELX_SRRCTL );
226 
227  /* Configure jumbo frames. Required to allow the extra 4-byte
228  * headroom for VLANs, since we don't use the hardware's
229  * native VLAN offload.
230  */
231  hlreg0 = readl ( intel->regs + INTELX_HLREG0 );
232  hlreg0 |= INTELX_HLREG0_JUMBOEN;
233  writel ( hlreg0, intel->regs + INTELX_HLREG0 );
234 
235  /* Configure frame size */
236  maxfrs = readl ( intel->regs + INTELX_MAXFRS );
237  maxfrs &= ~INTELX_MAXFRS_MFS_MASK;
238  maxfrs |= INTELX_MAXFRS_MFS_DEFAULT;
239  writel ( maxfrs, intel->regs + INTELX_MAXFRS );
240 
241  /* Configure receive DMA */
242  rdrxctl = readl ( intel->regs + INTELX_RDRXCTL );
243  rdrxctl |= INTELX_RDRXCTL_SECRC;
244  writel ( rdrxctl, intel->regs + INTELX_RDRXCTL );
245 
246  /* Clear "must-be-zero" bit for direct cache access (DCA). We
247  * leave DCA disabled anyway, but if we do not clear this bit
248  * then the received packets contain garbage data.
249  */
250  dca_rxctrl = readl ( intel->regs + INTELX_DCA_RXCTRL );
251  dca_rxctrl &= ~INTELX_DCA_RXCTRL_MUST_BE_ZERO;
252  writel ( dca_rxctrl, intel->regs + INTELX_DCA_RXCTRL );
253 
254  /* Enable receiver */
255  rxctrl = readl ( intel->regs + INTELX_RXCTRL );
256  rxctrl |= INTELX_RXCTRL_RXEN;
257  writel ( rxctrl, intel->regs + INTELX_RXCTRL );
258 
259  /* Fill receive ring */
260  intel_refill_rx ( intel );
261 
262  /* Update link state */
264 
265  return 0;
266 
267  intel_destroy_ring ( intel, &intel->rx );
268  err_create_rx:
269  intel_destroy_ring ( intel, &intel->tx );
270  err_create_tx:
271  return rc;
272 }
273 
274 /**
275  * Close network device
276  *
277  * @v netdev Network device
278  */
279 static void intelx_close ( struct net_device *netdev ) {
280  struct intel_nic *intel = netdev->priv;
281  uint32_t rxctrl;
282  uint32_t dmatxctl;
283 
284  /* Disable receiver */
285  rxctrl = readl ( intel->regs + INTELX_RXCTRL );
286  rxctrl &= ~INTELX_RXCTRL_RXEN;
287  writel ( rxctrl, intel->regs + INTELX_RXCTRL );
288 
289  /* Disable transmitter */
290  dmatxctl = readl ( intel->regs + INTELX_DMATXCTL );
291  dmatxctl &= ~INTELX_DMATXCTL_TE;
292  writel ( dmatxctl, intel->regs + INTELX_DMATXCTL );
293 
294  /* Destroy receive descriptor ring */
295  intel_destroy_ring ( intel, &intel->rx );
296 
297  /* Discard any unused receive buffers */
298  intel_empty_rx ( intel );
299 
300  /* Destroy transmit descriptor ring */
301  intel_destroy_ring ( intel, &intel->tx );
302 
303  /* Reset the NIC, to flush the transmit and receive FIFOs */
304  intelx_reset ( intel );
305 }
306 
307 /**
308  * Poll for completed and received packets
309  *
310  * @v netdev Network device
311  */
312 static void intelx_poll ( struct net_device *netdev ) {
313  struct intel_nic *intel = netdev->priv;
314  uint32_t eicr;
315 
316  /* Check for and acknowledge interrupts */
317  eicr = readl ( intel->regs + INTELX_EICR );
318  if ( ! eicr )
319  return;
320 
321  /* Poll for TX completions, if applicable */
322  if ( eicr & INTELX_EIRQ_TX0 )
323  intel_poll_tx ( netdev );
324 
325  /* Poll for RX completions, if applicable */
326  if ( eicr & ( INTELX_EIRQ_RX0 | INTELX_EIRQ_RXO ) )
327  intel_poll_rx ( netdev );
328 
329  /* Report receive overruns */
330  if ( eicr & INTELX_EIRQ_RXO )
332 
333  /* Check link state, if applicable */
334  if ( eicr & INTELX_EIRQ_LSC )
336 
337  /* Refill RX ring */
338  intel_refill_rx ( intel );
339 }
340 
341 /**
342  * Enable or disable interrupts
343  *
344  * @v netdev Network device
345  * @v enable Interrupts should be enabled
346  */
347 static void intelx_irq ( struct net_device *netdev, int enable ) {
348  struct intel_nic *intel = netdev->priv;
349  uint32_t mask;
350 
352  INTELX_EIRQ_RX0 );
353  if ( enable ) {
354  writel ( mask, intel->regs + INTELX_EIMS );
355  } else {
356  writel ( mask, intel->regs + INTELX_EIMC );
357  }
358 }
359 
360 /** Network device operations */
362  .open = intelx_open,
363  .close = intelx_close,
364  .transmit = intel_transmit,
365  .poll = intelx_poll,
366  .irq = intelx_irq,
367 };
368 
369 /******************************************************************************
370  *
371  * PCI interface
372  *
373  ******************************************************************************
374  */
375 
376 /**
377  * Probe PCI device
378  *
379  * @v pci PCI device
380  * @ret rc Return status code
381  */
382 static int intelx_probe ( struct pci_device *pci ) {
383  struct net_device *netdev;
384  struct intel_nic *intel;
385  int rc;
386 
387  /* Allocate and initialise net device */
388  netdev = alloc_etherdev ( sizeof ( *intel ) );
389  if ( ! netdev ) {
390  rc = -ENOMEM;
391  goto err_alloc;
392  }
394  intel = netdev->priv;
395  pci_set_drvdata ( pci, netdev );
396  netdev->dev = &pci->dev;
397  memset ( intel, 0, sizeof ( *intel ) );
398  intel->port = PCI_FUNC ( pci->busdevfn );
399  intel_init_ring ( &intel->tx, INTEL_NUM_TX_DESC, INTELX_TD,
401  intel_init_ring ( &intel->rx, INTEL_NUM_RX_DESC, INTELX_RD,
403 
404  /* Fix up PCI device */
405  adjust_pci_device ( pci );
406 
407  /* Map registers */
408  intel->regs = pci_ioremap ( pci, pci->membase, INTEL_BAR_SIZE );
409  if ( ! intel->regs ) {
410  rc = -ENODEV;
411  goto err_ioremap;
412  }
413 
414  /* Reset the NIC */
415  if ( ( rc = intelx_reset ( intel ) ) != 0 )
416  goto err_reset;
417 
418  /* Fetch MAC address */
419  if ( ( rc = intelx_fetch_mac ( intel, netdev->hw_addr ) ) != 0 )
420  goto err_fetch_mac;
421 
422  /* Register network device */
423  if ( ( rc = register_netdev ( netdev ) ) != 0 )
424  goto err_register_netdev;
425 
426  /* Set initial link state */
428 
429  return 0;
430 
432  err_register_netdev:
433  err_fetch_mac:
434  intelx_reset ( intel );
435  err_reset:
436  iounmap ( intel->regs );
437  err_ioremap:
439  netdev_put ( netdev );
440  err_alloc:
441  return rc;
442 }
443 
444 /**
445  * Remove PCI device
446  *
447  * @v pci PCI device
448  */
449 static void intelx_remove ( struct pci_device *pci ) {
450  struct net_device *netdev = pci_get_drvdata ( pci );
451  struct intel_nic *intel = netdev->priv;
452 
453  /* Unregister network device */
455 
456  /* Reset the NIC */
457  intelx_reset ( intel );
458 
459  /* Free network device */
460  iounmap ( intel->regs );
462  netdev_put ( netdev );
463 }
464 
465 /** PCI device IDs */
466 static struct pci_device_id intelx_nics[] = {
467  PCI_ROM ( 0x8086, 0x10f7, "82599-kx4", "82599 (KX/KX4)", 0 ),
468  PCI_ROM ( 0x8086, 0x10f8, "82599-combo-backplane", "82599 (combined backplane; KR/KX4/KX)", 0 ),
469  PCI_ROM ( 0x8086, 0x10f9, "82599-cx4", "82599 (CX4)", 0 ),
470  PCI_ROM ( 0x8086, 0x10fb, "82599-sfp", "82599 (SFI/SFP+)", 0 ),
471  PCI_ROM ( 0x8086, 0x10fc, "82599-xaui", "82599 (XAUI/BX4)", 0 ),
472  PCI_ROM ( 0x8086, 0x1528, "x540t", "X540-AT2/X540-BT2", 0 ),
473  PCI_ROM ( 0x8086, 0x154d, "82599-sfp-sf2", "82599 (SFI/SFP+)", 0 ),
474  PCI_ROM ( 0x8086, 0x1557, "82599en-sfp", "82599 (Single Port SFI Only)", 0 ),
475  PCI_ROM ( 0x8086, 0x1560, "x540t1", "X540-AT2/X540-BT2 (with single port NVM)", 0 ),
476  PCI_ROM ( 0x8086, 0x1563, "x550t2", "X550-T2", 0 ),
477  PCI_ROM ( 0x8086, 0x15ab, "x552", "X552", 0 ),
478  PCI_ROM ( 0x8086, 0x15c8, "x553t", "X553/X557-AT", 0 ),
479  PCI_ROM ( 0x8086, 0x15ce, "x553-sfp", "X553 (SFP+)", 0 ),
480  PCI_ROM ( 0x8086, 0x15e5, "x553", "X553", 0 ),
481 };
482 
483 /** PCI driver */
484 struct pci_driver intelx_driver __pci_driver = {
485  .ids = intelx_nics,
486  .id_count = ( sizeof ( intelx_nics ) / sizeof ( intelx_nics[0] ) ),
487  .probe = intelx_probe,
489 };
void * regs
Registers.
Definition: intel.h:280
#define PCI_FUNC(busdevfn)
Definition: pci.h:258
#define INTELX_RDRXCTL
Receive DMA Control Register.
Definition: intelx.h:84
unsigned long membase
Memory base.
Definition: pci.h:194
static int intelx_reset(struct intel_nic *intel)
Reset hardware.
Definition: intelx.c:119
#define INTELX_IVAR_TX0_VALID
TX queue 0 valid.
Definition: intelx.h:46
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
#define INTELX_RD
Receive Descriptor register block.
Definition: intelx.h:72
#define INTELX_EIRQ_LSC
Link status change.
Definition: intelx.h:29
static int intelx_try_fetch_mac(struct intel_nic *intel, unsigned int ral0, uint8_t *hw_addr)
Try to fetch initial MAC address.
Definition: intelx.c:60
#define INTEL_NUM_RX_DESC
Number of receive descriptors.
Definition: intel.h:149
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:501
#define INTELX_RAL0_ALT
Definition: intelx.h:64
#define INTELX_IVAR
Interrupt Vector Allocation Register.
Definition: intelx.h:38
void intel_poll_rx(struct net_device *netdev)
Poll for received packets.
Definition: intel.c:810
#define INTELX_FCTRL_BAM
Broadcast accept mode.
Definition: intelx.h:52
A PCI driver.
Definition: pci.h:224
#define le32_to_cpu(value)
Definition: byteswap.h:113
int(* open)(struct net_device *netdev)
Open network device.
Definition: netdevice.h:222
#define INTELX_SRRCTL_BSIZE_MASK
Definition: intelx.h:81
#define INTELX_SRRCTL_BSIZE_DEFAULT
Definition: intelx.h:80
Error codes.
#define INTELX_IVAR_TX0_DEFAULT
Definition: intelx.h:44
#define INTELX_MAXFRS
Maximum Frame Size Register.
Definition: intelx.h:107
#define INTELX_RAH0_AV
Address valid.
Definition: intelx.h:69
I/O buffers.
#define INTEL_NUM_TX_DESC
Number of transmit descriptors.
Definition: intel.h:165
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:226
void intel_poll_tx(struct net_device *netdev)
Poll for completed packets.
Definition: intel.c:781
#define INTELX_RXCTRL
Receive Control Register.
Definition: intelx.h:88
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
struct intel_ring rx
Receive descriptor ring.
Definition: intel.h:301
#define INTELX_EIRQ_RXO
Receive overrun.
Definition: intelx.h:28
#define DBGC(...)
Definition: compiler.h:505
int intel_create_ring(struct intel_nic *intel, struct intel_ring *ring)
Create descriptor ring.
Definition: intel.c:499
void intel_empty_rx(struct intel_nic *intel)
Discard unused receive I/O buffers.
Definition: intel.c:619
static int intelx_open(struct net_device *netdev)
Open network device.
Definition: intelx.c:173
#define ENOENT
No such file or directory.
Definition: errno.h:514
Intel 10 Gigabit Ethernet network card driver.
static struct pci_device_id intelx_nics[]
PCI device IDs.
Definition: intelx.c:466
void intel_describe_tx(struct intel_descriptor *tx, physaddr_t addr, size_t len)
Populate transmit descriptor.
Definition: intel.c:383
#define INTELX_CTRL
Device Control Register.
Definition: intelx.h:17
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:186
uint8_t mac[ETH_ALEN]
MAC address.
Definition: ena.h:24
#define INTEL_BAR_SIZE
Intel BAR size.
Definition: intel.h:17
#define INTELX_HLREG0
MAC Core Control 0 Register.
Definition: intelx.h:103
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:149
static void intelx_check_link(struct net_device *netdev)
Check link state.
Definition: intelx.c:144
struct device dev
Generic device.
Definition: pci.h:189
#define INTELX_EIRQ_RX0
RX0 (via IVAR)
Definition: intelx.h:26
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
void intel_refill_rx(struct intel_nic *intel)
Refill receive descriptor ring.
Definition: intel.c:567
Dynamic memory allocation.
static void intelx_close(struct net_device *netdev)
Close network device.
Definition: intelx.c:279
#define INTELX_RXCTRL_RXEN
Receive enable.
Definition: intelx.h:89
#define INTELX_RESET_DELAY_MS
Time to delay for device reset, in milliseconds.
Definition: intelx.h:22
unsigned int port
Port number (for multi-port devices)
Definition: intel.h:282
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
Definition: netdevice.h:498
static int intelx_probe(struct pci_device *pci)
Probe PCI device.
Definition: intelx.c:382
#define INTELX_RAH0
Receive Address High.
Definition: intelx.h:67
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:338
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define INTELX_DMATXCTL
Transmit DMA Control Register.
Definition: intelx.h:92
void * memcpy(void *dest, const void *src, size_t len) __nonnull
#define INTELX_FCTRL_MPE
Multicast promiscuous.
Definition: intelx.h:50
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:555
#define INTELX_IVAR_RX0_VALID
RX queue 0 valid.
Definition: intelx.h:42
Ethernet protocol.
#define INTELX_EIMC
Interrupt Mask Clear Register.
Definition: intelx.h:35
void * priv
Driver private data.
Definition: netdevice.h:425
void intel_describe_rx(struct intel_descriptor *rx, physaddr_t addr, size_t len __unused)
Populate receive descriptor.
Definition: intel.c:421
#define INTELX_FCTRL
Receive Filter Control Register.
Definition: intelx.h:49
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:768
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
#define INTELX_IVAR_RX0_DEFAULT
Definition: intelx.h:40
static struct net_device * netdev
Definition: gdbudp.c:52
#define INTELX_HLREG0_JUMBOEN
Jumbo frame enable.
Definition: intelx.h:104
void unregister_netdev(struct net_device *netdev)
Unregister network device.
Definition: netdevice.c:844
#define cpu_to_le32(value)
Definition: byteswap.h:107
static int intelx_fetch_mac(struct intel_nic *intel, uint8_t *hw_addr)
Fetch initial MAC address.
Definition: intelx.c:87
#define INTELX_DCA_RXCTRL_MUST_BE_ZERO
Must be zero.
Definition: intelx.h:100
#define INTELX_EIMS
Interrupt Mask Set/Read Register.
Definition: intelx.h:32
PCI bus.
A PCI device.
Definition: pci.h:187
int register_netdev(struct net_device *netdev)
Register network device.
Definition: netdevice.c:667
const char * eth_ntoa(const void *ll_addr)
Transcribe Ethernet address.
Definition: ethernet.c:175
#define INTELX_RAH0_ALT
Definition: intelx.h:68
A network device.
Definition: netdevice.h:348
#define ENODEV
No such device.
Definition: errno.h:509
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
Definition: netdevice.h:511
unsigned char uint8_t
Definition: stdint.h:10
static struct net_device_operations intelx_operations
Network device operations.
Definition: intelx.c:361
#define INTELX_FCTRL_UPE
Unicast promiscuous mode.
Definition: intelx.h:51
#define INTELX_DCA_RXCTRL
RX DCA Control Register.
Definition: intelx.h:99
#define ETH_ALEN
Definition: if_ether.h:8
A PCI device ID list entry.
Definition: pci.h:151
unsigned int uint32_t
Definition: stdint.h:12
#define INTELX_CTRL_LRST
Link reset.
Definition: intelx.h:18
static int is_valid_ether_addr(const void *addr)
Check if Ethernet address is valid.
Definition: ethernet.h:77
static struct xen_remove_from_physmap * remove
Definition: xenmem.h:39
static void intelx_poll(struct net_device *netdev)
Poll for completed and received packets.
Definition: intelx.c:312
Network device operations.
Definition: netdevice.h:213
struct device * dev
Underlying hardware device.
Definition: netdevice.h:360
Network device management.
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:348
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
Definition: timer.c:78
uint32_t busdevfn
Segment, bus, device, and function (bus:dev.fn) number.
Definition: pci.h:210
#define INTELX_CTRL_RST
Device reset.
Definition: intelx.h:19
#define INTELX_MAXFRS_MFS_MASK
Definition: intelx.h:111
static unsigned int ctrl
Definition: intel.h:270
#define ENOBUFS
No buffer space available.
Definition: errno.h:498
#define INTELX_SRRCTL
Split Receive Control Register.
Definition: intelx.h:78
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:237
int intel_transmit(struct net_device *netdev, struct io_buffer *iobuf)
Transmit packet.
Definition: intel.c:740
void intel_destroy_ring(struct intel_nic *intel, struct intel_ring *ring)
Destroy descriptor ring.
Definition: intel.c:550
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
Definition: ethernet.c:264
An Intel network card.
Definition: intel.h:278
void iounmap(volatile const void *io_addr)
Unmap I/O address.
#define INTELX_RDRXCTL_SECRC
Strip CRC.
Definition: intelx.h:85
static void intelx_irq(struct net_device *netdev, int enable)
Enable or disable interrupts.
Definition: intelx.c:347
#define INTELX_DMATXCTL_TE
Transmit enable.
Definition: intelx.h:93
#define INTELX_LINKS
Link Status Register.
Definition: intelx.h:114
#define INTELX_RAL0
Receive Address Low.
Definition: intelx.h:63
struct intel_ring tx
Transmit descriptor ring.
Definition: intel.h:299
Receive address.
Definition: intel.h:204
uint8_t ll_addr[MAX_LL_ADDR_LEN]
Link-layer address.
Definition: netdevice.h:381
#define INTELX_EIRQ_TX0
RX0 (via IVAR)
Definition: intelx.h:27
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.
#define INTELX_EICR
Extended Interrupt Cause Read Register.
Definition: intelx.h:25
#define INTELX_TD
Transmit Descriptor register block.
Definition: intelx.h:96
static void intelx_remove(struct pci_device *pci)
Remove PCI device.
Definition: intelx.c:449
uint8_t hw_addr[MAX_HW_ADDR_LEN]
Hardware address.
Definition: netdevice.h:375
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
String functions.
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:283
#define INTELX_LINKS_UP
Link up.
Definition: intelx.h:115
#define INTELX_MAXFRS_MFS_DEFAULT
Definition: intelx.h:109
struct pci_driver intelx_driver __pci_driver
PCI driver.
Definition: intelx.c:484
void * memset(void *dest, int character, size_t len) __nonnull