iPXE
intelx.c
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1 /*
2  * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of the
7  * License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17  * 02110-1301, USA.
18  *
19  * You can also choose to distribute this program under the terms of
20  * the Unmodified Binary Distribution Licence (as given in the file
21  * COPYING.UBDL), provided that you have satisfied its requirements.
22  */
23 
24 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25 
26 #include <stdint.h>
27 #include <string.h>
28 #include <unistd.h>
29 #include <errno.h>
30 #include <byteswap.h>
31 #include <ipxe/netdevice.h>
32 #include <ipxe/ethernet.h>
33 #include <ipxe/if_ether.h>
34 #include <ipxe/iobuf.h>
35 #include <ipxe/pci.h>
36 #include "intelx.h"
37 
38 /** @file
39  *
40  * Intel 10 Gigabit Ethernet network card driver
41  *
42  */
43 
44 /******************************************************************************
45  *
46  * MAC address
47  *
48  ******************************************************************************
49  */
50 
51 /**
52  * Try to fetch initial MAC address
53  *
54  * @v intel Intel device
55  * @v ral0 RAL0 register address
56  * @v hw_addr Hardware address to fill in
57  * @ret rc Return status code
58  */
59 static int intelx_try_fetch_mac ( struct intel_nic *intel, unsigned int ral0,
60  uint8_t *hw_addr ) {
62 
63  /* Read current address from RAL0/RAH0 */
64  mac.reg.low = cpu_to_le32 ( readl ( intel->regs + ral0 ) );
65  mac.reg.high = cpu_to_le32 ( readl ( intel->regs + ral0 +
66  ( INTELX_RAH0 - INTELX_RAL0 ) ) );
67 
68  /* Use current address if valid */
69  if ( is_valid_ether_addr ( mac.raw ) ) {
70  DBGC ( intel, "INTEL %p has autoloaded MAC address %s at "
71  "%#05x\n", intel, eth_ntoa ( mac.raw ), ral0 );
72  memcpy ( hw_addr, mac.raw, ETH_ALEN );
73  return 0;
74  }
75 
76  return -ENOENT;
77 }
78 
79 /**
80  * Fetch initial MAC address
81  *
82  * @v intel Intel device
83  * @v hw_addr Hardware address to fill in
84  * @ret rc Return status code
85  */
86 static int intelx_fetch_mac ( struct intel_nic *intel, uint8_t *hw_addr ) {
87  int rc;
88 
89  /* Try to fetch address from INTELX_RAL0 */
90  if ( ( rc = intelx_try_fetch_mac ( intel, INTELX_RAL0,
91  hw_addr ) ) == 0 ) {
92  return 0;
93  }
94 
95  /* Try to fetch address from INTELX_RAL0_ALT */
96  if ( ( rc = intelx_try_fetch_mac ( intel, INTELX_RAL0_ALT,
97  hw_addr ) ) == 0 ) {
98  return 0;
99  }
100 
101  DBGC ( intel, "INTEL %p has no MAC address to use\n", intel );
102  return -ENOENT;
103 }
104 
105 /******************************************************************************
106  *
107  * Device reset
108  *
109  ******************************************************************************
110  */
111 
112 /**
113  * Reset hardware
114  *
115  * @v intel Intel device
116  * @ret rc Return status code
117  */
118 static int intelx_reset ( struct intel_nic *intel ) {
119  uint32_t ctrl;
120 
121  /* Perform a global software reset */
122  ctrl = readl ( intel->regs + INTELX_CTRL );
124  intel->regs + INTELX_CTRL );
126 
127  DBGC ( intel, "INTEL %p reset (ctrl %08x)\n", intel, ctrl );
128  return 0;
129 }
130 
131 /******************************************************************************
132  *
133  * Link state
134  *
135  ******************************************************************************
136  */
137 
138 /**
139  * Check link state
140  *
141  * @v netdev Network device
142  */
143 static void intelx_check_link ( struct net_device *netdev ) {
144  struct intel_nic *intel = netdev->priv;
145  uint32_t links;
146 
147  /* Read link status */
148  links = readl ( intel->regs + INTELX_LINKS );
149  DBGC ( intel, "INTEL %p link status is %08x\n", intel, links );
150 
151  /* Update network device */
152  if ( links & INTELX_LINKS_UP ) {
154  } else {
156  }
157 }
158 
159 /******************************************************************************
160  *
161  * Network device interface
162  *
163  ******************************************************************************
164  */
165 
166 /**
167  * Open network device
168  *
169  * @v netdev Network device
170  * @ret rc Return status code
171  */
172 static int intelx_open ( struct net_device *netdev ) {
173  struct intel_nic *intel = netdev->priv;
175  uint32_t ral0;
176  uint32_t rah0;
177  uint32_t dmatxctl;
178  uint32_t fctrl;
179  uint32_t srrctl;
180  uint32_t hlreg0;
181  uint32_t maxfrs;
182  uint32_t rdrxctl;
183  uint32_t rxctrl;
184  uint32_t dca_rxctrl;
185  int rc;
186 
187  /* Create transmit descriptor ring */
188  if ( ( rc = intel_create_ring ( intel, &intel->tx ) ) != 0 )
189  goto err_create_tx;
190 
191  /* Create receive descriptor ring */
192  if ( ( rc = intel_create_ring ( intel, &intel->rx ) ) != 0 )
193  goto err_create_rx;
194 
195  /* Program MAC address */
196  memset ( &mac, 0, sizeof ( mac ) );
197  memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
198  ral0 = le32_to_cpu ( mac.reg.low );
199  rah0 = ( le32_to_cpu ( mac.reg.high ) | INTELX_RAH0_AV );
200  writel ( ral0, intel->regs + INTELX_RAL0 );
201  writel ( rah0, intel->regs + INTELX_RAH0 );
202  writel ( ral0, intel->regs + INTELX_RAL0_ALT );
203  writel ( rah0, intel->regs + INTELX_RAH0_ALT );
204 
205  /* Allocate interrupt vectors */
208  intel->regs + INTELX_IVAR );
209 
210  /* Enable transmitter */
211  dmatxctl = readl ( intel->regs + INTELX_DMATXCTL );
212  dmatxctl |= INTELX_DMATXCTL_TE;
213  writel ( dmatxctl, intel->regs + INTELX_DMATXCTL );
214 
215  /* Configure receive filter */
216  fctrl = readl ( intel->regs + INTELX_FCTRL );
218  writel ( fctrl, intel->regs + INTELX_FCTRL );
219 
220  /* Configure receive buffer sizes */
221  srrctl = readl ( intel->regs + INTELX_SRRCTL );
222  srrctl &= ~INTELX_SRRCTL_BSIZE_MASK;
223  srrctl |= INTELX_SRRCTL_BSIZE_DEFAULT;
224  writel ( srrctl, intel->regs + INTELX_SRRCTL );
225 
226  /* Configure jumbo frames. Required to allow the extra 4-byte
227  * headroom for VLANs, since we don't use the hardware's
228  * native VLAN offload.
229  */
230  hlreg0 = readl ( intel->regs + INTELX_HLREG0 );
231  hlreg0 |= INTELX_HLREG0_JUMBOEN;
232  writel ( hlreg0, intel->regs + INTELX_HLREG0 );
233 
234  /* Configure frame size */
235  maxfrs = readl ( intel->regs + INTELX_MAXFRS );
236  maxfrs &= ~INTELX_MAXFRS_MFS_MASK;
237  maxfrs |= INTELX_MAXFRS_MFS_DEFAULT;
238  writel ( maxfrs, intel->regs + INTELX_MAXFRS );
239 
240  /* Configure receive DMA */
241  rdrxctl = readl ( intel->regs + INTELX_RDRXCTL );
242  rdrxctl |= INTELX_RDRXCTL_SECRC;
243  writel ( rdrxctl, intel->regs + INTELX_RDRXCTL );
244 
245  /* Clear "must-be-zero" bit for direct cache access (DCA). We
246  * leave DCA disabled anyway, but if we do not clear this bit
247  * then the received packets contain garbage data.
248  */
249  dca_rxctrl = readl ( intel->regs + INTELX_DCA_RXCTRL );
250  dca_rxctrl &= ~INTELX_DCA_RXCTRL_MUST_BE_ZERO;
251  writel ( dca_rxctrl, intel->regs + INTELX_DCA_RXCTRL );
252 
253  /* Enable receiver */
254  rxctrl = readl ( intel->regs + INTELX_RXCTRL );
255  rxctrl |= INTELX_RXCTRL_RXEN;
256  writel ( rxctrl, intel->regs + INTELX_RXCTRL );
257 
258  /* Fill receive ring */
259  intel_refill_rx ( intel );
260 
261  /* Update link state */
263 
264  return 0;
265 
266  intel_destroy_ring ( intel, &intel->rx );
267  err_create_rx:
268  intel_destroy_ring ( intel, &intel->tx );
269  err_create_tx:
270  return rc;
271 }
272 
273 /**
274  * Close network device
275  *
276  * @v netdev Network device
277  */
278 static void intelx_close ( struct net_device *netdev ) {
279  struct intel_nic *intel = netdev->priv;
280  uint32_t rxctrl;
281  uint32_t dmatxctl;
282 
283  /* Disable receiver */
284  rxctrl = readl ( intel->regs + INTELX_RXCTRL );
285  rxctrl &= ~INTELX_RXCTRL_RXEN;
286  writel ( rxctrl, intel->regs + INTELX_RXCTRL );
287 
288  /* Disable transmitter */
289  dmatxctl = readl ( intel->regs + INTELX_DMATXCTL );
290  dmatxctl &= ~INTELX_DMATXCTL_TE;
291  writel ( dmatxctl, intel->regs + INTELX_DMATXCTL );
292 
293  /* Destroy receive descriptor ring */
294  intel_destroy_ring ( intel, &intel->rx );
295 
296  /* Discard any unused receive buffers */
297  intel_empty_rx ( intel );
298 
299  /* Destroy transmit descriptor ring */
300  intel_destroy_ring ( intel, &intel->tx );
301 
302  /* Reset the NIC, to flush the transmit and receive FIFOs */
303  intelx_reset ( intel );
304 }
305 
306 /**
307  * Poll for completed and received packets
308  *
309  * @v netdev Network device
310  */
311 static void intelx_poll ( struct net_device *netdev ) {
312  struct intel_nic *intel = netdev->priv;
313  uint32_t eicr;
314 
315  /* Check for and acknowledge interrupts */
316  eicr = readl ( intel->regs + INTELX_EICR );
317  if ( ! eicr )
318  return;
319 
320  /* Poll for TX completions, if applicable */
321  if ( eicr & INTELX_EIRQ_TX0 )
322  intel_poll_tx ( netdev );
323 
324  /* Poll for RX completions, if applicable */
325  if ( eicr & ( INTELX_EIRQ_RX0 | INTELX_EIRQ_RXO ) )
326  intel_poll_rx ( netdev );
327 
328  /* Report receive overruns */
329  if ( eicr & INTELX_EIRQ_RXO )
331 
332  /* Check link state, if applicable */
333  if ( eicr & INTELX_EIRQ_LSC )
335 
336  /* Refill RX ring */
337  intel_refill_rx ( intel );
338 }
339 
340 /**
341  * Enable or disable interrupts
342  *
343  * @v netdev Network device
344  * @v enable Interrupts should be enabled
345  */
346 static void intelx_irq ( struct net_device *netdev, int enable ) {
347  struct intel_nic *intel = netdev->priv;
348  uint32_t mask;
349 
351  INTELX_EIRQ_RX0 );
352  if ( enable ) {
353  writel ( mask, intel->regs + INTELX_EIMS );
354  } else {
355  writel ( mask, intel->regs + INTELX_EIMC );
356  }
357 }
358 
359 /** Network device operations */
361  .open = intelx_open,
362  .close = intelx_close,
363  .transmit = intel_transmit,
364  .poll = intelx_poll,
365  .irq = intelx_irq,
366 };
367 
368 /******************************************************************************
369  *
370  * PCI interface
371  *
372  ******************************************************************************
373  */
374 
375 /**
376  * Probe PCI device
377  *
378  * @v pci PCI device
379  * @ret rc Return status code
380  */
381 static int intelx_probe ( struct pci_device *pci ) {
382  struct net_device *netdev;
383  struct intel_nic *intel;
384  int rc;
385 
386  /* Allocate and initialise net device */
387  netdev = alloc_etherdev ( sizeof ( *intel ) );
388  if ( ! netdev ) {
389  rc = -ENOMEM;
390  goto err_alloc;
391  }
393  intel = netdev->priv;
394  pci_set_drvdata ( pci, netdev );
395  netdev->dev = &pci->dev;
396  memset ( intel, 0, sizeof ( *intel ) );
397  intel->port = PCI_FUNC ( pci->busdevfn );
402 
403  /* Fix up PCI device */
404  adjust_pci_device ( pci );
405 
406  /* Map registers */
407  intel->regs = pci_ioremap ( pci, pci->membase, INTEL_BAR_SIZE );
408  if ( ! intel->regs ) {
409  rc = -ENODEV;
410  goto err_ioremap;
411  }
412 
413  /* Configure DMA */
414  intel->dma = &pci->dma;
415  dma_set_mask_64bit ( intel->dma );
416  netdev->dma = intel->dma;
417 
418  /* Reset the NIC */
419  if ( ( rc = intelx_reset ( intel ) ) != 0 )
420  goto err_reset;
421 
422  /* Fetch MAC address */
423  if ( ( rc = intelx_fetch_mac ( intel, netdev->hw_addr ) ) != 0 )
424  goto err_fetch_mac;
425 
426  /* Register network device */
427  if ( ( rc = register_netdev ( netdev ) ) != 0 )
428  goto err_register_netdev;
429 
430  /* Set initial link state */
432 
433  return 0;
434 
436  err_register_netdev:
437  err_fetch_mac:
438  intelx_reset ( intel );
439  err_reset:
440  iounmap ( intel->regs );
441  err_ioremap:
443  netdev_put ( netdev );
444  err_alloc:
445  return rc;
446 }
447 
448 /**
449  * Remove PCI device
450  *
451  * @v pci PCI device
452  */
453 static void intelx_remove ( struct pci_device *pci ) {
454  struct net_device *netdev = pci_get_drvdata ( pci );
455  struct intel_nic *intel = netdev->priv;
456 
457  /* Unregister network device */
459 
460  /* Reset the NIC */
461  intelx_reset ( intel );
462 
463  /* Free network device */
464  iounmap ( intel->regs );
466  netdev_put ( netdev );
467 }
468 
469 /** PCI device IDs */
470 static struct pci_device_id intelx_nics[] = {
471  PCI_ROM ( 0x8086, 0x10f7, "82599-kx4", "82599 (KX/KX4)", 0 ),
472  PCI_ROM ( 0x8086, 0x10f8, "82599-combo-backplane", "82599 (combined backplane; KR/KX4/KX)", 0 ),
473  PCI_ROM ( 0x8086, 0x10f9, "82599-cx4", "82599 (CX4)", 0 ),
474  PCI_ROM ( 0x8086, 0x10fb, "82599-sfp", "82599 (SFI/SFP+)", 0 ),
475  PCI_ROM ( 0x8086, 0x10fc, "82599-xaui", "82599 (XAUI/BX4)", 0 ),
476  PCI_ROM ( 0x8086, 0x1528, "x540t", "X540-AT2/X540-BT2", 0 ),
477  PCI_ROM ( 0x8086, 0x154d, "82599-sfp-sf2", "82599 (SFI/SFP+)", 0 ),
478  PCI_ROM ( 0x8086, 0x1557, "82599en-sfp", "82599 (Single Port SFI Only)", 0 ),
479  PCI_ROM ( 0x8086, 0x1560, "x540t1", "X540-AT2/X540-BT2 (with single port NVM)", 0 ),
480  PCI_ROM ( 0x8086, 0x1563, "x550t2", "X550-T2", 0 ),
481  PCI_ROM ( 0x8086, 0x15ab, "x552", "X552", 0 ),
482  PCI_ROM ( 0x8086, 0x15c8, "x553t", "X553/X557-AT", 0 ),
483  PCI_ROM ( 0x8086, 0x15ce, "x553-sfp", "X553 (SFP+)", 0 ),
484  PCI_ROM ( 0x8086, 0x15e4, "x553a", "X553", 0 ),
485  PCI_ROM ( 0x8086, 0x15e5, "x553", "X553", 0 ),
486 };
487 
488 /** PCI driver */
489 struct pci_driver intelx_driver __pci_driver = {
490  .ids = intelx_nics,
491  .id_count = ( sizeof ( intelx_nics ) / sizeof ( intelx_nics[0] ) ),
492  .probe = intelx_probe,
494 };
void * regs
Registers.
Definition: intel.h:283
#define PCI_FUNC(busdevfn)
Definition: pci.h:264
#define INTELX_RDRXCTL
Receive DMA Control Register.
Definition: intelx.h:84
unsigned long membase
Memory base.
Definition: pci.h:200
static int intelx_reset(struct intel_nic *intel)
Reset hardware.
Definition: intelx.c:118
#define INTELX_IVAR_TX0_VALID
TX queue 0 valid.
Definition: intelx.h:46
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
#define INTELX_RD
Receive Descriptor register block.
Definition: intelx.h:72
#define INTELX_EIRQ_LSC
Link status change.
Definition: intelx.h:29
static int intelx_try_fetch_mac(struct intel_nic *intel, unsigned int ral0, uint8_t *hw_addr)
Try to fetch initial MAC address.
Definition: intelx.c:59
struct dma_device dma
DMA device.
Definition: pci.h:195
#define INTEL_NUM_RX_DESC
Number of receive descriptors.
Definition: intel.h:150
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:542
#define INTELX_RAL0_ALT
Definition: intelx.h:64
#define INTELX_IVAR
Interrupt Vector Allocation Register.
Definition: intelx.h:38
void intel_poll_rx(struct net_device *netdev)
Poll for received packets.
Definition: intel.c:808
#define INTELX_FCTRL_BAM
Broadcast accept mode.
Definition: intelx.h:52
A PCI driver.
Definition: pci.h:230
#define le32_to_cpu(value)
Definition: byteswap.h:113
int(* open)(struct net_device *netdev)
Open network device.
Definition: netdevice.h:222
#define INTELX_SRRCTL_BSIZE_MASK
Definition: intelx.h:81
#define INTELX_SRRCTL_BSIZE_DEFAULT
Definition: intelx.h:80
Error codes.
#define INTELX_IVAR_TX0_DEFAULT
Definition: intelx.h:44
#define INTELX_MAXFRS
Maximum Frame Size Register.
Definition: intelx.h:107
#define INTELX_RAH0_AV
Address valid.
Definition: intelx.h:69
I/O buffers.
#define INTEL_NUM_TX_DESC
Number of transmit descriptors.
Definition: intel.h:166
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:232
void intel_poll_tx(struct net_device *netdev)
Poll for completed packets.
Definition: intel.c:779
#define INTELX_RXCTRL
Receive Control Register.
Definition: intelx.h:88
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
struct intel_ring rx
Receive descriptor ring.
Definition: intel.h:306
#define INTELX_EIRQ_RXO
Receive overrun.
Definition: intelx.h:28
#define DBGC(...)
Definition: compiler.h:505
int intel_create_ring(struct intel_nic *intel, struct intel_ring *ring)
Create descriptor ring.
Definition: intel.c:499
void intel_empty_rx(struct intel_nic *intel)
Discard unused receive I/O buffers.
Definition: intel.c:618
static int intelx_open(struct net_device *netdev)
Open network device.
Definition: intelx.c:172
#define ENOENT
No such file or directory.
Definition: errno.h:514
static __always_inline void dma_set_mask_64bit(struct dma_device *dma)
Set 64-bit addressable space mask.
Definition: dma.h:474
Intel 10 Gigabit Ethernet network card driver.
static struct pci_device_id intelx_nics[]
PCI device IDs.
Definition: intelx.c:470
void intel_describe_tx(struct intel_descriptor *tx, physaddr_t addr, size_t len)
Populate transmit descriptor.
Definition: intel.c:383
struct dma_device * dma
DMA device.
Definition: netdevice.h:366
#define INTELX_CTRL
Device Control Register.
Definition: intelx.h:17
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:186
uint8_t mac[ETH_ALEN]
MAC address.
Definition: ena.h:24
#define INTEL_BAR_SIZE
Intel BAR size.
Definition: intel.h:18
#define INTELX_HLREG0
MAC Core Control 0 Register.
Definition: intelx.h:103
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:149
static void intel_init_ring(struct intel_ring *ring, unsigned int count, unsigned int reg, void(*describe)(struct intel_descriptor *desc, physaddr_t addr, size_t len))
Initialise descriptor ring.
Definition: intel.h:248
static void intelx_check_link(struct net_device *netdev)
Check link state.
Definition: intelx.c:143
struct device dev
Generic device.
Definition: pci.h:193
#define INTELX_EIRQ_RX0
RX0 (via IVAR)
Definition: intelx.h:26
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
void intel_refill_rx(struct intel_nic *intel)
Refill receive descriptor ring.
Definition: intel.c:568
static void intelx_close(struct net_device *netdev)
Close network device.
Definition: intelx.c:278
#define INTELX_RXCTRL_RXEN
Receive enable.
Definition: intelx.h:89
#define INTELX_RESET_DELAY_MS
Time to delay for device reset, in milliseconds.
Definition: intelx.h:22
unsigned int port
Port number (for multi-port devices)
Definition: intel.h:287
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
Definition: netdevice.h:510
static int intelx_probe(struct pci_device *pci)
Probe PCI device.
Definition: intelx.c:381
#define INTELX_RAH0
Receive Address High.
Definition: intelx.h:67
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:344
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define INTELX_DMATXCTL
Transmit DMA Control Register.
Definition: intelx.h:92
void * memcpy(void *dest, const void *src, size_t len) __nonnull
#define INTELX_FCTRL_MPE
Multicast promiscuous.
Definition: intelx.h:50
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:567
#define INTELX_IVAR_RX0_VALID
RX queue 0 valid.
Definition: intelx.h:42
Ethernet protocol.
#define INTELX_EIMC
Interrupt Mask Clear Register.
Definition: intelx.h:35
void * priv
Driver private data.
Definition: netdevice.h:431
void intel_describe_rx(struct intel_descriptor *rx, physaddr_t addr, size_t len __unused)
Populate receive descriptor.
Definition: intel.c:421
#define INTELX_FCTRL
Receive Filter Control Register.
Definition: intelx.h:49
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:780
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
#define INTELX_IVAR_RX0_DEFAULT
Definition: intelx.h:40
static struct net_device * netdev
Definition: gdbudp.c:52
#define INTELX_HLREG0_JUMBOEN
Jumbo frame enable.
Definition: intelx.h:104
void unregister_netdev(struct net_device *netdev)
Unregister network device.
Definition: netdevice.c:899
#define cpu_to_le32(value)
Definition: byteswap.h:107
static int intelx_fetch_mac(struct intel_nic *intel, uint8_t *hw_addr)
Fetch initial MAC address.
Definition: intelx.c:86
#define INTELX_DCA_RXCTRL_MUST_BE_ZERO
Must be zero.
Definition: intelx.h:100
#define INTELX_EIMS
Interrupt Mask Set/Read Register.
Definition: intelx.h:32
PCI bus.
A PCI device.
Definition: pci.h:191
int register_netdev(struct net_device *netdev)
Register network device.
Definition: netdevice.c:722
const char * eth_ntoa(const void *ll_addr)
Transcribe Ethernet address.
Definition: ethernet.c:175
#define INTELX_RAH0_ALT
Definition: intelx.h:68
A network device.
Definition: netdevice.h:352
#define ENODEV
No such device.
Definition: errno.h:509
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
Definition: netdevice.h:523
unsigned char uint8_t
Definition: stdint.h:10
static struct net_device_operations intelx_operations
Network device operations.
Definition: intelx.c:360
#define INTELX_FCTRL_UPE
Unicast promiscuous mode.
Definition: intelx.h:51
#define INTELX_DCA_RXCTRL
RX DCA Control Register.
Definition: intelx.h:99
#define ETH_ALEN
Definition: if_ether.h:8
A PCI device ID list entry.
Definition: pci.h:155
unsigned int uint32_t
Definition: stdint.h:12
#define INTELX_CTRL_LRST
Link reset.
Definition: intelx.h:18
static int is_valid_ether_addr(const void *addr)
Check if Ethernet address is valid.
Definition: ethernet.h:77
static struct xen_remove_from_physmap * remove
Definition: xenmem.h:39
static void intelx_poll(struct net_device *netdev)
Poll for completed and received packets.
Definition: intelx.c:311
Network device operations.
Definition: netdevice.h:213
struct device * dev
Underlying hardware device.
Definition: netdevice.h:364
Network device management.
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:354
struct dma_device * dma
DMA device.
Definition: intel.h:285
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
Definition: timer.c:78
uint32_t busdevfn
Segment, bus, device, and function (bus:dev.fn) number.
Definition: pci.h:216
#define INTELX_CTRL_RST
Device reset.
Definition: intelx.h:19
#define INTELX_MAXFRS_MFS_MASK
Definition: intelx.h:111
#define ENOBUFS
No buffer space available.
Definition: errno.h:498
#define INTELX_SRRCTL
Split Receive Control Register.
Definition: intelx.h:78
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:243
int intel_transmit(struct net_device *netdev, struct io_buffer *iobuf)
Transmit packet.
Definition: intel.c:740
void intel_destroy_ring(struct intel_nic *intel, struct intel_ring *ring)
Destroy descriptor ring.
Definition: intel.c:551
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
Definition: ethernet.c:264
u8 ctrl
Definition: sky2.h:10
An Intel network card.
Definition: intel.h:281
void iounmap(volatile const void *io_addr)
Unmap I/O address.
#define INTELX_RDRXCTL_SECRC
Strip CRC.
Definition: intelx.h:85
static void intelx_irq(struct net_device *netdev, int enable)
Enable or disable interrupts.
Definition: intelx.c:346
#define INTELX_DMATXCTL_TE
Transmit enable.
Definition: intelx.h:93
#define INTELX_LINKS
Link Status Register.
Definition: intelx.h:114
#define INTELX_RAL0
Receive Address Low.
Definition: intelx.h:63
struct intel_ring tx
Transmit descriptor ring.
Definition: intel.h:304
Receive address.
Definition: intel.h:205
uint8_t ll_addr[MAX_LL_ADDR_LEN]
Link-layer address.
Definition: netdevice.h:387
#define INTELX_EIRQ_TX0
RX0 (via IVAR)
Definition: intelx.h:27
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.
#define INTELX_EICR
Extended Interrupt Cause Read Register.
Definition: intelx.h:25
#define INTELX_TD
Transmit Descriptor register block.
Definition: intelx.h:96
static void intelx_remove(struct pci_device *pci)
Remove PCI device.
Definition: intelx.c:453
uint8_t hw_addr[MAX_HW_ADDR_LEN]
Hardware address.
Definition: netdevice.h:381
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
String functions.
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:289
#define INTELX_LINKS_UP
Link up.
Definition: intelx.h:115
#define INTELX_MAXFRS_MFS_DEFAULT
Definition: intelx.h:109
struct pci_driver intelx_driver __pci_driver
PCI driver.
Definition: intelx.c:489
void * memset(void *dest, int character, size_t len) __nonnull