iPXE
intel.c
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1 /*
2  * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of the
7  * License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17  * 02110-1301, USA.
18  *
19  * You can also choose to distribute this program under the terms of
20  * the Unmodified Binary Distribution Licence (as given in the file
21  * COPYING.UBDL), provided that you have satisfied its requirements.
22  */
23 
24 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25 
26 #include <stdint.h>
27 #include <string.h>
28 #include <unistd.h>
29 #include <errno.h>
30 #include <byteswap.h>
31 #include <ipxe/netdevice.h>
32 #include <ipxe/ethernet.h>
33 #include <ipxe/if_ether.h>
34 #include <ipxe/iobuf.h>
35 #include <ipxe/dma.h>
36 #include <ipxe/pci.h>
37 #include <ipxe/profile.h>
38 #include "intel.h"
39 
40 /** @file
41  *
42  * Intel 10/100/1000 network card driver
43  *
44  */
45 
46 /** VM transmit profiler */
47 static struct profiler intel_vm_tx_profiler __profiler =
48  { .name = "intel.vm_tx" };
49 
50 /** VM receive refill profiler */
51 static struct profiler intel_vm_refill_profiler __profiler =
52  { .name = "intel.vm_refill" };
53 
54 /** VM poll profiler */
55 static struct profiler intel_vm_poll_profiler __profiler =
56  { .name = "intel.vm_poll" };
57 
58 /******************************************************************************
59  *
60  * EEPROM interface
61  *
62  ******************************************************************************
63  */
64 
65 /**
66  * Read data from EEPROM
67  *
68  * @v nvs NVS device
69  * @v address Address from which to read
70  * @v data Data buffer
71  * @v len Length of data buffer
72  * @ret rc Return status code
73  */
74 static int intel_read_eeprom ( struct nvs_device *nvs, unsigned int address,
75  void *data, size_t len ) {
76  struct intel_nic *intel =
77  container_of ( nvs, struct intel_nic, eeprom );
78  unsigned int i;
80  uint16_t *data_word = data;
81 
82  /* Sanity check. We advertise a blocksize of one word, so
83  * should only ever receive single-word requests.
84  */
85  assert ( len == sizeof ( *data_word ) );
86 
87  /* Initiate read */
88  writel ( ( INTEL_EERD_START | ( address << intel->eerd_addr_shift ) ),
89  intel->regs + INTEL_EERD );
90 
91  /* Wait for read to complete */
92  for ( i = 0 ; i < INTEL_EEPROM_MAX_WAIT_MS ; i++ ) {
93 
94  /* If read is not complete, delay 1ms and retry */
95  value = readl ( intel->regs + INTEL_EERD );
96  if ( ! ( value & intel->eerd_done ) ) {
97  mdelay ( 1 );
98  continue;
99  }
100 
101  /* Extract data */
102  *data_word = cpu_to_le16 ( INTEL_EERD_DATA ( value ) );
103  return 0;
104  }
105 
106  DBGC ( intel, "INTEL %p timed out waiting for EEPROM read\n", intel );
107  return -ETIMEDOUT;
108 }
109 
110 /**
111  * Write data to EEPROM
112  *
113  * @v nvs NVS device
114  * @v address Address to which to write
115  * @v data Data buffer
116  * @v len Length of data buffer
117  * @ret rc Return status code
118  */
119 static int intel_write_eeprom ( struct nvs_device *nvs,
120  unsigned int address __unused,
121  const void *data __unused,
122  size_t len __unused ) {
123  struct intel_nic *intel =
124  container_of ( nvs, struct intel_nic, eeprom );
125 
126  DBGC ( intel, "INTEL %p EEPROM write not supported\n", intel );
127  return -ENOTSUP;
128 }
129 
130 /**
131  * Initialise EEPROM
132  *
133  * @v intel Intel device
134  * @ret rc Return status code
135  */
136 static int intel_init_eeprom ( struct intel_nic *intel ) {
137  unsigned int i;
138  uint32_t value;
139 
140  /* The NIC automatically detects the type of attached EEPROM.
141  * The EERD register provides access to only a single word at
142  * a time, so we pretend to have a single-word block size.
143  *
144  * The EEPROM size may be larger than the minimum size, but
145  * this doesn't matter to us since we access only the first
146  * few words.
147  */
150  intel->eeprom.block_size = 1;
151  intel->eeprom.read = intel_read_eeprom;
153 
154  /* The layout of the EERD register was changed at some point
155  * to accommodate larger EEPROMs. Read from address zero (for
156  * which the request layouts are compatible) to determine
157  * which type of register we have.
158  */
159  writel ( INTEL_EERD_START, intel->regs + INTEL_EERD );
160  for ( i = 0 ; i < INTEL_EEPROM_MAX_WAIT_MS ; i++ ) {
161  value = readl ( intel->regs + INTEL_EERD );
162  if ( value & INTEL_EERD_DONE_LARGE ) {
163  DBGC ( intel, "INTEL %p has large-format EERD\n",
164  intel );
167  return 0;
168  }
169  if ( value & INTEL_EERD_DONE_SMALL ) {
170  DBGC ( intel, "INTEL %p has small-format EERD\n",
171  intel );
174  return 0;
175  }
176  mdelay ( 1 );
177  }
178 
179  DBGC ( intel, "INTEL %p timed out waiting for initial EEPROM read "
180  "(value %08x)\n", intel, value );
181  return -ETIMEDOUT;
182 }
183 
184 /******************************************************************************
185  *
186  * MAC address
187  *
188  ******************************************************************************
189  */
190 
191 /**
192  * Fetch initial MAC address from EEPROM
193  *
194  * @v intel Intel device
195  * @v hw_addr Hardware address to fill in
196  * @ret rc Return status code
197  */
198 static int intel_fetch_mac_eeprom ( struct intel_nic *intel,
199  uint8_t *hw_addr ) {
200  int rc;
201 
202  /* Initialise EEPROM */
203  if ( ( rc = intel_init_eeprom ( intel ) ) != 0 )
204  return rc;
205 
206  /* Read base MAC address from EEPROM */
207  if ( ( rc = nvs_read ( &intel->eeprom, INTEL_EEPROM_MAC,
208  hw_addr, ETH_ALEN ) ) != 0 ) {
209  DBGC ( intel, "INTEL %p could not read EEPROM base MAC "
210  "address: %s\n", intel, strerror ( rc ) );
211  return rc;
212  }
213 
214  /* Adjust MAC address for multi-port devices */
215  hw_addr[ETH_ALEN-1] ^= intel->port;
216 
217  DBGC ( intel, "INTEL %p has EEPROM MAC address %s (port %d)\n",
218  intel, eth_ntoa ( hw_addr ), intel->port );
219  return 0;
220 }
221 
222 /**
223  * Fetch initial MAC address
224  *
225  * @v intel Intel device
226  * @v hw_addr Hardware address to fill in
227  * @ret rc Return status code
228  */
229 static int intel_fetch_mac ( struct intel_nic *intel, uint8_t *hw_addr ) {
231  int rc;
232 
233  /* Read current address from RAL0/RAH0 */
234  mac.reg.low = cpu_to_le32 ( readl ( intel->regs + INTEL_RAL0 ) );
235  mac.reg.high = cpu_to_le32 ( readl ( intel->regs + INTEL_RAH0 ) );
236  DBGC ( intel, "INTEL %p has autoloaded MAC address %s\n",
237  intel, eth_ntoa ( mac.raw ) );
238 
239  /* Use current address if valid */
240  if ( is_valid_ether_addr ( mac.raw ) ) {
241  memcpy ( hw_addr, mac.raw, ETH_ALEN );
242  return 0;
243  }
244 
245  /* Otherwise, try to read address from EEPROM */
246  if ( ( rc = intel_fetch_mac_eeprom ( intel, hw_addr ) ) == 0 )
247  return 0;
248 
249  DBGC ( intel, "INTEL %p has no MAC address to use\n", intel );
250  return -ENOENT;
251 }
252 
253 /******************************************************************************
254  *
255  * Device reset
256  *
257  ******************************************************************************
258  */
259 
260 /**
261  * Reset hardware
262  *
263  * @v intel Intel device
264  * @ret rc Return status code
265  */
266 static int intel_reset ( struct intel_nic *intel ) {
267  uint32_t pbs;
268  uint32_t pba;
269  uint32_t ctrl;
271  uint32_t orig_ctrl;
272  uint32_t orig_status;
273 
274  /* Record initial control and status register values */
275  orig_ctrl = ctrl = readl ( intel->regs + INTEL_CTRL );
276  orig_status = readl ( intel->regs + INTEL_STATUS );
277 
278  /* Force RX and TX packet buffer allocation, to work around an
279  * errata in ICH devices.
280  */
281  if ( intel->flags & INTEL_PBS_ERRATA ) {
282  DBGC ( intel, "INTEL %p WARNING: applying ICH PBS/PBA errata\n",
283  intel );
284  pbs = readl ( intel->regs + INTEL_PBS );
285  pba = readl ( intel->regs + INTEL_PBA );
286  writel ( 0x08, intel->regs + INTEL_PBA );
287  writel ( 0x10, intel->regs + INTEL_PBS );
288  DBGC ( intel, "INTEL %p PBS %#08x->%#08x PBA %#08x->%#08x\n",
289  intel, pbs, readl ( intel->regs + INTEL_PBS ),
290  pba, readl ( intel->regs + INTEL_PBA ) );
291  }
292 
293  /* The Intel I210's packet buffer size registers reset only on
294  * power up. If an operating system changes these but then
295  * the computer recieves a reset signal without losing power,
296  * the registers will stay the same (but be incompatible with
297  * other register defaults), thus making the device unable to
298  * pass traffic.
299  */
300  if ( intel->flags & INTEL_PBSIZE_RST ) {
301  writel ( INTEL_RXPBS_I210, intel->regs + INTEL_RXPBS );
302  writel ( INTEL_TXPBS_I210, intel->regs + INTEL_TXPBS );
303  }
304 
305  /* Always reset MAC. Required to reset the TX and RX rings. */
306  writel ( ( ctrl | INTEL_CTRL_RST ), intel->regs + INTEL_CTRL );
308 
309  /* Set a sensible default configuration */
310  if ( ! ( intel->flags & INTEL_NO_ASDE ) )
312  ctrl |= INTEL_CTRL_SLU;
314  writel ( ctrl, intel->regs + INTEL_CTRL );
316 
317  /* On some models (notably ICH), the PHY reset mechanism
318  * appears to be broken. In particular, the PHY_CTRL register
319  * will be correctly loaded from NVM but the values will not
320  * be propagated to the "OEM bits" PHY register. This
321  * typically has the effect of dropping the link speed to
322  * 10Mbps.
323  *
324  * Work around this problem by skipping the PHY reset if
325  * either (a) the link is already up, or (b) this particular
326  * NIC is known to be broken.
327  */
328  status = readl ( intel->regs + INTEL_STATUS );
329  if ( ( intel->flags & INTEL_NO_PHY_RST ) ||
330  ( status & INTEL_STATUS_LU ) ) {
331  DBGC ( intel, "INTEL %p %sMAC reset (%08x/%08x was "
332  "%08x/%08x)\n", intel,
333  ( ( intel->flags & INTEL_NO_PHY_RST ) ? "forced " : "" ),
334  ctrl, status, orig_ctrl, orig_status );
335  return 0;
336  }
337 
338  /* Reset PHY and MAC simultaneously */
340  intel->regs + INTEL_CTRL );
342 
343  /* PHY reset is not self-clearing on all models */
344  writel ( ctrl, intel->regs + INTEL_CTRL );
346  status = readl ( intel->regs + INTEL_STATUS );
347 
348  DBGC ( intel, "INTEL %p MAC+PHY reset (%08x/%08x was %08x/%08x)\n",
349  intel, ctrl, status, orig_ctrl, orig_status );
350  return 0;
351 }
352 
353 /******************************************************************************
354  *
355  * Link state
356  *
357  ******************************************************************************
358  */
359 
360 /**
361  * Check link state
362  *
363  * @v netdev Network device
364  */
365 static void intel_check_link ( struct net_device *netdev ) {
366  struct intel_nic *intel = netdev->priv;
368 
369  /* Read link status */
370  status = readl ( intel->regs + INTEL_STATUS );
371  DBGC ( intel, "INTEL %p link status is %08x\n", intel, status );
372 
373  /* Update network device */
374  if ( status & INTEL_STATUS_LU ) {
376  } else {
378  }
379 }
380 
381 /******************************************************************************
382  *
383  * Descriptors
384  *
385  ******************************************************************************
386  */
387 
388 /**
389  * Populate transmit descriptor
390  *
391  * @v tx Transmit descriptor
392  * @v addr Data buffer address
393  * @v len Length of data
394  */
396  size_t len ) {
397 
398  /* Populate transmit descriptor */
399  tx->address = cpu_to_le64 ( addr );
400  tx->length = cpu_to_le16 ( len );
401  tx->flags = 0;
402  tx->command = ( INTEL_DESC_CMD_RS | INTEL_DESC_CMD_IFCS |
404  tx->status = 0;
405 }
406 
407 /**
408  * Populate advanced transmit descriptor
409  *
410  * @v tx Transmit descriptor
411  * @v addr Data buffer address
412  * @v len Length of data
413  */
415  size_t len ) {
416 
417  /* Populate advanced transmit descriptor */
418  tx->address = cpu_to_le64 ( addr );
419  tx->length = cpu_to_le16 ( len );
420  tx->flags = INTEL_DESC_FL_DTYP_DATA;
421  tx->command = ( INTEL_DESC_CMD_DEXT | INTEL_DESC_CMD_RS |
423  tx->status = cpu_to_le32 ( INTEL_DESC_STATUS_PAYLEN ( len ) );
424 }
425 
426 /**
427  * Populate receive descriptor
428  *
429  * @v rx Receive descriptor
430  * @v addr Data buffer address
431  * @v len Length of data
432  */
434  size_t len __unused ) {
435 
436  /* Populate transmit descriptor */
437  rx->address = cpu_to_le64 ( addr );
438  rx->length = 0;
439  rx->status = 0;
440 }
441 
442 /******************************************************************************
443  *
444  * Network device interface
445  *
446  ******************************************************************************
447  */
448 
449 /**
450  * Disable descriptor ring
451  *
452  * @v intel Intel device
453  * @v reg Register block
454  * @ret rc Return status code
455  */
456 static int intel_disable_ring ( struct intel_nic *intel, unsigned int reg ) {
457  uint32_t dctl;
458  unsigned int i;
459 
460  /* Disable ring */
461  writel ( 0, ( intel->regs + reg + INTEL_xDCTL ) );
462 
463  /* Wait for disable to complete */
464  for ( i = 0 ; i < INTEL_DISABLE_MAX_WAIT_MS ; i++ ) {
465 
466  /* Check if ring is disabled */
467  dctl = readl ( intel->regs + reg + INTEL_xDCTL );
468  if ( ! ( dctl & INTEL_xDCTL_ENABLE ) )
469  return 0;
470 
471  /* Delay */
472  mdelay ( 1 );
473  }
474 
475  DBGC ( intel, "INTEL %p ring %05x timed out waiting for disable "
476  "(dctl %08x)\n", intel, reg, dctl );
477  return -ETIMEDOUT;
478 }
479 
480 /**
481  * Reset descriptor ring
482  *
483  * @v intel Intel device
484  * @v reg Register block
485  * @ret rc Return status code
486  */
487 void intel_reset_ring ( struct intel_nic *intel, unsigned int reg ) {
488 
489  /* Disable ring. Ignore errors and continue to reset the ring anyway */
490  intel_disable_ring ( intel, reg );
491 
492  /* Clear ring length */
493  writel ( 0, ( intel->regs + reg + INTEL_xDLEN ) );
494 
495  /* Clear ring address */
496  writel ( 0, ( intel->regs + reg + INTEL_xDBAH ) );
497  writel ( 0, ( intel->regs + reg + INTEL_xDBAL ) );
498 
499  /* Reset head and tail pointers */
500  writel ( 0, ( intel->regs + reg + INTEL_xDH ) );
501  writel ( 0, ( intel->regs + reg + INTEL_xDT ) );
502 }
503 
504 /**
505  * Create descriptor ring
506  *
507  * @v intel Intel device
508  * @v ring Descriptor ring
509  * @ret rc Return status code
510  */
511 int intel_create_ring ( struct intel_nic *intel, struct intel_ring *ring ) {
513  uint32_t dctl;
514 
515  /* Allocate descriptor ring. Align ring on its own size to
516  * prevent any possible page-crossing errors due to hardware
517  * errata.
518  */
519  ring->desc = dma_alloc ( intel->dma, &ring->map, ring->len,
520  ring->len );
521  if ( ! ring->desc )
522  return -ENOMEM;
523 
524  /* Initialise descriptor ring */
525  memset ( ring->desc, 0, ring->len );
526 
527  /* Program ring address */
528  address = dma ( &ring->map, ring->desc );
529  writel ( ( address & 0xffffffffUL ),
530  ( intel->regs + ring->reg + INTEL_xDBAL ) );
531  if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
532  writel ( ( ( ( uint64_t ) address ) >> 32 ),
533  ( intel->regs + ring->reg + INTEL_xDBAH ) );
534  } else {
535  writel ( 0, intel->regs + ring->reg + INTEL_xDBAH );
536  }
537 
538  /* Program ring length */
539  writel ( ring->len, ( intel->regs + ring->reg + INTEL_xDLEN ) );
540 
541  /* Reset head and tail pointers */
542  writel ( 0, ( intel->regs + ring->reg + INTEL_xDH ) );
543  writel ( 0, ( intel->regs + ring->reg + INTEL_xDT ) );
544 
545  /* Enable ring */
546  dctl = readl ( intel->regs + ring->reg + INTEL_xDCTL );
547  dctl |= INTEL_xDCTL_ENABLE;
548  writel ( dctl, intel->regs + ring->reg + INTEL_xDCTL );
549 
550  DBGC ( intel, "INTEL %p ring %05x is at [%08lx,%08lx)\n",
551  intel, ring->reg, virt_to_phys ( ring->desc ),
552  ( virt_to_phys ( ring->desc ) + ring->len ) );
553 
554  return 0;
555 }
556 
557 /**
558  * Destroy descriptor ring
559  *
560  * @v intel Intel device
561  * @v ring Descriptor ring
562  */
563 void intel_destroy_ring ( struct intel_nic *intel, struct intel_ring *ring ) {
564 
565  /* Reset ring */
566  intel_reset_ring ( intel, ring->reg );
567 
568  /* Free descriptor ring */
569  dma_free ( &ring->map, ring->desc, ring->len );
570  ring->desc = NULL;
571  ring->prod = 0;
572  ring->cons = 0;
573 }
574 
575 /**
576  * Refill receive descriptor ring
577  *
578  * @v intel Intel device
579  */
580 void intel_refill_rx ( struct intel_nic *intel ) {
581  struct intel_descriptor *rx;
582  struct io_buffer *iobuf;
583  unsigned int rx_idx;
584  unsigned int rx_tail;
585  unsigned int refilled = 0;
586 
587  /* Refill ring */
588  while ( ( intel->rx.prod - intel->rx.cons ) < INTEL_RX_FILL ) {
589 
590  /* Allocate I/O buffer */
591  iobuf = alloc_rx_iob ( INTEL_RX_MAX_LEN, intel->dma );
592  if ( ! iobuf ) {
593  /* Wait for next refill */
594  break;
595  }
596 
597  /* Get next receive descriptor */
598  rx_idx = ( intel->rx.prod++ % INTEL_NUM_RX_DESC );
599  rx = &intel->rx.desc[rx_idx];
600 
601  /* Populate receive descriptor */
602  intel->rx.describe ( rx, iob_dma ( iobuf ), 0 );
603 
604  /* Record I/O buffer */
605  assert ( intel->rx_iobuf[rx_idx] == NULL );
606  intel->rx_iobuf[rx_idx] = iobuf;
607 
608  DBGC2 ( intel, "INTEL %p RX %d is [%lx,%lx)\n",
609  intel, rx_idx, virt_to_phys ( iobuf->data ),
610  ( virt_to_phys ( iobuf->data ) + INTEL_RX_MAX_LEN ) );
611  refilled++;
612  }
613 
614  /* Push descriptors to card, if applicable */
615  if ( refilled ) {
616  wmb();
617  rx_tail = ( intel->rx.prod % INTEL_NUM_RX_DESC );
618  profile_start ( &intel_vm_refill_profiler );
619  writel ( rx_tail, intel->regs + intel->rx.reg + INTEL_xDT );
620  profile_stop ( &intel_vm_refill_profiler );
621  profile_exclude ( &intel_vm_refill_profiler );
622  }
623 }
624 
625 /**
626  * Discard unused receive I/O buffers
627  *
628  * @v intel Intel device
629  */
630 void intel_empty_rx ( struct intel_nic *intel ) {
631  unsigned int i;
632 
633  /* Discard unused receive buffers */
634  for ( i = 0 ; i < INTEL_NUM_RX_DESC ; i++ ) {
635  if ( intel->rx_iobuf[i] )
636  free_rx_iob ( intel->rx_iobuf[i] );
637  intel->rx_iobuf[i] = NULL;
638  }
639 }
640 
641 /**
642  * Open network device
643  *
644  * @v netdev Network device
645  * @ret rc Return status code
646  */
647 static int intel_open ( struct net_device *netdev ) {
648  struct intel_nic *intel = netdev->priv;
650  uint32_t fextnvm11;
651  uint32_t tctl;
652  uint32_t rctl;
653  int rc;
654 
655  /* Set undocumented bit in FEXTNVM11 to work around an errata
656  * in i219 devices that will otherwise cause a complete
657  * datapath hang at the next device reset.
658  */
659  if ( intel->flags & INTEL_RST_HANG ) {
660  DBGC ( intel, "INTEL %p WARNING: applying reset hang "
661  "workaround\n", intel );
662  fextnvm11 = readl ( intel->regs + INTEL_FEXTNVM11 );
663  fextnvm11 |= INTEL_FEXTNVM11_WTF;
664  writel ( fextnvm11, intel->regs + INTEL_FEXTNVM11 );
665  }
666 
667  /* Create transmit descriptor ring */
668  if ( ( rc = intel_create_ring ( intel, &intel->tx ) ) != 0 )
669  goto err_create_tx;
670 
671  /* Create receive descriptor ring */
672  if ( ( rc = intel_create_ring ( intel, &intel->rx ) ) != 0 )
673  goto err_create_rx;
674 
675  /* Program MAC address */
676  memset ( &mac, 0, sizeof ( mac ) );
677  memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
678  writel ( le32_to_cpu ( mac.reg.low ), intel->regs + INTEL_RAL0 );
679  writel ( ( le32_to_cpu ( mac.reg.high ) | INTEL_RAH0_AV ),
680  intel->regs + INTEL_RAH0 );
681 
682  /* Enable transmitter */
683  tctl = readl ( intel->regs + INTEL_TCTL );
687  writel ( tctl, intel->regs + INTEL_TCTL );
688 
689  /* Enable receiver */
690  rctl = readl ( intel->regs + INTEL_RCTL );
691  rctl &= ~( INTEL_RCTL_BSIZE_BSEX_MASK );
694  writel ( rctl, intel->regs + INTEL_RCTL );
695 
696  /* Fill receive ring */
697  intel_refill_rx ( intel );
698 
699  /* Update link state */
701 
702  /* Apply required errata */
703  if ( intel->flags & INTEL_VMWARE ) {
704  DBGC ( intel, "INTEL %p applying VMware errata workaround\n",
705  intel );
706  intel->force_icr = INTEL_IRQ_RXT0;
707  }
708 
709  return 0;
710 
711  intel_destroy_ring ( intel, &intel->rx );
712  err_create_rx:
713  intel_destroy_ring ( intel, &intel->tx );
714  err_create_tx:
715  return rc;
716 }
717 
718 /**
719  * Close network device
720  *
721  * @v netdev Network device
722  */
723 static void intel_close ( struct net_device *netdev ) {
724  struct intel_nic *intel = netdev->priv;
725 
726  /* Disable receiver */
727  writel ( 0, intel->regs + INTEL_RCTL );
728 
729  /* Disable transmitter */
730  writel ( 0, intel->regs + INTEL_TCTL );
731 
732  /* Destroy receive descriptor ring */
733  intel_destroy_ring ( intel, &intel->rx );
734 
735  /* Discard any unused receive buffers */
736  intel_empty_rx ( intel );
737 
738  /* Destroy transmit descriptor ring */
739  intel_destroy_ring ( intel, &intel->tx );
740 
741  /* Reset the NIC, to flush the transmit and receive FIFOs */
742  intel_reset ( intel );
743 }
744 
745 /**
746  * Transmit packet
747  *
748  * @v netdev Network device
749  * @v iobuf I/O buffer
750  * @ret rc Return status code
751  */
752 int intel_transmit ( struct net_device *netdev, struct io_buffer *iobuf ) {
753  struct intel_nic *intel = netdev->priv;
754  struct intel_descriptor *tx;
755  unsigned int tx_idx;
756  unsigned int tx_tail;
757  size_t len;
758 
759  /* Get next transmit descriptor */
760  if ( ( intel->tx.prod - intel->tx.cons ) >= INTEL_TX_FILL ) {
761  DBGC ( intel, "INTEL %p out of transmit descriptors\n", intel );
762  return -ENOBUFS;
763  }
764  tx_idx = ( intel->tx.prod++ % INTEL_NUM_TX_DESC );
765  tx_tail = ( intel->tx.prod % INTEL_NUM_TX_DESC );
766  tx = &intel->tx.desc[tx_idx];
767 
768  /* Populate transmit descriptor */
769  len = iob_len ( iobuf );
770  intel->tx.describe ( tx, iob_dma ( iobuf ), len );
771  wmb();
772 
773  /* Notify card that there are packets ready to transmit */
774  profile_start ( &intel_vm_tx_profiler );
775  writel ( tx_tail, intel->regs + intel->tx.reg + INTEL_xDT );
776  profile_stop ( &intel_vm_tx_profiler );
777  profile_exclude ( &intel_vm_tx_profiler );
778 
779  DBGC2 ( intel, "INTEL %p TX %d is [%lx,%lx)\n",
780  intel, tx_idx, virt_to_phys ( iobuf->data ),
781  ( virt_to_phys ( iobuf->data ) + len ) );
782 
783  return 0;
784 }
785 
786 /**
787  * Poll for completed packets
788  *
789  * @v netdev Network device
790  */
791 void intel_poll_tx ( struct net_device *netdev ) {
792  struct intel_nic *intel = netdev->priv;
793  struct intel_descriptor *tx;
794  unsigned int tx_idx;
795 
796  /* Check for completed packets */
797  while ( intel->tx.cons != intel->tx.prod ) {
798 
799  /* Get next transmit descriptor */
800  tx_idx = ( intel->tx.cons % INTEL_NUM_TX_DESC );
801  tx = &intel->tx.desc[tx_idx];
802 
803  /* Stop if descriptor is still in use */
804  if ( ! ( tx->status & cpu_to_le32 ( INTEL_DESC_STATUS_DD ) ) )
805  return;
806 
807  DBGC2 ( intel, "INTEL %p TX %d complete\n", intel, tx_idx );
808 
809  /* Complete TX descriptor */
811  intel->tx.cons++;
812  }
813 }
814 
815 /**
816  * Poll for received packets
817  *
818  * @v netdev Network device
819  */
820 void intel_poll_rx ( struct net_device *netdev ) {
821  struct intel_nic *intel = netdev->priv;
822  struct intel_descriptor *rx;
823  struct io_buffer *iobuf;
824  unsigned int rx_idx;
825  size_t len;
826 
827  /* Check for received packets */
828  while ( intel->rx.cons != intel->rx.prod ) {
829 
830  /* Get next receive descriptor */
831  rx_idx = ( intel->rx.cons % INTEL_NUM_RX_DESC );
832  rx = &intel->rx.desc[rx_idx];
833 
834  /* Stop if descriptor is still in use */
835  if ( ! ( rx->status & cpu_to_le32 ( INTEL_DESC_STATUS_DD ) ) )
836  return;
837 
838  /* Populate I/O buffer */
839  iobuf = intel->rx_iobuf[rx_idx];
840  intel->rx_iobuf[rx_idx] = NULL;
841  len = le16_to_cpu ( rx->length );
842  iob_put ( iobuf, len );
843 
844  /* Hand off to network stack */
845  if ( rx->status & cpu_to_le32 ( INTEL_DESC_STATUS_RXE ) ) {
846  DBGC ( intel, "INTEL %p RX %d error (length %zd, "
847  "status %08x)\n", intel, rx_idx, len,
848  le32_to_cpu ( rx->status ) );
849  netdev_rx_err ( netdev, iobuf, -EIO );
850  } else {
851  DBGC2 ( intel, "INTEL %p RX %d complete (length %zd)\n",
852  intel, rx_idx, len );
853  netdev_rx ( netdev, iobuf );
854  }
855  intel->rx.cons++;
856  }
857 }
858 
859 /**
860  * Poll for completed and received packets
861  *
862  * @v netdev Network device
863  */
864 static void intel_poll ( struct net_device *netdev ) {
865  struct intel_nic *intel = netdev->priv;
866  uint32_t icr;
867 
868  /* Check for and acknowledge interrupts */
869  profile_start ( &intel_vm_poll_profiler );
870  icr = readl ( intel->regs + INTEL_ICR );
871  profile_stop ( &intel_vm_poll_profiler );
872  profile_exclude ( &intel_vm_poll_profiler );
873  icr |= intel->force_icr;
874  if ( ! icr )
875  return;
876 
877  /* Poll for TX completions, if applicable */
878  if ( icr & INTEL_IRQ_TXDW )
879  intel_poll_tx ( netdev );
880 
881  /* Poll for RX completions, if applicable */
882  if ( icr & ( INTEL_IRQ_RXT0 | INTEL_IRQ_RXO ) )
883  intel_poll_rx ( netdev );
884 
885  /* Report receive overruns */
886  if ( icr & INTEL_IRQ_RXO )
888 
889  /* Check link state, if applicable */
890  if ( icr & INTEL_IRQ_LSC )
892 
893  /* Check for unexpected interrupts */
894  if ( icr & ~( INTEL_IRQ_TXDW | INTEL_IRQ_TXQE | INTEL_IRQ_LSC |
896  DBGC ( intel, "INTEL %p unexpected ICR %08x\n", intel, icr );
897  /* Report as a TX error */
899  }
900 
901  /* Refill RX ring */
902  intel_refill_rx ( intel );
903 }
904 
905 /**
906  * Enable or disable interrupts
907  *
908  * @v netdev Network device
909  * @v enable Interrupts should be enabled
910  */
911 static void intel_irq ( struct net_device *netdev, int enable ) {
912  struct intel_nic *intel = netdev->priv;
913  uint32_t mask;
914 
916  if ( enable ) {
917  writel ( mask, intel->regs + INTEL_IMS );
918  } else {
919  writel ( mask, intel->regs + INTEL_IMC );
920  }
921 }
922 
923 /** Intel network device operations */
925  .open = intel_open,
926  .close = intel_close,
927  .transmit = intel_transmit,
928  .poll = intel_poll,
929  .irq = intel_irq,
930 };
931 
932 /******************************************************************************
933  *
934  * PCI interface
935  *
936  ******************************************************************************
937  */
938 
939 /**
940  * Probe PCI device
941  *
942  * @v pci PCI device
943  * @ret rc Return status code
944  */
945 static int intel_probe ( struct pci_device *pci ) {
946  struct net_device *netdev;
947  struct intel_nic *intel;
948  int rc;
949 
950  /* Allocate and initialise net device */
951  netdev = alloc_etherdev ( sizeof ( *intel ) );
952  if ( ! netdev ) {
953  rc = -ENOMEM;
954  goto err_alloc;
955  }
957  intel = netdev->priv;
958  pci_set_drvdata ( pci, netdev );
959  netdev->dev = &pci->dev;
960  memset ( intel, 0, sizeof ( *intel ) );
961  intel->port = PCI_FUNC ( pci->busdevfn );
962  intel->flags = pci->id->driver_data;
967 
968  /* Fix up PCI device */
969  adjust_pci_device ( pci );
970 
971  /* Map registers */
972  intel->regs = pci_ioremap ( pci, pci->membase, INTEL_BAR_SIZE );
973  if ( ! intel->regs ) {
974  rc = -ENODEV;
975  goto err_ioremap;
976  }
977 
978  /* Configure DMA */
979  intel->dma = &pci->dma;
980  dma_set_mask_64bit ( intel->dma );
981  netdev->dma = intel->dma;
982 
983  /* Reset the NIC */
984  if ( ( rc = intel_reset ( intel ) ) != 0 )
985  goto err_reset;
986 
987  /* Fetch MAC address */
988  if ( ( rc = intel_fetch_mac ( intel, netdev->hw_addr ) ) != 0 )
989  goto err_fetch_mac;
990 
991  /* Register network device */
992  if ( ( rc = register_netdev ( netdev ) ) != 0 )
993  goto err_register_netdev;
994 
995  /* Set initial link state */
997 
998  return 0;
999 
1001  err_register_netdev:
1002  err_fetch_mac:
1003  intel_reset ( intel );
1004  err_reset:
1005  iounmap ( intel->regs );
1006  err_ioremap:
1007  netdev_nullify ( netdev );
1008  netdev_put ( netdev );
1009  err_alloc:
1010  return rc;
1011 }
1012 
1013 /**
1014  * Remove PCI device
1015  *
1016  * @v pci PCI device
1017  */
1018 static void intel_remove ( struct pci_device *pci ) {
1019  struct net_device *netdev = pci_get_drvdata ( pci );
1020  struct intel_nic *intel = netdev->priv;
1021 
1022  /* Unregister network device */
1024 
1025  /* Reset the NIC */
1026  intel_reset ( intel );
1027 
1028  /* Free network device */
1029  iounmap ( intel->regs );
1030  netdev_nullify ( netdev );
1031  netdev_put ( netdev );
1032 }
1033 
1034 /** Intel PCI device IDs */
1035 static struct pci_device_id intel_nics[] = {
1036  PCI_ROM ( 0x8086, 0x0438, "dh8900cc", "DH8900CC", 0 ),
1037  PCI_ROM ( 0x8086, 0x043a, "dh8900cc-f", "DH8900CC Fiber", 0 ),
1038  PCI_ROM ( 0x8086, 0x043c, "dh8900cc-b", "DH8900CC Backplane", 0 ),
1039  PCI_ROM ( 0x8086, 0x0440, "dh8900cc-s", "DH8900CC SFP", 0 ),
1040  PCI_ROM ( 0x8086, 0x0d4c, "i219lm-11", "I219-LM (11)", INTEL_I219 ),
1041  PCI_ROM ( 0x8086, 0x0d4d, "i219v-11", "I219-V (11)", INTEL_I219 ),
1042  PCI_ROM ( 0x8086, 0x0d4e, "i219lm-10", "I219-LM (10)", INTEL_I219 ),
1043  PCI_ROM ( 0x8086, 0x0d4f, "i219v-10", "I219-V (10)", INTEL_I219 ),
1044  PCI_ROM ( 0x8086, 0x0d53, "i219lm-12", "I219-LM (12)", INTEL_I219 ),
1045  PCI_ROM ( 0x8086, 0x0d55, "i219v-12", "I219-V (12)", INTEL_I219 ),
1046  PCI_ROM ( 0x8086, 0x0dc5, "i219lm-23", "I219-LM (23)", INTEL_I219 ),
1047  PCI_ROM ( 0x8086, 0x1000, "82542-f", "82542 (Fiber)", 0 ),
1048  PCI_ROM ( 0x8086, 0x1001, "82543gc-f", "82543GC (Fiber)", 0 ),
1049  PCI_ROM ( 0x8086, 0x1004, "82543gc", "82543GC (Copper)", 0 ),
1050  PCI_ROM ( 0x8086, 0x1008, "82544ei", "82544EI (Copper)", 0 ),
1051  PCI_ROM ( 0x8086, 0x1009, "82544ei-f", "82544EI (Fiber)", 0 ),
1052  PCI_ROM ( 0x8086, 0x100c, "82544gc", "82544GC (Copper)", 0 ),
1053  PCI_ROM ( 0x8086, 0x100d, "82544gc-l", "82544GC (LOM)", 0 ),
1054  PCI_ROM ( 0x8086, 0x100e, "82540em", "82540EM", 0 ),
1055  PCI_ROM ( 0x8086, 0x100f, "82545em", "82545EM (Copper)", INTEL_VMWARE ),
1056  PCI_ROM ( 0x8086, 0x1010, "82546eb", "82546EB (Copper)", 0 ),
1057  PCI_ROM ( 0x8086, 0x1011, "82545em-f", "82545EM (Fiber)", 0 ),
1058  PCI_ROM ( 0x8086, 0x1012, "82546eb-f", "82546EB (Fiber)", 0 ),
1059  PCI_ROM ( 0x8086, 0x1013, "82541ei", "82541EI", 0 ),
1060  PCI_ROM ( 0x8086, 0x1014, "82541er", "82541ER", 0 ),
1061  PCI_ROM ( 0x8086, 0x1015, "82540em-l", "82540EM (LOM)", 0 ),
1062  PCI_ROM ( 0x8086, 0x1016, "82540ep-m", "82540EP (Mobile)", 0 ),
1063  PCI_ROM ( 0x8086, 0x1017, "82540ep", "82540EP", 0 ),
1064  PCI_ROM ( 0x8086, 0x1018, "82541ei", "82541EI", 0 ),
1065  PCI_ROM ( 0x8086, 0x1019, "82547ei", "82547EI", 0 ),
1066  PCI_ROM ( 0x8086, 0x101a, "82547ei-m", "82547EI (Mobile)", 0 ),
1067  PCI_ROM ( 0x8086, 0x101d, "82546eb", "82546EB", 0 ),
1068  PCI_ROM ( 0x8086, 0x101e, "82540ep-m", "82540EP (Mobile)", 0 ),
1069  PCI_ROM ( 0x8086, 0x1026, "82545gm", "82545GM", 0 ),
1070  PCI_ROM ( 0x8086, 0x1027, "82545gm-1", "82545GM", 0 ),
1071  PCI_ROM ( 0x8086, 0x1028, "82545gm-2", "82545GM", 0 ),
1072  PCI_ROM ( 0x8086, 0x1049, "82566mm", "82566MM", INTEL_PBS_ERRATA ),
1073  PCI_ROM ( 0x8086, 0x104a, "82566dm", "82566DM", INTEL_PBS_ERRATA ),
1074  PCI_ROM ( 0x8086, 0x104b, "82566dc", "82566DC", INTEL_PBS_ERRATA ),
1075  PCI_ROM ( 0x8086, 0x104c, "82562v", "82562V", INTEL_PBS_ERRATA ),
1076  PCI_ROM ( 0x8086, 0x104d, "82566mc", "82566MC", INTEL_PBS_ERRATA ),
1077  PCI_ROM ( 0x8086, 0x105e, "82571eb", "82571EB", 0 ),
1078  PCI_ROM ( 0x8086, 0x105f, "82571eb-1", "82571EB", 0 ),
1079  PCI_ROM ( 0x8086, 0x1060, "82571eb-2", "82571EB", 0 ),
1080  PCI_ROM ( 0x8086, 0x1075, "82547gi", "82547GI", 0 ),
1081  PCI_ROM ( 0x8086, 0x1076, "82541gi", "82541GI", 0 ),
1082  PCI_ROM ( 0x8086, 0x1077, "82541gi-1", "82541GI", 0 ),
1083  PCI_ROM ( 0x8086, 0x1078, "82541er", "82541ER", 0 ),
1084  PCI_ROM ( 0x8086, 0x1079, "82546gb", "82546GB", 0 ),
1085  PCI_ROM ( 0x8086, 0x107a, "82546gb-1", "82546GB", 0 ),
1086  PCI_ROM ( 0x8086, 0x107b, "82546gb-2", "82546GB", 0 ),
1087  PCI_ROM ( 0x8086, 0x107c, "82541pi", "82541PI", 0 ),
1088  PCI_ROM ( 0x8086, 0x107d, "82572ei", "82572EI (Copper)", 0 ),
1089  PCI_ROM ( 0x8086, 0x107e, "82572ei-f", "82572EI (Fiber)", 0 ),
1090  PCI_ROM ( 0x8086, 0x107f, "82572ei", "82572EI", 0 ),
1091  PCI_ROM ( 0x8086, 0x108a, "82546gb-3", "82546GB", 0 ),
1092  PCI_ROM ( 0x8086, 0x108b, "82573v", "82573V (Copper)", 0 ),
1093  PCI_ROM ( 0x8086, 0x108c, "82573e", "82573E (Copper)", 0 ),
1094  PCI_ROM ( 0x8086, 0x1096, "80003es2lan", "80003ES2LAN (Copper)", 0 ),
1095  PCI_ROM ( 0x8086, 0x1098, "80003es2lan-s", "80003ES2LAN (Serdes)", 0 ),
1096  PCI_ROM ( 0x8086, 0x1099, "82546gb-4", "82546GB (Copper)", 0 ),
1097  PCI_ROM ( 0x8086, 0x109a, "82573l", "82573L", 0 ),
1098  PCI_ROM ( 0x8086, 0x10a4, "82571eb", "82571EB", 0 ),
1099  PCI_ROM ( 0x8086, 0x10a5, "82571eb", "82571EB (Fiber)", 0 ),
1100  PCI_ROM ( 0x8086, 0x10a7, "82575eb", "82575EB", 0 ),
1101  PCI_ROM ( 0x8086, 0x10a9, "82575eb", "82575EB Backplane", 0 ),
1102  PCI_ROM ( 0x8086, 0x10b5, "82546gb", "82546GB (Copper)", 0 ),
1103  PCI_ROM ( 0x8086, 0x10b9, "82572ei", "82572EI (Copper)", 0 ),
1104  PCI_ROM ( 0x8086, 0x10ba, "80003es2lan", "80003ES2LAN (Copper)", 0 ),
1105  PCI_ROM ( 0x8086, 0x10bb, "80003es2lan", "80003ES2LAN (Serdes)", 0 ),
1106  PCI_ROM ( 0x8086, 0x10bc, "82571eb", "82571EB (Copper)", 0 ),
1107  PCI_ROM ( 0x8086, 0x10bd, "82566dm-2", "82566DM-2", 0 ),
1108  PCI_ROM ( 0x8086, 0x10bf, "82567lf", "82567LF", 0 ),
1109  PCI_ROM ( 0x8086, 0x10c0, "82562v-2", "82562V-2", 0 ),
1110  PCI_ROM ( 0x8086, 0x10c2, "82562g-2", "82562G-2", 0 ),
1111  PCI_ROM ( 0x8086, 0x10c3, "82562gt-2", "82562GT-2", 0 ),
1112  PCI_ROM ( 0x8086, 0x10c4, "82562gt", "82562GT", INTEL_PBS_ERRATA ),
1113  PCI_ROM ( 0x8086, 0x10c5, "82562g", "82562G", INTEL_PBS_ERRATA ),
1114  PCI_ROM ( 0x8086, 0x10c9, "82576", "82576", 0 ),
1115  PCI_ROM ( 0x8086, 0x10cb, "82567v", "82567V", 0 ),
1116  PCI_ROM ( 0x8086, 0x10cc, "82567lm-2", "82567LM-2", 0 ),
1117  PCI_ROM ( 0x8086, 0x10cd, "82567lf-2", "82567LF-2", 0 ),
1118  PCI_ROM ( 0x8086, 0x10ce, "82567v-2", "82567V-2", 0 ),
1119  PCI_ROM ( 0x8086, 0x10d3, "82574l", "82574L", 0 ),
1120  PCI_ROM ( 0x8086, 0x10d5, "82571pt", "82571PT PT Quad", 0 ),
1121  PCI_ROM ( 0x8086, 0x10d6, "82575gb", "82575GB", 0 ),
1122  PCI_ROM ( 0x8086, 0x10d9, "82571eb-d", "82571EB Dual Mezzanine", 0 ),
1123  PCI_ROM ( 0x8086, 0x10da, "82571eb-q", "82571EB Quad Mezzanine", 0 ),
1124  PCI_ROM ( 0x8086, 0x10de, "82567lm-3", "82567LM-3", 0 ),
1125  PCI_ROM ( 0x8086, 0x10df, "82567lf-3", "82567LF-3", 0 ),
1126  PCI_ROM ( 0x8086, 0x10e5, "82567lm-4", "82567LM-4", 0 ),
1127  PCI_ROM ( 0x8086, 0x10e6, "82576", "82576", 0 ),
1128  PCI_ROM ( 0x8086, 0x10e7, "82576-2", "82576", 0 ),
1129  PCI_ROM ( 0x8086, 0x10e8, "82576-3", "82576", 0 ),
1130  PCI_ROM ( 0x8086, 0x10ea, "82577lm", "82577LM", 0 ),
1131  PCI_ROM ( 0x8086, 0x10eb, "82577lc", "82577LC", 0 ),
1132  PCI_ROM ( 0x8086, 0x10ef, "82578dm", "82578DM", 0 ),
1133  PCI_ROM ( 0x8086, 0x10f0, "82578dc", "82578DC", 0 ),
1134  PCI_ROM ( 0x8086, 0x10f5, "82567lm", "82567LM", 0 ),
1135  PCI_ROM ( 0x8086, 0x10f6, "82574l", "82574L", 0 ),
1136  PCI_ROM ( 0x8086, 0x1501, "82567v-3", "82567V-3", INTEL_PBS_ERRATA ),
1137  PCI_ROM ( 0x8086, 0x1502, "82579lm", "82579LM", INTEL_NO_PHY_RST ),
1138  PCI_ROM ( 0x8086, 0x1503, "82579v", "82579V", 0 ),
1139  PCI_ROM ( 0x8086, 0x150a, "82576ns", "82576NS", 0 ),
1140  PCI_ROM ( 0x8086, 0x150c, "82583v", "82583V", 0 ),
1141  PCI_ROM ( 0x8086, 0x150d, "82576-4", "82576 Backplane", 0 ),
1142  PCI_ROM ( 0x8086, 0x150e, "82580", "82580", 0 ),
1143  PCI_ROM ( 0x8086, 0x150f, "82580-f", "82580 Fiber", 0 ),
1144  PCI_ROM ( 0x8086, 0x1510, "82580-b", "82580 Backplane", 0 ),
1145  PCI_ROM ( 0x8086, 0x1511, "82580-s", "82580 SFP", 0 ),
1146  PCI_ROM ( 0x8086, 0x1516, "82580-2", "82580", 0 ),
1147  PCI_ROM ( 0x8086, 0x1518, "82576ns", "82576NS SerDes", 0 ),
1148  PCI_ROM ( 0x8086, 0x1521, "i350", "I350", 0 ),
1149  PCI_ROM ( 0x8086, 0x1522, "i350-f", "I350 Fiber", 0 ),
1150  PCI_ROM ( 0x8086, 0x1523, "i350-b", "I350 Backplane", INTEL_NO_ASDE ),
1151  PCI_ROM ( 0x8086, 0x1524, "i350-2", "I350", 0 ),
1152  PCI_ROM ( 0x8086, 0x1525, "82567v-4", "82567V-4", 0 ),
1153  PCI_ROM ( 0x8086, 0x1526, "82576-5", "82576", 0 ),
1154  PCI_ROM ( 0x8086, 0x1527, "82580-f2", "82580 Fiber", 0 ),
1155  PCI_ROM ( 0x8086, 0x1533, "i210", "I210", INTEL_PBSIZE_RST ),
1156  PCI_ROM ( 0x8086, 0x1539, "i211", "I211", 0 ),
1157  PCI_ROM ( 0x8086, 0x153a, "i217lm", "I217-LM", INTEL_NO_PHY_RST ),
1158  PCI_ROM ( 0x8086, 0x153b, "i217v", "I217-V", 0 ),
1159  PCI_ROM ( 0x8086, 0x1559, "i218v", "I218-V", INTEL_NO_PHY_RST ),
1160  PCI_ROM ( 0x8086, 0x155a, "i218lm", "I218-LM", INTEL_NO_PHY_RST ),
1161  PCI_ROM ( 0x8086, 0x156f, "i219lm", "I219-LM", INTEL_I219 ),
1162  PCI_ROM ( 0x8086, 0x1570, "i219v", "I219-V", INTEL_I219 ),
1163  PCI_ROM ( 0x8086, 0x157b, "i210-2", "I210", INTEL_PBSIZE_RST ),
1164  PCI_ROM ( 0x8086, 0x15a0, "i218lm-2", "I218-LM", INTEL_NO_PHY_RST ),
1165  PCI_ROM ( 0x8086, 0x15a1, "i218v-2", "I218-V", 0 ),
1166  PCI_ROM ( 0x8086, 0x15a2, "i218lm-3", "I218-LM", INTEL_NO_PHY_RST ),
1167  PCI_ROM ( 0x8086, 0x15a3, "i218v-3", "I218-V", INTEL_NO_PHY_RST ),
1168  PCI_ROM ( 0x8086, 0x15b7, "i219lm-2", "I219-LM (2)", INTEL_I219 ),
1169  PCI_ROM ( 0x8086, 0x15b8, "i219v-2", "I219-V (2)", INTEL_I219 ),
1170  PCI_ROM ( 0x8086, 0x15b9, "i219lm-3", "I219-LM (3)", INTEL_I219 ),
1171  PCI_ROM ( 0x8086, 0x15bb, "i219lm-7", "I219-LM (7)", INTEL_I219 ),
1172  PCI_ROM ( 0x8086, 0x15bc, "i219v-7", "I219-V (7)", INTEL_I219 ),
1173  PCI_ROM ( 0x8086, 0x15bd, "i219lm-6", "I219-LM (6)", INTEL_I219 ),
1174  PCI_ROM ( 0x8086, 0x15be, "i219v-6", "I219-V (6)", INTEL_I219 ),
1175  PCI_ROM ( 0x8086, 0x15d6, "i219v-5", "I219-V (5)", INTEL_I219 ),
1176  PCI_ROM ( 0x8086, 0x15d7, "i219lm-4", "I219-LM (4)", INTEL_I219 ),
1177  PCI_ROM ( 0x8086, 0x15d8, "i219v-4", "I219-V (4)", INTEL_I219 ),
1178  PCI_ROM ( 0x8086, 0x15df, "i219lm-8", "I219-LM (8)", INTEL_I219 ),
1179  PCI_ROM ( 0x8086, 0x15e0, "i219v-8", "I219-V (8)", INTEL_I219 ),
1180  PCI_ROM ( 0x8086, 0x15e1, "i219lm-9", "I219-LM (9)", INTEL_I219 ),
1181  PCI_ROM ( 0x8086, 0x15e2, "i219v-9", "I219-V (9)", INTEL_I219 ),
1182  PCI_ROM ( 0x8086, 0x15e3, "i219lm-5", "I219-LM (5)", INTEL_I219 ),
1183  PCI_ROM ( 0x8086, 0x15f4, "i219lm-15", "I219-LM (15)", INTEL_I219 ),
1184  PCI_ROM ( 0x8086, 0x15f5, "i219v-15", "I219-V (15)", INTEL_I219 ),
1185  PCI_ROM ( 0x8086, 0x15f9, "i219lm-14", "I219-LM (14)", INTEL_I219 ),
1186  PCI_ROM ( 0x8086, 0x15fa, "i219v-14", "I219-V (14)", INTEL_I219 ),
1187  PCI_ROM ( 0x8086, 0x15fb, "i219lm-13", "I219-LM (13)", INTEL_I219 ),
1188  PCI_ROM ( 0x8086, 0x15fc, "i219v-13", "I219-V (13)", INTEL_I219 ),
1189  PCI_ROM ( 0x8086, 0x1a1c, "i219lm-17", "I219-LM (17)", INTEL_I219 ),
1190  PCI_ROM ( 0x8086, 0x1a1d, "i219v-17", "I219-V (17)", INTEL_I219 ),
1191  PCI_ROM ( 0x8086, 0x1a1e, "i219lm-16", "I219-LM (16)", INTEL_I219 ),
1192  PCI_ROM ( 0x8086, 0x1a1f, "i219v-16", "I219-V (16)", INTEL_I219 ),
1193  PCI_ROM ( 0x8086, 0x1f41, "i354", "I354", INTEL_NO_ASDE ),
1194  PCI_ROM ( 0x8086, 0x294c, "82566dc-2", "82566DC-2", 0 ),
1195  PCI_ROM ( 0x8086, 0x2e6e, "cemedia", "CE Media Processor", 0 ),
1196 };
1197 
1198 /** Intel PCI driver */
1199 struct pci_driver intel_driver __pci_driver = {
1200  .ids = intel_nics,
1201  .id_count = ( sizeof ( intel_nics ) / sizeof ( intel_nics[0] ) ),
1202  .probe = intel_probe,
1203  .remove = intel_remove,
1204 };
unsigned int force_icr
Forced interrupts.
Definition: intel.h:299
void * regs
Registers.
Definition: intel.h:291
#define PCI_FUNC(busdevfn)
Definition: pci.h:281
PHY reset is broken.
Definition: intel.h:326
int(* write)(struct nvs_device *nvs, unsigned int address, const void *data, size_t len)
Write data to device.
Definition: nvs.h:59
unsigned long membase
Memory base.
Definition: pci.h:215
#define INTEL_RCTL_BSIZE_2048
Definition: intel.h:121
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
unsigned short uint16_t
Definition: stdint.h:11
wmb()
unsigned int word_len_log2
Word length.
Definition: nvs.h:22
DMA mappings.
#define INTEL_ICR
Interrupt Cause Read Register.
Definition: intel.h:98
#define INTEL_DESC_STATUS_DD
Descriptor done.
Definition: intel.h:51
#define iob_put(iobuf, len)
Definition: iobuf.h:120
struct dma_device dma
DMA device.
Definition: pci.h:210
#define INTEL_NUM_RX_DESC
Number of receive descriptors.
Definition: intel.h:154
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:586
#define INTEL_IRQ_RXDMT0
Receive queue low.
Definition: intel.h:102
#define INTEL_PBA
Packet Buffer Allocation.
Definition: intel.h:137
#define INTEL_EERD
EEPROM Read Register.
Definition: intel.h:77
void intel_poll_rx(struct net_device *netdev)
Poll for received packets.
Definition: intel.c:820
A PCI driver.
Definition: pci.h:247
void intel_reset_ring(struct intel_nic *intel, unsigned int reg)
Reset descriptor ring.
Definition: intel.c:487
#define INTEL_DESC_STATUS_PAYLEN(len)
Payload length.
Definition: intel.h:57
static unsigned int unsigned int reg
Definition: myson.h:162
static int intel_fetch_mac_eeprom(struct intel_nic *intel, uint8_t *hw_addr)
Fetch initial MAC address from EEPROM.
Definition: intel.c:198
ASDE is broken.
Definition: intel.h:328
static struct profiler intel_vm_tx_profiler __profiler
VM transmit profiler.
Definition: intel.c:47
#define INTEL_IRQ_RXT0
Receive timer.
Definition: intel.h:104
#define le32_to_cpu(value)
Definition: byteswap.h:113
int(* open)(struct net_device *netdev)
Open network device.
Definition: netdevice.h:222
void netdev_tx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard transmitted packet.
Definition: netdevice.c:440
#define INTEL_EERD_DONE_SMALL
Read done (small EERD)
Definition: intel.h:79
Error codes.
static int intel_fetch_mac(struct intel_nic *intel, uint8_t *hw_addr)
Fetch initial MAC address.
Definition: intel.c:229
VMware missing interrupt workaround required.
Definition: intel.h:324
struct dma_mapping map
Descriptor ring DMA mapping.
Definition: intel.h:226
#define INTEL_xDCTL
Receive/Transmit Descriptor Control (offset)
Definition: intel.h:195
static int intel_open(struct net_device *netdev)
Open network device.
Definition: intel.c:647
#define INTEL_RD
Receive Descriptor register block.
Definition: intel.h:147
unsigned long driver_data
Arbitrary driver data.
Definition: pci.h:178
static void netdev_tx_complete_next(struct net_device *netdev)
Complete network transmission.
Definition: netdevice.h:764
I/O buffers.
A non-volatile storage device.
Definition: nvs.h:15
#define INTEL_NUM_TX_DESC
Number of transmit descriptors.
Definition: intel.h:174
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:249
void intel_poll_tx(struct net_device *netdev)
Poll for completed packets.
Definition: intel.c:791
uint64_t address
Base address.
Definition: ena.h:24
static void intel_irq(struct net_device *netdev, int enable)
Enable or disable interrupts.
Definition: intel.c:911
#define INTEL_RCTL_BSIZE_BSEX_MASK
Definition: intel.h:122
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
struct intel_ring rx
Receive descriptor ring.
Definition: intel.h:314
#define INTEL_TCTL_EN
Transmit enable.
Definition: intel.h:127
#define DBGC(...)
Definition: compiler.h:505
#define INTEL_xDT
Receive/Transmit Descriptor Tail (offset)
Definition: intel.h:192
int intel_create_ring(struct intel_nic *intel, struct intel_ring *ring)
Create descriptor ring.
Definition: intel.c:511
void intel_empty_rx(struct intel_nic *intel)
Discard unused receive I/O buffers.
Definition: intel.c:630
#define ENOENT
No such file or directory.
Definition: errno.h:514
size_t len
Length (in bytes)
Definition: intel.h:235
static __always_inline void dma_set_mask_64bit(struct dma_device *dma)
Set 64-bit addressable space mask.
Definition: dma.h:474
unsigned long long uint64_t
Definition: stdint.h:13
void intel_describe_tx(struct intel_descriptor *tx, physaddr_t addr, size_t len)
Populate transmit descriptor.
Definition: intel.c:395
struct dma_device * dma
DMA device.
Definition: netdevice.h:366
#define INTEL_TXPBS
Transmit packet buffer size.
Definition: intel.h:163
#define INTEL_PBS
Packet Buffer Size.
Definition: intel.h:140
#define cpu_to_le64(value)
Definition: byteswap.h:108
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:230
PBS/PBA errata workaround required.
Definition: intel.h:322
#define INTEL_IRQ_TXDW
Transmit descriptor done.
Definition: intel.h:99
uint8_t mac[ETH_ALEN]
MAC address.
Definition: ena.h:24
A data structure for storing profiling information.
Definition: profile.h:26
An Intel descriptor ring.
Definition: intel.h:222
#define INTEL_BAR_SIZE
Intel BAR size.
Definition: intel.h:18
static void profile_stop(struct profiler *profiler)
Stop profiling.
Definition: profile.h:171
#define INTEL_DESC_FL_DTYP_DATA
Definition: intel.h:36
#define INTEL_RCTL_SECRC
Strip CRC.
Definition: intel.h:123
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:154
static void intel_init_ring(struct intel_ring *ring, unsigned int count, unsigned int reg, void(*describe)(struct intel_descriptor *desc, physaddr_t addr, size_t len))
Initialise descriptor ring.
Definition: intel.h:256
unsigned int cons
Consumer index.
Definition: intel.h:230
#define INTEL_xDLEN
Receive/Transmit Descriptor Length (offset)
Definition: intel.h:186
static __always_inline unsigned long virt_to_phys(volatile const void *addr)
Convert virtual address to a physical address.
Definition: uaccess.h:287
struct device dev
Generic device.
Definition: pci.h:208
unsigned int reg
Register block.
Definition: intel.h:233
#define ENOTSUP
Operation not supported.
Definition: errno.h:589
void intel_refill_rx(struct intel_nic *intel)
Refill receive descriptor ring.
Definition: intel.c:580
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
eeprom
Definition: 3c90x.h:232
static void intel_check_link(struct net_device *netdev)
Check link state.
Definition: intel.c:365
uint8_t status
Status.
Definition: ena.h:16
unsigned int port
Port number (for multi-port devices)
Definition: intel.h:295
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
Definition: netdevice.h:515
#define INTEL_CTRL_FRCDPLX
Force duplex.
Definition: intel.h:65
#define INTEL_TX_FILL
Transmit descriptor ring maximum fill level.
Definition: intel.h:177
#define INTEL_xDH
Receive/Transmit Descriptor Head (offset)
Definition: intel.h:189
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:359
#define INTEL_TCTL_CT_MASK
Definition: intel.h:131
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define INTEL_xDBAL
Receive/Transmit Descriptor Base Address Low (offset)
Definition: intel.h:180
void * memcpy(void *dest, const void *src, size_t len) __nonnull
const char * name
Name.
Definition: profile.h:28
#define INTEL_FEXTNVM11
Future Extended NVM register 11.
Definition: intel.h:209
unsigned int block_size
Data block size (in words)
Definition: nvs.h:36
void dma_free(struct dma_mapping *map, void *addr, size_t len)
Unmap and free DMA-coherent buffer.
#define INTEL_EEPROM_MAC
Offset of MAC address within EEPROM.
Definition: intel.h:95
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:572
#define container_of(ptr, type, field)
Get containing structure.
Definition: stddef.h:35
Ethernet protocol.
static int intel_reset(struct intel_nic *intel)
Reset hardware.
Definition: intel.c:266
#define INTEL_CTRL_ASDE
Auto-speed detection.
Definition: intel.h:62
void * priv
Driver private data.
Definition: netdevice.h:431
void intel_describe_rx(struct intel_descriptor *rx, physaddr_t addr, size_t len __unused)
Populate receive descriptor.
Definition: intel.c:433
#define INTEL_FEXTNVM11_WTF
Don't ask.
Definition: intel.h:210
#define INTEL_EERD_DATA(value)
Read data.
Definition: intel.h:83
Intel 10/100/1000 network card driver.
PBSIZE registers must be explicitly reset.
Definition: intel.h:332
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:774
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
#define INTEL_CTRL_LRST
Link reset.
Definition: intel.h:61
uint32_t eerd_done
EEPROM done flag.
Definition: intel.h:304
#define INTEL_EEPROM_WORD_LEN_LOG2
EEPROM word length.
Definition: intel.h:89
static struct net_device * netdev
Definition: gdbudp.c:52
static __always_inline physaddr_t iob_dma(struct io_buffer *iobuf)
Get I/O buffer DMA address.
Definition: iobuf.h:264
struct io_buffer * rx_iobuf[INTEL_NUM_RX_DESC]
Receive I/O buffers.
Definition: intel.h:316
#define INTEL_EERD_ADDR_SHIFT_SMALL
Address shift (small)
Definition: intel.h:81
#define INTEL_IMS
Interrupt Mask Set/Read Register.
Definition: intel.h:107
static void profile_start(struct profiler *profiler)
Start profiling.
Definition: profile.h:158
Profiling.
void unregister_netdev(struct net_device *netdev)
Unregister network device.
Definition: netdevice.c:941
#define INTEL_DESC_CMD_IFCS
Insert frame checksum (CRC)
Definition: intel.h:45
int(* read)(struct nvs_device *nvs, unsigned int address, void *data, size_t len)
Read data from device.
Definition: nvs.h:47
#define cpu_to_le32(value)
Definition: byteswap.h:107
#define INTEL_CTRL_RST
Device reset.
Definition: intel.h:66
pseudo_bit_t value[0x00020]
Definition: arbel.h:13
static int intel_probe(struct pci_device *pci)
Probe PCI device.
Definition: intel.c:945
static struct net_device_operations intel_operations
Intel network device operations.
Definition: intel.c:924
static void intel_poll(struct net_device *netdev)
Poll for completed and received packets.
Definition: intel.c:864
static struct pci_device_id intel_nics[]
Intel PCI device IDs.
Definition: intel.c:1035
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:78
#define INTEL_I219
The i219 has a seriously broken reset mechanism.
Definition: intel.h:336
#define INTEL_STATUS_LU
Link up.
Definition: intel.h:74
struct io_buffer * alloc_rx_iob(size_t len, struct dma_device *dma)
Allocate and map I/O buffer for receive DMA.
Definition: iobuf.c:181
PCI bus.
A PCI device.
Definition: pci.h:206
int register_netdev(struct net_device *netdev)
Register network device.
Definition: netdevice.c:759
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:155
const char * eth_ntoa(const void *ll_addr)
Transcribe Ethernet address.
Definition: ethernet.c:175
A network device.
Definition: netdevice.h:352
#define ENODEV
No such device.
Definition: errno.h:509
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
Definition: netdevice.h:528
u32 addr
Definition: sky2.h:8
unsigned char uint8_t
Definition: stdint.h:10
static int intel_write_eeprom(struct nvs_device *nvs, unsigned int address __unused, const void *data __unused, size_t len __unused)
Write data to EEPROM.
Definition: intel.c:119
#define INTEL_RX_MAX_LEN
Receive buffer length.
Definition: intel.h:160
#define INTEL_EEPROM_MAX_WAIT_MS
Maximum time to wait for EEPROM read, in milliseconds.
Definition: intel.h:86
#define ETH_ALEN
Definition: if_ether.h:8
#define INTEL_TCTL_CT_DEFAULT
Definition: intel.h:130
A PCI device ID list entry.
Definition: pci.h:170
#define INTEL_DISABLE_MAX_WAIT_MS
Maximum time to wait for queue disable, in milliseconds.
Definition: intel.h:199
struct pci_driver intel_driver __pci_driver
Intel PCI driver.
Definition: intel.c:1199
#define le16_to_cpu(value)
Definition: byteswap.h:112
#define INTEL_RCTL_BAM
Broadcast accept mode.
Definition: intel.h:117
unsigned int uint32_t
Definition: stdint.h:12
static int is_valid_ether_addr(const void *addr)
Check if Ethernet address is valid.
Definition: ethernet.h:77
void(* describe)(struct intel_descriptor *desc, physaddr_t addr, size_t len)
Populate descriptor.
Definition: intel.h:243
static struct xen_remove_from_physmap * remove
Definition: xenmem.h:39
static void intel_remove(struct pci_device *pci)
Remove PCI device.
Definition: intel.c:1018
Network device operations.
Definition: netdevice.h:213
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:548
struct device * dev
Underlying hardware device.
Definition: netdevice.h:364
void * dma_alloc(struct dma_device *dma, struct dma_mapping *map, size_t len, size_t align)
Allocate and map DMA-coherent buffer.
Network device management.
#define INTEL_CTRL
Device Control Register.
Definition: intel.h:60
unsigned long physaddr_t
Definition: stdint.h:20
#define __unused
Declare a variable or data structure as unused.
Definition: compiler.h:573
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:369
struct dma_device * dma
DMA device.
Definition: intel.h:293
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
Definition: timer.c:78
#define INTEL_RCTL_UPE
Unicast promiscuous mode.
Definition: intel.h:115
#define INTEL_RCTL
Receive Control Register.
Definition: intel.h:113
uint32_t busdevfn
Segment, bus, device, and function (bus:dev.fn) number.
Definition: pci.h:233
A packet descriptor.
Definition: intel.h:21
#define INTEL_TCTL
Transmit Control Register.
Definition: intel.h:126
uint32_t len
Length.
Definition: ena.h:14
#define INTEL_TXPBS_I210
I210 power-up default.
Definition: intel.h:164
void free_rx_iob(struct io_buffer *iobuf)
Unmap and free I/O buffer for receive DMA.
Definition: iobuf.c:208
#define ENOBUFS
No buffer space available.
Definition: errno.h:498
static int intel_disable_ring(struct intel_nic *intel, unsigned int reg)
Disable descriptor ring.
Definition: intel.c:456
#define DBGC2(...)
Definition: compiler.h:522
#define INTEL_CTRL_PHY_RST
PHY reset.
Definition: intel.h:67
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:260
#define INTEL_EERD_DONE_LARGE
Read done (large EERD)
Definition: intel.h:80
int intel_transmit(struct net_device *netdev, struct io_buffer *iobuf)
Transmit packet.
Definition: intel.c:752
void * data
Start of data.
Definition: iobuf.h:48
#define INTEL_EERD_ADDR_SHIFT_LARGE
Address shift (large)
Definition: intel.h:82
unsigned int prod
Producer index.
Definition: intel.h:228
void intel_destroy_ring(struct intel_nic *intel, struct intel_ring *ring)
Destroy descriptor ring.
Definition: intel.c:563
#define INTEL_RESET_DELAY_MS
Time to delay for device reset, in milliseconds.
Definition: intel.h:70
#define EIO
Input/output error.
Definition: errno.h:433
#define INTEL_DESC_CMD_DEXT
Descriptor extension.
Definition: intel.h:39
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
Definition: ethernet.c:264
u8 rx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets from the AP.
Definition: wpa.h:234
struct pci_device_id * id
Driver device ID.
Definition: pci.h:243
#define INTEL_CTRL_SLU
Set link up.
Definition: intel.h:63
void intel_describe_tx_adv(struct intel_descriptor *tx, physaddr_t addr, size_t len)
Populate advanced transmit descriptor.
Definition: intel.c:414
u8 ctrl
Definition: sky2.h:10
#define INTEL_DESC_CMD_EOP
End of packet.
Definition: intel.h:48
#define cpu_to_le16(value)
Definition: byteswap.h:106
An Intel network card.
Definition: intel.h:289
void iounmap(volatile const void *io_addr)
Unmap I/O address.
#define INTEL_RXPBS_I210
I210 power-up default.
Definition: intel.h:144
uint8_t data[48]
Additional event data.
Definition: ena.h:22
#define INTEL_RX_FILL
Receive descriptor ring fill level.
Definition: intel.h:157
#define INTEL_xDCTL_ENABLE
Queue enable.
Definition: intel.h:196
struct intel_descriptor * desc
Descriptors.
Definition: intel.h:224
int nvs_read(struct nvs_device *nvs, unsigned int address, void *data, size_t len)
Read from non-volatile storage device.
Definition: nvs.c:75
static int intel_read_eeprom(struct nvs_device *nvs, unsigned int address, void *data, size_t len)
Read data from EEPROM.
Definition: intel.c:74
#define INTEL_TCTL_PSP
Pad short packets.
Definition: intel.h:128
static int intel_init_eeprom(struct intel_nic *intel)
Initialise EEPROM.
Definition: intel.c:136
#define INTEL_STATUS
Device Status Register.
Definition: intel.h:73
#define INTEL_EERD_START
Start read.
Definition: intel.h:78
struct intel_ring tx
Transmit descriptor ring.
Definition: intel.h:312
Receive address.
Definition: intel.h:213
Reset may cause a complete device hang.
Definition: intel.h:330
#define INTEL_RCTL_EN
Receive enable.
Definition: intel.h:114
#define INTEL_RAH0_AV
Address valid.
Definition: intel.h:206
#define INTEL_IRQ_TXQE
Transmit queue empty.
Definition: intel.h:100
unsigned int eerd_addr_shift
EEPROM address shift.
Definition: intel.h:306
#define INTEL_DESC_STATUS_RXE
Receive error.
Definition: intel.h:54
#define INTEL_RAL0
Receive Address Low.
Definition: intel.h:202
#define INTEL_IRQ_LSC
Link status change.
Definition: intel.h:101
#define INTEL_EEPROM_MIN_SIZE_WORDS
Minimum EEPROM size, in words.
Definition: intel.h:92
#define INTEL_RAH0
Receive Address High.
Definition: intel.h:205
static void profile_exclude(struct profiler *profiler)
Exclude time from other ongoing profiling results.
Definition: profile.h:184
uint8_t ll_addr[MAX_LL_ADDR_LEN]
Link-layer address.
Definition: netdevice.h:387
#define INTEL_TCTL_COLD_MASK
Definition: intel.h:134
static __always_inline physaddr_t dma(struct dma_mapping *map, void *addr)
Get DMA address from virtual address.
Definition: dma.h:436
#define INTEL_DESC_CMD_RS
Report status.
Definition: intel.h:42
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.
#define INTEL_TCTL_COLD_DEFAULT
Definition: intel.h:133
unsigned int flags
Flags.
Definition: intel.h:297
static void intel_close(struct net_device *netdev)
Close network device.
Definition: intel.c:723
uint8_t hw_addr[MAX_HW_ADDR_LEN]
Hardware address.
Definition: netdevice.h:381
#define NULL
NULL pointer (VOID *)
Definition: Base.h:321
struct nvs_device eeprom
EEPROM.
Definition: intel.h:302
#define INTEL_xDBAH
Receive/Transmit Descriptor Base Address High (offset)
Definition: intel.h:183
#define ETIMEDOUT
Connection timed out.
Definition: errno.h:669
String functions.
#define INTEL_IMC
Interrupt Mask Clear Register.
Definition: intel.h:110
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:303
#define INTEL_RCTL_MPE
Multicast promiscuous.
Definition: intel.h:116
unsigned int size
Device size (in words)
Definition: nvs.h:24
#define INTEL_IRQ_RXO
Receive overrun.
Definition: intel.h:103
#define INTEL_TD
Transmit Descriptor register block.
Definition: intel.h:167
#define INTEL_CTRL_FRCSPD
Force speed.
Definition: intel.h:64
u8 tx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets to the AP.
Definition: wpa.h:237
void * memset(void *dest, int character, size_t len) __nonnull
A persistent I/O buffer.
Definition: iobuf.h:33
#define INTEL_RXPBS
Receive packet buffer size.
Definition: intel.h:143