iPXE
pciextra.c
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1 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
2 
3 #include <stdint.h>
4 #include <ipxe/pci.h>
5 
6 static int pci_find_capability_common ( struct pci_device *pci,
7  uint8_t pos, int cap ) {
8  uint8_t id;
9  int ttl = 48;
10 
11  while ( ttl-- && pos >= 0x40 ) {
12  pos &= ~3;
13  pci_read_config_byte ( pci, pos + PCI_CAP_ID, &id );
14  DBG ( "PCI Capability: %d\n", id );
15  if ( id == 0xff )
16  break;
17  if ( id == cap )
18  return pos;
19  pci_read_config_byte ( pci, pos + PCI_CAP_NEXT, &pos );
20  }
21  return 0;
22 }
23 
24 /**
25  * Look for a PCI capability
26  *
27  * @v pci PCI device to query
28  * @v cap Capability code
29  * @ret address Address of capability, or 0 if not found
30  *
31  * Determine whether or not a device supports a given PCI capability.
32  * Returns the address of the requested capability structure within
33  * the device's PCI configuration space, or 0 if the device does not
34  * support it.
35  */
36 int pci_find_capability ( struct pci_device *pci, int cap ) {
38  uint8_t pos;
39  uint8_t hdr_type;
40 
42  if ( ! ( status & PCI_STATUS_CAP_LIST ) )
43  return 0;
44 
45  pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdr_type );
46  switch ( hdr_type & PCI_HEADER_TYPE_MASK ) {
49  default:
51  break;
54  break;
55  }
56  return pci_find_capability_common ( pci, pos, cap );
57 }
58 
59 /**
60  * Look for another PCI capability
61  *
62  * @v pci PCI device to query
63  * @v pos Address of the current capability
64  * @v cap Capability code
65  * @ret address Address of capability, or 0 if not found
66  *
67  * Determine whether or not a device supports a given PCI capability
68  * starting the search at a given address within the device's PCI
69  * configuration space. Returns the address of the next capability
70  * structure within the device's PCI configuration space, or 0 if the
71  * device does not support another such capability.
72  */
73 int pci_find_next_capability ( struct pci_device *pci, int pos, int cap ) {
74  uint8_t new_pos;
75 
76  pci_read_config_byte ( pci, pos + PCI_CAP_NEXT, &new_pos );
77  return pci_find_capability_common ( pci, new_pos, cap );
78 }
79 
80 /**
81  * Find the size of a PCI BAR
82  *
83  * @v pci PCI device
84  * @v reg PCI register number
85  * @ret size BAR size
86  *
87  * It should not be necessary for any Etherboot code to call this
88  * function.
89  */
90 unsigned long pci_bar_size ( struct pci_device *pci, unsigned int reg ) {
91  uint16_t cmd;
93 
94  /* Save the original command register */
96  /* Save the original bar */
97  pci_read_config_dword ( pci, reg, &start );
98  /* Compute which bits can be set */
99  pci_write_config_dword ( pci, reg, ~0 );
100  pci_read_config_dword ( pci, reg, &size );
101  /* Restore the original size */
102  pci_write_config_dword ( pci, reg, start );
103  /* Find the significant bits */
104  /* Restore the original command register. This reenables decoding. */
108  } else {
110  }
111  /* Find the lowest bit set */
112  size = size & ~( size - 1 );
113  return size;
114 }
#define PCI_HEADER_TYPE_BRIDGE
PCI-to-PCI bridge header.
Definition: pci.h:54
unsigned short uint16_t
Definition: stdint.h:11
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
int pci_find_capability(struct pci_device *pci, int cap)
Look for a PCI capability.
Definition: pciextra.c:36
static int pci_find_capability_common(struct pci_device *pci, uint8_t pos, int cap)
Definition: pciextra.c:6
#define PCI_CAPABILITY_LIST
PCI capabilities pointer.
Definition: pci.h:83
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
#define PCI_HEADER_TYPE_MASK
Header type mask.
Definition: pci.h:56
#define PCI_HEADER_TYPE_CARDBUS
CardBus header.
Definition: pci.h:55
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
#define PCI_COMMAND
PCI command.
Definition: pci.h:24
#define PCI_CAP_NEXT
Next capability.
Definition: pci.h:101
#define PCI_HEADER_TYPE
PCI header type.
Definition: pci.h:52
uint32_t start
Starting offset.
Definition: netvsc.h:12
uint8_t status
Status.
Definition: ena.h:16
int pci_find_next_capability(struct pci_device *pci, int pos, int cap)
Look for another PCI capability.
Definition: pciextra.c:73
#define PCI_BASE_ADDRESS_IO_MASK
I/O BAR mask.
Definition: pci.h:68
#define PCI_CB_CAPABILITY_LIST
CardBus capabilities pointer.
Definition: pci.h:86
#define PCI_HEADER_TYPE_NORMAL
Normal header.
Definition: pci.h:53
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
uint8_t id
Request identifier.
Definition: ena.h:12
#define PCI_CAP_ID
Capability ID.
Definition: pci.h:92
#define PCI_BASE_ADDRESS_MEM_MASK
Memory BAR mask.
Definition: pci.h:71
unsigned long pci_bar_size(struct pci_device *pci, unsigned int reg)
Find the size of a PCI BAR.
Definition: pciextra.c:90
static unsigned int unsigned int reg
Definition: intel.h:245
PCI bus.
A PCI device.
Definition: pci.h:187
unsigned char uint8_t
Definition: stdint.h:10
#define PCI_STATUS
PCI status.
Definition: pci.h:34
unsigned int uint32_t
Definition: stdint.h:12
#define PCI_BASE_ADDRESS_SPACE_IO
I/O BAR.
Definition: pci.h:67
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:16
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
#define PCI_STATUS_CAP_LIST
Capabilities list.
Definition: pci.h:35
struct golan_eqe_cmd cmd
Definition: CIB_PRM.h:29
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.