iPXE
pciextra.c
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1 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
2 
3 #include <stdint.h>
4 #include <ipxe/timer.h>
5 #include <ipxe/pci.h>
6 #include <ipxe/pcibackup.h>
7 
8 static int pci_find_capability_common ( struct pci_device *pci,
9  uint8_t pos, int cap ) {
10  uint8_t id;
11  int ttl = 48;
12 
13  while ( ttl-- && pos >= 0x40 ) {
14  pos &= ~3;
15  pci_read_config_byte ( pci, pos + PCI_CAP_ID, &id );
16  DBG ( "PCI Capability: %d\n", id );
17  if ( id == 0xff )
18  break;
19  if ( id == cap )
20  return pos;
21  pci_read_config_byte ( pci, pos + PCI_CAP_NEXT, &pos );
22  }
23  return 0;
24 }
25 
26 /**
27  * Look for a PCI capability
28  *
29  * @v pci PCI device to query
30  * @v cap Capability code
31  * @ret address Address of capability, or 0 if not found
32  *
33  * Determine whether or not a device supports a given PCI capability.
34  * Returns the address of the requested capability structure within
35  * the device's PCI configuration space, or 0 if the device does not
36  * support it.
37  */
38 int pci_find_capability ( struct pci_device *pci, int cap ) {
40  uint8_t pos;
41  uint8_t hdr_type;
42 
44  if ( ! ( status & PCI_STATUS_CAP_LIST ) )
45  return 0;
46 
47  pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdr_type );
48  switch ( hdr_type & PCI_HEADER_TYPE_MASK ) {
51  default:
53  break;
56  break;
57  }
58  return pci_find_capability_common ( pci, pos, cap );
59 }
60 
61 /**
62  * Look for another PCI capability
63  *
64  * @v pci PCI device to query
65  * @v pos Address of the current capability
66  * @v cap Capability code
67  * @ret address Address of capability, or 0 if not found
68  *
69  * Determine whether or not a device supports a given PCI capability
70  * starting the search at a given address within the device's PCI
71  * configuration space. Returns the address of the next capability
72  * structure within the device's PCI configuration space, or 0 if the
73  * device does not support another such capability.
74  */
75 int pci_find_next_capability ( struct pci_device *pci, int pos, int cap ) {
76  uint8_t new_pos;
77 
78  pci_read_config_byte ( pci, pos + PCI_CAP_NEXT, &new_pos );
79  return pci_find_capability_common ( pci, new_pos, cap );
80 }
81 
82 /**
83  * Find the size of a PCI BAR
84  *
85  * @v pci PCI device
86  * @v reg PCI register number
87  * @ret size BAR size
88  *
89  * It should not be necessary for any Etherboot code to call this
90  * function.
91  */
92 unsigned long pci_bar_size ( struct pci_device *pci, unsigned int reg ) {
93  uint16_t cmd;
95 
96  /* Save the original command register */
98  /* Save the original bar */
99  pci_read_config_dword ( pci, reg, &start );
100  /* Compute which bits can be set */
101  pci_write_config_dword ( pci, reg, ~0 );
102  pci_read_config_dword ( pci, reg, &size );
103  /* Restore the original size */
104  pci_write_config_dword ( pci, reg, start );
105  /* Find the significant bits */
106  /* Restore the original command register. This reenables decoding. */
110  } else {
112  }
113  /* Find the lowest bit set */
114  size = size & ~( size - 1 );
115  return size;
116 }
117 
118 /**
119  * Perform PCI Express function-level reset (FLR)
120  *
121  * @v pci PCI device
122  * @v exp PCI Express Capability address
123  */
124 void pci_reset ( struct pci_device *pci, unsigned int exp ) {
125  struct pci_config_backup backup;
127 
128  /* Back up configuration space */
129  pci_backup ( pci, &backup, PCI_CONFIG_BACKUP_STANDARD, NULL );
130 
131  /* Perform a PCIe function-level reset */
132  pci_read_config_word ( pci, ( exp + PCI_EXP_DEVCTL ), &control );
134  pci_write_config_word ( pci, ( exp + PCI_EXP_DEVCTL ), control );
135 
136  /* Allow time for reset to complete */
138 
139  /* Restore configuration */
140  pci_restore ( pci, &backup, PCI_CONFIG_BACKUP_STANDARD, NULL );
141 }
#define PCI_HEADER_TYPE_BRIDGE
PCI-to-PCI bridge header.
Definition: pci.h:55
void pci_restore(struct pci_device *pci, struct pci_config_backup *backup, unsigned int limit, const uint8_t *exclude)
Restore PCI configuration space.
Definition: pcibackup.c:87
unsigned short uint16_t
Definition: stdint.h:11
static unsigned int unsigned int reg
Definition: myson.h:162
#define PCI_CONFIG_BACKUP_STANDARD
Limit of standard PCI configuration space.
Definition: pcibackup.h:18
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
int pci_find_capability(struct pci_device *pci, int cap)
Look for a PCI capability.
Definition: pciextra.c:38
static int pci_find_capability_common(struct pci_device *pci, uint8_t pos, int cap)
Definition: pciextra.c:8
#define PCI_CAPABILITY_LIST
PCI capabilities pointer.
Definition: pci.h:84
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
#define PCI_HEADER_TYPE_MASK
Header type mask.
Definition: pci.h:57
#define PCI_EXP_FLR_DELAY_MS
PCI Express function level reset delay (in ms)
Definition: pci.h:167
#define PCI_HEADER_TYPE_CARDBUS
CardBus header.
Definition: pci.h:56
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
iPXE timers
#define PCI_COMMAND
PCI command.
Definition: pci.h:25
#define PCI_CAP_NEXT
Next capability.
Definition: pci.h:102
void pci_reset(struct pci_device *pci, unsigned int exp)
Perform PCI Express function-level reset (FLR)
Definition: pciextra.c:124
#define PCI_EXP_DEVCTL_FLR
Function level reset.
Definition: pci.h:112
#define PCI_HEADER_TYPE
PCI header type.
Definition: pci.h:53
uint32_t start
Starting offset.
Definition: netvsc.h:12
uint8_t status
Status.
Definition: ena.h:16
int pci_find_next_capability(struct pci_device *pci, int pos, int cap)
Look for another PCI capability.
Definition: pciextra.c:75
#define PCI_BASE_ADDRESS_IO_MASK
I/O BAR mask.
Definition: pci.h:69
#define PCI_CB_CAPABILITY_LIST
CardBus capabilities pointer.
Definition: pci.h:87
#define PCI_HEADER_TYPE_NORMAL
Normal header.
Definition: pci.h:54
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
uint8_t id
Request identifier.
Definition: ena.h:12
#define PCI_CAP_ID
Capability ID.
Definition: pci.h:93
#define PCI_BASE_ADDRESS_MEM_MASK
Memory BAR mask.
Definition: pci.h:72
unsigned long pci_bar_size(struct pci_device *pci, unsigned int reg)
Find the size of a PCI BAR.
Definition: pciextra.c:92
PCI bus.
A PCI device.
Definition: pci.h:206
A PCI configuration space backup.
Definition: pcibackup.h:21
uint32_t control
Control.
Definition: myson.h:14
unsigned char uint8_t
Definition: stdint.h:10
#define PCI_STATUS
PCI status.
Definition: pci.h:35
unsigned int uint32_t
Definition: stdint.h:12
#define PCI_BASE_ADDRESS_SPACE_IO
I/O BAR.
Definition: pci.h:68
void mdelay(unsigned long msecs)
Delay for a fixed number of milliseconds.
Definition: timer.c:78
void pci_backup(struct pci_device *pci, struct pci_config_backup *backup, unsigned int limit, const uint8_t *exclude)
Back up PCI configuration space.
Definition: pcibackup.c:67
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:16
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
#define PCI_STATUS_CAP_LIST
Capabilities list.
Definition: pci.h:36
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
struct golan_eqe_cmd cmd
Definition: CIB_PRM.h:29
#define PCI_EXP_DEVCTL
PCI Express.
Definition: pci.h:111
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.
PCI configuration space backup and restoration.