iPXE
Functions
pciextra.c File Reference
#include <stdint.h>
#include <ipxe/pci.h>

Go to the source code of this file.

Functions

 FILE_LICENCE (GPL2_OR_LATER_OR_UBDL)
 
static int pci_find_capability_common (struct pci_device *pci, uint8_t pos, int cap)
 
int pci_find_capability (struct pci_device *pci, int cap)
 Look for a PCI capability. More...
 
int pci_find_next_capability (struct pci_device *pci, int pos, int cap)
 Look for another PCI capability. More...
 
unsigned long pci_bar_size (struct pci_device *pci, unsigned int reg)
 Find the size of a PCI BAR. More...
 

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL  )

◆ pci_find_capability_common()

static int pci_find_capability_common ( struct pci_device pci,
uint8_t  pos,
int  cap 
)
static

Definition at line 6 of file pciextra.c.

7  {
8  uint8_t id;
9  int ttl = 48;
10 
11  while ( ttl-- && pos >= 0x40 ) {
12  pos &= ~3;
13  pci_read_config_byte ( pci, pos + PCI_CAP_ID, &id );
14  DBG ( "PCI Capability: %d\n", id );
15  if ( id == 0xff )
16  break;
17  if ( id == cap )
18  return pos;
19  pci_read_config_byte ( pci, pos + PCI_CAP_NEXT, &pos );
20  }
21  return 0;
22 }
#define PCI_CAP_NEXT
Next capability.
Definition: pci.h:101
uint8_t id
Request identifier.
Definition: ena.h:12
#define PCI_CAP_ID
Capability ID.
Definition: pci.h:92
unsigned char uint8_t
Definition: stdint.h:10
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.

References DBG, id, PCI_CAP_ID, PCI_CAP_NEXT, and pci_read_config_byte().

Referenced by pci_find_capability(), and pci_find_next_capability().

◆ pci_find_capability()

int pci_find_capability ( struct pci_device pci,
int  cap 
)

Look for a PCI capability.

Parameters
pciPCI device to query
capCapability code
Return values
addressAddress of capability, or 0 if not found

Determine whether or not a device supports a given PCI capability. Returns the address of the requested capability structure within the device's PCI configuration space, or 0 if the device does not support it.

Definition at line 36 of file pciextra.c.

36  {
38  uint8_t pos;
39  uint8_t hdr_type;
40 
42  if ( ! ( status & PCI_STATUS_CAP_LIST ) )
43  return 0;
44 
45  pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdr_type );
46  switch ( hdr_type & PCI_HEADER_TYPE_MASK ) {
49  default:
51  break;
54  break;
55  }
56  return pci_find_capability_common ( pci, pos, cap );
57 }
#define PCI_HEADER_TYPE_BRIDGE
PCI-to-PCI bridge header.
Definition: pci.h:54
unsigned short uint16_t
Definition: stdint.h:11
static int pci_find_capability_common(struct pci_device *pci, uint8_t pos, int cap)
Definition: pciextra.c:6
#define PCI_CAPABILITY_LIST
PCI capabilities pointer.
Definition: pci.h:83
#define PCI_HEADER_TYPE_MASK
Header type mask.
Definition: pci.h:56
#define PCI_HEADER_TYPE_CARDBUS
CardBus header.
Definition: pci.h:55
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
#define PCI_HEADER_TYPE
PCI header type.
Definition: pci.h:52
uint8_t status
Status.
Definition: ena.h:16
#define PCI_CB_CAPABILITY_LIST
CardBus capabilities pointer.
Definition: pci.h:86
#define PCI_HEADER_TYPE_NORMAL
Normal header.
Definition: pci.h:53
unsigned char uint8_t
Definition: stdint.h:10
#define PCI_STATUS
PCI status.
Definition: pci.h:34
#define PCI_STATUS_CAP_LIST
Capabilities list.
Definition: pci.h:35
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.

References PCI_CAPABILITY_LIST, PCI_CB_CAPABILITY_LIST, pci_find_capability_common(), PCI_HEADER_TYPE, PCI_HEADER_TYPE_BRIDGE, PCI_HEADER_TYPE_CARDBUS, PCI_HEADER_TYPE_MASK, PCI_HEADER_TYPE_NORMAL, pci_read_config_byte(), pci_read_config_word(), PCI_STATUS, PCI_STATUS_CAP_LIST, and status.

Referenced by ath5k_hw_attach(), ath5k_hw_nic_wakeup(), bnx2_init_board(), intelxlvf_probe(), myri10ge_pci_probe(), pci_msix_enable(), pci_vpd_init(), pciea_offset(), sky2_reset(), sky2_rx_start(), tg3_get_invariants(), and virtio_pci_find_capability().

◆ pci_find_next_capability()

int pci_find_next_capability ( struct pci_device pci,
int  pos,
int  cap 
)

Look for another PCI capability.

Parameters
pciPCI device to query
posAddress of the current capability
capCapability code
Return values
addressAddress of capability, or 0 if not found

Determine whether or not a device supports a given PCI capability starting the search at a given address within the device's PCI configuration space. Returns the address of the next capability structure within the device's PCI configuration space, or 0 if the device does not support another such capability.

Definition at line 73 of file pciextra.c.

73  {
74  uint8_t new_pos;
75 
76  pci_read_config_byte ( pci, pos + PCI_CAP_NEXT, &new_pos );
77  return pci_find_capability_common ( pci, new_pos, cap );
78 }
static int pci_find_capability_common(struct pci_device *pci, uint8_t pos, int cap)
Definition: pciextra.c:6
#define PCI_CAP_NEXT
Next capability.
Definition: pci.h:101
unsigned char uint8_t
Definition: stdint.h:10
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.

References PCI_CAP_NEXT, pci_find_capability_common(), and pci_read_config_byte().

Referenced by virtio_pci_find_capability().

◆ pci_bar_size()

unsigned long pci_bar_size ( struct pci_device pci,
unsigned int  reg 
)

Find the size of a PCI BAR.

Parameters
pciPCI device
regPCI register number
Return values
sizeBAR size

It should not be necessary for any Etherboot code to call this function.

Definition at line 90 of file pciextra.c.

90  {
91  uint16_t cmd;
93 
94  /* Save the original command register */
96  /* Save the original bar */
97  pci_read_config_dword ( pci, reg, &start );
98  /* Compute which bits can be set */
99  pci_write_config_dword ( pci, reg, ~0 );
100  pci_read_config_dword ( pci, reg, &size );
101  /* Restore the original size */
102  pci_write_config_dword ( pci, reg, start );
103  /* Find the significant bits */
104  /* Restore the original command register. This reenables decoding. */
108  } else {
110  }
111  /* Find the lowest bit set */
112  size = size & ~( size - 1 );
113  return size;
114 }
unsigned short uint16_t
Definition: stdint.h:11
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
#define PCI_COMMAND
PCI command.
Definition: pci.h:24
uint32_t start
Starting offset.
Definition: netvsc.h:12
#define PCI_BASE_ADDRESS_IO_MASK
I/O BAR mask.
Definition: pci.h:68
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
#define PCI_BASE_ADDRESS_MEM_MASK
Memory BAR mask.
Definition: pci.h:71
static unsigned int unsigned int reg
Definition: intel.h:245
unsigned int uint32_t
Definition: stdint.h:12
#define PCI_BASE_ADDRESS_SPACE_IO
I/O BAR.
Definition: pci.h:67
int pci_write_config_dword(struct pci_device *pci, unsigned int where, uint32_t value)
Write 32-bit dword to PCI configuration space.
uint8_t size
Entry size (in 32-bit words)
Definition: ena.h:16
struct golan_eqe_cmd cmd
Definition: CIB_PRM.h:29

References cmd, PCI_BASE_ADDRESS_IO_MASK, PCI_BASE_ADDRESS_MEM_MASK, PCI_BASE_ADDRESS_SPACE_IO, PCI_COMMAND, pci_read_config_dword(), pci_read_config_word(), pci_write_config_dword(), pci_write_config_word(), reg, size, and start.

Referenced by __vxge_hw_device_get_legacy_reg(), amd8111e_probe(), bnxt_pci_base(), efab_probe(), efx_probe(), ehci_probe(), exanic_probe(), forcedeth_map_regs(), hvm_probe(), igbvf_probe(), phantom_map_crb(), tg3_init_one(), virtio_pci_map_capability(), vxge_probe(), and xhci_probe().