iPXE
3c90x.c
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00001 /*
00002  * 3c90x.c -- This file implements a iPXE API 3c90x driver
00003  *
00004  * Originally written for etherboot by:
00005  *   Greg Beeley, Greg.Beeley@LightSys.org
00006  * Modified by Steve Smith,
00007  *   Steve.Smith@Juno.Com. Alignment bug fix Neil Newell (nn@icenoir.net).
00008  * Almost totally Rewritten to use iPXE API, implementation of tx/rx ring support
00009  *   by Thomas Miletich, thomas.miletich@gmail.com
00010  *   Thanks to Marty Connor and Stefan Hajnoczi for their help and feedback,
00011  *   and to Daniel Verkamp for his help with testing.
00012  *
00013  * Copyright (c) 2009 Thomas Miletich
00014  *
00015  * Copyright (c) 1999 LightSys Technology Services, Inc.
00016  * Portions Copyright (c) 1999 Steve Smith
00017  *
00018  * This program may be re-distributed in source or binary form, modified,
00019  * sold, or copied for any purpose, provided that the above copyright message
00020  * and this text are included with all source copies or derivative works, and
00021  * provided that the above copyright message and this text are included in the
00022  * documentation of any binary-only distributions.  This program is distributed
00023  * WITHOUT ANY WARRANTY, without even the warranty of FITNESS FOR A PARTICULAR
00024  * PURPOSE or MERCHANTABILITY.  Please read the associated documentation
00025  * "3c90x.txt" before compiling and using this driver.
00026  *
00027  * [ --mdc 20090313 The 3c90x.txt file is now at:
00028  *   http://etherboot.org/wiki/appnotes/3c90x_issues ]
00029  *
00030  * This program was written with the assistance of the 3com documentation for
00031  * the 3c905B-TX card, as well as with some assistance from the 3c59x
00032  * driver Donald Becker wrote for the Linux kernel, and with some assistance
00033  * from the remainder of the Etherboot distribution.
00034  *
00035  * Indented with unix 'indent' command: 
00036  *   $ indent -kr -i8 3c90x.c
00037  */
00038 
00039 FILE_LICENCE ( BSD2 );
00040 
00041 #include <stdint.h>
00042 #include <stdio.h>
00043 #include <stdlib.h>
00044 #include <stddef.h>
00045 #include <string.h>
00046 #include <unistd.h>
00047 #include <assert.h>
00048 #include <byteswap.h>
00049 #include <errno.h>
00050 #include <ipxe/ethernet.h>
00051 #include <ipxe/if_ether.h>
00052 #include <ipxe/io.h>
00053 #include <ipxe/iobuf.h>
00054 #include <ipxe/malloc.h>
00055 #include <ipxe/netdevice.h>
00056 #include <ipxe/pci.h>
00057 #include <ipxe/timer.h>
00058 #include <ipxe/nvs.h>
00059 
00060 #include "3c90x.h"
00061 
00062 /**
00063  * a3c90x_internal_IssueCommand: sends a command to the 3c90x card
00064  * and waits for it's completion
00065  *
00066  * @v ioaddr    IOAddress of the NIC
00067  * @v cmd       Command to be issued
00068  * @v param     Command parameter
00069  */
00070 static void a3c90x_internal_IssueCommand(int ioaddr, int cmd, int param)
00071 {
00072         unsigned int val = (cmd << 11) | param;
00073         int cnt = 0;
00074 
00075         DBGP("a3c90x_internal_IssueCommand\n");
00076 
00077         /* Send the cmd to the cmd register */
00078         outw(val, ioaddr + regCommandIntStatus_w);
00079 
00080         /* Wait for the cmd to complete */
00081         for (cnt = 0; cnt < 100000; cnt++) {
00082                 if (inw(ioaddr + regCommandIntStatus_w) & INT_CMDINPROGRESS) {
00083                         continue;
00084                 } else {
00085                         DBG2("Command 0x%04X finished in time. cnt = %d.\n", cmd, cnt);
00086                         return;
00087                 }
00088         }
00089 
00090         DBG("Command 0x%04X DID NOT finish in time. cnt = %d.\n", cmd, cnt);
00091 }
00092 
00093 /**
00094  * a3c90x_internal_SetWindow: selects a register window set.
00095  *
00096  * @v inf_3c90x private NIC data
00097  * @v window    window to be selected
00098  */
00099 static void a3c90x_internal_SetWindow(struct INF_3C90X *inf_3c90x, int window)
00100 {
00101         DBGP("a3c90x_internal_SetWindow\n");
00102         /* Window already as set? */
00103         if (inf_3c90x->CurrentWindow == window)
00104                 return;
00105 
00106         /* Issue the window command. */
00107         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
00108                                      cmdSelectRegisterWindow, window);
00109         inf_3c90x->CurrentWindow = window;
00110 
00111         return;
00112 }
00113 
00114 static void a3c90x_internal_WaitForEeprom(struct INF_3C90X *inf_3c90x)
00115 {
00116         int cnt = 0;
00117 
00118         DBGP("a3c90x_internal_WaitForEeprom\n");
00119 
00120         while (eepromBusy & inw(inf_3c90x->IOAddr + regEepromCommand_0_w)) {
00121                 if (cnt == EEPROM_TIMEOUT) {
00122                         DBG("Read from eeprom failed: timeout\n");
00123                         return;
00124                 }
00125                 udelay(1);
00126                 cnt++;
00127         }
00128 }
00129 
00130 /**
00131  * a3c90x_internal_ReadEeprom - nvs routine to read eeprom data
00132  * We only support reading one word(2 byte). The nvs subsystem will make sure
00133  * that the routine will never be called with len != 2.
00134  *
00135  * @v nvs       nvs data.
00136  * @v address   eeprom address to read data from.
00137  * @v data      data is put here.
00138  * @v len       number of bytes to read.
00139  */
00140 static int
00141 a3c90x_internal_ReadEeprom(struct nvs_device *nvs, unsigned int address, void *data, size_t len)
00142 {
00143         unsigned short *dest = (unsigned short *) data;
00144         struct INF_3C90X *inf_3c90x =
00145             container_of(nvs, struct INF_3C90X, nvs);
00146 
00147         DBGP("a3c90x_internal_ReadEeprom\n");
00148 
00149         /* we support reading 2 bytes only */
00150         assert(len == 2);
00151 
00152         /* Select correct window */
00153         a3c90x_internal_SetWindow(inf_3c90x, winEepromBios0);
00154 
00155         /* set eepromRead bits in command sent to NIC */
00156         address += (inf_3c90x->is3c556 ? eepromRead_556 : eepromRead);
00157 
00158         a3c90x_internal_WaitForEeprom(inf_3c90x);
00159         /* send address to NIC */
00160         outw(address, inf_3c90x->IOAddr + regEepromCommand_0_w);
00161         a3c90x_internal_WaitForEeprom(inf_3c90x);
00162 
00163         /* read value */
00164         *dest = inw(inf_3c90x->IOAddr + regEepromData_0_w);
00165 
00166         return 0;
00167 }
00168 
00169 /**
00170  * a3c90x_internal_WriteEeprom - nvs routine to write eeprom data
00171  * currently not implemented
00172  *
00173  * @v nvs       nvs data.
00174  * @v address   eeprom address to read data from.
00175  * @v data      data is put here.
00176  * @v len       number of bytes to read.
00177  */
00178 static int
00179 a3c90x_internal_WriteEeprom(struct nvs_device *nvs __unused,
00180                             unsigned int address __unused,
00181                             const void *data __unused, size_t len __unused)
00182 {
00183         return -ENOTSUP;
00184 }
00185 
00186 static void a3c90x_internal_ReadEepromContents(struct INF_3C90X *inf_3c90x)
00187 {
00188         int eeprom_size = (inf_3c90x->isBrev ? 0x20 : 0x17) * 2;
00189 
00190         DBGP("a3c90x_internal_ReadEepromContents\n");
00191 
00192         nvs_read(&inf_3c90x->nvs, 0, inf_3c90x->eeprom, eeprom_size);
00193 }
00194 
00195 /**
00196  * a3c90x_reset: exported function that resets the card to its default
00197  * state.  This is so the Linux driver can re-set the card up the way
00198  * it wants to.  If CFG_3C90X_PRESERVE_XCVR is defined, then the reset will
00199  * not alter the selected transceiver that we used to download the boot
00200  * image.
00201  *
00202  * @v inf_3c90x Private NIC data
00203  */
00204 static void a3c90x_reset(struct INF_3C90X *inf_3c90x)
00205 {
00206         DBGP("a3c90x_reset\n");
00207         /* Send the reset command to the card */
00208         DBG2("3c90x: Issuing RESET\n");
00209 
00210         /* reset of the receiver on B-revision cards re-negotiates the link
00211          * takes several seconds (a computer eternity), so we don't reset
00212          * it here.
00213          */
00214         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
00215                                      cmdGlobalReset,
00216                                      globalResetMaskNetwork);
00217 
00218         /* global reset command resets station mask, non-B revision cards
00219          * require explicit reset of values
00220          */
00221         a3c90x_internal_SetWindow(inf_3c90x, winAddressing2);
00222         outw(0, inf_3c90x->IOAddr + regStationMask_2_3w + 0);
00223         outw(0, inf_3c90x->IOAddr + regStationMask_2_3w + 2);
00224         outw(0, inf_3c90x->IOAddr + regStationMask_2_3w + 4);
00225 
00226         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdTxEnable, 0);
00227         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdRxEnable, 0);
00228 
00229         /* enable rxComplete and txComplete indications */
00230         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
00231                                      cmdSetIndicationEnable,
00232                                      INT_TXCOMPLETE | INT_UPCOMPLETE);
00233 
00234         /* acknowledge any pending status flags */
00235         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
00236                                      cmdAcknowledgeInterrupt, 0x661);
00237 
00238         return;
00239 }
00240 
00241 /**
00242  * a3c90x_setup_tx_ring - Allocates TX ring, initialize tx_desc values
00243  *
00244  * @v p Private NIC data
00245  *
00246  * @ret Returns 0 on success, negative on failure
00247  */
00248 static int a3c90x_setup_tx_ring(struct INF_3C90X *p)
00249 {
00250         DBGP("a3c90x_setup_tx_ring\n");
00251         p->tx_ring =
00252             malloc_dma(TX_RING_SIZE * sizeof(struct TXD), TX_RING_ALIGN);
00253 
00254         if (!p->tx_ring) {
00255                 DBG("Could not allocate TX-ring\n");
00256                 return -ENOMEM;
00257         }
00258 
00259         memset(p->tx_ring, 0, TX_RING_SIZE * sizeof(struct TXD));
00260         p->tx_cur = 0;
00261         p->tx_cnt = 0;
00262         p->tx_tail = 0;
00263 
00264         return 0;
00265 }
00266 
00267 /**
00268  * a3c90x_process_tx_packets - Checks for successfully sent packets,
00269  * reports them to iPXE with netdev_tx_complete();
00270  *
00271  * @v netdev    Network device info
00272  */
00273 static void a3c90x_process_tx_packets(struct net_device *netdev)
00274 {
00275         struct INF_3C90X *p = netdev_priv(netdev);
00276         unsigned int downlist_ptr;
00277 
00278         DBGP("a3c90x_process_tx_packets\n");
00279 
00280         DBG2("    tx_cnt: %d\n", p->tx_cnt);
00281 
00282         while (p->tx_tail != p->tx_cur) {
00283 
00284                 downlist_ptr = inl(p->IOAddr + regDnListPtr_l);
00285 
00286                 DBG2("    downlist_ptr: %#08x\n", downlist_ptr);
00287                 DBG2("    tx_tail: %d tx_cur: %d\n", p->tx_tail, p->tx_cur);
00288 
00289                 /* NIC is currently working on this tx desc */
00290                 if(downlist_ptr == virt_to_bus(p->tx_ring + p->tx_tail))
00291                         return;
00292 
00293                 netdev_tx_complete(netdev, p->tx_iobuf[p->tx_tail]);
00294 
00295                 DBG2("transmitted packet\n");
00296                 DBG2("    size: %zd\n", iob_len(p->tx_iobuf[p->tx_tail]));
00297 
00298                 p->tx_tail = (p->tx_tail + 1) % TX_RING_SIZE;
00299                 p->tx_cnt--;
00300         }
00301 }
00302 
00303 static void a3c90x_free_tx_ring(struct INF_3C90X *p)
00304 {
00305         DBGP("a3c90x_free_tx_ring\n");
00306 
00307         free_dma(p->tx_ring, TX_RING_SIZE * sizeof(struct TXD));
00308         p->tx_ring = NULL;
00309         /* io_buffers are free()ed by netdev_tx_complete[,_err]() */
00310 }
00311 
00312 /**
00313  * a3c90x_transmit - Transmits a packet.
00314  *
00315  * @v netdev    Network device info
00316  * @v iob               io_buffer containing the data to be send
00317  *
00318  * @ret Returns 0 on success, negative on failure
00319  */
00320 static int a3c90x_transmit(struct net_device *netdev,
00321                            struct io_buffer *iob)
00322 {
00323         struct INF_3C90X *inf_3c90x = netdev_priv(netdev);
00324         struct TXD *tx_cur_desc;
00325         struct TXD *tx_prev_desc;
00326 
00327         unsigned int len;
00328         unsigned int downlist_ptr;
00329 
00330         DBGP("a3c90x_transmit\n");
00331 
00332         if (inf_3c90x->tx_cnt == TX_RING_SIZE) {
00333                 DBG("TX-Ring overflow\n");
00334                 return -ENOBUFS;
00335         }
00336 
00337         inf_3c90x->tx_iobuf[inf_3c90x->tx_cur] = iob;
00338         tx_cur_desc = inf_3c90x->tx_ring + inf_3c90x->tx_cur;
00339 
00340         tx_prev_desc = inf_3c90x->tx_ring +
00341             (((inf_3c90x->tx_cur + TX_RING_SIZE) - 1) % TX_RING_SIZE);
00342 
00343         len = iob_len(iob);
00344 
00345         /* Setup the DPD (download descriptor) */
00346         tx_cur_desc->DnNextPtr = 0;
00347 
00348         /* FrameStartHeader differs in 90x and >= 90xB
00349          * It contains the packet length in 90x and a round up boundary and
00350          * packet ID for 90xB and 90xC. Disable packet length round-up on the
00351          * later revisions.
00352          */
00353         tx_cur_desc->FrameStartHeader =
00354             fshTxIndicate | (inf_3c90x->isBrev ? fshRndupDefeat : len);
00355 
00356         tx_cur_desc->DataAddr = virt_to_bus(iob->data);
00357         tx_cur_desc->DataLength = len | downLastFrag;
00358 
00359         /* We have to stall the download engine, so the NIC won't access the
00360          * tx descriptor while we modify it. There is a way around this
00361          * from revision B and upwards. To stay compatible with older revisions
00362          * we don't use it here.
00363          */
00364         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdStallCtl,
00365                                      dnStall);
00366 
00367         tx_prev_desc->DnNextPtr = virt_to_bus(tx_cur_desc);
00368 
00369         downlist_ptr = inl(inf_3c90x->IOAddr + regDnListPtr_l);
00370         if (downlist_ptr == 0) {
00371                 /* currently no DownList, sending a new one */
00372                 outl(virt_to_bus(tx_cur_desc),
00373                      inf_3c90x->IOAddr + regDnListPtr_l);
00374         }
00375 
00376         /* End Stall */
00377         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdStallCtl,
00378                                      dnUnStall);
00379 
00380         inf_3c90x->tx_cur = (inf_3c90x->tx_cur + 1) % TX_RING_SIZE;
00381         inf_3c90x->tx_cnt++;
00382 
00383         return 0;
00384 }
00385 
00386 /**
00387  * a3c90x_prepare_rx_desc - fills the rx desc with initial data
00388  *
00389  * @v p         NIC private data
00390  * @v index     Index for rx_iobuf and rx_ring array
00391  */
00392 
00393 static void a3c90x_prepare_rx_desc(struct INF_3C90X *p, unsigned int index)
00394 {
00395         DBGP("a3c90x_prepare_rx_desc\n");
00396         DBG2("Populating rx_desc %d\n", index);
00397 
00398         /* We have to stall the upload engine, so the NIC won't access the
00399          * rx descriptor while we modify it. There is a way around this
00400          * from revision B and upwards. To stay compatible with older revisions
00401          * we don't use it here.
00402          */
00403         a3c90x_internal_IssueCommand(p->IOAddr, cmdStallCtl, upStall);
00404 
00405         p->rx_ring[index].DataAddr = virt_to_bus(p->rx_iobuf[index]->data);
00406         p->rx_ring[index].DataLength = RX_BUF_SIZE | upLastFrag;
00407         p->rx_ring[index].UpPktStatus = 0;
00408 
00409         /* unstall upload engine */
00410         a3c90x_internal_IssueCommand(p->IOAddr, cmdStallCtl, upUnStall);
00411 }
00412 
00413 /**
00414  * a3c90x_refill_rx_ring -checks every entry in the rx ring and reallocates
00415  * them as necessary. Then it calls a3c90x_prepare_rx_desc to fill the rx desc
00416  * with initial data.
00417  *
00418  * @v p         NIC private data
00419  */
00420 static void a3c90x_refill_rx_ring(struct INF_3C90X *p)
00421 {
00422         int i;
00423         unsigned int status;
00424         struct RXD *rx_cur_desc;
00425 
00426         DBGP("a3c90x_refill_rx_ring\n");
00427 
00428         for (i = 0; i < RX_RING_SIZE; i++) {
00429                 rx_cur_desc = p->rx_ring + i;
00430                 status = rx_cur_desc->UpPktStatus;
00431 
00432                 /* only refill used descriptor */
00433                 if (!(status & upComplete))
00434                         continue;
00435 
00436                 /* we still need to process this descriptor */
00437                 if (p->rx_iobuf[i] != NULL)
00438                         continue;
00439 
00440                 p->rx_iobuf[i] = alloc_iob(RX_BUF_SIZE);
00441                 if (p->rx_iobuf[i] == NULL) {
00442                         DBG("alloc_iob() failed\n");
00443                         break;
00444                 }
00445 
00446                 a3c90x_prepare_rx_desc(p, i);
00447         }
00448 }
00449 
00450 /**
00451  * a3c90x_setup_rx_ring - Allocates RX ring, initialize rx_desc values
00452  *
00453  * @v p Private NIC data
00454  *
00455  * @ret Returns 0 on success, negative on failure
00456  */
00457 static int a3c90x_setup_rx_ring(struct INF_3C90X *p)
00458 {
00459         int i;
00460 
00461         DBGP("a3c90x_setup_rx_ring\n");
00462 
00463         p->rx_ring =
00464             malloc_dma(RX_RING_SIZE * sizeof(struct RXD), RX_RING_ALIGN);
00465 
00466         if (!p->rx_ring) {
00467                 DBG("Could not allocate RX-ring\n");
00468                 return -ENOMEM;
00469         }
00470 
00471         p->rx_cur = 0;
00472 
00473         for (i = 0; i < RX_RING_SIZE; i++) {
00474                 p->rx_ring[i].UpNextPtr =
00475                     virt_to_bus(p->rx_ring + (i + 1));
00476 
00477                 /* these are needed so refill_rx_ring initializes the ring */
00478                 p->rx_ring[i].UpPktStatus = upComplete;
00479                 p->rx_iobuf[i] = NULL;
00480         }
00481 
00482         /* Loop the ring */
00483         p->rx_ring[i - 1].UpNextPtr = virt_to_bus(p->rx_ring);
00484 
00485         a3c90x_refill_rx_ring(p);
00486 
00487         return 0;
00488 }
00489 
00490 static void a3c90x_free_rx_ring(struct INF_3C90X *p)
00491 {
00492         DBGP("a3c90x_free_rx_ring\n");
00493 
00494         free_dma(p->rx_ring, RX_RING_SIZE * sizeof(struct RXD));
00495         p->rx_ring = NULL;
00496 }
00497 
00498 static void a3c90x_free_rx_iobuf(struct INF_3C90X *p)
00499 {
00500         int i;
00501 
00502         DBGP("a3c90x_free_rx_iobuf\n");
00503 
00504         for (i = 0; i < RX_RING_SIZE; i++) {
00505                 free_iob(p->rx_iobuf[i]);
00506                 p->rx_iobuf[i] = NULL;
00507         }
00508 }
00509 
00510 /**
00511  * a3c90x_process_rx_packets - Checks for received packets,
00512  * reports them to iPXE with netdev_rx() or netdev_rx_err() if there was an
00513  * error while receiving the packet
00514  *
00515  * @v netdev    Network device info
00516  */
00517 static void a3c90x_process_rx_packets(struct net_device *netdev)
00518 {
00519         int i;
00520         unsigned int rx_status;
00521         struct INF_3C90X *p = netdev_priv(netdev);
00522         struct RXD *rx_cur_desc;
00523 
00524         DBGP("a3c90x_process_rx_packets\n");
00525 
00526         for (i = 0; i < RX_RING_SIZE; i++) {
00527                 rx_cur_desc = p->rx_ring + p->rx_cur;
00528                 rx_status = rx_cur_desc->UpPktStatus;
00529 
00530                 if (!(rx_status & upComplete) && !(rx_status & upError))
00531                         break;
00532 
00533                 if (p->rx_iobuf[p->rx_cur] == NULL)
00534                         break;
00535 
00536                 if (rx_status & upError) {
00537                         DBG("Corrupted packet received: %#x\n", rx_status);
00538                         netdev_rx_err(netdev, p->rx_iobuf[p->rx_cur],
00539                                       -EINVAL);
00540                 } else {
00541                         /* if we're here, we've got good packet */
00542                         int packet_len;
00543 
00544                         packet_len = rx_status & 0x1FFF;
00545                         iob_put(p->rx_iobuf[p->rx_cur], packet_len);
00546 
00547                         DBG2("received packet\n");
00548                         DBG2("    size: %d\n", packet_len);
00549 
00550                         netdev_rx(netdev, p->rx_iobuf[p->rx_cur]);
00551                 }
00552 
00553                 p->rx_iobuf[p->rx_cur] = NULL;  /* invalidate rx desc */
00554                 p->rx_cur = (p->rx_cur + 1) % RX_RING_SIZE;
00555         }
00556         a3c90x_refill_rx_ring(p);
00557 
00558 }
00559 
00560 /**
00561  * a3c90x_poll - Routine that gets called periodically.
00562  * Here we hanle transmitted and received packets.
00563  * We could also check the link status from time to time, which we
00564  * currently don't do.
00565  *
00566  * @v netdev    Network device info
00567  */
00568 static void a3c90x_poll(struct net_device *netdev)
00569 {
00570         struct INF_3C90X *p = netdev_priv(netdev);
00571         uint16_t raw_status, int_status;
00572 
00573         DBGP("a3c90x_poll\n");
00574 
00575         raw_status = inw(p->IOAddr + regCommandIntStatus_w);
00576         int_status = (raw_status & 0x0FFF);
00577 
00578         if ( int_status == 0 )
00579                 return;
00580 
00581         a3c90x_internal_IssueCommand(p->IOAddr, cmdAcknowledgeInterrupt,
00582                                      int_status);
00583 
00584         if (int_status & INT_TXCOMPLETE)
00585                 outb(0x00, p->IOAddr + regTxStatus_b);
00586 
00587         DBG2("poll: status = %#04x\n", raw_status);
00588 
00589         a3c90x_process_tx_packets(netdev);
00590 
00591         a3c90x_process_rx_packets(netdev);
00592 }
00593 
00594 
00595 
00596 static void a3c90x_free_resources(struct INF_3C90X *p)
00597 {
00598         DBGP("a3c90x_free_resources\n");
00599 
00600         a3c90x_free_tx_ring(p);
00601         a3c90x_free_rx_ring(p);
00602         a3c90x_free_rx_iobuf(p);
00603 }
00604 
00605 /**
00606  * a3c90x_remove - Routine to remove the card. Unregisters
00607  * the NIC from iPXE, disables RX/TX and resets the card.
00608  *
00609  * @v pci       PCI device info
00610  */
00611 static void a3c90x_remove(struct pci_device *pci)
00612 {
00613         struct net_device *netdev = pci_get_drvdata(pci);
00614         struct INF_3C90X *inf_3c90x = netdev_priv(netdev);
00615 
00616         DBGP("a3c90x_remove\n");
00617 
00618         a3c90x_reset(inf_3c90x);
00619 
00620         /* Disable the receiver and transmitter. */
00621         outw(cmdRxDisable, inf_3c90x->IOAddr + regCommandIntStatus_w);
00622         outw(cmdTxDisable, inf_3c90x->IOAddr + regCommandIntStatus_w);
00623 
00624         unregister_netdev(netdev);
00625         netdev_nullify(netdev);
00626         netdev_put(netdev);
00627 }
00628 
00629 static void a3c90x_irq(struct net_device *netdev, int enable)
00630 {
00631         struct INF_3C90X *p = netdev_priv(netdev);
00632 
00633         DBGP("a3c90x_irq\n");
00634 
00635         if (enable == 0) {
00636                 /* disable interrupts */
00637                 a3c90x_internal_IssueCommand(p->IOAddr,
00638                                              cmdSetInterruptEnable, 0);
00639         } else {
00640                 a3c90x_internal_IssueCommand(p->IOAddr,
00641                                              cmdSetInterruptEnable,
00642                                              INT_TXCOMPLETE |
00643                                              INT_UPCOMPLETE);
00644                 a3c90x_internal_IssueCommand(p->IOAddr,
00645                                              cmdAcknowledgeInterrupt,
00646                                              0x661);
00647         }
00648 }
00649 
00650 /**
00651  * a3c90x_hw_start - Initialize hardware, copy MAC address
00652  * to NIC registers, set default receiver
00653  */
00654 static void a3c90x_hw_start(struct net_device *netdev)
00655 {
00656         int i, c;
00657         unsigned int cfg;
00658         unsigned int mopt;
00659         unsigned short linktype;
00660         struct INF_3C90X *inf_3c90x = netdev_priv(netdev);
00661 
00662         DBGP("a3c90x_hw_start\n");
00663 
00664         /* 3C556: Invert MII power */
00665         if (inf_3c90x->is3c556) {
00666                 unsigned int tmp;
00667                 a3c90x_internal_SetWindow(inf_3c90x, winAddressing2);
00668                 tmp = inw(inf_3c90x->IOAddr + regResetOptions_2_w);
00669                 tmp |= 0x4000;
00670                 outw(tmp, inf_3c90x->IOAddr + regResetOptions_2_w);
00671         }
00672 
00673         /* Copy MAC address into the NIC registers */
00674         a3c90x_internal_SetWindow(inf_3c90x, winAddressing2);
00675         for (i = 0; i < ETH_ALEN; i++)
00676                 outb(netdev->ll_addr[i],
00677                      inf_3c90x->IOAddr + regStationAddress_2_3w + i);
00678         for (i = 0; i < ETH_ALEN; i++)
00679                 outb(0, inf_3c90x->IOAddr + regStationMask_2_3w + i);
00680 
00681         /* Read the media options register, print a message and set default
00682         * xcvr.
00683         *
00684         * Uses Media Option command on B revision, Reset Option on non-B
00685         * revision cards -- same register address
00686         */
00687         a3c90x_internal_SetWindow(inf_3c90x, winTxRxOptions3);
00688         mopt = inw(inf_3c90x->IOAddr + regResetMediaOptions_3_w);
00689 
00690         /* mask out VCO bit that is defined as 10baseFL bit on B-rev cards */
00691         if (!inf_3c90x->isBrev) {
00692                 mopt &= 0x7F;
00693         }
00694 
00695         DBG2("Connectors present: ");
00696         c = 0;
00697         linktype = 0x0008;
00698         if (mopt & 0x01) {
00699                 DBG2("%s100Base-T4", (c++) ? ", " : "");
00700                 linktype = linkMII;
00701         }
00702         if (mopt & 0x04) {
00703                 DBG2("%s100Base-FX", (c++) ? ", " : "");
00704                 linktype = link100BaseFX;
00705         }
00706         if (mopt & 0x10) {
00707                 DBG2("%s10Base-2", (c++) ? ", " : "");
00708                 linktype = link10Base2;
00709         }
00710         if (mopt & 0x20) {
00711                 DBG2("%sAUI", (c++) ? ", " : "");
00712                 linktype = linkAUI;
00713         }
00714         if (mopt & 0x40) {
00715                 DBG2("%sMII", (c++) ? ", " : "");
00716                 linktype = linkMII;
00717         }
00718         if ((mopt & 0xA) == 0xA) {
00719                 DBG2("%s10Base-T / 100Base-TX", (c++) ? ", " : "");
00720                 linktype = linkAutoneg;
00721         } else if ((mopt & 0xA) == 0x2) {
00722                 DBG2("%s100Base-TX", (c++) ? ", " : "");
00723                 linktype = linkAutoneg;
00724         } else if ((mopt & 0xA) == 0x8) {
00725                 DBG2("%s10Base-T", (c++) ? ", " : "");
00726                 linktype = linkAutoneg;
00727         }
00728         DBG2(".\n");
00729 
00730         /* Determine transceiver type to use, depending on value stored in
00731         * eeprom 0x16
00732         */
00733         if (inf_3c90x->isBrev) {
00734                 if ((inf_3c90x->eeprom[0x16] & 0xFF00) == XCVR_MAGIC) {
00735                         /* User-defined */
00736                         linktype = inf_3c90x->eeprom[0x16] & 0x000F;
00737                 }
00738         } else {
00739                 /* I don't know what MII MAC only mode is!!! */
00740                 if (linktype == linkExternalMII) {
00741                         if (inf_3c90x->isBrev)
00742                                 DBG("WARNING: MII External MAC Mode only supported on B-revision " "cards!!!!\nFalling Back to MII Mode\n");
00743                         linktype = linkMII;
00744                 }
00745         }
00746 
00747         /* enable DC converter for 10-Base-T */
00748         if (linktype == link10Base2) {
00749                 a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
00750                                              cmdEnableDcConverter, 0);
00751         }
00752 
00753         /* Set the link to the type we just determined. */
00754         a3c90x_internal_SetWindow(inf_3c90x, winTxRxOptions3);
00755         cfg = inl(inf_3c90x->IOAddr + regInternalConfig_3_l);
00756         cfg &= ~(0xF << 20);
00757         cfg |= (linktype << 20);
00758 
00759         DBG2("Setting internal cfg register: 0x%08X (linktype: 0x%02X)\n",
00760             cfg, linktype);
00761 
00762         outl(cfg, inf_3c90x->IOAddr + regInternalConfig_3_l);
00763 
00764         /* Now that we set the xcvr type, reset the Tx and Rx */
00765         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdTxReset, 0x00);
00766 
00767         if (!inf_3c90x->isBrev)
00768                 outb(0x01, inf_3c90x->IOAddr + regTxFreeThresh_b);
00769 
00770         /* Set the RX filter = receive only individual pkts & multicast & bcast. */
00771         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdSetRxFilter,
00772                                      0x01 + 0x02 + 0x04);
00773 
00774 
00775         /*
00776         * set Indication and Interrupt flags , acknowledge any IRQ's
00777         */
00778         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
00779                                      cmdSetInterruptEnable,
00780          INT_TXCOMPLETE | INT_UPCOMPLETE);
00781         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
00782                                      cmdSetIndicationEnable,
00783          INT_TXCOMPLETE | INT_UPCOMPLETE);
00784         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr,
00785                                      cmdAcknowledgeInterrupt, 0x661);
00786 }
00787 
00788 /**
00789  * a3c90x_open - Routine to initialize the card. Initialize hardware,
00790  * allocate TX and RX ring, send RX ring address to the NIC.
00791  *
00792  * @v netdev    Network device info
00793  *
00794  * @ret Returns 0 on success, negative on failure
00795  */
00796 static int a3c90x_open(struct net_device *netdev)
00797 {
00798         int rc;
00799         struct INF_3C90X *inf_3c90x = netdev_priv(netdev);
00800 
00801         DBGP("a3c90x_open\n");
00802 
00803         a3c90x_hw_start(netdev);
00804 
00805         rc = a3c90x_setup_tx_ring(inf_3c90x);
00806         if (rc != 0) {
00807                 DBG("Error setting up TX Ring\n");
00808                 goto error;
00809         }
00810 
00811         rc = a3c90x_setup_rx_ring(inf_3c90x);
00812         if (rc != 0) {
00813                 DBG("Error setting up RX Ring\n");
00814                 goto error;
00815         }
00816 
00817         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdStallCtl, upStall);
00818 
00819         /* send rx_ring address to NIC */
00820         outl(virt_to_bus(inf_3c90x->rx_ring),
00821              inf_3c90x->IOAddr + regUpListPtr_l);
00822 
00823         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdStallCtl, upUnStall);
00824 
00825         /* set maximum allowed receive packet length */
00826         a3c90x_internal_SetWindow(inf_3c90x, winTxRxOptions3);
00827         outl(RX_BUF_SIZE, inf_3c90x->IOAddr + regMaxPktSize_3_w);
00828 
00829         /* enable packet transmission and reception */
00830         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdTxEnable, 0);
00831         a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdRxEnable, 0);
00832 
00833         return 0;
00834 
00835       error:
00836         a3c90x_free_resources(inf_3c90x);
00837         a3c90x_reset(inf_3c90x);
00838         return rc;
00839 }
00840 
00841 /**
00842  * a3c90x_close - free()s TX and RX ring, disablex RX/TX, resets NIC
00843  *
00844  * @v netdev    Network device info
00845  */
00846 static void a3c90x_close(struct net_device *netdev)
00847 {
00848         struct INF_3C90X *inf_3c90x = netdev_priv(netdev);
00849 
00850         DBGP("a3c90x_close\n");
00851 
00852         a3c90x_reset(inf_3c90x);
00853         outw(cmdRxDisable, inf_3c90x->IOAddr + regCommandIntStatus_w);
00854         outw(cmdTxDisable, inf_3c90x->IOAddr + regCommandIntStatus_w);
00855         a3c90x_free_resources(inf_3c90x);
00856 }
00857 
00858 static struct net_device_operations a3c90x_operations = {
00859         .open = a3c90x_open,
00860         .close = a3c90x_close,
00861         .poll = a3c90x_poll,
00862         .transmit = a3c90x_transmit,
00863         .irq = a3c90x_irq,
00864 };
00865 
00866 /**
00867  * a3c90x_probe: exported routine to probe for the 3c905 card.
00868  * If this routine is called, the pci functions did find the
00869  * card.  We read the eeprom here and get the MAC address.
00870  * Initialization is done in a3c90x_open().
00871  *
00872  * @v pci       PCI device info
00873  * @ pci_id     PCI device IDs
00874  *
00875  * @ret rc      Returns 0 on success, negative on failure
00876  */
00877 static int a3c90x_probe(struct pci_device *pci)
00878 {
00879 
00880         struct net_device *netdev;
00881         struct INF_3C90X *inf_3c90x;
00882         unsigned char *HWAddr;
00883         int rc;
00884 
00885         DBGP("a3c90x_probe\n");
00886 
00887         if (pci->ioaddr == 0)
00888                 return -EINVAL;
00889 
00890         netdev = alloc_etherdev(sizeof(*inf_3c90x));
00891         if (!netdev)
00892                 return -ENOMEM;
00893 
00894         netdev_init(netdev, &a3c90x_operations);
00895         pci_set_drvdata(pci, netdev);
00896         netdev->dev = &pci->dev;
00897 
00898         inf_3c90x = netdev_priv(netdev);
00899         memset(inf_3c90x, 0, sizeof(*inf_3c90x));
00900 
00901         adjust_pci_device(pci);
00902 
00903         inf_3c90x->is3c556 = (pci->device == 0x6055);
00904         inf_3c90x->IOAddr = pci->ioaddr;
00905         inf_3c90x->CurrentWindow = winNone;
00906 
00907         inf_3c90x->isBrev = 1;
00908         switch (pci->device) {
00909         case 0x9000:            /* 10 Base TPO             */
00910         case 0x9001:            /* 10/100 T4               */
00911         case 0x9050:            /* 10/100 TPO              */
00912         case 0x9051:            /* 10 Base Combo           */
00913                 inf_3c90x->isBrev = 0;
00914                 break;
00915         }
00916 
00917         DBG2("[3c90x]: found NIC(0x%04X, 0x%04X), isBrev=%d, is3c556=%d\n",
00918             pci->vendor, pci->device, inf_3c90x->isBrev,
00919             inf_3c90x->is3c556);
00920 
00921         /* initialize nvs device */
00922         inf_3c90x->nvs.word_len_log2 = 1;       /* word */
00923         inf_3c90x->nvs.size = (inf_3c90x->isBrev ? 0x20 : 0x17);
00924         inf_3c90x->nvs.block_size = 1;
00925         inf_3c90x->nvs.read = a3c90x_internal_ReadEeprom;
00926         inf_3c90x->nvs.write = a3c90x_internal_WriteEeprom;
00927 
00928         /* reset NIC before accessing any data from it */
00929         a3c90x_reset(inf_3c90x);
00930 
00931         /* load eeprom contents to inf_3c90x->eeprom */
00932         a3c90x_internal_ReadEepromContents(inf_3c90x);
00933 
00934         HWAddr = netdev->hw_addr;
00935 
00936         /* Retrieve the Hardware address */
00937         HWAddr[0] = inf_3c90x->eeprom[eepromHwAddrOffset + 0] >> 8;
00938         HWAddr[1] = inf_3c90x->eeprom[eepromHwAddrOffset + 0] & 0xFF;
00939         HWAddr[2] = inf_3c90x->eeprom[eepromHwAddrOffset + 1] >> 8;
00940         HWAddr[3] = inf_3c90x->eeprom[eepromHwAddrOffset + 1] & 0xFF;
00941         HWAddr[4] = inf_3c90x->eeprom[eepromHwAddrOffset + 2] >> 8;
00942         HWAddr[5] = inf_3c90x->eeprom[eepromHwAddrOffset + 2] & 0xFF;
00943 
00944         if ((rc = register_netdev(netdev)) != 0) {
00945                 DBG("3c90x: register_netdev() failed\n");
00946                 netdev_put(netdev);
00947                 return rc;
00948         }
00949 
00950         /* we don't handle linkstates yet, so we're always up */
00951         netdev_link_up(netdev);
00952 
00953         return 0;
00954 }
00955 
00956 static struct pci_device_id a3c90x_nics[] = {
00957 /* Original 90x revisions: */
00958         PCI_ROM(0x10b7, 0x6055, "3c556", "3C556", 0),   /* Huricane */
00959         PCI_ROM(0x10b7, 0x9000, "3c905-tpo", "3Com900-TPO", 0), /* 10 Base TPO */
00960         PCI_ROM(0x10b7, 0x9001, "3c905-t4", "3Com900-Combo", 0),        /* 10/100 T4 */
00961         PCI_ROM(0x10b7, 0x9050, "3c905-tpo100", "3Com905-TX", 0),       /* 100 Base TX / 10/100 TPO */
00962         PCI_ROM(0x10b7, 0x9051, "3c905-combo", "3Com905-T4", 0),        /* 100 Base T4 / 10 Base Combo */
00963 /* Newer 90xB revisions: */
00964         PCI_ROM(0x10b7, 0x9004, "3c905b-tpo", "3Com900B-TPO", 0),       /* 10 Base TPO */
00965         PCI_ROM(0x10b7, 0x9005, "3c905b-combo", "3Com900B-Combo", 0),   /* 10 Base Combo */
00966         PCI_ROM(0x10b7, 0x9006, "3c905b-tpb2", "3Com900B-2/T", 0),      /* 10 Base TP and Base2 */
00967         PCI_ROM(0x10b7, 0x900a, "3c905b-fl", "3Com900B-FL", 0), /* 10 Base FL */
00968         PCI_ROM(0x10b7, 0x9055, "3c905b-tpo100", "3Com905B-TX", 0),     /* 10/100 TPO */
00969         PCI_ROM(0x10b7, 0x9056, "3c905b-t4", "3Com905B-T4", 0), /* 10/100 T4 */
00970         PCI_ROM(0x10b7, 0x9058, "3c905b-9058", "3Com905B-9058", 0),     /* Cyclone 10/100/BNC */
00971         PCI_ROM(0x10b7, 0x905a, "3c905b-fx", "3Com905B-FL", 0), /* 100 Base FX / 10 Base FX */
00972 /* Newer 90xC revision: */
00973         PCI_ROM(0x10b7, 0x9200, "3c905c-tpo", "3Com905C-TXM", 0),       /* 10/100 TPO (3C905C-TXM) */
00974         PCI_ROM(0x10b7, 0x9202, "3c920b-emb-ati", "3c920B-EMB-WNM (ATI Radeon 9100 IGP)", 0),   /* 3c920B-EMB-WNM (ATI Radeon 9100 IGP) */
00975         PCI_ROM(0x10b7, 0x9210, "3c920b-emb-wnm", "3Com20B-EMB WNM", 0),
00976         PCI_ROM(0x10b7, 0x9800, "3c980", "3Com980-Cyclone", 0), /* Cyclone */
00977         PCI_ROM(0x10b7, 0x9805, "3c9805", "3Com9805", 0),       /* Dual Port Server Cyclone */
00978         PCI_ROM(0x10b7, 0x7646, "3csoho100-tx", "3CSOHO100-TX", 0),     /* Hurricane */
00979         PCI_ROM(0x10b7, 0x4500, "3c450", "3Com450 HomePNA Tornado", 0),
00980         PCI_ROM(0x10b7, 0x1201, "3c982a", "3Com982A", 0),
00981         PCI_ROM(0x10b7, 0x1202, "3c982b", "3Com982B", 0),
00982 };
00983 
00984 struct pci_driver a3c90x_driver __pci_driver = {
00985         .ids = a3c90x_nics,
00986         .id_count = (sizeof(a3c90x_nics) / sizeof(a3c90x_nics[0])),
00987         .probe = a3c90x_probe,
00988         .remove = a3c90x_remove,
00989 };
00990 
00991 /*
00992  * Local variables:
00993  *  c-basic-offset: 8
00994  *  c-indent-level: 8
00995  *  tab-width: 8
00996  * End:
00997  */