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iPXE
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#include "etherboot.h"#include "nic.h"#include "mii.h"#include <ipxe/pci.h>#include <ipxe/ethernet.h>#include "string.h"#include "stdint.h"#include "amd8111e.h"Go to the source code of this file.
Data Structures | |
| struct | amd8111e_tx_desc |
| struct | amd8111e_rx_desc |
| struct | eth_frame |
| struct | amd8111e_priv |
Defines | |
| #define | NUM_TX_SLOTS 2 |
| #define | NUM_RX_SLOTS 4 |
| #define | TX_SLOTS_MASK 1 |
| #define | RX_SLOTS_MASK 3 |
| #define | TX_BUF_LEN 1536 |
| #define | RX_BUF_LEN 1536 |
| #define | TX_PKT_LEN_MAX (ETH_FRAME_LEN - ETH_HLEN) |
| #define | RX_PKT_LEN_MIN 60 |
| #define | RX_PKT_LEN_MAX ETH_FRAME_LEN |
| #define | TX_TIMEOUT 3000 |
| #define | TX_PROCESS_TIME 10 |
| #define | TX_RETRY (TX_TIMEOUT / TX_PROCESS_TIME) |
| #define | PHY_RW_RETRY 10 |
Functions | |
| FILE_LICENCE (GPL2_OR_LATER) | |
| static void | amd8111e_init_hw_default (struct amd8111e_priv *lp) |
| static int | amd8111e_start (struct amd8111e_priv *lp) |
| static int | amd8111e_read_phy (struct amd8111e_priv *lp, int phy_addr, int reg, u32 *val) |
| static void | amd8111e_probe_ext_phy (struct amd8111e_priv *lp) |
| static void | amd8111e_disable_interrupt (struct amd8111e_priv *lp) |
| static void | amd8111e_enable_interrupt (struct amd8111e_priv *lp) |
| static void | amd8111e_force_interrupt (struct amd8111e_priv *lp) |
| static int | amd8111e_get_mac_address (struct amd8111e_priv *lp) |
| static int | amd8111e_init_rx_ring (struct amd8111e_priv *lp) |
| static int | amd8111e_init_tx_ring (struct amd8111e_priv *lp) |
| static int | amd8111e_wait_tx_ring (struct amd8111e_priv *lp, unsigned int index) |
| static void | amd8111e_wait_link (struct amd8111e_priv *lp) |
| static void | amd8111e_poll_link (struct amd8111e_priv *lp) |
| static void | amd8111e_restart (struct amd8111e_priv *lp) |
| static void | amd8111e_transmit (struct nic *nic, const char *dst_addr, unsigned int type, unsigned int size, const char *packet) |
| static int | amd8111e_poll (struct nic *nic, int retrieve) |
| static void | amd8111e_disable (struct nic *nic) |
| static void | amd8111e_irq (struct nic *nic, irq_action_t action) |
| static int | amd8111e_probe (struct nic *nic, struct pci_device *pdev) |
| PCI_DRIVER (amd8111e_driver, amd8111e_nics, PCI_NO_CLASS) | |
| DRIVER ("AMD8111E", nic_driver, pci_driver, amd8111e_driver, amd8111e_probe, amd8111e_disable) | |
Variables | |
| static struct amd8111e_priv | amd8111e |
| static struct nic_operations | amd8111e_operations |
| static struct pci_device_id | amd8111e_nics [] |
| #define NUM_TX_SLOTS 2 |
Definition at line 45 of file amd8111e.c.
Referenced by amd8111e_init_tx_ring(), and amd8111e_start().
| #define NUM_RX_SLOTS 4 |
Definition at line 46 of file amd8111e.c.
Referenced by amd8111e_init_rx_ring(), and amd8111e_start().
| #define TX_SLOTS_MASK 1 |
Definition at line 47 of file amd8111e.c.
Referenced by amd8111e_transmit().
| #define RX_SLOTS_MASK 3 |
Definition at line 48 of file amd8111e.c.
Referenced by amd8111e_poll().
| #define TX_BUF_LEN 1536 |
Definition at line 50 of file amd8111e.c.
| #define RX_BUF_LEN 1536 |
Definition at line 51 of file amd8111e.c.
Referenced by amd8111e_init_rx_ring(), and amd8111e_poll().
| #define TX_PKT_LEN_MAX (ETH_FRAME_LEN - ETH_HLEN) |
Definition at line 53 of file amd8111e.c.
Referenced by amd8111e_transmit().
| #define RX_PKT_LEN_MIN 60 |
Definition at line 54 of file amd8111e.c.
Referenced by amd8111e_poll().
| #define RX_PKT_LEN_MAX ETH_FRAME_LEN |
Definition at line 55 of file amd8111e.c.
Referenced by amd8111e_poll().
| #define TX_TIMEOUT 3000 |
Definition at line 57 of file amd8111e.c.
Referenced by sis900_transmit().
| #define TX_PROCESS_TIME 10 |
Definition at line 58 of file amd8111e.c.
Referenced by amd8111e_wait_tx_ring().
| #define TX_RETRY (TX_TIMEOUT / TX_PROCESS_TIME) |
Definition at line 59 of file amd8111e.c.
Referenced by amd8111e_wait_tx_ring().
| #define PHY_RW_RETRY 10 |
Definition at line 61 of file amd8111e.c.
Referenced by amd8111e_read_phy().
| FILE_LICENCE | ( | GPL2_OR_LATER | ) |
| static void amd8111e_init_hw_default | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 137 of file amd8111e.c.
References amd8111e_priv::mmio, readl(), writel(), and writew().
Referenced by amd8111e_disable(), and amd8111e_restart().
{
unsigned int reg_val;
void *mmio = lp->mmio;
/* stop the chip */
writel(RUN, mmio + CMD0);
/* Clear RCV_RING_BASE_ADDR */
writel(0, mmio + RCV_RING_BASE_ADDR0);
/* Clear XMT_RING_BASE_ADDR */
writel(0, mmio + XMT_RING_BASE_ADDR0);
writel(0, mmio + XMT_RING_BASE_ADDR1);
writel(0, mmio + XMT_RING_BASE_ADDR2);
writel(0, mmio + XMT_RING_BASE_ADDR3);
/* Clear CMD0 */
writel(CMD0_CLEAR, mmio + CMD0);
/* Clear CMD2 */
writel(CMD2_CLEAR, mmio + CMD2);
/* Clear CMD7 */
writel(CMD7_CLEAR, mmio + CMD7);
/* Clear DLY_INT_A and DLY_INT_B */
writel(0x0, mmio + DLY_INT_A);
writel(0x0, mmio + DLY_INT_B);
/* Clear FLOW_CONTROL */
writel(0x0, mmio + FLOW_CONTROL);
/* Clear INT0 write 1 to clear register */
reg_val = readl(mmio + INT0);
writel(reg_val, mmio + INT0);
/* Clear STVAL */
writel(0x0, mmio + STVAL);
/* Clear INTEN0 */
writel(INTEN0_CLEAR, mmio + INTEN0);
/* Clear LADRF */
writel(0x0, mmio + LADRF);
/* Set SRAM_SIZE & SRAM_BOUNDARY registers */
writel(0x80010, mmio + SRAM_SIZE);
/* Clear RCV_RING0_LEN */
writel(0x0, mmio + RCV_RING_LEN0);
/* Clear XMT_RING0/1/2/3_LEN */
writel(0x0, mmio + XMT_RING_LEN0);
writel(0x0, mmio + XMT_RING_LEN1);
writel(0x0, mmio + XMT_RING_LEN2);
writel(0x0, mmio + XMT_RING_LEN3);
/* Clear XMT_RING_LIMIT */
writel(0x0, mmio + XMT_RING_LIMIT);
/* Clear MIB */
writew(MIB_CLEAR, mmio + MIB_ADDR);
/* Clear LARF */
writel( 0, mmio + LADRF);
writel( 0, mmio + LADRF + 4);
/* SRAM_SIZE register */
reg_val = readl(mmio + SRAM_SIZE);
/* Set default value to CTRL1 Register */
writel(CTRL1_DEFAULT, mmio + CTRL1);
/* To avoid PCI posting bug */
readl(mmio + CMD2);
}
| static int amd8111e_start | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 218 of file amd8111e.c.
References amd8111e_init_rx_ring(), amd8111e_init_tx_ring(), ETH_ALEN, amd8111e_priv::ext_phy_addr, IPG, amd8111e_priv::mmio, nic, amd8111e_priv::nic, NUM_RX_SLOTS, NUM_TX_SLOTS, readl(), amd8111e_priv::rx_ring, amd8111e_priv::tx_ring, virt_to_bus(), writeb(), writel(), and writew().
Referenced by amd8111e_restart().
{
struct nic *nic = lp->nic;
void *mmio = lp->mmio;
int i, reg_val;
/* stop the chip */
writel(RUN, mmio + CMD0);
/* AUTOPOLL0 Register *//*TBD default value is 8100 in FPS */
writew(0x8100 | lp->ext_phy_addr, mmio + AUTOPOLL0);
/* enable the port manager and set auto negotiation always */
writel(VAL1 | EN_PMGR, mmio + CMD3 );
writel(XPHYANE | XPHYRST, mmio + CTRL2);
/* set control registers */
reg_val = readl(mmio + CTRL1);
reg_val &= ~XMTSP_MASK;
writel(reg_val | XMTSP_128 | CACHE_ALIGN, mmio + CTRL1);
/* initialize tx and rx ring base addresses */
amd8111e_init_tx_ring(lp);
amd8111e_init_rx_ring(lp);
writel(virt_to_bus(lp->tx_ring), mmio + XMT_RING_BASE_ADDR0);
writel(virt_to_bus(lp->rx_ring), mmio + RCV_RING_BASE_ADDR0);
writew(NUM_TX_SLOTS, mmio + XMT_RING_LEN0);
writew(NUM_RX_SLOTS, mmio + RCV_RING_LEN0);
/* set default IPG to 96 */
writew(DEFAULT_IPG, mmio + IPG);
writew(DEFAULT_IPG - IFS1_DELTA, mmio + IFS1);
/* AutoPAD transmit, Retransmit on Underflow */
writel(VAL0 | APAD_XMT | REX_RTRY | REX_UFLO, mmio + CMD2);
/* JUMBO disabled */
writel(JUMBO, mmio + CMD3);
/* Setting the MAC address to the device */
for(i = 0; i < ETH_ALEN; i++)
writeb(nic->node_addr[i], mmio + PADR + i);
/* set RUN bit to start the chip, interrupt not enabled */
writel(VAL2 | RDMD0 | VAL0 | RUN, mmio + CMD0);
/* To avoid PCI posting bug */
readl(mmio + CMD0);
return 0;
}
| static int amd8111e_read_phy | ( | struct amd8111e_priv * | lp, |
| int | phy_addr, | ||
| int | reg, | ||
| u32 * | val | ||
| ) | [static] |
Definition at line 272 of file amd8111e.c.
References amd8111e_priv::mmio, PHY_RW_RETRY, readl(), udelay(), and writel().
Referenced by amd8111e_poll_link(), amd8111e_probe_ext_phy(), and amd8111e_wait_link().
{
void *mmio = lp->mmio;
unsigned int reg_val;
unsigned int retry = PHY_RW_RETRY;
reg_val = readl(mmio + PHY_ACCESS);
while (reg_val & PHY_CMD_ACTIVE)
reg_val = readl(mmio + PHY_ACCESS);
writel(PHY_RD_CMD | ((phy_addr & 0x1f) << 21) | ((reg & 0x1f) << 16),
mmio + PHY_ACCESS);
do {
reg_val = readl(mmio + PHY_ACCESS);
udelay(30); /* It takes 30 us to read/write data */
} while (--retry && (reg_val & PHY_CMD_ACTIVE));
if (reg_val & PHY_RD_ERR) {
*val = 0;
return -1;
}
*val = reg_val & 0xffff;
return 0;
}
| static void amd8111e_probe_ext_phy | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 326 of file amd8111e.c.
References amd8111e_read_phy(), amd8111e_priv::ext_phy_addr, amd8111e_priv::ext_phy_id, MII_PHYSID1, MII_PHYSID2, and printf().
Referenced by amd8111e_restart().
{
int i;
lp->ext_phy_id = 0;
lp->ext_phy_addr = 1;
for (i = 0x1e; i >= 0; i--) {
u32 id1, id2;
if (amd8111e_read_phy(lp, i, MII_PHYSID1, &id1))
continue;
if (amd8111e_read_phy(lp, i, MII_PHYSID2, &id2))
continue;
lp->ext_phy_id = (id1 << 16) | id2;
lp->ext_phy_addr = i;
break;
}
if (lp->ext_phy_id)
printf("Found MII PHY ID 0x%08x at address 0x%02x\n",
(unsigned int) lp->ext_phy_id, lp->ext_phy_addr);
else
printf("Couldn't detect MII PHY, assuming address 0x01\n");
}
| static void amd8111e_disable_interrupt | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 352 of file amd8111e.c.
References amd8111e_priv::mmio, readl(), and writel().
Referenced by amd8111e_disable(), amd8111e_irq(), and amd8111e_restart().
| static void amd8111e_enable_interrupt | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 364 of file amd8111e.c.
References amd8111e_priv::mmio, readl(), and writel().
Referenced by amd8111e_irq().
| static void amd8111e_force_interrupt | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 373 of file amd8111e.c.
References amd8111e_priv::mmio, readl(), and writel().
Referenced by amd8111e_irq().
| static int amd8111e_get_mac_address | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 381 of file amd8111e.c.
References DBG, ETH_ALEN, eth_ntoa(), amd8111e_priv::mmio, nic, amd8111e_priv::nic, and readb().
Referenced by amd8111e_restart().
| static int amd8111e_init_rx_ring | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 398 of file amd8111e.c.
References amd8111e_rx_desc::buf_len, amd8111e_rx_desc::buf_phy_addr, cpu_to_le16, cpu_to_le32, NUM_RX_SLOTS, amd8111e_priv::rx_buf, RX_BUF_LEN, amd8111e_rx_desc::rx_flags, amd8111e_priv::rx_idx, amd8111e_priv::rx_ring, virt_to_bus(), and wmb.
Referenced by amd8111e_start().
{
int i;
lp->rx_idx = 0;
/* Initilaizing receive descriptors */
for (i = 0; i < NUM_RX_SLOTS; i++) {
lp->rx_ring[i].buf_phy_addr = cpu_to_le32(virt_to_bus(lp->rx_buf[i]));
lp->rx_ring[i].buf_len = cpu_to_le16(RX_BUF_LEN);
wmb();
lp->rx_ring[i].rx_flags = cpu_to_le16(OWN_BIT);
}
return 0;
}
| static int amd8111e_init_tx_ring | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 415 of file amd8111e.c.
References amd8111e_tx_desc::buf_len, amd8111e_tx_desc::buf_phy_addr, NUM_TX_SLOTS, amd8111e_priv::tx_consistent, amd8111e_tx_desc::tx_flags, amd8111e_priv::tx_idx, and amd8111e_priv::tx_ring.
Referenced by amd8111e_start().
{
int i;
lp->tx_idx = 0;
lp->tx_consistent = 1;
/* Initializing transmit descriptors */
for (i = 0; i < NUM_TX_SLOTS; i++) {
lp->tx_ring[i].tx_flags = 0;
lp->tx_ring[i].buf_phy_addr = 0;
lp->tx_ring[i].buf_len = 0;
}
return 0;
}
| static int amd8111e_wait_tx_ring | ( | struct amd8111e_priv * | lp, |
| unsigned int | index | ||
| ) | [static] |
Definition at line 432 of file amd8111e.c.
References amd8111e_restart(), le16_to_cpu, mdelay(), printf(), status, amd8111e_tx_desc::tx_flags, TX_PROCESS_TIME, TX_RETRY, and amd8111e_priv::tx_ring.
Referenced by amd8111e_transmit().
{
volatile u16 status;
int retry = TX_RETRY;
status = le16_to_cpu(lp->tx_ring[index].tx_flags);
while (--retry && (status & OWN_BIT)) {
mdelay(TX_PROCESS_TIME);
status = le16_to_cpu(lp->tx_ring[index].tx_flags);
}
if (status & OWN_BIT) {
printf("Error: tx slot %d timeout, stat = 0x%x\n", index, status);
amd8111e_restart(lp);
return -1;
}
return 0;
}
| static void amd8111e_wait_link | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 451 of file amd8111e.c.
References amd8111e_read_phy(), amd8111e_priv::ext_phy_addr, MII_ADVERTISE, MII_BMCR, MII_BMSR, MII_LPA, amd8111e_priv::mmio, readl(), and status.
Referenced by amd8111e_restart().
{
unsigned int status;
u32 reg_val;
do {
/* read phy to update STAT0 register */
amd8111e_read_phy(lp, lp->ext_phy_addr, MII_BMCR, ®_val);
amd8111e_read_phy(lp, lp->ext_phy_addr, MII_BMSR, ®_val);
amd8111e_read_phy(lp, lp->ext_phy_addr, MII_ADVERTISE, ®_val);
amd8111e_read_phy(lp, lp->ext_phy_addr, MII_LPA, ®_val);
status = readl(lp->mmio + STAT0);
} while (!(status & AUTONEG_COMPLETE) || !(status & LINK_STATS));
}
| static void amd8111e_poll_link | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 466 of file amd8111e.c.
References amd8111e_read_phy(), amd8111e_priv::duplex, amd8111e_priv::ext_phy_addr, amd8111e_priv::link, MII_ADVERTISE, MII_BMCR, MII_BMSR, MII_LPA, amd8111e_priv::mmio, printf(), readl(), amd8111e_priv::speed, and status.
Referenced by amd8111e_poll(), and amd8111e_restart().
{
unsigned int status, speed;
u32 reg_val;
if (!lp->link) {
/* read phy to update STAT0 register */
amd8111e_read_phy(lp, lp->ext_phy_addr, MII_BMCR, ®_val);
amd8111e_read_phy(lp, lp->ext_phy_addr, MII_BMSR, ®_val);
amd8111e_read_phy(lp, lp->ext_phy_addr, MII_ADVERTISE, ®_val);
amd8111e_read_phy(lp, lp->ext_phy_addr, MII_LPA, ®_val);
status = readl(lp->mmio + STAT0);
if (status & LINK_STATS) {
lp->link = 1;
speed = (status & SPEED_MASK) >> 7;
if (speed == PHY_SPEED_100)
lp->speed = 1;
else
lp->speed = 0;
if (status & FULL_DPLX)
lp->duplex = 1;
else
lp->duplex = 0;
printf("Link is up: %s Mbps %s duplex\n",
lp->speed ? "100" : "10", lp->duplex ? "full" : "half");
}
} else {
status = readl(lp->mmio + STAT0);
if (!(status & LINK_STATS)) {
lp->link = 0;
printf("Link is down\n");
}
}
}
| static void amd8111e_restart | ( | struct amd8111e_priv * | lp | ) | [static] |
Definition at line 503 of file amd8111e.c.
References amd8111e_disable_interrupt(), amd8111e_get_mac_address(), amd8111e_init_hw_default(), amd8111e_poll_link(), amd8111e_probe_ext_phy(), amd8111e_start(), amd8111e_wait_link(), amd8111e_priv::link, and printf().
Referenced by amd8111e_probe(), and amd8111e_wait_tx_ring().
{
printf("\nStarting nic...\n");
amd8111e_disable_interrupt(lp);
amd8111e_init_hw_default(lp);
amd8111e_probe_ext_phy(lp);
amd8111e_get_mac_address(lp);
amd8111e_start(lp);
printf("Waiting link up...\n");
lp->link = 0;
amd8111e_wait_link(lp);
amd8111e_poll_link(lp);
}
| static void amd8111e_transmit | ( | struct nic * | nic, |
| const char * | dst_addr, | ||
| unsigned int | type, | ||
| unsigned int | size, | ||
| const char * | packet | ||
| ) | [static] |
Definition at line 523 of file amd8111e.c.
References amd8111e_wait_tx_ring(), amd8111e_tx_desc::buf_len, amd8111e_tx_desc::buf_phy_addr, cpu_to_le16, cpu_to_le32, eth_frame::data, eth_frame::dst_addr, ETH_ALEN, ETH_HLEN, htons, index, memcpy(), memset(), amd8111e_priv::mmio, printf(), readl(), eth_frame::src_addr, amd8111e_priv::tx_buf, amd8111e_tx_desc::tx_flags, amd8111e_priv::tx_idx, TX_PKT_LEN_MAX, amd8111e_priv::tx_ring, TX_SLOTS_MASK, eth_frame::type, virt_to_bus(), wmb, and writel().
{
struct amd8111e_priv *lp = nic->priv_data;
struct eth_frame *frame;
unsigned int index;
/* check packet size */
if (size > TX_PKT_LEN_MAX) {
printf("amd8111e_transmit(): too large packet, drop\n");
return;
}
/* get tx slot */
index = lp->tx_idx;
if (amd8111e_wait_tx_ring(lp, index))
return;
/* fill frame */
frame = (struct eth_frame *)lp->tx_buf[index];
memset(frame->data, 0, TX_PKT_LEN_MAX);
memcpy(frame->dst_addr, dst_addr, ETH_ALEN);
memcpy(frame->src_addr, nic->node_addr, ETH_ALEN);
frame->type = htons(type);
memcpy(frame->data, packet, size);
/* start xmit */
lp->tx_ring[index].buf_len = cpu_to_le16(ETH_HLEN + size);
lp->tx_ring[index].buf_phy_addr = cpu_to_le32(virt_to_bus(frame));
wmb();
lp->tx_ring[index].tx_flags =
cpu_to_le16(OWN_BIT | STP_BIT | ENP_BIT | ADD_FCS_BIT | LTINT_BIT);
writel(VAL1 | TDMD0, lp->mmio + CMD0);
readl(lp->mmio + CMD0);
/* update slot pointer */
lp->tx_idx = (lp->tx_idx + 1) & TX_SLOTS_MASK;
}
| static int amd8111e_poll | ( | struct nic * | nic, |
| int | retrieve | ||
| ) | [static] |
Definition at line 562 of file amd8111e.c.
References amd8111e_poll_link(), amd8111e_rx_desc::buf_len, amd8111e_rx_desc::buf_phy_addr, cpu_to_le16, cpu_to_le32, index, le16_to_cpu, memcpy(), amd8111e_priv::mmio, amd8111e_rx_desc::msg_len, readl(), amd8111e_priv::rx_buf, RX_BUF_LEN, amd8111e_rx_desc::rx_flags, amd8111e_priv::rx_idx, RX_PKT_LEN_MAX, RX_PKT_LEN_MIN, amd8111e_priv::rx_ring, RX_SLOTS_MASK, status, virt_to_bus(), wmb, and writel().
{
/* return true if there's an ethernet packet ready to read */
/* nic->packet should contain data on return */
/* nic->packetlen should contain length of data */
struct amd8111e_priv *lp = nic->priv_data;
u16 status, pkt_len;
unsigned int index, pkt_ok;
amd8111e_poll_link(lp);
index = lp->rx_idx;
status = le16_to_cpu(lp->rx_ring[index].rx_flags);
pkt_len = le16_to_cpu(lp->rx_ring[index].msg_len) - 4; /* remove 4bytes FCS */
if (status & OWN_BIT)
return 0;
if (status & ERR_BIT)
pkt_ok = 0;
else if (!(status & STP_BIT))
pkt_ok = 0;
else if (!(status & ENP_BIT))
pkt_ok = 0;
else if (pkt_len < RX_PKT_LEN_MIN)
pkt_ok = 0;
else if (pkt_len > RX_PKT_LEN_MAX)
pkt_ok = 0;
else
pkt_ok = 1;
if (pkt_ok) {
if (!retrieve)
return 1;
nic->packetlen = pkt_len;
memcpy(nic->packet, lp->rx_buf[index], nic->packetlen);
}
lp->rx_ring[index].buf_phy_addr = cpu_to_le32(virt_to_bus(lp->rx_buf[index]));
lp->rx_ring[index].buf_len = cpu_to_le16(RX_BUF_LEN);
wmb();
lp->rx_ring[index].rx_flags = cpu_to_le16(OWN_BIT);
writel(VAL2 | RDMD0, lp->mmio + CMD0);
readl(lp->mmio + CMD0);
lp->rx_idx = (lp->rx_idx + 1) & RX_SLOTS_MASK;
return pkt_ok;
}
| static void amd8111e_disable | ( | struct nic * | nic | ) | [static] |
Definition at line 612 of file amd8111e.c.
References amd8111e_disable_interrupt(), amd8111e_init_hw_default(), iounmap(), amd8111e_priv::mmio, and amd8111e_priv::opened.
{
struct amd8111e_priv *lp = nic->priv_data;
/* disable interrupt */
amd8111e_disable_interrupt(lp);
/* stop chip */
amd8111e_init_hw_default(lp);
/* unmap mmio */
iounmap(lp->mmio);
/* update status */
lp->opened = 0;
}
| static void amd8111e_irq | ( | struct nic * | nic, |
| irq_action_t | action | ||
| ) | [static] |
Definition at line 629 of file amd8111e.c.
References amd8111e_disable_interrupt(), amd8111e_enable_interrupt(), and amd8111e_force_interrupt().
{
struct amd8111e_priv *lp = nic->priv_data;
switch (action) {
case DISABLE:
amd8111e_disable_interrupt(lp);
break;
case ENABLE:
amd8111e_enable_interrupt(lp);
break;
case FORCE:
amd8111e_force_interrupt(lp);
break;
}
}
| static int amd8111e_probe | ( | struct nic * | nic, |
| struct pci_device * | pdev | ||
| ) | [static] |
Definition at line 653 of file amd8111e.c.
References adjust_pci_device(), amd8111e, amd8111e_operations, amd8111e_restart(), pci_device::ioaddr, ioremap(), pci_device::irq, memset(), amd8111e_priv::mmio, nic, amd8111e_priv::nic, amd8111e_priv::opened, pci_bar_size(), pci_bar_start(), PCI_BASE_ADDRESS_0, and amd8111e_priv::pdev.
{
struct amd8111e_priv *lp = &amd8111e;
unsigned long mmio_start, mmio_len;
nic->ioaddr = pdev->ioaddr;
nic->irqno = pdev->irq;
mmio_start = pci_bar_start(pdev, PCI_BASE_ADDRESS_0);
mmio_len = pci_bar_size(pdev, PCI_BASE_ADDRESS_0);
memset(lp, 0, sizeof(*lp));
lp->pdev = pdev;
lp->nic = nic;
lp->mmio = ioremap(mmio_start, mmio_len);
lp->opened = 1;
adjust_pci_device(pdev);
nic->priv_data = lp;
amd8111e_restart(lp);
nic->nic_op = &amd8111e_operations;
return 1;
}
| PCI_DRIVER | ( | amd8111e_driver | , |
| amd8111e_nics | , | ||
| PCI_NO_CLASS | |||
| ) |
| DRIVER | ( | "AMD8111E" | , |
| nic_driver | , | ||
| pci_driver | , | ||
| amd8111e_driver | , | ||
| amd8111e_probe | , | ||
| amd8111e_disable | |||
| ) |
struct amd8111e_priv amd8111e [static] |
Definition at line 109 of file amd8111e.c.
Referenced by amd8111e_probe().
struct nic_operations amd8111e_operations [static] |
{
.connect = dummy_connect,
.poll = amd8111e_poll,
.transmit = amd8111e_transmit,
.irq = amd8111e_irq,
}
Definition at line 646 of file amd8111e.c.
Referenced by amd8111e_probe().
struct pci_device_id amd8111e_nics[] [static] |
{
PCI_ROM(0x1022, 0x7462, "amd8111e", "AMD8111E", 0),
}
Definition at line 679 of file amd8111e.c.
1.7.6.1