ath5k_pcu.c File Reference

#include "ath5k.h"
#include "reg.h"
#include "base.h"

Go to the source code of this file.

Functions
	FILE_LICENCE (MIT)
	FILE_SECBOOT (FORBIDDEN)
int	ath5k_hw_set_opmode (struct ath5k_hw *ah)
	ath5k_hw_set_opmode - Set PCU operating mode
void	ath5k_hw_set_ack_bitrate_high (struct ath5k_hw *ah, int high)
	ath5k_hw_set_ack_bitrate - set bitrate for ACKs
unsigned int	ath5k_hw_get_ack_timeout (struct ath5k_hw *ah)
	ath5k_hw_het_ack_timeout - Get ACK timeout from PCU in usec
int	ath5k_hw_set_ack_timeout (struct ath5k_hw *ah, unsigned int timeout)
	ath5k_hw_set_ack_timeout - Set ACK timeout on PCU
unsigned int	ath5k_hw_get_cts_timeout (struct ath5k_hw *ah)
	ath5k_hw_get_cts_timeout - Get CTS timeout from PCU in usec
int	ath5k_hw_set_cts_timeout (struct ath5k_hw *ah, unsigned int timeout)
	ath5k_hw_set_cts_timeout - Set CTS timeout on PCU
void	ath5k_hw_get_lladdr (struct ath5k_hw *ah, u8 *mac)
	ath5k_hw_get_lladdr - Get station id
int	ath5k_hw_set_lladdr (struct ath5k_hw *ah, const u8 *mac)
	ath5k_hw_set_lladdr - Set station id
void	ath5k_hw_set_associd (struct ath5k_hw *ah, const u8 *bssid, u16 assoc_id)
	ath5k_hw_set_associd - Set BSSID for association
int	ath5k_hw_set_bssid_mask (struct ath5k_hw *ah, const u8 *mask)
	ath5k_hw_set_bssid_mask - filter out bssids we listen
void	ath5k_hw_start_rx_pcu (struct ath5k_hw *ah)
	ath5k_hw_start_rx_pcu - Start RX engine
void	ath5k_hw_stop_rx_pcu (struct ath5k_hw *ah)
	at5k_hw_stop_rx_pcu - Stop RX engine
void	ath5k_hw_set_mcast_filter (struct ath5k_hw *ah, u32 filter0, u32 filter1)
u32	ath5k_hw_get_rx_filter (struct ath5k_hw *ah)
	ath5k_hw_get_rx_filter - Get current rx filter
void	ath5k_hw_set_rx_filter (struct ath5k_hw *ah, u32 filter)
	ath5k_hw_set_rx_filter - Set rx filter
int	ath5k_hw_reset_key (struct ath5k_hw *ah, u16 entry)

Function Documentation

FILE_LICENCE()

FILE_LICENCE

(

MIT

)

FILE_SECBOOT()

FILE_SECBOOT

(

FORBIDDEN

)

ath5k_hw_set_opmode()

int ath5k_hw_set_opmode

(

struct ath5k_hw *

ah

)

ath5k_hw_set_opmode - Set PCU operating mode

@ah: The &struct ath5k_hw

Initialize PCU for the various operating modes (AP/STA etc)

For iPXE we always assume STA mode.

Definition at line 49 of file ath5k_pcu.c.

{
        u32 pcu_reg, beacon_reg, low_id, high_id;
 
 
        /* Preserve rest settings */
        pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000;
        pcu_reg &= ~(AR5K_STA_ID1_ADHOC | AR5K_STA_ID1_AP
                        | AR5K_STA_ID1_KEYSRCH_MODE
                        | (ah->ah_version == AR5K_AR5210 ?
                        (AR5K_STA_ID1_PWR_SV | AR5K_STA_ID1_NO_PSPOLL) : 0));
 
        beacon_reg = 0;
 
        pcu_reg |= AR5K_STA_ID1_KEYSRCH_MODE
                | (ah->ah_version == AR5K_AR5210 ?
                   AR5K_STA_ID1_PWR_SV : 0);
 
        /*
         * Set PCU registers
         */
        low_id = AR5K_LOW_ID(ah->ah_sta_id);
        high_id = AR5K_HIGH_ID(ah->ah_sta_id);
        ath5k_hw_reg_write(ah, low_id, AR5K_STA_ID0);
        ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1);
 
        /*
         * Set Beacon Control Register on 5210
         */
        if (ah->ah_version == AR5K_AR5210)
                ath5k_hw_reg_write(ah, beacon_reg, AR5K_BCR);
 
        return 0;
}

References ah, AR5K_AR5210, AR5K_BCR, AR5K_HIGH_ID, AR5K_LOW_ID, AR5K_STA_ID0, AR5K_STA_ID1, AR5K_STA_ID1_ADHOC, AR5K_STA_ID1_AP, AR5K_STA_ID1_KEYSRCH_MODE, AR5K_STA_ID1_NO_PSPOLL, AR5K_STA_ID1_PWR_SV, ath5k_hw_reg_read(), ath5k_hw_reg_write(), and u32.

Referenced by ath5k_hw_attach(), ath5k_hw_reset(), and ath5k_mode_setup().

ath5k_hw_set_ack_bitrate_high()

void ath5k_hw_set_ack_bitrate_high	(	struct ath5k_hw *	ah,
		int	high )

ath5k_hw_set_ack_bitrate - set bitrate for ACKs

@ah: The &struct ath5k_hw @high: Flag to determine if we want to use high transmition rate for ACKs or not

If high flag is set, we tell hw to use a set of control rates based on the current transmition rate (check out control_rates array inside reset.c). If not hw just uses the lowest rate available for the current modulation scheme being used (1Mbit for CCK and 6Mbits for OFDM).

Definition at line 96 of file ath5k_pcu.c.

{
        if (ah->ah_version != AR5K_AR5212)
                return;
        else {
                u32 val = AR5K_STA_ID1_BASE_RATE_11B | AR5K_STA_ID1_ACKCTS_6MB;
                if (high)
                        AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1, val);
                else
                        AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1, val);
        }
}

References ah, AR5K_AR5212, AR5K_REG_DISABLE_BITS, AR5K_REG_ENABLE_BITS, AR5K_STA_ID1, AR5K_STA_ID1_ACKCTS_6MB, AR5K_STA_ID1_BASE_RATE_11B, high, u32, and val.

Referenced by ath5k_init().

ath5k_hw_get_ack_timeout()

unsigned int ath5k_hw_get_ack_timeout

(

struct ath5k_hw *

ah

)

ath5k_hw_het_ack_timeout - Get ACK timeout from PCU in usec

@ah: The &struct ath5k_hw

Definition at line 119 of file ath5k_pcu.c.

{
        return ath5k_hw_clocktoh(AR5K_REG_MS(ath5k_hw_reg_read(ah,
                        AR5K_TIME_OUT), AR5K_TIME_OUT_ACK), ah->ah_turbo);
}

References ah, AR5K_REG_MS, AR5K_TIME_OUT, AR5K_TIME_OUT_ACK, ath5k_hw_clocktoh(), and ath5k_hw_reg_read().

ath5k_hw_set_ack_timeout()

int ath5k_hw_set_ack_timeout	(	struct ath5k_hw *	ah,
		unsigned int	timeout )

ath5k_hw_set_ack_timeout - Set ACK timeout on PCU

@ah: The &struct ath5k_hw @timeout: Timeout in usec

Definition at line 131 of file ath5k_pcu.c.

{
        if (ath5k_hw_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_ACK),
                        ah->ah_turbo) <= timeout)
                return -EINVAL;
 
        AR5K_REG_WRITE_BITS(ah, AR5K_TIME_OUT, AR5K_TIME_OUT_ACK,
                ath5k_hw_htoclock(timeout, ah->ah_turbo));
 
        return 0;
}

References ah, AR5K_REG_MS, AR5K_REG_WRITE_BITS, AR5K_TIME_OUT, AR5K_TIME_OUT_ACK, ath5k_hw_clocktoh(), ath5k_hw_htoclock(), EINVAL, and timeout().

ath5k_hw_get_cts_timeout()

unsigned int ath5k_hw_get_cts_timeout

(

struct ath5k_hw *

ah

)

ath5k_hw_get_cts_timeout - Get CTS timeout from PCU in usec

@ah: The &struct ath5k_hw

Definition at line 148 of file ath5k_pcu.c.

{
        return ath5k_hw_clocktoh(AR5K_REG_MS(ath5k_hw_reg_read(ah,
                        AR5K_TIME_OUT), AR5K_TIME_OUT_CTS), ah->ah_turbo);
}

References ah, AR5K_REG_MS, AR5K_TIME_OUT, AR5K_TIME_OUT_CTS, ath5k_hw_clocktoh(), and ath5k_hw_reg_read().

ath5k_hw_set_cts_timeout()

int ath5k_hw_set_cts_timeout	(	struct ath5k_hw *	ah,
		unsigned int	timeout )

ath5k_hw_set_cts_timeout - Set CTS timeout on PCU

@ah: The &struct ath5k_hw @timeout: Timeout in usec

Definition at line 160 of file ath5k_pcu.c.

{
        if (ath5k_hw_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_CTS),
                        ah->ah_turbo) <= timeout)
                return -EINVAL;
 
        AR5K_REG_WRITE_BITS(ah, AR5K_TIME_OUT, AR5K_TIME_OUT_CTS,
                        ath5k_hw_htoclock(timeout, ah->ah_turbo));
 
        return 0;
}

References ah, AR5K_REG_MS, AR5K_REG_WRITE_BITS, AR5K_TIME_OUT, AR5K_TIME_OUT_CTS, ath5k_hw_clocktoh(), ath5k_hw_htoclock(), EINVAL, and timeout().

ath5k_hw_get_lladdr()

void ath5k_hw_get_lladdr	(	struct ath5k_hw *	ah,
		u8 *	mac )

ath5k_hw_get_lladdr - Get station id

@ah: The &struct ath5k_hw @mac: The card's mac address

Initialize ah->ah_sta_id using the mac address provided (just a memcpy).

TODO: Remove it once we merge ath5k_softc and ath5k_hw

Definition at line 188 of file ath5k_pcu.c.

{
        memcpy(mac, ah->ah_sta_id, ETH_ALEN);
}

References ah, ETH_ALEN, mac, memcpy(), and u8.

ath5k_hw_set_lladdr()

int ath5k_hw_set_lladdr	(	struct ath5k_hw *	ah,
		const u8 *	mac )

ath5k_hw_set_lladdr - Set station id

@ah: The &struct ath5k_hw @mac: The card's mac address

Set station id on hw using the provided mac address

Definition at line 201 of file ath5k_pcu.c.

{
        u32 low_id, high_id;
        u32 pcu_reg;
 
        /* Set new station ID */
        memcpy(ah->ah_sta_id, mac, ETH_ALEN);
 
        pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000;
 
        low_id = AR5K_LOW_ID(mac);
        high_id = AR5K_HIGH_ID(mac);
 
        ath5k_hw_reg_write(ah, low_id, AR5K_STA_ID0);
        ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1);
 
        return 0;
}

References ah, AR5K_HIGH_ID, AR5K_LOW_ID, AR5K_STA_ID0, AR5K_STA_ID1, ath5k_hw_reg_read(), ath5k_hw_reg_write(), ETH_ALEN, mac, memcpy(), u32, and u8.

Referenced by ath5k_start(), and ath5k_stop().

ath5k_hw_set_associd()

void ath5k_hw_set_associd	(	struct ath5k_hw *	ah,
		const u8 *	bssid,
		u16	assoc_id )

ath5k_hw_set_associd - Set BSSID for association

@ah: The &struct ath5k_hw @bssid: BSSID @assoc_id: Assoc id

Sets the BSSID which trigers the "SME Join" operation

Definition at line 229 of file ath5k_pcu.c.

{
        u32 low_id, high_id;
 
        /*
         * Set simple BSSID mask on 5212
         */
        if (ah->ah_version == AR5K_AR5212) {
                ath5k_hw_reg_write(ah, AR5K_LOW_ID(ah->ah_bssid_mask),
                                                        AR5K_BSS_IDM0);
                ath5k_hw_reg_write(ah, AR5K_HIGH_ID(ah->ah_bssid_mask),
                                                        AR5K_BSS_IDM1);
        }
 
        /*
         * Set BSSID which triggers the "SME Join" operation
         */
        low_id = AR5K_LOW_ID(bssid);
        high_id = AR5K_HIGH_ID(bssid);
        ath5k_hw_reg_write(ah, low_id, AR5K_BSS_ID0);
        ath5k_hw_reg_write(ah, high_id | ((assoc_id & 0x3fff) <<
                                AR5K_BSS_ID1_AID_S), AR5K_BSS_ID1);
}

References ah, AR5K_AR5212, AR5K_BSS_ID0, AR5K_BSS_ID1, AR5K_BSS_ID1_AID_S, AR5K_BSS_IDM0, AR5K_BSS_IDM1, AR5K_HIGH_ID, AR5K_LOW_ID, ath5k_hw_reg_write(), u16, u32, and u8.

Referenced by ath5k_config(), ath5k_hw_attach(), and ath5k_hw_reset().

ath5k_hw_set_bssid_mask()

int ath5k_hw_set_bssid_mask	(	struct ath5k_hw *	ah,
		const u8 *	mask )

ath5k_hw_set_bssid_mask - filter out bssids we listen

@ah: the &struct ath5k_hw @mask: the bssid_mask, a u8 array of size ETH_ALEN

BSSID masking is a method used by AR5212 and newer hardware to inform PCU which bits of the interface's MAC address should be looked at when trying to decide which packets to ACK. In station mode and AP mode with a single BSS every bit matters since we lock to only one BSS. In AP mode with multiple BSSes (virtual interfaces) not every bit matters because hw must accept frames for all BSSes and so we tweak some bits of our mac address in order to have multiple BSSes.

NOTE: This is a simple filter and does not filter out all relevant frames. Some frames that are not for us might get ACKed from us by PCU because they just match the mask.

When handling multiple BSSes you can get the BSSID mask by computing the set of ~ ( MAC XOR BSSID ) for all bssids we handle.

When you do this you are essentially computing the common bits of all your BSSes. Later it is assumed the harware will "and" (&) the BSSID mask with the MAC address to obtain the relevant bits and compare the result with (frame's BSSID & mask) to see if they match.

Definition at line 349 of file ath5k_pcu.c.

{
        u32 low_id, high_id;
 
        /* Cache bssid mask so that we can restore it
         * on reset */
        memcpy(ah->ah_bssid_mask, mask, ETH_ALEN);
        if (ah->ah_version == AR5K_AR5212) {
                low_id = AR5K_LOW_ID(mask);
                high_id = AR5K_HIGH_ID(mask);
 
                ath5k_hw_reg_write(ah, low_id, AR5K_BSS_IDM0);
                ath5k_hw_reg_write(ah, high_id, AR5K_BSS_IDM1);
 
                return 0;
        }
 
        return -EIO;
}

References ah, AR5K_AR5212, AR5K_BSS_IDM0, AR5K_BSS_IDM1, AR5K_HIGH_ID, AR5K_LOW_ID, ath5k_hw_reg_write(), EIO, ETH_ALEN, memcpy(), u32, and u8.

Referenced by ath5k_attach(), and ath5k_mode_setup().

ath5k_hw_start_rx_pcu()

void ath5k_hw_start_rx_pcu

(

struct ath5k_hw *

ah

)

ath5k_hw_start_rx_pcu - Start RX engine

@ah: The &struct ath5k_hw

Starts RX engine on PCU so that hw can process RXed frames (ACK etc).

NOTE: RX DMA should be already enabled using ath5k_hw_start_rx_dma TODO: Init ANI here

Definition at line 385 of file ath5k_pcu.c.

{
        AR5K_REG_DISABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX);
}

References ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX, and AR5K_REG_DISABLE_BITS.

Referenced by ath5k_rx_start().

ath5k_hw_stop_rx_pcu()

void ath5k_hw_stop_rx_pcu

(

struct ath5k_hw *

ah

)

at5k_hw_stop_rx_pcu - Stop RX engine

@ah: The &struct ath5k_hw

Stops RX engine on PCU

TODO: Detach ANI here

Definition at line 399 of file ath5k_pcu.c.

{
        AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX);
}

References ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX, and AR5K_REG_ENABLE_BITS.

Referenced by ath5k_rx_stop().

ath5k_hw_set_mcast_filter()

void ath5k_hw_set_mcast_filter	(	struct ath5k_hw *	ah,
		u32	filter0,
		u32	filter1 )

Definition at line 407 of file ath5k_pcu.c.

{
        /* Set the multicat filter */
        ath5k_hw_reg_write(ah, filter0, AR5K_MCAST_FILTER0);
        ath5k_hw_reg_write(ah, filter1, AR5K_MCAST_FILTER1);
}

References ah, AR5K_MCAST_FILTER0, AR5K_MCAST_FILTER1, ath5k_hw_reg_write(), and u32.

Referenced by ath5k_configure_filter(), and ath5k_mode_setup().

ath5k_hw_get_rx_filter()

u32 ath5k_hw_get_rx_filter

(

struct ath5k_hw *

ah

)

ath5k_hw_get_rx_filter - Get current rx filter

@ah: The &struct ath5k_hw

Returns the RX filter by reading rx filter and phy error filter registers. RX filter is used to set the allowed frame types that PCU will accept and pass to the driver. For a list of frame types check out reg.h.

Definition at line 425 of file ath5k_pcu.c.

{
        u32 data, filter = 0;
 
        filter = ath5k_hw_reg_read(ah, AR5K_RX_FILTER);
 
        /*Radar detection for 5212*/
        if (ah->ah_version == AR5K_AR5212) {
                data = ath5k_hw_reg_read(ah, AR5K_PHY_ERR_FIL);
 
                if (data & AR5K_PHY_ERR_FIL_RADAR)
                        filter |= AR5K_RX_FILTER_RADARERR;
                if (data & (AR5K_PHY_ERR_FIL_OFDM | AR5K_PHY_ERR_FIL_CCK))
                        filter |= AR5K_RX_FILTER_PHYERR;
        }
 
        return filter;
}

References ah, AR5K_AR5212, AR5K_PHY_ERR_FIL, AR5K_PHY_ERR_FIL_CCK, AR5K_PHY_ERR_FIL_OFDM, AR5K_PHY_ERR_FIL_RADAR, AR5K_RX_FILTER, AR5K_RX_FILTER_PHYERR, AR5K_RX_FILTER_RADARERR, ath5k_hw_reg_read(), data, filter, and u32.

ath5k_hw_set_rx_filter()

void ath5k_hw_set_rx_filter	(	struct ath5k_hw *	ah,
		u32	filter )

ath5k_hw_set_rx_filter - Set rx filter

@ah: The &struct ath5k_hw @filter: RX filter mask (see reg.h)

Sets RX filter register and also handles PHY error filter register on 5212 and newer chips so that we have proper PHY error reporting.

Definition at line 454 of file ath5k_pcu.c.

{
        u32 data = 0;
 
        /* Set PHY error filter register on 5212*/
        if (ah->ah_version == AR5K_AR5212) {
                if (filter & AR5K_RX_FILTER_RADARERR)
                        data |= AR5K_PHY_ERR_FIL_RADAR;
                if (filter & AR5K_RX_FILTER_PHYERR)
                        data |= AR5K_PHY_ERR_FIL_OFDM | AR5K_PHY_ERR_FIL_CCK;
        }
 
        /*
         * The AR5210 uses promiscous mode to detect radar activity
         */
        if (ah->ah_version == AR5K_AR5210 &&
                        (filter & AR5K_RX_FILTER_RADARERR)) {
                filter &= ~AR5K_RX_FILTER_RADARERR;
                filter |= AR5K_RX_FILTER_PROM;
        }
 
        /*Zero length DMA (phy error reporting) */
        if (data)
                AR5K_REG_ENABLE_BITS(ah, AR5K_RXCFG, AR5K_RXCFG_ZLFDMA);
        else
                AR5K_REG_DISABLE_BITS(ah, AR5K_RXCFG, AR5K_RXCFG_ZLFDMA);
 
        /*Write RX Filter register*/
        ath5k_hw_reg_write(ah, filter & 0xff, AR5K_RX_FILTER);
 
        /*Write PHY error filter register on 5212*/
        if (ah->ah_version == AR5K_AR5212)
                ath5k_hw_reg_write(ah, data, AR5K_PHY_ERR_FIL);
 
}

References ah, AR5K_AR5210, AR5K_AR5212, AR5K_PHY_ERR_FIL, AR5K_PHY_ERR_FIL_CCK, AR5K_PHY_ERR_FIL_OFDM, AR5K_PHY_ERR_FIL_RADAR, AR5K_REG_DISABLE_BITS, AR5K_REG_ENABLE_BITS, AR5K_RX_FILTER, AR5K_RX_FILTER_PHYERR, AR5K_RX_FILTER_PROM, AR5K_RX_FILTER_RADARERR, AR5K_RXCFG, AR5K_RXCFG_ZLFDMA, ath5k_hw_reg_write(), data, filter, and u32.

Referenced by ath5k_configure_filter(), ath5k_mode_setup(), and ath5k_rx_stop().

ath5k_hw_reset_key()

int ath5k_hw_reset_key	(	struct ath5k_hw *	ah,
		u16	entry )

Definition at line 497 of file ath5k_pcu.c.

{
        unsigned int i, type;
        u16 micentry = entry + AR5K_KEYTABLE_MIC_OFFSET;
 
        type = ath5k_hw_reg_read(ah, AR5K_KEYTABLE_TYPE(entry));
 
        for (i = 0; i < AR5K_KEYCACHE_SIZE; i++)
                ath5k_hw_reg_write(ah, 0, AR5K_KEYTABLE_OFF(entry, i));
 
        /* Reset associated MIC entry if TKIP
         * is enabled located at offset (entry + 64) */
        if (type == AR5K_KEYTABLE_TYPE_TKIP) {
                for (i = 0; i < AR5K_KEYCACHE_SIZE / 2 ; i++)
                        ath5k_hw_reg_write(ah, 0,
                                AR5K_KEYTABLE_OFF(micentry, i));
        }
 
        /*
         * Set NULL encryption on AR5212+
         *
         * Note: AR5K_KEYTABLE_TYPE -> AR5K_KEYTABLE_OFF(entry, 5)
         *       AR5K_KEYTABLE_TYPE_NULL -> 0x00000007
         *
         * Note2: Windows driver (ndiswrapper) sets this to
         *        0x00000714 instead of 0x00000007
         */
        if (ah->ah_version >= AR5K_AR5211) {
                ath5k_hw_reg_write(ah, AR5K_KEYTABLE_TYPE_NULL,
                                AR5K_KEYTABLE_TYPE(entry));
 
                if (type == AR5K_KEYTABLE_TYPE_TKIP) {
                        ath5k_hw_reg_write(ah, AR5K_KEYTABLE_TYPE_NULL,
                                AR5K_KEYTABLE_TYPE(micentry));
                }
        }
 
        return 0;
}

References ah, AR5K_AR5211, AR5K_KEYCACHE_SIZE, AR5K_KEYTABLE_MIC_OFFSET, AR5K_KEYTABLE_OFF, AR5K_KEYTABLE_TYPE, AR5K_KEYTABLE_TYPE_NULL, AR5K_KEYTABLE_TYPE_TKIP, ath5k_hw_reg_read(), ath5k_hw_reg_write(), type, and u16.

Referenced by ath5k_init().