iPXE
Functions
ath5k_pcu.c File Reference
#include "ath5k.h"
#include "reg.h"
#include "base.h"

Go to the source code of this file.

Functions

 FILE_LICENCE (MIT)
 
int ath5k_hw_set_opmode (struct ath5k_hw *ah)
 ath5k_hw_set_opmode - Set PCU operating mode More...
 
void ath5k_hw_set_ack_bitrate_high (struct ath5k_hw *ah, int high)
 ath5k_hw_set_ack_bitrate - set bitrate for ACKs More...
 
unsigned int ath5k_hw_get_ack_timeout (struct ath5k_hw *ah)
 ath5k_hw_het_ack_timeout - Get ACK timeout from PCU in usec More...
 
int ath5k_hw_set_ack_timeout (struct ath5k_hw *ah, unsigned int timeout)
 ath5k_hw_set_ack_timeout - Set ACK timeout on PCU More...
 
unsigned int ath5k_hw_get_cts_timeout (struct ath5k_hw *ah)
 ath5k_hw_get_cts_timeout - Get CTS timeout from PCU in usec More...
 
int ath5k_hw_set_cts_timeout (struct ath5k_hw *ah, unsigned int timeout)
 ath5k_hw_set_cts_timeout - Set CTS timeout on PCU More...
 
void ath5k_hw_get_lladdr (struct ath5k_hw *ah, u8 *mac)
 ath5k_hw_get_lladdr - Get station id More...
 
int ath5k_hw_set_lladdr (struct ath5k_hw *ah, const u8 *mac)
 ath5k_hw_set_lladdr - Set station id More...
 
void ath5k_hw_set_associd (struct ath5k_hw *ah, const u8 *bssid, u16 assoc_id)
 ath5k_hw_set_associd - Set BSSID for association More...
 
int ath5k_hw_set_bssid_mask (struct ath5k_hw *ah, const u8 *mask)
 ath5k_hw_set_bssid_mask - filter out bssids we listen More...
 
void ath5k_hw_start_rx_pcu (struct ath5k_hw *ah)
 ath5k_hw_start_rx_pcu - Start RX engine More...
 
void ath5k_hw_stop_rx_pcu (struct ath5k_hw *ah)
 at5k_hw_stop_rx_pcu - Stop RX engine More...
 
void ath5k_hw_set_mcast_filter (struct ath5k_hw *ah, u32 filter0, u32 filter1)
 
u32 ath5k_hw_get_rx_filter (struct ath5k_hw *ah)
 ath5k_hw_get_rx_filter - Get current rx filter More...
 
void ath5k_hw_set_rx_filter (struct ath5k_hw *ah, u32 filter)
 ath5k_hw_set_rx_filter - Set rx filter More...
 
int ath5k_hw_reset_key (struct ath5k_hw *ah, u16 entry)
 

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( MIT  )

◆ ath5k_hw_set_opmode()

int ath5k_hw_set_opmode ( struct ath5k_hw ah)

ath5k_hw_set_opmode - Set PCU operating mode

@ah: The &struct ath5k_hw

Initialize PCU for the various operating modes (AP/STA etc)

For iPXE we always assume STA mode.

Definition at line 48 of file ath5k_pcu.c.

49 {
50  u32 pcu_reg, beacon_reg, low_id, high_id;
51 
52 
53  /* Preserve rest settings */
54  pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000;
55  pcu_reg &= ~(AR5K_STA_ID1_ADHOC | AR5K_STA_ID1_AP
57  | (ah->ah_version == AR5K_AR5210 ?
59 
60  beacon_reg = 0;
61 
62  pcu_reg |= AR5K_STA_ID1_KEYSRCH_MODE
63  | (ah->ah_version == AR5K_AR5210 ?
65 
66  /*
67  * Set PCU registers
68  */
69  low_id = AR5K_LOW_ID(ah->ah_sta_id);
70  high_id = AR5K_HIGH_ID(ah->ah_sta_id);
72  ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1);
73 
74  /*
75  * Set Beacon Control Register on 5210
76  */
77  if (ah->ah_version == AR5K_AR5210)
78  ath5k_hw_reg_write(ah, beacon_reg, AR5K_BCR);
79 
80  return 0;
81 }
#define AR5K_STA_ID1_KEYSRCH_MODE
Definition: reg.h:1146
#define AR5K_BCR
Definition: reg.h:103
#define AR5K_STA_ID0
Definition: reg.h:1122
#define AR5K_STA_ID1_ADHOC
Definition: reg.h:1131
#define AR5K_LOW_ID(_a)
Definition: ath5k.h:152
#define AR5K_HIGH_ID(_a)
Definition: ath5k.h:156
#define AR5K_STA_ID1
Definition: reg.h:1128
#define AR5K_STA_ID1_PWR_SV
Definition: reg.h:1132
static void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
Definition: ath5k.h:1222
#define AR5K_STA_ID1_AP
Definition: reg.h:1130
uint8_t ah
Definition: registers.h:85
static u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
Definition: ath5k.h:1214
uint32_t u32
Definition: stdint.h:23
#define AR5K_STA_ID1_NO_PSPOLL
Definition: reg.h:1134

References ah, AR5K_AR5210, AR5K_BCR, AR5K_HIGH_ID, AR5K_LOW_ID, AR5K_STA_ID0, AR5K_STA_ID1, AR5K_STA_ID1_ADHOC, AR5K_STA_ID1_AP, AR5K_STA_ID1_KEYSRCH_MODE, AR5K_STA_ID1_NO_PSPOLL, AR5K_STA_ID1_PWR_SV, ath5k_hw_reg_read(), and ath5k_hw_reg_write().

Referenced by ath5k_hw_attach(), ath5k_hw_reset(), and ath5k_mode_setup().

◆ ath5k_hw_set_ack_bitrate_high()

void ath5k_hw_set_ack_bitrate_high ( struct ath5k_hw ah,
int  high 
)

ath5k_hw_set_ack_bitrate - set bitrate for ACKs

@ah: The &struct ath5k_hw @high: Flag to determine if we want to use high transmition rate for ACKs or not

If high flag is set, we tell hw to use a set of control rates based on the current transmition rate (check out control_rates array inside reset.c). If not hw just uses the lowest rate available for the current modulation scheme being used (1Mbit for CCK and 6Mbits for OFDM).

Definition at line 95 of file ath5k_pcu.c.

96 {
97  if (ah->ah_version != AR5K_AR5212)
98  return;
99  else {
101  if (high)
103  else
105  }
106 }
#define AR5K_STA_ID1_BASE_RATE_11B
Definition: reg.h:1143
#define AR5K_STA_ID1
Definition: reg.h:1128
void __asmcall int val
Definition: setjmp.h:28
#define AR5K_REG_DISABLE_BITS(ah, _reg, _flags)
Definition: ath5k.h:107
uint8_t ah
Definition: registers.h:85
uint32_t high
High 32 bits of address.
Definition: intel.h:22
#define AR5K_STA_ID1_ACKCTS_6MB
Definition: reg.h:1142
uint32_t u32
Definition: stdint.h:23
#define AR5K_REG_ENABLE_BITS(ah, _reg, _flags)
Definition: ath5k.h:104

References ah, AR5K_AR5212, AR5K_REG_DISABLE_BITS, AR5K_REG_ENABLE_BITS, AR5K_STA_ID1, AR5K_STA_ID1_ACKCTS_6MB, AR5K_STA_ID1_BASE_RATE_11B, high, and val.

Referenced by ath5k_init().

◆ ath5k_hw_get_ack_timeout()

unsigned int ath5k_hw_get_ack_timeout ( struct ath5k_hw ah)

ath5k_hw_het_ack_timeout - Get ACK timeout from PCU in usec

@ah: The &struct ath5k_hw

Definition at line 118 of file ath5k_pcu.c.

119 {
121  AR5K_TIME_OUT), AR5K_TIME_OUT_ACK), ah->ah_turbo);
122 }
#define AR5K_TIME_OUT
Definition: reg.h:1173
#define AR5K_REG_MS(_val, _flags)
Definition: ath5k.h:88
#define AR5K_TIME_OUT_ACK
Definition: reg.h:1174
static unsigned int ath5k_hw_clocktoh(unsigned int clock, int turbo)
Definition: ath5k.h:1206
uint8_t ah
Definition: registers.h:85
static u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
Definition: ath5k.h:1214

References ah, AR5K_REG_MS, AR5K_TIME_OUT, AR5K_TIME_OUT_ACK, ath5k_hw_clocktoh(), and ath5k_hw_reg_read().

◆ ath5k_hw_set_ack_timeout()

int ath5k_hw_set_ack_timeout ( struct ath5k_hw ah,
unsigned int  timeout 
)

ath5k_hw_set_ack_timeout - Set ACK timeout on PCU

@ah: The &struct ath5k_hw @timeout: Timeout in usec

Definition at line 130 of file ath5k_pcu.c.

131 {
133  ah->ah_turbo) <= timeout)
134  return -EINVAL;
135 
137  ath5k_hw_htoclock(timeout, ah->ah_turbo));
138 
139  return 0;
140 }
#define EINVAL
Invalid argument.
Definition: errno.h:428
#define AR5K_TIME_OUT
Definition: reg.h:1173
#define AR5K_REG_MS(_val, _flags)
Definition: ath5k.h:88
#define AR5K_REG_WRITE_BITS(ah, _reg, _flags, _val)
Definition: ath5k.h:96
static unsigned int ath5k_hw_htoclock(unsigned int usec, int turbo)
Definition: ath5k.h:1197
#define AR5K_TIME_OUT_ACK
Definition: reg.h:1174
static unsigned int ath5k_hw_clocktoh(unsigned int clock, int turbo)
Definition: ath5k.h:1206
uint8_t ah
Definition: registers.h:85
void timeout(int)

References ah, AR5K_REG_MS, AR5K_REG_WRITE_BITS, AR5K_TIME_OUT, AR5K_TIME_OUT_ACK, ath5k_hw_clocktoh(), ath5k_hw_htoclock(), EINVAL, and timeout().

◆ ath5k_hw_get_cts_timeout()

unsigned int ath5k_hw_get_cts_timeout ( struct ath5k_hw ah)

ath5k_hw_get_cts_timeout - Get CTS timeout from PCU in usec

@ah: The &struct ath5k_hw

Definition at line 147 of file ath5k_pcu.c.

148 {
150  AR5K_TIME_OUT), AR5K_TIME_OUT_CTS), ah->ah_turbo);
151 }
#define AR5K_TIME_OUT
Definition: reg.h:1173
#define AR5K_REG_MS(_val, _flags)
Definition: ath5k.h:88
#define AR5K_TIME_OUT_CTS
Definition: reg.h:1176
static unsigned int ath5k_hw_clocktoh(unsigned int clock, int turbo)
Definition: ath5k.h:1206
uint8_t ah
Definition: registers.h:85
static u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
Definition: ath5k.h:1214

References ah, AR5K_REG_MS, AR5K_TIME_OUT, AR5K_TIME_OUT_CTS, ath5k_hw_clocktoh(), and ath5k_hw_reg_read().

◆ ath5k_hw_set_cts_timeout()

int ath5k_hw_set_cts_timeout ( struct ath5k_hw ah,
unsigned int  timeout 
)

ath5k_hw_set_cts_timeout - Set CTS timeout on PCU

@ah: The &struct ath5k_hw @timeout: Timeout in usec

Definition at line 159 of file ath5k_pcu.c.

160 {
162  ah->ah_turbo) <= timeout)
163  return -EINVAL;
164 
166  ath5k_hw_htoclock(timeout, ah->ah_turbo));
167 
168  return 0;
169 }
#define EINVAL
Invalid argument.
Definition: errno.h:428
#define AR5K_TIME_OUT
Definition: reg.h:1173
#define AR5K_REG_MS(_val, _flags)
Definition: ath5k.h:88
#define AR5K_REG_WRITE_BITS(ah, _reg, _flags, _val)
Definition: ath5k.h:96
static unsigned int ath5k_hw_htoclock(unsigned int usec, int turbo)
Definition: ath5k.h:1197
#define AR5K_TIME_OUT_CTS
Definition: reg.h:1176
static unsigned int ath5k_hw_clocktoh(unsigned int clock, int turbo)
Definition: ath5k.h:1206
uint8_t ah
Definition: registers.h:85
void timeout(int)

References ah, AR5K_REG_MS, AR5K_REG_WRITE_BITS, AR5K_TIME_OUT, AR5K_TIME_OUT_CTS, ath5k_hw_clocktoh(), ath5k_hw_htoclock(), EINVAL, and timeout().

◆ ath5k_hw_get_lladdr()

void ath5k_hw_get_lladdr ( struct ath5k_hw ah,
u8 mac 
)

ath5k_hw_get_lladdr - Get station id

@ah: The &struct ath5k_hw @mac: The card's mac address

Initialize ah->ah_sta_id using the mac address provided (just a memcpy).

TODO: Remove it once we merge ath5k_softc and ath5k_hw

Definition at line 187 of file ath5k_pcu.c.

188 {
189  memcpy(mac, ah->ah_sta_id, ETH_ALEN);
190 }
uint8_t mac[ETH_ALEN]
MAC address.
Definition: ena.h:24
void * memcpy(void *dest, const void *src, size_t len) __nonnull
#define ETH_ALEN
Definition: if_ether.h:8
uint8_t ah
Definition: registers.h:85

References ah, ETH_ALEN, mac, and memcpy().

◆ ath5k_hw_set_lladdr()

int ath5k_hw_set_lladdr ( struct ath5k_hw ah,
const u8 mac 
)

ath5k_hw_set_lladdr - Set station id

@ah: The &struct ath5k_hw @mac: The card's mac address

Set station id on hw using the provided mac address

Definition at line 200 of file ath5k_pcu.c.

201 {
202  u32 low_id, high_id;
203  u32 pcu_reg;
204 
205  /* Set new station ID */
206  memcpy(ah->ah_sta_id, mac, ETH_ALEN);
207 
208  pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000;
209 
210  low_id = AR5K_LOW_ID(mac);
211  high_id = AR5K_HIGH_ID(mac);
212 
214  ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1);
215 
216  return 0;
217 }
uint8_t mac[ETH_ALEN]
MAC address.
Definition: ena.h:24
#define AR5K_STA_ID0
Definition: reg.h:1122
#define AR5K_LOW_ID(_a)
Definition: ath5k.h:152
void * memcpy(void *dest, const void *src, size_t len) __nonnull
#define AR5K_HIGH_ID(_a)
Definition: ath5k.h:156
#define AR5K_STA_ID1
Definition: reg.h:1128
static void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
Definition: ath5k.h:1222
#define ETH_ALEN
Definition: if_ether.h:8
uint8_t ah
Definition: registers.h:85
static u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
Definition: ath5k.h:1214
uint32_t u32
Definition: stdint.h:23

References ah, AR5K_HIGH_ID, AR5K_LOW_ID, AR5K_STA_ID0, AR5K_STA_ID1, ath5k_hw_reg_read(), ath5k_hw_reg_write(), ETH_ALEN, mac, and memcpy().

Referenced by ath5k_start(), and ath5k_stop().

◆ ath5k_hw_set_associd()

void ath5k_hw_set_associd ( struct ath5k_hw ah,
const u8 bssid,
u16  assoc_id 
)

ath5k_hw_set_associd - Set BSSID for association

@ah: The &struct ath5k_hw @bssid: BSSID @assoc_id: Assoc id

Sets the BSSID which trigers the "SME Join" operation

Definition at line 228 of file ath5k_pcu.c.

229 {
230  u32 low_id, high_id;
231 
232  /*
233  * Set simple BSSID mask on 5212
234  */
235  if (ah->ah_version == AR5K_AR5212) {
236  ath5k_hw_reg_write(ah, AR5K_LOW_ID(ah->ah_bssid_mask),
237  AR5K_BSS_IDM0);
238  ath5k_hw_reg_write(ah, AR5K_HIGH_ID(ah->ah_bssid_mask),
239  AR5K_BSS_IDM1);
240  }
241 
242  /*
243  * Set BSSID which triggers the "SME Join" operation
244  */
245  low_id = AR5K_LOW_ID(bssid);
246  high_id = AR5K_HIGH_ID(bssid);
248  ath5k_hw_reg_write(ah, high_id | ((assoc_id & 0x3fff) <<
250 }
#define AR5K_BSS_ID0
Definition: reg.h:1154
#define AR5K_BSS_ID1_AID_S
Definition: reg.h:1163
#define AR5K_BSS_IDM0
Definition: reg.h:1650
#define AR5K_LOW_ID(_a)
Definition: ath5k.h:152
#define AR5K_HIGH_ID(_a)
Definition: ath5k.h:156
static void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
Definition: ath5k.h:1222
#define AR5K_BSS_IDM1
Definition: reg.h:1651
#define AR5K_BSS_ID1
Definition: reg.h:1161
uint8_t ah
Definition: registers.h:85
uint32_t u32
Definition: stdint.h:23

References ah, AR5K_AR5212, AR5K_BSS_ID0, AR5K_BSS_ID1, AR5K_BSS_ID1_AID_S, AR5K_BSS_IDM0, AR5K_BSS_IDM1, AR5K_HIGH_ID, AR5K_LOW_ID, and ath5k_hw_reg_write().

Referenced by ath5k_config(), ath5k_hw_attach(), and ath5k_hw_reset().

◆ ath5k_hw_set_bssid_mask()

int ath5k_hw_set_bssid_mask ( struct ath5k_hw ah,
const u8 mask 
)

ath5k_hw_set_bssid_mask - filter out bssids we listen

@ah: the &struct ath5k_hw @mask: the bssid_mask, a u8 array of size ETH_ALEN

BSSID masking is a method used by AR5212 and newer hardware to inform PCU which bits of the interface's MAC address should be looked at when trying to decide which packets to ACK. In station mode and AP mode with a single BSS every bit matters since we lock to only one BSS. In AP mode with multiple BSSes (virtual interfaces) not every bit matters because hw must accept frames for all BSSes and so we tweak some bits of our mac address in order to have multiple BSSes.

NOTE: This is a simple filter and does not filter out all relevant frames. Some frames that are not for us might get ACKed from us by PCU because they just match the mask.

When handling multiple BSSes you can get the BSSID mask by computing the set of ~ ( MAC XOR BSSID ) for all bssids we handle.

When you do this you are essentially computing the common bits of all your BSSes. Later it is assumed the harware will "and" (&) the BSSID mask with the MAC address to obtain the relevant bits and compare the result with (frame's BSSID & mask) to see if they match.

Definition at line 348 of file ath5k_pcu.c.

349 {
350  u32 low_id, high_id;
351 
352  /* Cache bssid mask so that we can restore it
353  * on reset */
354  memcpy(ah->ah_bssid_mask, mask, ETH_ALEN);
355  if (ah->ah_version == AR5K_AR5212) {
356  low_id = AR5K_LOW_ID(mask);
357  high_id = AR5K_HIGH_ID(mask);
358 
361 
362  return 0;
363  }
364 
365  return -EIO;
366 }
#define AR5K_BSS_IDM0
Definition: reg.h:1650
#define AR5K_LOW_ID(_a)
Definition: ath5k.h:152
void * memcpy(void *dest, const void *src, size_t len) __nonnull
#define AR5K_HIGH_ID(_a)
Definition: ath5k.h:156
static void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
Definition: ath5k.h:1222
#define ETH_ALEN
Definition: if_ether.h:8
#define AR5K_BSS_IDM1
Definition: reg.h:1651
#define EIO
Input/output error.
Definition: errno.h:433
uint8_t ah
Definition: registers.h:85
uint32_t u32
Definition: stdint.h:23

References ah, AR5K_AR5212, AR5K_BSS_IDM0, AR5K_BSS_IDM1, AR5K_HIGH_ID, AR5K_LOW_ID, ath5k_hw_reg_write(), EIO, ETH_ALEN, and memcpy().

Referenced by ath5k_attach(), and ath5k_mode_setup().

◆ ath5k_hw_start_rx_pcu()

void ath5k_hw_start_rx_pcu ( struct ath5k_hw ah)

ath5k_hw_start_rx_pcu - Start RX engine

@ah: The &struct ath5k_hw

Starts RX engine on PCU so that hw can process RXed frames (ACK etc).

NOTE: RX DMA should be already enabled using ath5k_hw_start_rx_dma TODO: Init ANI here

Definition at line 384 of file ath5k_pcu.c.

385 {
387 }
#define AR5K_DIAG_SW_DIS_RX
Definition: reg.h:1402
#define AR5K_REG_DISABLE_BITS(ah, _reg, _flags)
Definition: ath5k.h:107
#define AR5K_DIAG_SW
Definition: reg.h:1392
uint8_t ah
Definition: registers.h:85

References ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX, and AR5K_REG_DISABLE_BITS.

Referenced by ath5k_rx_start().

◆ ath5k_hw_stop_rx_pcu()

void ath5k_hw_stop_rx_pcu ( struct ath5k_hw ah)

at5k_hw_stop_rx_pcu - Stop RX engine

@ah: The &struct ath5k_hw

Stops RX engine on PCU

TODO: Detach ANI here

Definition at line 398 of file ath5k_pcu.c.

399 {
401 }
#define AR5K_DIAG_SW_DIS_RX
Definition: reg.h:1402
#define AR5K_DIAG_SW
Definition: reg.h:1392
uint8_t ah
Definition: registers.h:85
#define AR5K_REG_ENABLE_BITS(ah, _reg, _flags)
Definition: ath5k.h:104

References ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX, and AR5K_REG_ENABLE_BITS.

Referenced by ath5k_rx_stop().

◆ ath5k_hw_set_mcast_filter()

void ath5k_hw_set_mcast_filter ( struct ath5k_hw ah,
u32  filter0,
u32  filter1 
)

Definition at line 406 of file ath5k_pcu.c.

407 {
408  /* Set the multicat filter */
411 }
#define AR5K_MCAST_FILTER0
Definition: reg.h:1351
static void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
Definition: ath5k.h:1222
#define AR5K_MCAST_FILTER1
Definition: reg.h:1359
uint8_t ah
Definition: registers.h:85

References ah, AR5K_MCAST_FILTER0, AR5K_MCAST_FILTER1, and ath5k_hw_reg_write().

Referenced by ath5k_configure_filter(), and ath5k_mode_setup().

◆ ath5k_hw_get_rx_filter()

u32 ath5k_hw_get_rx_filter ( struct ath5k_hw ah)

ath5k_hw_get_rx_filter - Get current rx filter

@ah: The &struct ath5k_hw

Returns the RX filter by reading rx filter and phy error filter registers. RX filter is used to set the allowed frame types that PCU will accept and pass to the driver. For a list of frame types check out reg.h.

Definition at line 424 of file ath5k_pcu.c.

425 {
426  u32 data, filter = 0;
427 
429 
430  /*Radar detection for 5212*/
431  if (ah->ah_version == AR5K_AR5212) {
433 
438  }
439 
440  return filter;
441 }
#define AR5K_PHY_ERR_FIL_RADAR
Definition: reg.h:1714
#define AR5K_PHY_ERR_FIL_OFDM
Definition: reg.h:1715
#define AR5K_RX_FILTER_RADARERR
Definition: reg.h:1342
UINT8_t filter
Receive packet filter.
Definition: pxe_api.h:68
#define AR5K_PHY_ERR_FIL
Definition: reg.h:1713
#define AR5K_RX_FILTER
Definition: reg.h:1325
#define AR5K_RX_FILTER_PHYERR
Definition: reg.h:1339
uint8_t ah
Definition: registers.h:85
static u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
Definition: ath5k.h:1214
struct arbelprm_port_state_change_st data
Message.
Definition: arbel.h:12
#define AR5K_PHY_ERR_FIL_CCK
Definition: reg.h:1716
uint32_t u32
Definition: stdint.h:23

References ah, AR5K_AR5212, AR5K_PHY_ERR_FIL, AR5K_PHY_ERR_FIL_CCK, AR5K_PHY_ERR_FIL_OFDM, AR5K_PHY_ERR_FIL_RADAR, AR5K_RX_FILTER, AR5K_RX_FILTER_PHYERR, AR5K_RX_FILTER_RADARERR, ath5k_hw_reg_read(), data, and filter.

◆ ath5k_hw_set_rx_filter()

void ath5k_hw_set_rx_filter ( struct ath5k_hw ah,
u32  filter 
)

ath5k_hw_set_rx_filter - Set rx filter

@ah: The &struct ath5k_hw @filter: RX filter mask (see reg.h)

Sets RX filter register and also handles PHY error filter register on 5212 and newer chips so that we have proper PHY error reporting.

Definition at line 453 of file ath5k_pcu.c.

454 {
455  u32 data = 0;
456 
457  /* Set PHY error filter register on 5212*/
458  if (ah->ah_version == AR5K_AR5212) {
463  }
464 
465  /*
466  * The AR5210 uses promiscous mode to detect radar activity
467  */
468  if (ah->ah_version == AR5K_AR5210 &&
472  }
473 
474  /*Zero length DMA (phy error reporting) */
475  if (data)
477  else
479 
480  /*Write RX Filter register*/
482 
483  /*Write PHY error filter register on 5212*/
484  if (ah->ah_version == AR5K_AR5212)
486 
487 }
#define AR5K_PHY_ERR_FIL_RADAR
Definition: reg.h:1714
#define AR5K_PHY_ERR_FIL_OFDM
Definition: reg.h:1715
#define AR5K_RX_FILTER_RADARERR
Definition: reg.h:1342
UINT8_t filter
Receive packet filter.
Definition: pxe_api.h:68
#define AR5K_RXCFG_ZLFDMA
Definition: reg.h:199
#define AR5K_RX_FILTER_PROM
Definition: reg.h:1332
#define AR5K_PHY_ERR_FIL
Definition: reg.h:1713
static void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
Definition: ath5k.h:1222
#define AR5K_RX_FILTER
Definition: reg.h:1325
#define AR5K_RX_FILTER_PHYERR
Definition: reg.h:1339
#define AR5K_REG_DISABLE_BITS(ah, _reg, _flags)
Definition: ath5k.h:107
uint8_t ah
Definition: registers.h:85
#define AR5K_RXCFG
Definition: reg.h:196
struct arbelprm_port_state_change_st data
Message.
Definition: arbel.h:12
#define AR5K_PHY_ERR_FIL_CCK
Definition: reg.h:1716
uint32_t u32
Definition: stdint.h:23
#define AR5K_REG_ENABLE_BITS(ah, _reg, _flags)
Definition: ath5k.h:104

References ah, AR5K_AR5210, AR5K_AR5212, AR5K_PHY_ERR_FIL, AR5K_PHY_ERR_FIL_CCK, AR5K_PHY_ERR_FIL_OFDM, AR5K_PHY_ERR_FIL_RADAR, AR5K_REG_DISABLE_BITS, AR5K_REG_ENABLE_BITS, AR5K_RX_FILTER, AR5K_RX_FILTER_PHYERR, AR5K_RX_FILTER_PROM, AR5K_RX_FILTER_RADARERR, AR5K_RXCFG, AR5K_RXCFG_ZLFDMA, ath5k_hw_reg_write(), data, and filter.

Referenced by ath5k_configure_filter(), ath5k_mode_setup(), and ath5k_rx_stop().

◆ ath5k_hw_reset_key()

int ath5k_hw_reset_key ( struct ath5k_hw ah,
u16  entry 
)

Definition at line 496 of file ath5k_pcu.c.

497 {
498  unsigned int i, type;
499  u16 micentry = entry + AR5K_KEYTABLE_MIC_OFFSET;
500 
502 
503  for (i = 0; i < AR5K_KEYCACHE_SIZE; i++)
505 
506  /* Reset associated MIC entry if TKIP
507  * is enabled located at offset (entry + 64) */
508  if (type == AR5K_KEYTABLE_TYPE_TKIP) {
509  for (i = 0; i < AR5K_KEYCACHE_SIZE / 2 ; i++)
511  AR5K_KEYTABLE_OFF(micentry, i));
512  }
513 
514  /*
515  * Set NULL encryption on AR5212+
516  *
517  * Note: AR5K_KEYTABLE_TYPE -> AR5K_KEYTABLE_OFF(entry, 5)
518  * AR5K_KEYTABLE_TYPE_NULL -> 0x00000007
519  *
520  * Note2: Windows driver (ndiswrapper) sets this to
521  * 0x00000714 instead of 0x00000007
522  */
523  if (ah->ah_version >= AR5K_AR5211) {
526 
527  if (type == AR5K_KEYTABLE_TYPE_TKIP) {
529  AR5K_KEYTABLE_TYPE(micentry));
530  }
531  }
532 
533  return 0;
534 }
uint16_t u16
Definition: stdint.h:21
#define AR5K_KEYTABLE_OFF(_n, x)
Definition: reg.h:1819
#define AR5K_KEYTABLE_TYPE_NULL
Definition: reg.h:1827
uint8_t type
Type.
Definition: ena.h:16
#define AR5K_KEYTABLE_TYPE(_n)
Definition: reg.h:1820
#define AR5K_KEYTABLE_TYPE_TKIP
Definition: reg.h:1824
union aes_table_entry entry[256]
Table entries, indexed by S(N)
Definition: aes.c:26
static void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
Definition: ath5k.h:1222
uint8_t ah
Definition: registers.h:85
static u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
Definition: ath5k.h:1214
#define AR5K_KEYTABLE_MIC_OFFSET
Definition: reg.h:1835
#define AR5K_KEYCACHE_SIZE
Definition: ath5k.h:732

References ah, AR5K_AR5211, AR5K_KEYCACHE_SIZE, AR5K_KEYTABLE_MIC_OFFSET, AR5K_KEYTABLE_OFF, AR5K_KEYTABLE_TYPE, AR5K_KEYTABLE_TYPE_NULL, AR5K_KEYTABLE_TYPE_TKIP, ath5k_hw_reg_read(), ath5k_hw_reg_write(), entry, and type.

Referenced by ath5k_init().