91 DBGCP(efx,
"BAR of %lx bytes at phys %lx mapped at %p\n",
void efx_writel(struct efx_nic *efx, efx_dword_t *value, unsigned int reg)
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
static unsigned int unsigned int reg
#define PCI_BASE_ADDRESS_0
static void _efx_writel(struct efx_nic *efx, uint32_t value, unsigned int reg)
A doubleword (4 byte) datatype - little-endian in HW.
void efx_probe(struct net_device *netdev, enum efx_revision revision)
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
struct device dev
Generic device.
Dynamic memory allocation.
#define PCI_BASE_ADDRESS_IO_MASK
I/O BAR mask.
#define container_of(ptr, type, field)
Get containing structure.
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
void * priv
Driver private data.
pseudo_bit_t value[0x00020]
#define PCI_BASE_ADDRESS_2
static struct net_device * netdev
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
uint32_t revision
Entry point revision.
#define EFX_DWORD_VAL(dword)
enum efx_revision revision
#define PCI_BASE_ADDRESS_SPACE_IO
I/O BAR.
struct device * dev
Underlying hardware device.
void * membase
Memory and IO base.
Network device management.
void efx_remove(struct net_device *netdev)
void iounmap(volatile const void *io_addr)
Unmap I/O address.
static uint32_t _efx_readl(struct efx_nic *efx, unsigned int reg)
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.
void efx_readl(struct efx_nic *efx, efx_dword_t *value, unsigned int reg)
This file is a subset of the MCDI headers generated from the yml files.
#define NULL
NULL pointer (VOID *)
struct net_device * netdev