Marvell AQtion family network card driver definitions. More...

#include <stdint.h>
#include <ipxe/if_ether.h>
#include <ipxe/nvs.h>

Data Structures
struct	atl_desc_tx
struct	atl_desc_tx_wb
struct	atl_desc_rx
struct	atl_desc_rx_wb
struct	atl_ring
struct	atl_hw_ops
struct	atl_nic
	An aQuanita network card. More...
struct	atl_hw_stats

Macros
#define	ATL_BAR_SIZE 0x10000
#define	ATL2_BAR_SIZE 0x40000
#define	ATL_RING_SIZE 64
#define	ATL_RING_ALIGN 128
#define	ATL_RX_MAX_LEN 2048
#define	ATL_IRQ_TX 0x00000001U
#define	ATL_IRQ_RX 0x00000002U
#define	ATL_IRQ_STAT_REG 0x00002000U
#define	ATL_IRQ_CTRL 0x00002300U
#define	ATL_IRQ_CTRL_COR_EN 0x00000080U /IRQ clear on read /
#define	ATL_IRQ_CTRL_REG_RST_DIS 0x20000000U /Register reset disable /
#define	ATL_IRQ_MAP_REG1 0x00002100U /IRQ mapping register /
#define	ATL_IRQ_MAP_REG1_RX0_EN 0x00008000U /IRQ RX0 enable/
#define	ATL_IRQ_MAP_REG1_RX0 0x00000100U /IRQ RX0/
#define	ATL_IRQ_MAP_REG1_TX0_EN 0x80000000U /IRQ TX0 enable/
#define	ATL_IRQ_MAP_REG1_TX0 0x00000000U /IRQ TX0/
#define	ATL_TX_IRQ_CTRL 0x00007B40U
#define	ATL_TX_IRQ_CTRL_WB_EN 0x00000002U
#define	ATL_RX_IRQ_CTRL 0x00005A30U
#define	ATL_RX_IRQ_CTRL_WB_EN 0x00000004U
#define	ATL_GLB_CTRL 0x00000000U
#define	ATL_PCI_CTRL 0x00001000U
#define	ATL_PCI_CTRL_RST_DIS 0x20000000U
#define	ATL_RX_CTRL 0x00005000U
#define	ATL_RX_CTRL_RST_DIS 0x20000000U /RPB reset disable /
#define	ATL_TX_CTRL 0x00007000U
#define	ATL_TX_CTRL_RST_DIS 0x20000000U /TPB reset disable /
#define	ATL_RPF2_CTRL 0x00005040U
#define	ATL_RPF2_CTRL_EN 0x000F0000U /* RPF2 enable*/
#define	ATL2_RPF_NEW_EN_ADR_EN 0x00000001U /enable/
#define	ATL2_RPF_NEW_EN_ADR 0x5104
#define	ATL_RPF_CTRL1 0x00005100U
#define	ATL_RPF_CTRL1_BRC_EN 0x00000001U /Allow broadcast receive/
#define	ATL_RPF_CTRL1_L2_PROMISC 0x00000008U /L2 promiscious/
#define	ATL_RPF_CTRL1_ACTION 0x00001000U /Action to host/
#define	ATL_RPF_CTRL1_BRC_TSH 0x00010000U /Brc threshold 256 units per sec/
#define	ATL_RPF_CTRL2 0x00005280U
#define	ATL_RPF_CTRL2_VLAN_PROMISC 0x00000002U /VLAN promisc/
#define	ATL_RPB_CTRL_DIS 0x0
#define	ATL_RPB_CTRL 0x00005700U
#define	ATL_RPB_CTRL_EN 0x00000001U /RPB Enable/
#define	ATL_RPB_CTRL_FC 0x00000010U /RPB Enable/
#define	ATL_RPB_CTRL_TC_MODE 0x00000100U /RPB Traffic Class Mode/
#define	ATL_RPB0_CTRL1 0x00005710U
#define	ATL_RPB0_CTRL1_SIZE 0x00000140U /RPB size (in unit 1KB) \/
#define	ATL_RPB0_CTRL2 0x00005714U
#define	ATL_RPB0_CTRL2_LOW_TSH 0x00000C00U
#define	ATL_RPB0_CTRL2_HIGH_TSH 0x1C000000U
#define	ATL_RPB0_CTRL2_FC_EN 0x80000000U /Flow control Enable/
#define	ATL_RX_DMA_DESC_BUF_SIZE 0x00005b18U
#define	ATL_RX_DMA_DESC_ADDR 0x00005b00U
#define	ATL_TPO2_CTRL 0x00007040U
#define	ATL_TPO2_EN 0x00010000U /TPO2 Enable/
#define	ATL_TPB_CTRL_DIS 0x0
#define	ATL_TPB_CTRL 0x00007900U
#define	ATL_TPB_CTRL_EN 0x00000001U /TPB enable/
#define	ATL_TPB_CTRL_PAD_EN 0x00000004U /Tx pad insert enable/
#define	ATL_TPB_CTRL_TC_MODE 0x00000100U /Tx traffic Class Mode/
#define	ATL_TPB0_CTRL1 0x00007910U
#define	ATL_TPB0_CTRL1_SIZE 0x000000A0U /TPB Size (in unit 1KB)/
#define	ATL_TPB0_CTRL2 0x00007914U
#define	ATL_TPB0_CTRL2_LOW_TSH 0x00000600U
#define	ATL_TPB0_CTRL2_HIGH_TSH 0x0E000000U
#define	ATL_TX_DMA_DESC_ADDR 0x00007c00U
#define	ATL_RING_TX_CTRL 0x00007c08U
#define	ATL_RING_TX_CTRL_EN 0x80000000U /Tx descriptor Enable/
#define	ATL_RING_RX_CTRL 0x00005b08U
#define	ATL_RING_RX_CTRL_EN 0x80000000U /Rx descriptor Enable/
#define	ATL_RING_TAIL 0x00007c10U
#define	ATL_RING_TAIL_PTR 0x00005b10U
#define	ATL_ITR_MSKS_DIS 0x0
#define	ATL_ITR_MSKS 0x00002060U
#define	ATL_ITR_MSKS_LSW 0x0000000CU
#define	ATL_ITR_MSKC 0x00002070U
#define	ATL_ITR_MSKC_LSW 0x0000000CU
#define	ATL_LINK_ADV 0x00000368U
#define	ATL_SHUT_LINK 0x0
#define	ATL_LINK_ADV_AUTONEG 0xF20U
#define	ATL_LINK_ST 0x00000370U
#define	ATL_SEM_RAM 0x000003a8U
#define	ATL_SEM_RAM_RESET 0X1
#define	ATL_MBOX_ADDR 0x00000360U
#define	ATL_MBOX_CTRL1 0x00000200U
#define	ATL_MBOX_CTRL1_START_MBOX_OPT 0x8000
#define	ATL_MBOX_CTRL3 0x00000208U
#define	ATL_MBOX_CTRL5 0x0000020cU
#define	ATL_FLAG_A1 0x1
#define	ATL_FLAG_A2 0x2
#define	ATL_WRITE_REG(VAL, REG)
#define	ATL_READ_REG(REG)
#define	ATL_DESC_TX_DX_TYPE_VALUE 0x1
#define	ATL_DESC_TX_DX_EOP_VALUE 0x1
#define	ATL_DESC_TX_EOP_MASK 0x00200000
#define	ATL_DESC_TX_EOP_OFFSET 21
#define	ATL_DESC_TX_CMD_MASK 0x3FC00000UL
#define	ATL_DESC_TX_CMD_OFFSET 22
#define	ATL_DESC_TX_CMD_VALUE 0x22
#define	ATL_DESC_TX_BUF_LEN_MASK 0x000FFFF0
#define	ATL_DESC_TX_BUF_LEN_OFFSET 5
#define	ATL_DESC_TX_PAY_LEN_MASK 0xFFFFC000
#define	ATL_DESC_TX_PAY_LEN_OFFSET 14
#define	ATL_TX_DESC_STATUS_DD 0x00100000UL
#define	ATL_RX_DESC_STATUS_DD 0x0001UL
#define	ATL_RX_DESC_STATUS_EOP 0x0002UL

Functions
	FILE_LICENCE (BSD2)
struct atl_desc_tx	__attribute__ ((packed))

Variables
uint64_t	address
uint32_t	status
uint32_t	flag
	Flag number.
uint64_t	rsvd1
uint32_t	rsvd4
uint64_t	data_addr
uint64_t	hdr_addr
uint64_t	rsvd2
uint16_t	pkt_len
struct atl_ring	__attribute__

Detailed Description

Marvell AQtion family network card driver definitions.

SPDX-License-Identifier: BSD-2-Clause

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.

THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Definition in file aqc1xx.h.

Macro Definition Documentation

◆ ATL_BAR_SIZE

#define ATL_BAR_SIZE 0x10000

Definition at line 40 of file aqc1xx.h.

Referenced by atl_probe().

◆ ATL2_BAR_SIZE

#define ATL2_BAR_SIZE 0x40000

Definition at line 41 of file aqc1xx.h.

Referenced by atl_probe().

◆ ATL_RING_SIZE

#define ATL_RING_SIZE 64

Definition at line 42 of file aqc1xx.h.

Referenced by atl_ring_alloc(), and atl_ring_next_dx().

◆ ATL_RING_ALIGN

#define ATL_RING_ALIGN 128

Definition at line 43 of file aqc1xx.h.

◆ ATL_RX_MAX_LEN

#define ATL_RX_MAX_LEN 2048

Definition at line 44 of file aqc1xx.h.

Referenced by atl_open(), and atl_rx_ring_fill().

◆ ATL_IRQ_TX

#define ATL_IRQ_TX 0x00000001U

Definition at line 46 of file aqc1xx.h.

Referenced by atl_irq(), and atl_open().

◆ ATL_IRQ_RX

#define ATL_IRQ_RX 0x00000002U

Definition at line 47 of file aqc1xx.h.

Referenced by atl_irq(), and atl_open().

◆ ATL_IRQ_STAT_REG

#define ATL_IRQ_STAT_REG 0x00002000U

Definition at line 50 of file aqc1xx.h.

◆ ATL_IRQ_CTRL

#define ATL_IRQ_CTRL 0x00002300U

Definition at line 53 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_IRQ_CTRL_COR_EN

#define ATL_IRQ_CTRL_COR_EN 0x00000080U /*IRQ clear on read */

Definition at line 54 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_IRQ_CTRL_REG_RST_DIS

#define ATL_IRQ_CTRL_REG_RST_DIS 0x20000000U /*Register reset disable */

Definition at line 55 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_IRQ_MAP_REG1

#define ATL_IRQ_MAP_REG1 0x00002100U /*IRQ mapping register */

Definition at line 58 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_IRQ_MAP_REG1_RX0_EN

#define ATL_IRQ_MAP_REG1_RX0_EN 0x00008000U /*IRQ RX0 enable*/

Definition at line 60 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_IRQ_MAP_REG1_RX0

#define ATL_IRQ_MAP_REG1_RX0 0x00000100U /*IRQ RX0*/

Definition at line 61 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_IRQ_MAP_REG1_TX0_EN

#define ATL_IRQ_MAP_REG1_TX0_EN 0x80000000U /*IRQ TX0 enable*/

Definition at line 63 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_IRQ_MAP_REG1_TX0

#define ATL_IRQ_MAP_REG1_TX0 0x00000000U /*IRQ TX0*/

Definition at line 64 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TX_IRQ_CTRL

#define ATL_TX_IRQ_CTRL 0x00007B40U

Definition at line 67 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TX_IRQ_CTRL_WB_EN

#define ATL_TX_IRQ_CTRL_WB_EN 0x00000002U

Definition at line 68 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RX_IRQ_CTRL

#define ATL_RX_IRQ_CTRL 0x00005A30U

Definition at line 71 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RX_IRQ_CTRL_WB_EN

#define ATL_RX_IRQ_CTRL_WB_EN 0x00000004U

Definition at line 72 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_GLB_CTRL

#define ATL_GLB_CTRL 0x00000000U

Definition at line 74 of file aqc1xx.h.

◆ ATL_PCI_CTRL

#define ATL_PCI_CTRL 0x00001000U

Definition at line 76 of file aqc1xx.h.

◆ ATL_PCI_CTRL_RST_DIS

#define ATL_PCI_CTRL_RST_DIS 0x20000000U

Definition at line 77 of file aqc1xx.h.

◆ ATL_RX_CTRL

#define ATL_RX_CTRL 0x00005000U

Definition at line 79 of file aqc1xx.h.

Referenced by atl_hw_reset_flb_(), and atl_hw_reset_rbl_().

◆ ATL_RX_CTRL_RST_DIS

#define ATL_RX_CTRL_RST_DIS 0x20000000U /*RPB reset disable */

Definition at line 80 of file aqc1xx.h.

Referenced by atl_hw_reset_flb_(), and atl_hw_reset_rbl_().

◆ ATL_TX_CTRL

#define ATL_TX_CTRL 0x00007000U

Definition at line 81 of file aqc1xx.h.

Referenced by atl_hw_reset_flb_(), and atl_hw_reset_rbl_().

◆ ATL_TX_CTRL_RST_DIS

#define ATL_TX_CTRL_RST_DIS 0x20000000U /*TPB reset disable */

Definition at line 82 of file aqc1xx.h.

Referenced by atl_hw_reset_flb_(), and atl_hw_reset_rbl_().

◆ ATL_RPF2_CTRL

#define ATL_RPF2_CTRL 0x00005040U

Definition at line 85 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPF2_CTRL_EN

#define ATL_RPF2_CTRL_EN 0x000F0000U /* RPF2 enable*/

Definition at line 86 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL2_RPF_NEW_EN_ADR_EN

#define ATL2_RPF_NEW_EN_ADR_EN 0x00000001U /*enable*/

Definition at line 87 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL2_RPF_NEW_EN_ADR

#define ATL2_RPF_NEW_EN_ADR 0x5104

Definition at line 88 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPF_CTRL1

#define ATL_RPF_CTRL1 0x00005100U

Definition at line 90 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPF_CTRL1_BRC_EN

#define ATL_RPF_CTRL1_BRC_EN 0x00000001U /*Allow broadcast receive*/

Definition at line 91 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPF_CTRL1_L2_PROMISC

#define ATL_RPF_CTRL1_L2_PROMISC 0x00000008U /*L2 promiscious*/

Definition at line 92 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPF_CTRL1_ACTION

#define ATL_RPF_CTRL1_ACTION 0x00001000U /*Action to host*/

Definition at line 93 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPF_CTRL1_BRC_TSH

#define ATL_RPF_CTRL1_BRC_TSH 0x00010000U /*Brc threshold 256 units per sec*/

Definition at line 94 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPF_CTRL2

#define ATL_RPF_CTRL2 0x00005280U

Definition at line 96 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPF_CTRL2_VLAN_PROMISC

#define ATL_RPF_CTRL2_VLAN_PROMISC 0x00000002U /*VLAN promisc*/

Definition at line 97 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPB_CTRL_DIS

#define ATL_RPB_CTRL_DIS 0x0

Definition at line 99 of file aqc1xx.h.

Referenced by atl_close().

◆ ATL_RPB_CTRL

#define ATL_RPB_CTRL 0x00005700U

Definition at line 100 of file aqc1xx.h.

Referenced by atl_close(), and atl_open().

◆ ATL_RPB_CTRL_EN

#define ATL_RPB_CTRL_EN 0x00000001U /*RPB Enable*/

Definition at line 101 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPB_CTRL_FC

#define ATL_RPB_CTRL_FC 0x00000010U /*RPB Enable*/

Definition at line 102 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPB_CTRL_TC_MODE

#define ATL_RPB_CTRL_TC_MODE 0x00000100U /*RPB Traffic Class Mode*/

Definition at line 103 of file aqc1xx.h.

◆ ATL_RPB0_CTRL1

#define ATL_RPB0_CTRL1 0x00005710U

Definition at line 105 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPB0_CTRL1_SIZE

#define ATL_RPB0_CTRL1_SIZE 0x00000140U /*RPB size (in unit 1KB) \*/

Definition at line 106 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPB0_CTRL2

#define ATL_RPB0_CTRL2 0x00005714U

Definition at line 108 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPB0_CTRL2_LOW_TSH

#define ATL_RPB0_CTRL2_LOW_TSH 0x00000C00U

Definition at line 111 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPB0_CTRL2_HIGH_TSH

#define ATL_RPB0_CTRL2_HIGH_TSH 0x1C000000U

Definition at line 113 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RPB0_CTRL2_FC_EN

#define ATL_RPB0_CTRL2_FC_EN 0x80000000U /*Flow control Enable*/

Definition at line 114 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RX_DMA_DESC_BUF_SIZE

#define ATL_RX_DMA_DESC_BUF_SIZE 0x00005b18U

Definition at line 116 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RX_DMA_DESC_ADDR

#define ATL_RX_DMA_DESC_ADDR 0x00005b00U

Definition at line 117 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TPO2_CTRL

#define ATL_TPO2_CTRL 0x00007040U

Definition at line 120 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TPO2_EN

#define ATL_TPO2_EN 0x00010000U /*TPO2 Enable*/

Definition at line 121 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TPB_CTRL_DIS

#define ATL_TPB_CTRL_DIS 0x0

Definition at line 123 of file aqc1xx.h.

Referenced by atl_close().

◆ ATL_TPB_CTRL

#define ATL_TPB_CTRL 0x00007900U

Definition at line 124 of file aqc1xx.h.

Referenced by atl_close(), and atl_open().

◆ ATL_TPB_CTRL_EN

#define ATL_TPB_CTRL_EN 0x00000001U /*TPB enable*/

Definition at line 125 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TPB_CTRL_PAD_EN

#define ATL_TPB_CTRL_PAD_EN 0x00000004U /*Tx pad insert enable*/

Definition at line 126 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TPB_CTRL_TC_MODE

#define ATL_TPB_CTRL_TC_MODE 0x00000100U /*Tx traffic Class Mode*/

Definition at line 127 of file aqc1xx.h.

◆ ATL_TPB0_CTRL1

#define ATL_TPB0_CTRL1 0x00007910U

Definition at line 129 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TPB0_CTRL1_SIZE

#define ATL_TPB0_CTRL1_SIZE 0x000000A0U /*TPB Size (in unit 1KB)*/

Definition at line 130 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TPB0_CTRL2

#define ATL_TPB0_CTRL2 0x00007914U

Definition at line 132 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TPB0_CTRL2_LOW_TSH

#define ATL_TPB0_CTRL2_LOW_TSH 0x00000600U

Definition at line 134 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TPB0_CTRL2_HIGH_TSH

#define ATL_TPB0_CTRL2_HIGH_TSH 0x0E000000U

Definition at line 136 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_TX_DMA_DESC_ADDR

#define ATL_TX_DMA_DESC_ADDR 0x00007c00U

Definition at line 138 of file aqc1xx.h.

Referenced by atl_open().

◆ ATL_RING_TX_CTRL

#define ATL_RING_TX_CTRL 0x00007c08U

Definition at line 141 of file aqc1xx.h.

Referenced by atl_close(), and atl_open().

◆ ATL_RING_TX_CTRL_EN

#define ATL_RING_TX_CTRL_EN 0x80000000U /*Tx descriptor Enable*/

Definition at line 142 of file aqc1xx.h.

Referenced by atl_close(), and atl_open().

◆ ATL_RING_RX_CTRL

#define ATL_RING_RX_CTRL 0x00005b08U

Definition at line 144 of file aqc1xx.h.

Referenced by atl_close(), and atl_open().

◆ ATL_RING_RX_CTRL_EN

#define ATL_RING_RX_CTRL_EN 0x80000000U /*Rx descriptor Enable*/

Definition at line 145 of file aqc1xx.h.

Referenced by atl_close(), and atl_open().

◆ ATL_RING_TAIL

#define ATL_RING_TAIL 0x00007c10U

Definition at line 147 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_RING_TAIL_PTR

#define ATL_RING_TAIL_PTR 0x00005b10U

Definition at line 148 of file aqc1xx.h.

Referenced by atl_rx_ring_fill().

◆ ATL_ITR_MSKS_DIS

#define ATL_ITR_MSKS_DIS 0x0

Definition at line 151 of file aqc1xx.h.

Referenced by atl_close().

◆ ATL_ITR_MSKS

#define ATL_ITR_MSKS 0x00002060U

Definition at line 152 of file aqc1xx.h.

Referenced by atl_close(), atl_irq(), and atl_open().

◆ ATL_ITR_MSKS_LSW

#define ATL_ITR_MSKS_LSW 0x0000000CU

Definition at line 153 of file aqc1xx.h.

◆ ATL_ITR_MSKC

#define ATL_ITR_MSKC 0x00002070U

Definition at line 154 of file aqc1xx.h.

Referenced by atl_irq().

◆ ATL_ITR_MSKC_LSW

#define ATL_ITR_MSKC_LSW 0x0000000CU

Definition at line 155 of file aqc1xx.h.

◆ ATL_LINK_ADV

#define ATL_LINK_ADV 0x00000368U

Definition at line 158 of file aqc1xx.h.

Referenced by atl_hw_start(), and atl_hw_stop().

◆ ATL_SHUT_LINK

#define ATL_SHUT_LINK 0x0

Definition at line 159 of file aqc1xx.h.

Referenced by atl_hw_stop().

◆ ATL_LINK_ADV_AUTONEG

#define ATL_LINK_ADV_AUTONEG 0xF20U

Definition at line 160 of file aqc1xx.h.

Referenced by atl_hw_get_link(), and atl_hw_start().

◆ ATL_LINK_ST

#define ATL_LINK_ST 0x00000370U

Definition at line 162 of file aqc1xx.h.

Referenced by atl_hw_get_link().

◆ ATL_SEM_RAM

#define ATL_SEM_RAM 0x000003a8U

Definition at line 165 of file aqc1xx.h.

Referenced by atl_hw_read_mem().

◆ ATL_SEM_RAM_RESET

#define ATL_SEM_RAM_RESET 0X1

Definition at line 166 of file aqc1xx.h.

Referenced by atl_hw_read_mem().

◆ ATL_MBOX_ADDR

#define ATL_MBOX_ADDR 0x00000360U

Definition at line 169 of file aqc1xx.h.

◆ ATL_MBOX_CTRL1

#define ATL_MBOX_CTRL1 0x00000200U

Definition at line 170 of file aqc1xx.h.

Referenced by atl_hw_read_mem().

◆ ATL_MBOX_CTRL1_START_MBOX_OPT

#define ATL_MBOX_CTRL1_START_MBOX_OPT 0x8000

Definition at line 171 of file aqc1xx.h.

Referenced by atl_hw_read_mem().

◆ ATL_MBOX_CTRL3

#define ATL_MBOX_CTRL3 0x00000208U

Definition at line 173 of file aqc1xx.h.

Referenced by atl_hw_read_mem().

◆ ATL_MBOX_CTRL5

#define ATL_MBOX_CTRL5 0x0000020cU

Definition at line 174 of file aqc1xx.h.

Referenced by atl_hw_read_mem().

◆ ATL_FLAG_A1

#define ATL_FLAG_A1 0x1

Definition at line 176 of file aqc1xx.h.

Referenced by atl_probe().

◆ ATL_FLAG_A2

#define ATL_FLAG_A2 0x2

Definition at line 177 of file aqc1xx.h.

Referenced by atl_open(), and atl_probe().

◆ ATL_WRITE_REG

#define ATL_WRITE_REG	(		VAL,
			REG )

Value:

writel( VAL, nic->regs + (REG) )

nic

Definition nic.h:49

writel

#define writel

Definition w89c840.c:160

Definition at line 180 of file aqc1xx.h.

Referenced by atl2_hw_finish_ack_(), atl2_hw_reset(), atl2_hw_write_shared_in_(), atl_close(), atl_hw_read_mem(), atl_hw_reset_flb_(), atl_hw_reset_rbl_(), atl_hw_start(), atl_hw_stop(), atl_irq(), atl_open(), atl_ring_alloc(), atl_rx_ring_fill(), and atl_transmit().

◆ ATL_READ_REG

#define ATL_READ_REG ( REG )

Value:

readl( nic->regs + (REG) ) /*read register*/

readl

#define readl

Definition w89c840.c:157

Definition at line 181 of file aqc1xx.h.

Referenced by atl2_hw_boot_completed_(), atl2_hw_finish_ack_(), atl2_hw_get_link(), atl2_hw_read_shared_in_(), atl2_hw_reset(), atl_close(), atl_hw_get_link(), atl_hw_get_mac(), atl_hw_read_mem(), atl_hw_reset(), atl_hw_reset_flb_(), atl_hw_reset_rbl_(), and atl_open().

◆ ATL_DESC_TX_DX_TYPE_VALUE

#define ATL_DESC_TX_DX_TYPE_VALUE 0x1

Definition at line 189 of file aqc1xx.h.

◆ ATL_DESC_TX_DX_EOP_VALUE

#define ATL_DESC_TX_DX_EOP_VALUE 0x1

Definition at line 191 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_DESC_TX_EOP_MASK

#define ATL_DESC_TX_EOP_MASK 0x00200000

Definition at line 192 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_DESC_TX_EOP_OFFSET

#define ATL_DESC_TX_EOP_OFFSET 21

Definition at line 193 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_DESC_TX_CMD_MASK

#define ATL_DESC_TX_CMD_MASK 0x3FC00000UL

Definition at line 195 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_DESC_TX_CMD_OFFSET

#define ATL_DESC_TX_CMD_OFFSET 22

Definition at line 196 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_DESC_TX_CMD_VALUE

#define ATL_DESC_TX_CMD_VALUE 0x22

Definition at line 197 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_DESC_TX_BUF_LEN_MASK

#define ATL_DESC_TX_BUF_LEN_MASK 0x000FFFF0

Definition at line 199 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_DESC_TX_BUF_LEN_OFFSET

#define ATL_DESC_TX_BUF_LEN_OFFSET 5

Definition at line 200 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_DESC_TX_PAY_LEN_MASK

#define ATL_DESC_TX_PAY_LEN_MASK 0xFFFFC000

Definition at line 202 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_DESC_TX_PAY_LEN_OFFSET

#define ATL_DESC_TX_PAY_LEN_OFFSET 14

Definition at line 203 of file aqc1xx.h.

Referenced by atl_transmit().

◆ ATL_TX_DESC_STATUS_DD

#define ATL_TX_DESC_STATUS_DD 0x00100000UL

Definition at line 211 of file aqc1xx.h.

Referenced by atl_poll_tx().

◆ ATL_RX_DESC_STATUS_DD

#define ATL_RX_DESC_STATUS_DD 0x0001UL

Definition at line 226 of file aqc1xx.h.

Referenced by atl_poll_rx().

◆ ATL_RX_DESC_STATUS_EOP

#define ATL_RX_DESC_STATUS_EOP 0x0002UL

Definition at line 227 of file aqc1xx.h.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( BSD2 )

Variable Documentation

◆ address

uint64_t address

Definition at line 0 of file aqc1xx.h.

◆ status

uint16_t status

Definition at line 1 of file aqc1xx.h.

◆ flag

uint16_t flag

Flag number.

Definition at line 2 of file aqc1xx.h.

Referenced by __attribute__(), _tg3_flag(), _tg3_flag_clear(), _tg3_flag_set(), bnxt_get_phy_link(), bnxt_query_phy_link(), dev_p5_db(), dev_p7_db(), hv_signal_event(), mlx_pci_gw_wait_for_flag_value(), parse_flag(), pci_vpd_read_dword(), and pci_vpd_write_dword().

◆ rsvd1

u8 rsvd1

Definition at line 0 of file aqc1xx.h.

◆ rsvd4

u8 rsvd4

Definition at line 2 of file aqc1xx.h.

◆ data_addr

uint64_t data_addr

Definition at line 0 of file aqc1xx.h.

◆ hdr_addr

uint64_t hdr_addr

Definition at line 1 of file aqc1xx.h.

◆ rsvd2

u8 rsvd2

Definition at line 0 of file aqc1xx.h.

◆ pkt_len

uint16_t pkt_len

Definition at line 2 of file aqc1xx.h.

Referenced by amd8111e_poll(), ath5k_hw_setup_2word_tx_desc(), ath5k_hw_setup_4word_tx_desc(), linux_slirp_input(), ncm_in_complete(), sundance_poll(), and w89c840_poll().

Data Structures

Macros

Functions

Variables

Detailed Description

Macro Definition Documentation

◆ ATL_BAR_SIZE

◆ ATL2_BAR_SIZE

◆ ATL_RING_SIZE

◆ ATL_RING_ALIGN

◆ ATL_RX_MAX_LEN

◆ ATL_IRQ_TX

◆ ATL_IRQ_RX

◆ ATL_IRQ_STAT_REG

◆ ATL_IRQ_CTRL

◆ ATL_IRQ_CTRL_COR_EN

◆ ATL_IRQ_CTRL_REG_RST_DIS

◆ ATL_IRQ_MAP_REG1

◆ ATL_IRQ_MAP_REG1_RX0_EN

◆ ATL_IRQ_MAP_REG1_RX0

◆ ATL_IRQ_MAP_REG1_TX0_EN

◆ ATL_IRQ_MAP_REG1_TX0

◆ ATL_TX_IRQ_CTRL

◆ ATL_TX_IRQ_CTRL_WB_EN

◆ ATL_RX_IRQ_CTRL

◆ ATL_RX_IRQ_CTRL_WB_EN

◆ ATL_GLB_CTRL

◆ ATL_PCI_CTRL

◆ ATL_PCI_CTRL_RST_DIS

◆ ATL_RX_CTRL

◆ ATL_RX_CTRL_RST_DIS

◆ ATL_TX_CTRL

◆ ATL_TX_CTRL_RST_DIS

◆ ATL_RPF2_CTRL

◆ ATL_RPF2_CTRL_EN

◆ ATL2_RPF_NEW_EN_ADR_EN

◆ ATL2_RPF_NEW_EN_ADR

◆ ATL_RPF_CTRL1

◆ ATL_RPF_CTRL1_BRC_EN

◆ ATL_RPF_CTRL1_L2_PROMISC

◆ ATL_RPF_CTRL1_ACTION

◆ ATL_RPF_CTRL1_BRC_TSH

◆ ATL_RPF_CTRL2

◆ ATL_RPF_CTRL2_VLAN_PROMISC

◆ ATL_RPB_CTRL_DIS

◆ ATL_RPB_CTRL

◆ ATL_RPB_CTRL_EN

◆ ATL_RPB_CTRL_FC

◆ ATL_RPB_CTRL_TC_MODE

◆ ATL_RPB0_CTRL1

◆ ATL_RPB0_CTRL1_SIZE

◆ ATL_RPB0_CTRL2

◆ ATL_RPB0_CTRL2_LOW_TSH

◆ ATL_RPB0_CTRL2_HIGH_TSH

◆ ATL_RPB0_CTRL2_FC_EN

◆ ATL_RX_DMA_DESC_BUF_SIZE

◆ ATL_RX_DMA_DESC_ADDR

◆ ATL_TPO2_CTRL

◆ ATL_TPO2_EN

◆ ATL_TPB_CTRL_DIS

◆ ATL_TPB_CTRL

◆ ATL_TPB_CTRL_EN

◆ ATL_TPB_CTRL_PAD_EN

◆ ATL_TPB_CTRL_TC_MODE

◆ ATL_TPB0_CTRL1

◆ ATL_TPB0_CTRL1_SIZE

◆ ATL_TPB0_CTRL2

◆ ATL_TPB0_CTRL2_LOW_TSH

◆ ATL_TPB0_CTRL2_HIGH_TSH

◆ ATL_TX_DMA_DESC_ADDR

◆ ATL_RING_TX_CTRL

◆ ATL_RING_TX_CTRL_EN

◆ ATL_RING_RX_CTRL

◆ ATL_RING_RX_CTRL_EN

◆ ATL_RING_TAIL

◆ ATL_RING_TAIL_PTR

◆ ATL_ITR_MSKS_DIS

◆ ATL_ITR_MSKS

◆ ATL_ITR_MSKS_LSW

◆ ATL_ITR_MSKC