iPXE
sundance.c
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1 /**************************************************************************
2 *
3 * sundance.c -- Etherboot device driver for the Sundance ST201 "Alta".
4 * Written 2002-2002 by Timothy Legge <tlegge@rogers.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301, USA.
20 *
21 * Portions of this code based on:
22 * sundance.c: A Linux device driver for the Sundance ST201 "Alta"
23 * Written 1999-2002 by Donald Becker
24 *
25 * tulip.c: Tulip and Clone Etherboot Driver
26 * By Marty Conner
27 * Copyright (C) 2001 Entity Cyber, Inc.
28 *
29 * Linux Driver Version LK1.09a, 10-Jul-2003 (2.4.25)
30 *
31 * REVISION HISTORY:
32 * ================
33 * v1.1 01-01-2003 timlegge Initial implementation
34 * v1.7 04-10-2003 timlegge Transfers Linux Kernel (30 sec)
35 * v1.8 04-13-2003 timlegge Fix multiple transmission bug
36 * v1.9 08-19-2003 timlegge Support Multicast
37 * v1.10 01-17-2004 timlegge Initial driver output cleanup
38 * v1.11 03-21-2004 timlegge Remove unused variables
39 * v1.12 03-21-2004 timlegge Remove excess MII defines
40 * v1.13 03-24-2004 timlegge Update to Linux 2.4.25 driver
41 *
42 ****************************************************************************/
43 
44 FILE_LICENCE ( GPL2_OR_LATER );
45 
46 /* to get some global routines like printf */
47 #include "etherboot.h"
48 /* to get the interface to the body of the program */
49 #include "nic.h"
50 /* to get the PCI support functions, if this is a PCI NIC */
51 #include <ipxe/pci.h>
52 #include "mii.h"
53 
54 #define drv_version "v1.12"
55 #define drv_date "2004-03-21"
56 
57 #define HZ 100
58 
59 /* Condensed operations for readability. */
60 #define virt_to_le32desc(addr) cpu_to_le32(virt_to_bus(addr))
61 #define le32desc_to_virt(addr) bus_to_virt(le32_to_cpu(addr))
62 
63 /* Set the mtu */
64 static int mtu = 1514;
65 
66 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
67  The sundance uses a 64 element hash table based on the Ethernet CRC. */
68 // static int multicast_filter_limit = 32;
69 
70 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
71  Setting to > 1518 effectively disables this feature.
72  This chip can receive into any byte alignment buffers, so word-oriented
73  archs do not need a copy-align of the IP header. */
74 static int rx_copybreak = 0;
75 static int flowctrl = 1;
76 
77 /* Allow forcing the media type */
78 /* media[] specifies the media type the NIC operates at.
79  autosense Autosensing active media.
80  10mbps_hd 10Mbps half duplex.
81  10mbps_fd 10Mbps full duplex.
82  100mbps_hd 100Mbps half duplex.
83  100mbps_fd 100Mbps full duplex.
84 */
85 static char media[] = "autosense";
86 
87 /* Operational parameters that are set at compile time. */
88 
89 /* As Etherboot uses a Polling driver we can keep the number of rings
90 to the minimum number required. In general that is 1 transmit and 4 receive receive rings. However some cards require that
91 there be a minimum of 2 rings */
92 #define TX_RING_SIZE 2
93 #define TX_QUEUE_LEN 10 /* Limit ring entries actually used. */
94 #define RX_RING_SIZE 4
95 
96 
97 /* Operational parameters that usually are not changed. */
98 /* Time in jiffies before concluding the transmitter is hung. */
99 #define TX_TIME_OUT (4*HZ)
100 #define PKT_BUF_SZ 1536
101 
102 /* Offsets to the device registers.
103  Unlike software-only systems, device drivers interact with complex hardware.
104  It's not useful to define symbolic names for every register bit in the
105  device. The name can only partially document the semantics and make
106  the driver longer and more difficult to read.
107  In general, only the important configuration values or bits changed
108  multiple times should be defined symbolically.
109 */
111  DMACtrl = 0x00,
112  TxListPtr = 0x04,
116  RxDMAStatus = 0x0c,
117  RxListPtr = 0x10,
118  DebugCtrl0 = 0x1a,
119  DebugCtrl1 = 0x1c,
123  LEDCtrl = 0x1a,
124  ASICCtrl = 0x30,
125  EEData = 0x34,
126  EECtrl = 0x36,
129  FlashAddr = 0x40,
130  FlashData = 0x44,
131  TxStatus = 0x46,
132  TxFrameId = 0x47,
133  DownCounter = 0x18,
134  IntrClear = 0x4a,
135  IntrEnable = 0x4c,
136  IntrStatus = 0x4e,
137  MACCtrl0 = 0x50,
138  MACCtrl1 = 0x52,
139  StationAddr = 0x54,
140  MaxFrameSize = 0x5A,
141  RxMode = 0x5c,
142  MIICtrl = 0x5e,
145  RxOctetsLow = 0x68,
146  RxOctetsHigh = 0x6a,
147  TxOctetsLow = 0x6c,
148  TxOctetsHigh = 0x6e,
149  TxFramesOK = 0x70,
150  RxFramesOK = 0x72,
154  StatsOneColl = 0x77,
155  StatsTxDefer = 0x78,
156  RxMissed = 0x79,
158  StatsTxAbort = 0x7b,
159  StatsBcastTx = 0x7c,
160  StatsBcastRx = 0x7d,
161  StatsMcastTx = 0x7e,
162  StatsMcastRx = 0x7f,
163  /* Aliased and bogus values! */
164  RxStatus = 0x0c,
165 };
167  GlobalReset = 0x0001,
168  RxReset = 0x0002,
169  TxReset = 0x0004,
170  DMAReset = 0x0008,
171  FIFOReset = 0x0010,
172  NetworkReset = 0x0020,
173  HostReset = 0x0040,
174  ResetBusy = 0x0400,
175 };
176 
177 /* Bits in the interrupt status/mask registers. */
179  IntrSummary = 0x0001, IntrPCIErr = 0x0002, IntrMACCtrl = 0x0008,
180  IntrTxDone = 0x0004, IntrRxDone = 0x0010, IntrRxStart = 0x0020,
181  IntrDrvRqst = 0x0040,
182  StatsMax = 0x0080, LinkChange = 0x0100,
183  IntrTxDMADone = 0x0200, IntrRxDMADone = 0x0400,
184 };
185 
186 /* Bits in the RxMode register. */
190  0x01,
191 };
192 /* Bits in MACCtrl. */
195  EnbFlowCtrl = 0x100, EnbPassRxCRC = 0x200,
196 };
198  StatsEnable = 0x0020, StatsDisable = 0x0040, StatsEnabled = 0x0080,
199  TxEnable = 0x0100, TxDisable = 0x0200, TxEnabled = 0x0400,
200  RxEnable = 0x0800, RxDisable = 0x1000, RxEnabled = 0x2000,
201 };
202 
203 /* The Rx and Tx buffer descriptors.
204  Using only 32 bit fields simplifies software endian correction.
205  This structure must be aligned, and should avoid spanning cache lines.
206 */
207 struct netdev_desc {
212 };
213 
214 /* Bits in netdev_desc.status */
216  DescOwn = 0x8000,
217  DescEndPacket = 0x4000,
218  DescEndRing = 0x2000,
219  LastFrag = 0x80000000,
220  DescIntrOnTx = 0x8000,
221  DescIntrOnDMADone = 0x80000000,
222  DisableAlign = 0x00000001,
223 };
224 
225 /**********************************************
226 * Descriptor Ring and Buffer defination
227 ***********************************************/
228 /* Define the TX Descriptor */
230 
231 /* Define the RX Descriptor */
233 
234 /* Create a static buffer of size PKT_BUF_SZ for each RX and TX descriptor.
235  All descriptors point to a part of this buffer */
236 struct {
237  unsigned char txb[PKT_BUF_SZ * TX_RING_SIZE];
238  unsigned char rxb[RX_RING_SIZE * PKT_BUF_SZ];
239 } rx_tx_buf __shared;
240 #define rxb rx_tx_buf.rxb
241 #define txb rx_tx_buf.txb
242 
243 /* FIXME: Move BASE to the private structure */
244 static u32 BASE;
245 #define EEPROM_SIZE 128
246 
249  PCI_ADDR0 = 0 << 4, PCI_ADDR1 = 1 << 4, PCI_ADDR2 =
250  2 << 4, PCI_ADDR3 = 3 << 4,
251 };
252 
254 #define PCI_IOTYPE (PCI_USES_MASTER | PCI_USES_IO | PCI_ADDR0)
255 
256 #define MII_CNT 4
257 static struct sundance_private {
258  const char *nic_name;
259  /* Frequently used values */
260 
261  unsigned int cur_rx; /* Producer/consumer ring indices */
262  unsigned int mtu;
263 
264  /* These values keep track of the tranceiver/media in use */
265  unsigned int flowctrl:1;
266  unsigned int an_enable:1;
267 
268  unsigned int speed;
269 
270  /* MII tranceiver section */
273  unsigned char phys[MII_CNT];
274  unsigned char pci_rev_id;
275 } sdx;
276 
277 static struct sundance_private *sdc;
278 
279 /* Station Address location within the EEPROM */
280 #define EEPROM_SA_OFFSET 0x10
281 #define DEFAULT_INTR (IntrRxDMADone | IntrPCIErr | \
282  IntrDrvRqst | IntrTxDone | StatsMax | \
283  LinkChange)
284 
285 static int eeprom_read(long ioaddr, int location);
286 static int mdio_read(struct nic *nic, int phy_id, unsigned int location);
287 static void mdio_write(struct nic *nic, int phy_id, unsigned int location,
288  int value);
289 static void set_rx_mode(struct nic *nic);
290 
291 static void check_duplex(struct nic *nic)
292 {
293  int mii_lpa = mdio_read(nic, sdc->phys[0], MII_LPA);
294  int negotiated = mii_lpa & sdc->mii_if.advertising;
295  int duplex;
296 
297  /* Force media */
298  if (!sdc->an_enable || mii_lpa == 0xffff) {
299  if (sdc->mii_if.full_duplex)
301  BASE + MACCtrl0);
302  return;
303  }
304 
305  /* Autonegotiation */
306  duplex = (negotiated & 0x0100) || (negotiated & 0x01C0) == 0x0040;
307  if (sdc->mii_if.full_duplex != duplex) {
309  DBG ("%s: Setting %s-duplex based on MII #%d "
310  "negotiated capability %4.4x.\n", sdc->nic_name,
311  duplex ? "full" : "half", sdc->phys[0],
312  negotiated );
313  outw(inw(BASE + MACCtrl0) | duplex ? 0x20 : 0,
314  BASE + MACCtrl0);
315  }
316 }
317 
318 
319 /**************************************************************************
320  * init_ring - setup the tx and rx descriptors
321  *************************************************************************/
322 static void init_ring(struct nic *nic __unused)
323 {
324  int i;
325 
326  sdc->cur_rx = 0;
327 
328  /* Initialize all the Rx descriptors */
329  for (i = 0; i < RX_RING_SIZE; i++) {
331  rx_ring[i].status = 0;
332  rx_ring[i].length = 0;
333  rx_ring[i].addr = 0;
334  }
335 
336  /* Mark the last entry as wrapping the ring */
338 
339  for (i = 0; i < RX_RING_SIZE; i++) {
342  }
343 
344  /* We only use one transmit buffer, but two
345  * descriptors so transmit engines have somewhere
346  * to point should they feel the need */
347  tx_ring[0].status = 0x00000000;
348  tx_ring[0].addr = virt_to_bus(&txb[0]);
349  tx_ring[0].next_desc = 0; /* virt_to_bus(&tx_ring[1]); */
350 
351  /* This descriptor is never used */
352  tx_ring[1].status = 0x00000000;
353  tx_ring[1].addr = 0; /*virt_to_bus(&txb[0]); */
354  tx_ring[1].next_desc = 0;
355 
356  /* Mark the last entry as wrapping the ring,
357  * though this should never happen */
359 }
360 
361 /**************************************************************************
362  * RESET - Reset Adapter
363  * ***********************************************************************/
364 static void sundance_reset(struct nic *nic)
365 {
366  int i;
367 
368  init_ring(nic);
369 
371  /* The Tx List Pointer is written as packets are queued */
372 
373  /* Initialize other registers. */
374  /* __set_mac_addr(dev); */
375  {
376  u16 addr16;
377 
378  addr16 = (nic->node_addr[0] | (nic->node_addr[1] << 8));
379  outw(addr16, BASE + StationAddr);
380  addr16 = (nic->node_addr[2] | (nic->node_addr[3] << 8));
381  outw(addr16, BASE + StationAddr + 2);
382  addr16 = (nic->node_addr[4] | (nic->node_addr[5] << 8));
383  outw(addr16, BASE + StationAddr + 4);
384  }
385 
386  outw(sdc->mtu + 14, BASE + MaxFrameSize);
387  if (sdc->mtu > 2047) /* this will never happen with default options */
388  outl(inl(BASE + ASICCtrl) | 0x0c, BASE + ASICCtrl);
389 
390  set_rx_mode(nic);
391 
392  outw(0, BASE + DownCounter);
393  /* Set the chip to poll every N*30nsec */
394  outb(100, BASE + RxDMAPollPeriod);
395 
396  /* Fix DFE-580TX packet drop issue */
397  if (sdc->pci_rev_id >= 0x14)
398  writeb(0x01, BASE + DebugCtrl1);
399 
401 
402  /* Construct a perfect filter frame with the mac address as first match
403  * and broadcast for all others */
404  for (i = 0; i < 192; i++)
405  txb[i] = 0xFF;
406 
407  txb[0] = nic->node_addr[0];
408  txb[1] = nic->node_addr[1];
409  txb[2] = nic->node_addr[2];
410  txb[3] = nic->node_addr[3];
411  txb[4] = nic->node_addr[4];
412  txb[5] = nic->node_addr[5];
413 
414  DBG ( "%s: Done sundance_reset, status: Rx %hX Tx %hX "
415  "MAC Control %hX, %hX %hX\n",
416  sdc->nic_name, (int) inl(BASE + RxStatus),
417  (int) inw(BASE + TxStatus), (int) inl(BASE + MACCtrl0),
418  (int) inw(BASE + MACCtrl1), (int) inw(BASE + MACCtrl0) );
419 }
420 
421 /**************************************************************************
422 IRQ - Wait for a frame
423 ***************************************************************************/
424 static void sundance_irq ( struct nic *nic, irq_action_t action ) {
425  unsigned int intr_status;
426 
427  switch ( action ) {
428  case DISABLE :
429  case ENABLE :
430  intr_status = inw(nic->ioaddr + IntrStatus);
431  intr_status = intr_status & ~DEFAULT_INTR;
432  if ( action == ENABLE )
433  intr_status = intr_status | DEFAULT_INTR;
434  outw(intr_status, nic->ioaddr + IntrEnable);
435  break;
436  case FORCE :
437  outw(0x0200, BASE + ASICCtrl);
438  break;
439  }
440 }
441 /**************************************************************************
442 POLL - Wait for a frame
443 ***************************************************************************/
444 static int sundance_poll(struct nic *nic, int retrieve)
445 {
446  /* return true if there's an ethernet packet ready to read */
447  /* nic->packet should contain data on return */
448  /* nic->packetlen should contain length of data */
449  int entry = sdc->cur_rx % RX_RING_SIZE;
450  u32 frame_status = le32_to_cpu(rx_ring[entry].status);
451  int intr_status;
452  int pkt_len = 0;
453 
454  if (!(frame_status & DescOwn))
455  return 0;
456 
457  /* There is a packet ready */
458  if(!retrieve)
459  return 1;
460 
461  intr_status = inw(nic->ioaddr + IntrStatus);
462  outw(intr_status, nic->ioaddr + IntrStatus);
463 
464  pkt_len = frame_status & 0x1fff;
465 
466  if (frame_status & 0x001f4000) {
467  DBG ( "Polling frame_status error\n" ); /* Do we really care about this */
468  } else {
469  if (pkt_len < rx_copybreak) {
470  /* FIXME: What should happen Will this ever occur */
471  printf("Poll Error: pkt_len < rx_copybreak");
472  } else {
473  nic->packetlen = pkt_len;
474  memcpy(nic->packet, rxb +
476 
477  }
478  }
480  rx_ring[entry].status = 0;
481  entry++;
484  nic->ioaddr + IntrStatus);
485  return 1;
486 }
487 
488 /**************************************************************************
489 TRANSMIT - Transmit a frame
490 ***************************************************************************/
491 static void sundance_transmit(struct nic *nic, const char *d, /* Destination */
492  unsigned int t, /* Type */
493  unsigned int s, /* size */
494  const char *p)
495 { /* Packet */
496  u16 nstype;
497  u32 to;
498 
499  /* Disable the Tx */
501 
502  memcpy(txb, d, ETH_ALEN);
504  nstype = htons((u16) t);
505  memcpy(txb + 2 * ETH_ALEN, (u8 *) & nstype, 2);
506  memcpy(txb + ETH_HLEN, p, s);
507 
508  s += ETH_HLEN;
509  s &= 0x0FFF;
510  while (s < ETH_ZLEN)
511  txb[s++] = '\0';
512 
513  /* Setup the transmit descriptor */
515  tx_ring[0].status = cpu_to_le32(0x00000001);
516 
517  /* Point to transmit descriptor */
519 
520  /* Enable Tx */
522  /* Trigger an immediate send */
523  outw(0, BASE + TxStatus);
524 
525  to = currticks() + TX_TIME_OUT;
526  while (!(tx_ring[0].status & 0x00010000) && (currticks() < to)); /* wait */
527 
528  if (currticks() >= to) {
529  printf("TX Time Out");
530  }
531  /* Disable Tx */
533 
534 }
535 
536 /**************************************************************************
537 DISABLE - Turn off ethernet interface
538 ***************************************************************************/
539 static void sundance_disable ( struct nic *nic __unused ) {
540  /* put the card in its initial state */
541  /* This function serves 3 purposes.
542  * This disables DMA and interrupts so we don't receive
543  * unexpected packets or interrupts from the card after
544  * etherboot has finished.
545  * This frees resources so etherboot may use
546  * this driver on another interface
547  * This allows etherboot to reinitialize the interface
548  * if something is something goes wrong.
549  */
550  outw(0x0000, BASE + IntrEnable);
551  /* Stop the Chipchips Tx and Rx Status */
553 }
554 
557  .poll = sundance_poll,
558  .transmit = sundance_transmit,
559  .irq = sundance_irq,
560 
561 };
562 
563 /**************************************************************************
564 PROBE - Look for an adapter, this routine's visible to the outside
565 ***************************************************************************/
566 static int sundance_probe ( struct nic *nic, struct pci_device *pci ) {
567 
569  u16 mii_ctl;
570  int i;
571  int speed;
572 
573  if (pci->ioaddr == 0)
574  return 0;
575 
576  /* BASE is used throughout to address the card */
577  BASE = pci->ioaddr;
578  printf(" sundance.c: Found %s Vendor=0x%hX Device=0x%hX\n",
579  pci->id->name, pci->vendor, pci->device);
580 
581  /* Get the MAC Address by reading the EEPROM */
582  for (i = 0; i < 3; i++) {
583  ((u16 *) ee_data)[i] =
585  }
586  /* Update the nic structure with the MAC Address */
587  for (i = 0; i < ETH_ALEN; i++) {
588  nic->node_addr[i] = ee_data[i];
589  }
590 
591  /* Set the card as PCI Bus Master */
592  adjust_pci_device(pci);
593 
594 // sdc->mii_if.dev = pci;
595 // sdc->mii_if.phy_id_mask = 0x1f;
596 // sdc->mii_if.reg_num_mask = 0x1f;
597 
598  /* point to private storage */
599  sdc = &sdx;
600 
601  sdc->nic_name = pci->id->name;
602  sdc->mtu = mtu;
603 
605 
606  DBG ( "Device revision id: %hx\n", sdc->pci_rev_id );
607 
608  /* Print out some hardware info */
609  DBG ( "%s: %s at ioaddr %hX, ",
610  pci->id->name, nic->node_addr, (unsigned int) BASE);
611 
613  if (1) {
614  int phy, phy_idx = 0;
615  sdc->phys[0] = 1; /* Default Setting */
617  for (phy = 1; phy < 32 && phy_idx < MII_CNT; phy++) {
618  int mii_status = mdio_read(nic, phy, MII_BMSR);
619  if (mii_status != 0xffff && mii_status != 0x0000) {
620  sdc->phys[phy_idx++] = phy;
622  mdio_read(nic, phy, MII_ADVERTISE);
623  if ((mii_status & 0x0040) == 0)
625  DBG
626  ( "%s: MII PHY found at address %d, status " "%hX advertising %hX\n", sdc->nic_name, phy, mii_status, sdc->mii_if.advertising );
627  }
628  }
630  if (phy_idx == 0)
631  printf("%s: No MII transceiver found!\n",
632  sdc->nic_name);
633  sdc->mii_if.phy_id = sdc->phys[0];
634  }
635 
636  /* Parse override configuration */
637  sdc->an_enable = 1;
638  if (strcasecmp(media, "autosense") != 0) {
639  sdc->an_enable = 0;
640  if (strcasecmp(media, "100mbps_fd") == 0 ||
641  strcasecmp(media, "4") == 0) {
642  sdc->speed = 100;
643  sdc->mii_if.full_duplex = 1;
644  } else if (strcasecmp(media, "100mbps_hd") == 0
645  || strcasecmp(media, "3") == 0) {
646  sdc->speed = 100;
647  sdc->mii_if.full_duplex = 0;
648  } else if (strcasecmp(media, "10mbps_fd") == 0 ||
649  strcasecmp(media, "2") == 0) {
650  sdc->speed = 10;
651  sdc->mii_if.full_duplex = 1;
652  } else if (strcasecmp(media, "10mbps_hd") == 0 ||
653  strcasecmp(media, "1") == 0) {
654  sdc->speed = 10;
655  sdc->mii_if.full_duplex = 0;
656  } else {
657  sdc->an_enable = 1;
658  }
659  }
660  if (flowctrl == 1)
661  sdc->flowctrl = 1;
662 
663  /* Fibre PHY? */
664  if (inl(BASE + ASICCtrl) & 0x80) {
665  /* Default 100Mbps Full */
666  if (sdc->an_enable) {
667  sdc->speed = 100;
668  sdc->mii_if.full_duplex = 1;
669  sdc->an_enable = 0;
670  }
671  }
672 
673  /* The Linux driver uses flow control and resets the link here. This means the
674  mii section from above would need to be re done I believe. Since it serves
675  no real purpose leave it out. */
676 
677  /* Force media type */
678  if (!sdc->an_enable) {
679  mii_ctl = 0;
680  mii_ctl |= (sdc->speed == 100) ? BMCR_SPEED100 : 0;
681  mii_ctl |= (sdc->mii_if.full_duplex) ? BMCR_FULLDPLX : 0;
682  mdio_write(nic, sdc->phys[0], MII_BMCR, mii_ctl);
683  printf("Override speed=%d, %s duplex\n",
684  sdc->speed,
685  sdc->mii_if.full_duplex ? "Full" : "Half");
686  }
687 
688  /* Reset the chip to erase previous misconfiguration */
689  DBG ( "ASIC Control is %#x\n", inl(BASE + ASICCtrl) );
690  outw(0x007f, BASE + ASICCtrl + 2);
691 
692  /*
693  * wait for reset to complete
694  * this is heavily inspired by the linux sundance driver
695  * according to the linux driver it can take up to 1ms for the reset
696  * to complete
697  */
698  i = 0;
699  while(inl(BASE + ASICCtrl) & (ResetBusy << 16)) {
700  if(i++ >= 10) {
701  DBG("sundance: NIC reset did not complete.\n");
702  break;
703  }
704  udelay(100);
705  }
706 
707  DBG ( "ASIC Control is now %#x.\n", inl(BASE + ASICCtrl) );
708 
710  if (sdc->an_enable) {
711  u16 mii_advertise, mii_lpa;
712  mii_advertise =
714  mii_lpa = mdio_read(nic, sdc->phys[0], MII_LPA);
715  mii_advertise &= mii_lpa;
716  if (mii_advertise & ADVERTISE_100FULL)
717  sdc->speed = 100;
718  else if (mii_advertise & ADVERTISE_100HALF)
719  sdc->speed = 100;
720  else if (mii_advertise & ADVERTISE_10FULL)
721  sdc->speed = 10;
722  else if (mii_advertise & ADVERTISE_10HALF)
723  sdc->speed = 10;
724  } else {
725  mii_ctl = mdio_read(nic, sdc->phys[0], MII_BMCR);
726  speed = (mii_ctl & BMCR_SPEED100) ? 100 : 10;
727  sdc->speed = speed;
728  printf("%s: Link changed: %dMbps ,", sdc->nic_name, speed);
729  printf("%s duplex.\n", (mii_ctl & BMCR_FULLDPLX) ?
730  "full" : "half");
731  }
732  check_duplex(nic);
733  if (sdc->flowctrl && sdc->mii_if.full_duplex) {
734  outw(inw(BASE + MulticastFilter1 + 2) | 0x0200,
735  BASE + MulticastFilter1 + 2);
737  }
738  printf("%dMbps, %s-Duplex\n", sdc->speed,
739  sdc->mii_if.full_duplex ? "Full" : "Half");
740 
741  /* point to NIC specific routines */
743 
744  nic->irqno = pci->irq;
745  nic->ioaddr = BASE;
746 
747  return 1;
748 }
749 
750 
751 /* Read the EEPROM and MII Management Data I/O (MDIO) interfaces. */
752 static int eeprom_read(long ioaddr, int location)
753 {
754  int boguscnt = 10000; /* Typical 1900 ticks */
755  outw(0x0200 | (location & 0xff), ioaddr + EECtrl);
756  do {
757  if (!(inw(ioaddr + EECtrl) & 0x8000)) {
758  return inw(ioaddr + EEData);
759  }
760  }
761  while (--boguscnt > 0);
762  return 0;
763 }
764 
765 /* MII transceiver control section.
766  Read and write the MII registers using software-generated serial
767  MDIO protocol. See the MII specifications or DP83840A data sheet
768  for details.
769 
770  The maximum data clock rate is 2.5 Mhz.
771  The timing is decoupled from the processor clock by flushing the write
772  from the CPU write buffer with a following read, and using PCI
773  transaction time. */
774 
775 #define mdio_in(mdio_addr) inb(mdio_addr)
776 #define mdio_out(value, mdio_addr) outb(value, mdio_addr)
777 #define mdio_delay(mdio_addr) inb(mdio_addr)
778 
780  MDIO_ShiftClk = 0x0001, MDIO_Data = 0x0002, MDIO_EnbOutput =
781  0x0004,
782 };
783 #define MDIO_EnbIn (0)
784 #define MDIO_WRITE0 (MDIO_EnbOutput)
785 #define MDIO_WRITE1 (MDIO_Data | MDIO_EnbOutput)
786 
787 /* Generate the preamble required for initial synchronization and
788  a few older transceivers. */
789 static void mdio_sync(long mdio_addr)
790 {
791  int bits = 32;
792 
793  /* Establish sync by sending at least 32 logic ones. */
794  while (--bits >= 0) {
795  mdio_out(MDIO_WRITE1, mdio_addr);
796  mdio_delay(mdio_addr);
797  mdio_out(MDIO_WRITE1 | MDIO_ShiftClk, mdio_addr);
798  mdio_delay(mdio_addr);
799  }
800 }
801 
802 static int
803 mdio_read(struct nic *nic __unused, int phy_id, unsigned int location)
804 {
805  long mdio_addr = BASE + MIICtrl;
806  int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
807  int i, retval = 0;
808 
810  mdio_sync(mdio_addr);
811 
812  /* Shift the read command bits out. */
813  for (i = 15; i >= 0; i--) {
814  int dataval =
815  (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
816 
817  mdio_out(dataval, mdio_addr);
818  mdio_delay(mdio_addr);
819  mdio_out(dataval | MDIO_ShiftClk, mdio_addr);
820  mdio_delay(mdio_addr);
821  }
822  /* Read the two transition, 16 data, and wire-idle bits. */
823  for (i = 19; i > 0; i--) {
824  mdio_out(MDIO_EnbIn, mdio_addr);
825  mdio_delay(mdio_addr);
826  retval = (retval << 1) | ((mdio_in(mdio_addr) & MDIO_Data)
827  ? 1 : 0);
828  mdio_out(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);
829  mdio_delay(mdio_addr);
830  }
831  return (retval >> 1) & 0xffff;
832 }
833 
834 static void
835 mdio_write(struct nic *nic __unused, int phy_id,
836  unsigned int location, int value)
837 {
838  long mdio_addr = BASE + MIICtrl;
839  int mii_cmd =
840  (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
841  int i;
842 
844  mdio_sync(mdio_addr);
845 
846  /* Shift the command bits out. */
847  for (i = 31; i >= 0; i--) {
848  int dataval =
849  (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
850  mdio_out(dataval, mdio_addr);
851  mdio_delay(mdio_addr);
852  mdio_out(dataval | MDIO_ShiftClk, mdio_addr);
853  mdio_delay(mdio_addr);
854  }
855  /* Clear out extra bits. */
856  for (i = 2; i > 0; i--) {
857  mdio_out(MDIO_EnbIn, mdio_addr);
858  mdio_delay(mdio_addr);
859  mdio_out(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);
860  mdio_delay(mdio_addr);
861  }
862  return;
863 }
864 
865 static void set_rx_mode(struct nic *nic __unused)
866 {
867  int i;
868  u16 mc_filter[4]; /* Multicast hash filter */
869  u32 rx_mode;
870 
871  memset(mc_filter, 0xff, sizeof(mc_filter));
873 
874  if (sdc->mii_if.full_duplex && sdc->flowctrl)
875  mc_filter[3] |= 0x0200;
876  for (i = 0; i < 4; i++)
877  outw(mc_filter[i], BASE + MulticastFilter0 + i * 2);
878  outb(rx_mode, BASE + RxMode);
879  return;
880 }
881 
882 static struct pci_device_id sundance_nics[] = {
883  PCI_ROM(0x13f0, 0x0201, "sundance", "ST201 Sundance 'Alta' based Adaptor", 0),
884  PCI_ROM(0x1186, 0x1002, "dfe530txs", "D-Link DFE530TXS (Sundance ST201 Alta)", 0),
885  PCI_ROM(0x13f0, 0x0200, "ip100a", "IC+ IP100A", 0),
886 };
887 
888 PCI_DRIVER ( sundance_driver, sundance_nics, PCI_NO_CLASS );
889 
890 DRIVER ( "SUNDANCE/PCI", nic_driver, pci_driver, sundance_driver,
892 
893 /*
894  * Local variables:
895  * c-basic-offset: 8
896  * c-indent-level: 8
897  * tab-width: 8
898  * End:
899  */
unsigned char irqno
Definition: nic.h:56
u32 next_desc
Definition: sundance.c:208
#define MII_ADVERTISE
Definition: atl1e.h:875
uint16_t u16
Definition: stdint.h:21
#define MDIO_WRITE0
Definition: sundance.c:784
int phy_id
Definition: mii.h:143
Definition: nic.h:35
#define MII_LPA
Definition: atl1e.h:876
uint8_t irq
Interrupt number.
Definition: pci.h:208
static void sundance_reset(struct nic *nic)
Definition: sundance.c:364
#define rxb
Definition: sundance.c:240
static int sundance_probe(struct nic *nic, struct pci_device *pci)
Definition: sundance.c:566
int printf(const char *fmt,...)
Write a formatted string to the console.
Definition: vsprintf.c:464
static void init_ring(struct nic *nic __unused)
Definition: sundance.c:322
uint16_t inw(volatile uint16_t *io_addr)
Read 16-bit word from I/O-mapped device.
#define EEPROM_SIZE
Definition: sundance.c:245
A PCI driver.
Definition: pci.h:224
unsigned int full_duplex
Definition: mii.h:148
rx_mode_bits
Definition: sundance.c:187
int mii_preamble_required
Definition: sundance.c:272
#define EEPROM_SA_OFFSET
Definition: sundance.c:280
static void sundance_irq(struct nic *nic, irq_action_t action)
Definition: sundance.c:424
#define ADVERTISE_10FULL
Definition: mii.h:74
#define le32_to_cpu(value)
Definition: byteswap.h:113
#define outw(data, io_addr)
Definition: io.h:319
#define TX_RING_SIZE
Definition: sundance.c:92
unsigned long ioaddr
I/O address.
Definition: pci.h:200
#define mdio_out(value, mdio_addr)
Definition: sundance.c:776
const char * nic_name
Definition: sundance.c:258
static struct netdev_desc tx_ring[TX_RING_SIZE]
Definition: sundance.c:229
#define TX_TIME_OUT
Definition: sundance.c:99
static void sundance_transmit(struct nic *nic, const char *d, unsigned int t, unsigned int s, const char *p)
Definition: sundance.c:491
unsigned char pci_rev_id
Definition: sundance.c:274
static unsigned char ee_data[EEPROM_SIZE]
Definition: davicom.c:67
#define ADVERTISE_100FULL
Definition: mii.h:78
unsigned int flowctrl
Definition: sundance.c:265
static struct netdev_desc rx_ring[RX_RING_SIZE]
Definition: sundance.c:232
int strcasecmp(const char *first, const char *second)
Compare case-insensitive strings.
Definition: string.c:192
FILE_LICENCE(GPL2_OR_LATER)
static void mdio_sync(long mdio_addr)
Definition: sundance.c:789
static int flowctrl
Definition: sundance.c:75
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:149
int dummy_connect(struct nic *nic __unused)
Definition: legacy.c:151
void writeb(uint8_t data, volatile uint8_t *io_addr)
Write byte to memory-mapped device.
static void set_rx_mode(struct nic *nic)
DRIVER("SUNDANCE/PCI", nic_driver, pci_driver, sundance_driver, sundance_probe, sundance_disable)
uint8_t status
Status.
Definition: ena.h:16
ASICCtrl_HiWord_bit
Definition: sundance.c:166
static u32 BASE
Definition: sundance.c:244
#define MII_CNT
Definition: sundance.c:256
static unsigned long ioaddr
Definition: davicom.c:129
void * memcpy(void *dest, const void *src, size_t len) __nonnull
unsigned int ioaddr
Definition: nic.h:55
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
uint16_t device
Device ID.
Definition: pci.h:204
static struct sundance_private sdx
#define ETH_HLEN
Definition: if_ether.h:9
#define RX_RING_SIZE
Definition: sundance.c:94
static void sundance_disable(struct nic *nic __unused)
Definition: sundance.c:539
pci_id_flags_bits
Definition: sundance.c:247
void udelay(unsigned long usecs)
Delay for a fixed number of microseconds.
Definition: timer.c:60
intr_status_bits
Definition: sundance.c:178
irq_action_t
Definition: nic.h:34
static int mtu
Definition: sundance.c:64
unsigned int mtu
Definition: sundance.c:262
static struct sundance_private * sdc
Definition: sundance.c:277
#define cpu_to_le32(value)
Definition: byteswap.h:107
pseudo_bit_t value[0x00020]
Definition: arbel.h:13
chip_capability_flags
Definition: sundance.c:253
static int sundance_poll(struct nic *nic, int retrieve)
Definition: sundance.c:444
unsigned int packetlen
Definition: nic.h:54
static int rx_copybreak
Definition: sundance.c:74
mii_reg_bits
Definition: sundance.c:779
alta_offsets
Definition: sundance.c:110
unsigned int an_enable
Definition: sundance.c:266
desc_status_bits
Definition: sundance.c:215
union aes_table_entry entry[256]
Table entries, indexed by S(N)
Definition: aes.c:26
#define outl(data, io_addr)
Definition: io.h:329
PCI bus.
A PCI device.
Definition: pci.h:187
#define PKT_BUF_SZ
Definition: sundance.c:100
#define mdio_delay(mdio_addr)
Definition: sundance.c:777
#define MII_BMCR
Definition: atl1e.h:871
#define mdio_in(mdio_addr)
Definition: sundance.c:775
#define ETH_ALEN
Definition: if_ether.h:8
#define ETH_ZLEN
Definition: if_ether.h:10
A PCI device ID list entry.
Definition: pci.h:151
Definition: nic.h:37
#define le16_to_cpu(value)
Definition: byteswap.h:112
Definition: nic.h:49
const char * name
Name.
Definition: pci.h:153
static void mdio_write(struct nic *nic, int phy_id, unsigned int location, int value)
uint16_t vendor
Vendor ID.
Definition: pci.h:202
static struct nic_operations sundance_operations
Definition: sundance.c:555
#define txb
Definition: sundance.c:241
u32 length
Definition: sundance.c:211
unsigned long retval
Definition: xen.h:45
#define __unused
Declare a variable or data structure as unused.
Definition: compiler.h:573
Definition: nic.h:36
unsigned char * packet
Definition: nic.h:53
duplex
Definition: nic.h:40
#define DEFAULT_INTR
Definition: sundance.c:281
unsigned char * node_addr
Definition: nic.h:52
#define outb(data, io_addr)
Definition: io.h:309
static void check_duplex(struct nic *nic)
Definition: sundance.c:291
int advertising
Definition: mii.h:144
static volatile void * bits
Definition: bitops.h:27
Media Independent Interface constants.
static struct pci_device_id sundance_nics[]
Definition: sundance.c:882
mac_ctrl0_bits
Definition: sundance.c:193
#define ADVERTISE_10HALF
Definition: mii.h:72
mac_ctrl1_bits
Definition: sundance.c:197
uint32_t inl(volatile uint32_t *io_addr)
Read 32-bit dword from I/O-mapped device.
struct pci_device_id * id
Driver device ID.
Definition: pci.h:220
#define virt_to_le32desc(addr)
Definition: sundance.c:60
struct mii_if_info mii_if
Definition: sundance.c:271
static char media[]
Definition: sundance.c:85
#define PCI_REVISION
PCI revision.
Definition: pci.h:43
static int eeprom_read(long ioaddr, int location)
Definition: sundance.c:752
PCI_DRIVER(sundance_driver, sundance_nics, PCI_NO_CLASS)
#define ADVERTISE_100HALF
Definition: mii.h:76
static int mdio_read(struct nic *nic, int phy_id, unsigned int location)
unsigned long currticks(void)
Get current system time in ticks.
Definition: timer.c:42
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
struct nic_operations * nic_op
Definition: nic.h:50
unsigned int cur_rx
Definition: sundance.c:261
#define MII_BMSR
Definition: atl1e.h:872
u32 status
Definition: sundance.c:209
unsigned int speed
Definition: sundance.c:268
#define BMCR_SPEED100
Definition: mii.h:48
unsigned char phys[MII_CNT]
Definition: sundance.c:273
int(* connect)(struct nic *)
Definition: nic.h:63
struct @335 __shared
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:283
#define htons(value)
Definition: byteswap.h:135
uint8_t u8
Definition: stdint.h:19
uint32_t u32
Definition: stdint.h:23
#define MDIO_WRITE1
Definition: sundance.c:785
#define BMCR_FULLDPLX
Definition: mii.h:43
#define MDIO_EnbIn
Definition: sundance.c:783
void * memset(void *dest, int character, size_t len) __nonnull
int pci_read_config_byte(struct pci_device *pci, unsigned int where, uint8_t *value)
Read byte from PCI configuration space.