iPXE
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#include "etherboot.h"
#include <errno.h>
#include "nic.h"
#include <ipxe/isa.h>
#include <ipxe/ethernet.h>
Go to the source code of this file.
Macros | |
#define | LAN595 0 |
#define | LAN595TX 1 |
#define | LAN595FX 2 |
#define | LAN595FX_10ISA 3 |
#define | SLOW_DOWN inb(0x80); |
#define | SA_ADDR0 0x00 /* Etherexpress Pro/10 */ |
#define | SA_ADDR1 0xaa |
#define | SA_ADDR2 0x00 |
#define | GetBit(x, y) ((x & (1<<y))>>y) |
#define | ee_PnP 0 /* Plug 'n Play enable bit */ |
#define | ee_Word1 1 /* Word 1? */ |
#define | ee_BusWidth 2 /* 8/16 bit */ |
#define | ee_FlashAddr 3 /* Flash Address */ |
#define | ee_FlashMask 0x7 /* Mask */ |
#define | ee_AutoIO 6 /* */ |
#define | ee_reserved0 7 /* =0! */ |
#define | ee_Flash 8 /* Flash there? */ |
#define | ee_AutoNeg 9 /* Auto Negotiation enabled? */ |
#define | ee_IO0 10 /* IO Address LSB */ |
#define | ee_IO0Mask 0x /*...*/ |
#define | ee_IO1 15 /* IO MSB */ |
#define | ee_IntSel 0 /* Interrupt */ |
#define | ee_IntMask 0x7 |
#define | ee_LI 3 /* Link Integrity 0= enabled */ |
#define | ee_PC 4 /* Polarity Correction 0= enabled */ |
#define | ee_TPE_AUI 5 /* PortSelection 1=TPE */ |
#define | ee_Jabber 6 /* Jabber prevention 0= enabled */ |
#define | ee_AutoPort 7 /* Auto Port Selection 1= Disabled */ |
#define | ee_SMOUT 8 /* SMout Pin Control 0= Input */ |
#define | ee_PROM 9 /* Flash EPROM / PROM 0=Flash */ |
#define | ee_reserved1 10 /* .. 12 =0! */ |
#define | ee_AltReady 13 /* Alternate Ready, 0=normal */ |
#define | ee_reserved2 14 /* =0! */ |
#define | ee_Duplex 15 |
#define | ee_IA5 0 /*bit start for individual Addr Byte 5 */ |
#define | ee_IA4 8 /*bit start for individual Addr Byte 5 */ |
#define | ee_IA3 0 /*bit start for individual Addr Byte 5 */ |
#define | ee_IA2 8 /*bit start for individual Addr Byte 5 */ |
#define | ee_IA1 0 /*bit start for individual Addr Byte 5 */ |
#define | ee_IA0 8 /*bit start for individual Addr Byte 5 */ |
#define | ee_BNC_TPE 0 /* 0=TPE */ |
#define | ee_BootType 1 /* 00=None, 01=IPX, 10=ODI, 11=NDIS */ |
#define | ee_BootTypeMask 0x3 |
#define | ee_NumConn 3 /* Number of Connections 0= One or Two */ |
#define | ee_FlashSock 4 /* Presence of Flash Socket 0= Present */ |
#define | ee_PortTPE 5 |
#define | ee_PortBNC 6 |
#define | ee_PortAUI 7 |
#define | ee_PowerMgt 10 /* 0= disabled */ |
#define | ee_CP 13 /* Concurrent Processing */ |
#define | ee_CPMask 0x7 |
#define | ee_Stepping 0 /* Stepping info */ |
#define | ee_StepMask 0x0F |
#define | ee_BoardID 4 /* Manucaturer Board ID, reserved */ |
#define | ee_BoardMask 0x0FFF |
#define | ee_INT_TO_IRQ 0 /* int to IRQ Mapping = 0x1EB8 for Pro/10+ */ |
#define | ee_FX_INT2IRQ 0x1EB8 /* the _only_ mapping allowed for FX chips */ |
#define | ee_SIZE 0x40 /* total EEprom Size */ |
#define | ee_Checksum 0xBABA /* initial and final value for adding checksum */ |
#define | ee_addr_vendor 0x10 /* Word offset for EISA Vendor ID */ |
#define | ee_addr_id 0x11 /* Word offset for Card ID */ |
#define | ee_addr_SN 0x12 /* Serial Number */ |
#define | ee_addr_CRC_8 0x14 /* CRC over last thee Bytes */ |
#define | ee_vendor_intel0 0x25 /* Vendor ID Intel */ |
#define | ee_vendor_intel1 0xD4 |
#define | ee_id_eepro10p0 0x10 /* ID for eepro/10+ */ |
#define | ee_id_eepro10p1 0x31 |
#define | RAM_SIZE 0x8000 |
#define | RCV_HEADER 8 |
#define | RCV_DEFAULT_RAM 0x6000 |
#define | RCV_RAM rcv_ram |
#define | XMT_HEADER 8 |
#define | XMT_RAM (RAM_SIZE - RCV_RAM) |
#define | XMT_START ((rcv_start + RCV_RAM) % RAM_SIZE) |
#define | RCV_LOWER_LIMIT (rcv_start >> 8) |
#define | RCV_UPPER_LIMIT (((rcv_start + RCV_RAM) - 2) >> 8) |
#define | XMT_LOWER_LIMIT (XMT_START >> 8) |
#define | XMT_UPPER_LIMIT (((XMT_START + XMT_RAM) - 2) >> 8) |
#define | RCV_START_PRO 0x00 |
#define | RCV_START_10 XMT_RAM |
#define | RCV_DONE 0x0008 |
#define | RX_OK 0x2000 |
#define | RX_ERROR 0x0d81 |
#define | TX_DONE_BIT 0x0080 |
#define | CHAIN_BIT 0x8000 |
#define | XMT_STATUS 0x02 |
#define | XMT_CHAIN 0x04 |
#define | XMT_COUNT 0x06 |
#define | BANK0_SELECT 0x00 |
#define | BANK1_SELECT 0x40 |
#define | BANK2_SELECT 0x80 |
#define | COMMAND_REG 0x00 /* Register 0 */ |
#define | MC_SETUP 0x03 |
#define | XMT_CMD 0x04 |
#define | DIAGNOSE_CMD 0x07 |
#define | RCV_ENABLE_CMD 0x08 |
#define | RCV_DISABLE_CMD 0x0a |
#define | STOP_RCV_CMD 0x0b |
#define | RESET_CMD 0x0e |
#define | POWER_DOWN_CMD 0x18 |
#define | RESUME_XMT_CMD 0x1c |
#define | SEL_RESET_CMD 0x1e |
#define | STATUS_REG 0x01 /* Register 1 */ |
#define | RX_INT 0x02 |
#define | TX_INT 0x04 |
#define | EXEC_STATUS 0x30 |
#define | ID_REG 0x02 /* Register 2 */ |
#define | R_ROBIN_BITS 0xc0 /* round robin counter */ |
#define | ID_REG_MASK 0x2c |
#define | ID_REG_SIG 0x24 |
#define | AUTO_ENABLE 0x10 |
#define | INT_MASK_REG 0x03 /* Register 3 */ |
#define | RX_STOP_MASK 0x01 |
#define | RX_MASK 0x02 |
#define | TX_MASK 0x04 |
#define | EXEC_MASK 0x08 |
#define | ALL_MASK 0x0f |
#define | IO_32_BIT 0x10 |
#define | RCV_BAR 0x04 /* The following are word (16-bit) registers */ |
#define | RCV_STOP 0x06 |
#define | XMT_BAR_PRO 0x0a |
#define | XMT_BAR_10 0x0b |
#define | HOST_ADDRESS_REG 0x0c |
#define | IO_PORT 0x0e |
#define | IO_PORT_32_BIT 0x0c |
#define | REG1 0x01 |
#define | WORD_WIDTH 0x02 |
#define | INT_ENABLE 0x80 |
#define | INT_NO_REG 0x02 |
#define | RCV_LOWER_LIMIT_REG 0x08 |
#define | RCV_UPPER_LIMIT_REG 0x09 |
#define | XMT_LOWER_LIMIT_REG_PRO 0x0a |
#define | XMT_UPPER_LIMIT_REG_PRO 0x0b |
#define | XMT_LOWER_LIMIT_REG_10 0x0b |
#define | XMT_UPPER_LIMIT_REG_10 0x0a |
#define | XMT_Chain_Int 0x20 /* Interrupt at the end of the transmit chain */ |
#define | XMT_Chain_ErrStop 0x40 /* Interrupt at the end of the chain even if there are errors */ |
#define | RCV_Discard_BadFrame 0x80 /* Throw bad frames away, and continue to receive others */ |
#define | REG2 0x02 |
#define | PRMSC_Mode 0x01 |
#define | Multi_IA 0x20 |
#define | REG3 0x03 |
#define | TPE_BIT 0x04 |
#define | BNC_BIT 0x20 |
#define | REG13 0x0d |
#define | FDX 0x00 |
#define | A_N_ENABLE 0x02 |
#define | I_ADD_REG0 0x04 |
#define | I_ADD_REG1 0x05 |
#define | I_ADD_REG2 0x06 |
#define | I_ADD_REG3 0x07 |
#define | I_ADD_REG4 0x08 |
#define | I_ADD_REG5 0x09 |
#define | EEPROM_REG_PRO 0x0a |
#define | EEPROM_REG_10 0x0b |
#define | EESK 0x01 |
#define | EECS 0x02 |
#define | EEDI 0x04 |
#define | EEDO 0x08 |
#define | eeprom_delay() { udelay(40); } |
#define | EE_READ_CMD (6 << 6) |
#define | eepro_full_reset(ioaddr) outb(RESET_CMD, ioaddr); udelay(255); |
#define | eepro_sel_reset(ioaddr) |
#define | eepro_clear_int(ioaddr) outb(ALL_MASK, ioaddr + STATUS_REG) |
#define | eepro_en_rx(ioaddr) outb(RCV_ENABLE_CMD, ioaddr) |
#define | eepro_dis_rx(ioaddr) outb(RCV_DISABLE_CMD, ioaddr) |
#define | eepro_sw2bank0(ioaddr) outb(BANK0_SELECT, ioaddr) |
#define | eepro_sw2bank1(ioaddr) outb(BANK1_SELECT, ioaddr) |
#define | eepro_sw2bank2(ioaddr) outb(BANK2_SELECT, ioaddr) |
Functions | |
FILE_LICENCE (GPL2_OR_LATER) | |
static void | eepro_reset (struct nic *nic) |
static int | eepro_poll (struct nic *nic, int retrieve) |
static void | eepro_transmit (struct nic *nic, const char *d, unsigned int t, unsigned int s, const char *p) |
static void | eepro_disable (struct nic *nic, struct isa_device *isa __unused) |
static void | eepro_irq (struct nic *nic __unused, irq_action_t action __unused) |
static int | read_eeprom (uint16_t ioaddr, int location) |
static int | eepro_probe1 (isa_probe_addr_t ioaddr) |
static int | eepro_probe (struct nic *nic, struct isa_device *isa) |
ISA_DRIVER (eepro_driver, eepro_probe_addrs, eepro_probe1, GENERIC_ISAPNP_VENDOR, 0x828a) | |
DRIVER ("eepro", nic_driver, isa_driver, eepro_driver, eepro_probe, eepro_disable) | |
ISA_ROM ("eepro", "Intel Etherexpress Pro/10") | |
Variables | |
static unsigned | rcv_ram = RCV_DEFAULT_RAM |
static unsigned | rcv_start = RCV_START_PRO |
static unsigned | xmt_bar = XMT_BAR_PRO |
static unsigned | xmt_lower_limit_reg = XMT_LOWER_LIMIT_REG_PRO |
static unsigned | xmt_upper_limit_reg = XMT_UPPER_LIMIT_REG_PRO |
static unsigned | eeprom_reg = EEPROM_REG_PRO |
static unsigned int | rx_start |
static unsigned int | tx_start |
static int | tx_last |
static unsigned int | tx_end |
static int | eepro = 0 |
static unsigned int | mem_start |
static unsigned int | mem_end = RCV_DEFAULT_RAM / 1024 |
static struct nic_operations | eepro_operations |
static isa_probe_addr_t | eepro_probe_addrs [] |
#define ee_BootType 1 /* 00=None, 01=IPX, 10=ODI, 11=NDIS */ |
#define ee_NumConn 3 /* Number of Connections 0= One or Two */ |
#define ee_FlashSock 4 /* Presence of Flash Socket 0= Present */ |
#define ee_INT_TO_IRQ 0 /* int to IRQ Mapping = 0x1EB8 for Pro/10+ */ |
#define ee_FX_INT2IRQ 0x1EB8 /* the _only_ mapping allowed for FX chips */ |
#define ee_Checksum 0xBABA /* initial and final value for adding checksum */ |
#define ee_addr_vendor 0x10 /* Word offset for EISA Vendor ID */ |
#define RCV_BAR 0x04 /* The following are word (16-bit) registers */ |
#define XMT_Chain_Int 0x20 /* Interrupt at the end of the transmit chain */ |
#define XMT_Chain_ErrStop 0x40 /* Interrupt at the end of the chain even if there are errors */ |
#define RCV_Discard_BadFrame 0x80 /* Throw bad frames away, and continue to receive others */ |
#define eepro_sel_reset | ( | ioaddr | ) |
#define eepro_clear_int | ( | ioaddr | ) | outb(ALL_MASK, ioaddr + STATUS_REG) |
#define eepro_dis_rx | ( | ioaddr | ) | outb(RCV_DISABLE_CMD, ioaddr) |
FILE_LICENCE | ( | GPL2_OR_LATER | ) |
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Definition at line 310 of file eepro.c.
References DBG, eepro_clear_int, eepro_en_rx, eepro_sel_reset, eepro_sw2bank0, eepro_sw2bank1, eepro_sw2bank2, eeprom_reg, ETH_ALEN, HOST_ADDRESS_REG, I_ADD_REG0, inb(), IO_PORT, nic::ioaddr, nic::node_addr, outb, outw, RCV_BAR, RCV_Discard_BadFrame, RCV_LOWER_LIMIT, RCV_LOWER_LIMIT_REG, RCV_STOP, RCV_UPPER_LIMIT, RCV_UPPER_LIMIT_REG, REG1, REG2, REG3, rx_start, tx_end, tx_last, tx_start, xmt_bar, XMT_Chain_ErrStop, XMT_Chain_Int, XMT_LOWER_LIMIT, xmt_lower_limit_reg, XMT_UPPER_LIMIT, and xmt_upper_limit_reg.
Referenced by eepro_probe().
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Definition at line 356 of file eepro.c.
References HOST_ADDRESS_REG, inb(), insw(), inw(), IO_PORT, nic::ioaddr, outb, outw, nic::packet, nic::packetlen, printf(), putchar(), RCV_DONE, RCV_HEADER, RCV_STOP, RCV_UPPER_LIMIT, RX_ERROR, RX_OK, rx_start, and STATUS_REG.
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Definition at line 417 of file eepro.c.
References assert(), DBG, end, ETH_ALEN, ETH_HLEN, HOST_ADDRESS_REG, htons, inw(), IO_PORT, nic::ioaddr, length, nic::node_addr, outb, outsw(), outw, printf(), status, TX_DONE_BIT, tx_end, tx_last, tx_start, type, udelay(), xmt_bar, XMT_CMD, XMT_HEADER, XMT_LOWER_LIMIT, XMT_RAM, and XMT_UPPER_LIMIT.
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Definition at line 477 of file eepro.c.
References eepro_full_reset, eepro_sw2bank0, nic::ioaddr, outb, STOP_RCV_CMD, tx_end, tx_last, tx_start, and XMT_LOWER_LIMIT.
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Definition at line 502 of file eepro.c.
References EE_READ_CMD, EECS, EEDI, EEDO, eepro, eepro_sw2bank0, eepro_sw2bank1, eepro_sw2bank2, eeprom_delay, eeprom_reg, EESK, inb(), ioaddr, LAN595FX_10ISA, outb, read_cmd, retval, and STATUS_REG.
Referenced by eepro_probe().
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Definition at line 543 of file eepro.c.
References id, ID_REG, ID_REG_MASK, ID_REG_SIG, inb(), ioaddr, and R_ROBIN_BITS.
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Definition at line 567 of file eepro.c.
References bswap_16, DBG, ee_BNC_TPE, ee_FX_INT2IRQ, eepro, eepro_operations, eepro_reset(), eeprom_reg, EEPROM_REG_10, ETH_ALEN, eth_ntoa(), GetBit, isa_device::ioaddr, nic::ioaddr, nic::irqno, LAN595FX_10ISA, mem_end, mem_start, name, nic::nic_op, nic::node_addr, printf(), RCV_LOWER_LIMIT, rcv_ram, rcv_start, RCV_START_10, RCV_UPPER_LIMIT, read_eeprom(), SA_ADDR1, xmt_lower_limit_reg, XMT_LOWER_LIMIT_REG_10, xmt_upper_limit_reg, and XMT_UPPER_LIMIT_REG_10.
ISA_DRIVER | ( | eepro_driver | , |
eepro_probe_addrs | , | ||
eepro_probe1 | , | ||
GENERIC_ISAPNP_VENDOR | , | ||
0x828a | |||
) |
DRIVER | ( | "eepro" | , |
nic_driver | , | ||
isa_driver | , | ||
eepro_driver | , | ||
eepro_probe | , | ||
eepro_disable | |||
) |
ISA_ROM | ( | "eepro" | , |
"Intel Etherexpress Pro/10" | |||
) |
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Definition at line 154 of file eepro.c.
Referenced by eepro_probe().
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Definition at line 169 of file eepro.c.
Referenced by eepro_probe().
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Definition at line 218 of file eepro.c.
Referenced by eepro_reset(), and eepro_transmit().
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Definition at line 236 of file eepro.c.
Referenced by eepro_probe(), and eepro_reset().
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Definition at line 237 of file eepro.c.
Referenced by eepro_probe(), and eepro_reset().
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Definition at line 262 of file eepro.c.
Referenced by eepro_probe(), eepro_reset(), and read_eeprom().
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Definition at line 301 of file eepro.c.
Referenced by eepro_poll(), and eepro_reset().
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Definition at line 301 of file eepro.c.
Referenced by eepro_disable(), eepro_reset(), and eepro_transmit().
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Definition at line 302 of file eepro.c.
Referenced by eepro_disable(), eepro_reset(), and eepro_transmit().
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Definition at line 303 of file eepro.c.
Referenced by eepro_disable(), eepro_reset(), and eepro_transmit().
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Definition at line 304 of file eepro.c.
Referenced by eepro_probe(), and read_eeprom().
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Definition at line 305 of file eepro.c.
Referenced by eepro_probe().
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Definition at line 305 of file eepro.c.
Referenced by eepro_probe().
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Definition at line 556 of file eepro.c.
Referenced by eepro_probe().
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