iPXE
vxge_traffic.c
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1 /*
2  * vxge-traffic.c: iPXE driver for Neterion Inc's X3100 Series 10GbE
3  * PCIe I/O Virtualized Server Adapter.
4  *
5  * Copyright(c) 2002-2010 Neterion Inc.
6  *
7  * This software may be used and distributed according to the terms of
8  * the GNU General Public License (GPL), incorporated herein by
9  * reference. Drivers based on or derived from this code fall under
10  * the GPL and must retain the authorship, copyright and license
11  * notice.
12  *
13  */
14 
15 FILE_LICENCE(GPL2_ONLY);
16 
17 #include <ipxe/netdevice.h>
18 #include <errno.h>
19 
20 #include "vxge_traffic.h"
21 #include "vxge_config.h"
22 #include "vxge_main.h"
23 
24 /*
25  * vxge_hw_vpath_intr_enable - Enable vpath interrupts.
26  * @vpath: Virtual Path handle.
27  *
28  * Enable vpath interrupts. The function is to be executed the last in
29  * vpath initialization sequence.
30  *
31  * See also: vxge_hw_vpath_intr_disable()
32  */
33 enum vxge_hw_status
35 {
36  struct vxge_hw_vpath_reg *vp_reg;
38 
39  if (vpath->vp_open == VXGE_HW_VP_NOT_OPEN) {
41  goto exit;
42  }
43 
44  vp_reg = vpath->vp_reg;
45 
47 
49  &vp_reg->general_errors_reg);
50 
52  &vp_reg->pci_config_errors_reg);
53 
55  &vp_reg->mrpcim_to_vpath_alarm_reg);
56 
58  &vp_reg->srpcim_to_vpath_alarm_reg);
59 
61  &vp_reg->vpath_ppif_int_status);
62 
64  &vp_reg->srpcim_msg_to_vpath_reg);
65 
67  &vp_reg->vpath_pcipif_int_status);
68 
70  &vp_reg->prc_alarm_reg);
71 
73  &vp_reg->wrdma_alarm_status);
74 
76  &vp_reg->asic_ntwk_vp_err_reg);
77 
79  &vp_reg->xgmac_vp_int_status);
80 
82 
83  /* Mask unwanted interrupts */
85  &vp_reg->vpath_pcipif_int_mask);
86 
88  &vp_reg->srpcim_msg_to_vpath_mask);
89 
92 
95 
97  &vp_reg->pci_config_errors_mask);
98 
99  /* Unmask the individual interrupts */
104  &vp_reg->general_errors_mask);
105 
113  &vp_reg->kdfcctl_errors_mask);
114 
116 
119  &vp_reg->prc_alarm_mask);
120 
123 
124  if (vpath->hldev->first_vp_id != vpath->vp_id)
126  &vp_reg->asic_ntwk_vp_err_mask);
127  else
131  0, 32), &vp_reg->asic_ntwk_vp_err_mask);
132 
134 exit:
135  return status;
136 
137 }
138 
139 /*
140  * vxge_hw_vpath_intr_disable - Disable vpath interrupts.
141  * @vpath: Virtual Path handle.
142  *
143  * Disable vpath interrupts. The function is to be executed the last in
144  * vpath initialization sequence.
145  *
146  * See also: vxge_hw_vpath_intr_enable()
147  */
148 enum vxge_hw_status
150 {
152  struct vxge_hw_vpath_reg __iomem *vp_reg;
153 
154  if (vpath->vp_open == VXGE_HW_VP_NOT_OPEN) {
156  goto exit;
157  }
158  vp_reg = vpath->vp_reg;
159 
161  &vp_reg->vpath_general_int_mask);
162 
164 
166  &vp_reg->general_errors_mask);
167 
169  &vp_reg->pci_config_errors_mask);
170 
172  &vp_reg->mrpcim_to_vpath_alarm_mask);
173 
175  &vp_reg->srpcim_to_vpath_alarm_mask);
176 
178  &vp_reg->vpath_ppif_int_mask);
179 
181  &vp_reg->srpcim_msg_to_vpath_mask);
182 
184  &vp_reg->vpath_pcipif_int_mask);
185 
187  &vp_reg->wrdma_alarm_mask);
188 
190  &vp_reg->prc_alarm_mask);
191 
193  &vp_reg->xgmac_vp_int_mask);
194 
196  &vp_reg->asic_ntwk_vp_err_mask);
197 
198 exit:
199  return status;
200 }
201 
202 /**
203  * vxge_hw_device_mask_all - Mask all device interrupts.
204  * @hldev: HW device handle.
205  *
206  * Mask all device interrupts.
207  *
208  * See also: vxge_hw_device_unmask_all()
209  */
211 {
212  u64 val64;
213 
216 
218  &hldev->common_reg->titan_mask_all_int);
219 
220  return;
221 }
222 
223 /**
224  * vxge_hw_device_unmask_all - Unmask all device interrupts.
225  * @hldev: HW device handle.
226  *
227  * Unmask all device interrupts.
228  *
229  * See also: vxge_hw_device_mask_all()
230  */
232 {
234 
236  &hldev->common_reg->titan_mask_all_int);
237 
238  return;
239 }
240 
241 /**
242  * vxge_hw_device_intr_enable - Enable interrupts.
243  * @hldev: HW device handle.
244  *
245  * Enable Titan interrupts. The function is to be executed the last in
246  * Titan initialization sequence.
247  *
248  * See also: vxge_hw_device_intr_disable()
249  */
251 {
252  u64 val64;
253  u32 val32;
254 
256 
258 
259  val64 = hldev->tim_int_mask0[VXGE_HW_VPATH_INTR_TX] |
261 
262  if (val64 != 0) {
263  writeq(val64, &hldev->common_reg->tim_int_status0);
264 
265  writeq(~val64, &hldev->common_reg->tim_int_mask0);
266  }
267 
268  val32 = hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_TX] |
270 
271  if (val32 != 0) {
273  &hldev->common_reg->tim_int_status1);
274 
276  &hldev->common_reg->tim_int_mask1);
277  }
278 
279  val64 = readq(&hldev->common_reg->titan_general_int_status);
280 
281  /* We have not enabled the top level interrupt yet.
282  * This will be controlled from vxge_irq() entry api.
283  */
284  return;
285 }
286 
287 /**
288  * vxge_hw_device_intr_disable - Disable Titan interrupts.
289  * @hldev: HW device handle.
290  *
291  * Disable Titan interrupts.
292  *
293  * See also: vxge_hw_device_intr_enable()
294  */
296 {
298 
299  /* mask all the tim interrupts */
302  &hldev->common_reg->tim_int_mask1);
303 
305 
306  return;
307 }
308 
309 /**
310  * vxge_hw_ring_rxd_post - Post descriptor on the ring.
311  * @ring: Handle to the ring object used for receive
312  * @rxdh: Descriptor obtained via vxge_hw_ring_rxd_reserve().
313  *
314  * Post descriptor on the ring.
315  * Prior to posting the descriptor should be filled in accordance with
316  * Host/Titan interface specification for a given service (LL, etc.).
317  */
319  struct vxge_hw_ring_rxd_1 *rxdp)
320 {
322 }
323 
324 /**
325  * __vxge_hw_non_offload_db_post - Post non offload doorbell
326  *
327  * @fifo: fifohandle
328  * @txdl_ptr: The starting location of the TxDL in host memory
329  * @num_txds: The highest TxD in this TxDL (0 to 255 means 1 to 256)
330  *
331  * This function posts a non-offload doorbell to doorbell FIFO
332  *
333  */
335  u64 txdl_ptr, u32 num_txds)
336 {
339  &fifo->nofl_db->control_0);
340 
341  wmb();
342 
343  writeq(txdl_ptr, &fifo->nofl_db->txdl_ptr);
344 
345  wmb();
346 }
347 
348 /**
349  * vxge_hw_fifo_free_txdl_get: fetch next available txd in the fifo
350  *
351  * @fifo: tx channel handle
352  */
353 struct vxge_hw_fifo_txd *
355 {
356  struct vxge_hw_fifo_txd *txdp;
357 
358  txdp = fifo->txdl + fifo->sw_offset;
359  if (txdp->control_0 & VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER) {
360  vxge_debug(VXGE_ERR, "%s:%d, error: txd(%d) owned by hw\n",
361  __func__, __LINE__, fifo->sw_offset);
362  return NULL;
363  }
364 
365  return txdp;
366 }
367 /**
368  * vxge_hw_fifo_txdl_buffer_set - Set transmit buffer pointer in the
369  * descriptor.
370  * @fifo: Handle to the fifo object used for non offload send
371  * @txdlh: Descriptor handle.
372  * @iob: data buffer.
373  */
375  struct vxge_hw_fifo_txd *txdp,
376  struct io_buffer *iob)
377 {
378  txdp->control_0 = VXGE_HW_FIFO_TXD_GATHER_CODE(
380  txdp->control_0 |= VXGE_HW_FIFO_TXD_BUFFER_SIZE(iob_len(iob));
381 
382  txdp->control_1 = VXGE_HW_FIFO_TXD_INT_NUMBER(fifo->tx_intr_num);
384 
385  txdp->host_control = (intptr_t)iob;
386  txdp->buffer_pointer = virt_to_bus(iob->data);
387 }
388 
389 /**
390  * vxge_hw_fifo_txdl_post - Post descriptor on the fifo channel.
391  * @fifo: Handle to the fifo object used for non offload send
392  * @txdp: Tx Descriptor
393  *
394  * Post descriptor on the 'fifo' type channel for transmission.
395  * Prior to posting the descriptor should be filled in accordance with
396  * Host/Titan interface specification for a given service (LL, etc.).
397  *
398  */
400  struct vxge_hw_fifo_txd *txdp)
401 {
403 
405 
407 }
408 
409 /*
410  * __vxge_hw_vpath_alarm_process - Process Alarms.
411  * @vpath: Virtual Path.
412  * @skip_alarms: Do not clear the alarms
413  *
414  * Process vpath alarms.
415  *
416  */
418  struct __vxge_hw_virtualpath *vpath)
419 {
420  u64 val64;
421  u64 alarm_status;
423  struct __vxge_hw_device *hldev = NULL;
424  struct vxge_hw_vpath_reg *vp_reg;
425 
426  hldev = vpath->hldev;
427  vp_reg = vpath->vp_reg;
428  alarm_status = readq(&vp_reg->vpath_general_int_status);
429 
430  if (alarm_status == VXGE_HW_ALL_FOXES) {
431 
432  vxge_debug(VXGE_ERR, "%s: %s:%d, slot freeze error\n",
433  hldev->ndev->name, __func__, __LINE__);
435  goto out;
436  }
437 
438  if (alarm_status & ~(
443 
444  vxge_debug(VXGE_ERR, "%s: %s:%d, Unknown vpath alarm\n",
445  hldev->ndev->name, __func__, __LINE__);
447  goto out;
448  }
449 
450  if (alarm_status & VXGE_HW_VPATH_GENERAL_INT_STATUS_XMAC_INT) {
451 
452  val64 = readq(&vp_reg->xgmac_vp_int_status);
453 
454  if (val64 &
456 
457  val64 = readq(&vp_reg->asic_ntwk_vp_err_reg);
458 
459  if (((val64 &
461  (!(val64 &
463  ((val64 &
465  && (!(val64 &
467  ))) {
469  &vp_reg->asic_ntwk_vp_err_mask);
470 
471  netdev_link_down(hldev->ndev);
472  vxge_debug(VXGE_INTR, "%s: %s:%d link down\n",
473  hldev->ndev->name, __func__, __LINE__);
474  }
475 
476  if (((val64 &
478  (!(val64 &
480  ((val64 &
482  && (!(val64 &
484  ))) {
486  &vp_reg->asic_ntwk_vp_err_mask);
487 
488  netdev_link_up(hldev->ndev);
489  vxge_debug(VXGE_INTR, "%s: %s:%d link up\n",
490  hldev->ndev->name, __func__, __LINE__);
491  }
492 
494  &vp_reg->asic_ntwk_vp_err_reg);
495  }
496  } else {
497  vxge_debug(VXGE_INFO, "%s: %s:%d unhandled alarm %llx\n",
498  hldev->ndev->name, __func__, __LINE__,
499  alarm_status);
500  }
501 out:
502  return status;
503 }
504 
505 /**
506  * vxge_hw_device_clear_tx_rx - Acknowledge (that is, clear) the
507  * condition that has caused the Tx and RX interrupt.
508  * @hldev: HW device.
509  *
510  * Acknowledge (that is, clear) the condition that has caused
511  * the Tx and Rx interrupt.
512  * See also: vxge_hw_device_begin_irq(),
513  * vxge_hw_device_mask_tx_rx(), vxge_hw_device_unmask_tx_rx().
514  */
516 {
517 
518  if ((hldev->tim_int_mask0[VXGE_HW_VPATH_INTR_TX] != 0) ||
519  (hldev->tim_int_mask0[VXGE_HW_VPATH_INTR_RX] != 0)) {
522  &hldev->common_reg->tim_int_status0);
523  }
524 
525  if ((hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_TX] != 0) ||
526  (hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_RX] != 0)) {
530  &hldev->common_reg->tim_int_status1);
531  }
532 
533  return;
534 }
535 
536 
537 /**
538  * vxge_hw_device_begin_irq - Begin IRQ processing.
539  * @hldev: HW device handle.
540  *
541  * The function performs two actions, It first checks whether (shared IRQ) the
542  * interrupt was raised by the device. Next, it masks the device interrupts.
543  *
544  * Note:
545  * vxge_hw_device_begin_irq() does not flush MMIO writes through the
546  * bridge. Therefore, two back-to-back interrupts are potentially possible.
547  *
548  * Returns: 0, if the interrupt is not "ours" (note that in this case the
549  * device remain enabled).
550  * Otherwise, vxge_hw_device_begin_irq() returns 64bit general adapter
551  * status.
552  */
553 enum vxge_hw_status
555 {
556  u64 val64;
558  u64 vpath_mask;
559  enum vxge_hw_status ret = VXGE_HW_OK;
560 
561  val64 = readq(&hldev->common_reg->titan_general_int_status);
562 
563  if (!val64) {
564  ret = VXGE_HW_ERR_WRONG_IRQ;
565  goto exit;
566  }
567 
568  if (val64 == VXGE_HW_ALL_FOXES) {
569 
571 
573 
574  vxge_debug(VXGE_ERR, "%s: %s:%d critical error "
575  "occurred\n", hldev->ndev->name,
576  __func__, __LINE__);
578  goto exit;
579  }
580  }
581 
582  vpath_mask = hldev->vpaths_deployed >>
585  vpath_mask))
587 
590 
591 exit:
592  return ret;
593 }
594 
595 /**
596  * vxge_hw_vpath_doorbell_rx - Indicates to hw the qwords of receive
597  * descriptors posted.
598  * @ring: Handle to the ring object used for receive
599  *
600  * The function writes the number of qwords of rxds posted during replishment.
601  * Since the function is called frequently, a flush is not required to post the
602  * write transaction. At the very least, the previous write will be flushed
603  * once the subsequent write is made.
604  *
605  * Returns: None.
606  */
608 {
609  u32 rxds_qw_per_block = VXGE_HW_MAX_RXDS_PER_BLOCK_1 *
611 
613 
615 
616  if (ring->total_db_cnt >= rxds_qw_per_block) {
617  /* For each block add 4 more qwords */
619 
620  /* Reset total count */
621  ring->total_db_cnt -= rxds_qw_per_block;
622  }
623 
624  if (ring->doorbell_cnt >= ring->rxd_qword_limit) {
625  wmb();
627  ring->doorbell_cnt),
628  &ring->vp_reg->prc_rxd_doorbell);
629  ring->doorbell_cnt = 0;
630  }
631 }
632 
633 /**
634  * vxge_hw_vpath_poll_rx - Poll Rx Virtual Path for completed
635  * descriptors and process the same.
636  * @ring: Handle to the ring object used for receive
637  *
638  * The function polls the Rx for the completed descriptors.
639  */
640 #define ETH_FCS_LEN 4
642 {
643  struct __vxge_hw_device *hldev;
645  struct vxge_hw_ring_rxd_1 *rxd;
646  unsigned int len;
647  enum vxge_hw_ring_tcode tcode;
648  struct io_buffer *rx_iob, *iobuf = NULL;
649  u16 poll_count = 0;
650 
651  hldev = ring->vpathh->hldev;
652 
653  do {
654  rxd = &ring->rxdl->rxd[ring->rxd_offset];
655  tcode = VXGE_HW_RING_RXD_T_CODE_GET(rxd->control_0);
656 
657  /* if tcode is VXGE_HW_RING_T_CODE_FRM_DROP, it is
658  * possible the ownership bit still set to adapter
659  */
660  if ((rxd->control_0 & VXGE_HW_RING_RXD_LIST_OWN_ADAPTER)
661  && (tcode == VXGE_HW_RING_T_CODE_OK)) {
662 
664  goto err0;
665  }
666 
667  vxge_debug(VXGE_INFO, "%s: rx frame received at offset %d\n",
668  hldev->ndev->name, ring->rxd_offset);
669 
670  iobuf = (struct io_buffer *)(intptr_t)rxd->host_control;
671 
672  if (tcode != VXGE_HW_RING_T_CODE_OK) {
673  netdev_rx_err(hldev->ndev, NULL, -EINVAL);
674  vxge_debug(VXGE_ERR, "%s:%d, rx error tcode %d\n",
675  __func__, __LINE__, tcode);
677  goto err1;
678  }
679 
681  len -= ETH_FCS_LEN;
682 
683  rx_iob = alloc_iob(len);
684  if (!rx_iob) {
685  netdev_rx_err(hldev->ndev, NULL, -ENOMEM);
686  vxge_debug(VXGE_ERR, "%s:%d, alloc_iob error\n",
687  __func__, __LINE__);
689  goto err1;
690  }
691 
692  memcpy(iob_put(rx_iob, len), iobuf->data, len);
693  /* Add this packet to the receive queue. */
694  netdev_rx(hldev->ndev, rx_iob);
695 
696 err1:
697  /* repost the rxd */
698  rxd->control_0 = rxd->control_1 = 0;
700  VXGE_LL_MAX_FRAME_SIZE(hldev->vdev));
701  vxge_hw_ring_rxd_post(ring, rxd);
702 
703  /* repost the qword count for doorbell */
705 
706  /* increment the descriptor offset */
708 
709  } while (++poll_count < ring->rx_poll_weight);
710 err0:
711  return status;
712 }
713 
714 /**
715  * vxge_hw_vpath_poll_tx - Poll Tx for completed descriptors and process
716  * the same.
717  * @fifo: Handle to the fifo object used for non offload send
718  *
719  * The function polls the Tx for the completed descriptors and calls
720  * the driver via supplied completion callback.
721  */
723 {
725  struct vxge_hw_fifo_txd *txdp;
726 
727  txdp = fifo->txdl + fifo->hw_offset;
728  if (!(txdp->control_0 & VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER)
729  && (txdp->host_control)) {
730 
731  vxge_xmit_compl(fifo, txdp,
732  VXGE_HW_FIFO_TXD_T_CODE_GET(txdp->control_0));
733 
735  }
736 
737  return status;
738 }
u64 tim_int_mask0[4]
Definition: vxge_config.h:511
uint16_t u16
Definition: stdint.h:21
enum vxge_hw_status vxge_hw_vpath_intr_enable(struct __vxge_hw_virtualpath *vpath)
Definition: vxge_traffic.c:34
#define EINVAL
Invalid argument.
Definition: errno.h:428
#define VXGE_HW_NODBW_TYPE(val)
Definition: vxge_config.h:294
wmb()
#define iob_put(iobuf, len)
Definition: iobuf.h:116
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:501
struct vxge_hw_fifo_txd - Transmit Descriptor
Definition: vxge_config.h:212
#define VXGE_HW_RING_RXD_1_BUFFER0_SIZE_GET(ctrl1)
Definition: vxge_config.h:194
Error codes.
u64 mrpcim_to_vpath_alarm_mask
Definition: vxge_reg.h:4545
uint64_t readq(volatile uint64_t *io_addr)
Read 64-bit qword from memory-mapped device.
struct __vxge_hw_virtualpath * vpathh
Definition: vxge_config.h:379
#define VXGE_HW_VPATH_GENERAL_INT_STATUS_XMAC_INT
Definition: vxge_reg.h:470
struct __vxge_hw_virtualpath virtual_path
Definition: vxge_config.h:507
#define VXGE_HW_FIFO_TXD_INT_TYPE_PER_LIST
Definition: vxge_config.h:239
#define ETH_FCS_LEN
vxge_hw_vpath_poll_rx - Poll Rx Virtual Path for completed descriptors and process the same.
Definition: vxge_traffic.c:640
u64 adapter_status
Definition: vxge_reg.h:137
u64 asic_ntwk_vp_err_mask
Definition: vxge_reg.h:4252
struct vxge_hw_common_reg * common_reg
Definition: vxge_config.h:497
void vxge_hw_ring_rxd_post(struct __vxge_hw_ring *ring __unused, struct vxge_hw_ring_rxd_1 *rxdp)
vxge_hw_ring_rxd_post - Post descriptor on the ring.
Definition: vxge_traffic.c:318
static void __vxge_hw_pio_mem_write32_upper(u32 val, void __iomem *addr)
Definition: vxge_config.h:703
#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO2_DMA_ERR
Definition: vxge_reg.h:499
struct __vxge_hw_non_offload_db_wrapper * nofl_db
Definition: vxge_config.h:324
u64 srpcim_to_vpath_alarm_reg
Definition: vxge_reg.h:4547
static void vxge_hw_ring_rxd_offset_up(u16 *offset)
Definition: vxge_config.h:570
static void vxge_hw_fifo_txd_offset_up(u16 *offset)
Definition: vxge_config.h:576
#define VXGE_HW_RING_RXD_T_CODE_GET(ctrl0)
Definition: vxge_config.h:167
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:186
u64 vpath_pcipif_int_mask
Definition: vxge_reg.h:4470
unsigned long intptr_t
Definition: stdint.h:21
#define VXGE_HW_INTR_MASK_ALL
Definition: vxge_traffic.h:29
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:128
#define VXGE_HW_VPATH_GENERAL_INT_STATUS_PCI_INT
Definition: vxge_reg.h:468
#define VXGE_INFO
Definition: vxge_config.h:50
#define VXGE_HW_VPATH_INTR_RX
Definition: vxge_traffic.h:131
#define vxge_debug(mask, fmt...)
Definition: vxge_config.h:762
#define VXGE_HW_RING_RXD_LIST_OWN_ADAPTER
Definition: vxge_config.h:159
#define VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_ALARM_INT
Definition: vxge_reg.h:115
void vxge_hw_device_intr_disable(struct __vxge_hw_device *hldev)
vxge_hw_device_intr_disable - Disable Titan interrupts.
Definition: vxge_traffic.c:295
#define VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO2_OVRFLOW
Definition: vxge_reg.h:507
struct vxgedev * vdev
Definition: vxge_config.h:484
u64 srpcim_to_vpath_alarm_mask
Definition: vxge_reg.h:4550
struct vxge_hw_fifo_txd * vxge_hw_fifo_free_txdl_get(struct __vxge_hw_fifo *fifo)
vxge_hw_fifo_free_txdl_get: fetch next available txd in the fifo
Definition: vxge_traffic.c:354
enum vxge_hw_status vxge_hw_vpath_poll_tx(struct __vxge_hw_fifo *fifo)
vxge_hw_vpath_poll_tx - Poll Tx for completed descriptors and process the same.
Definition: vxge_traffic.c:722
uint8_t status
Status.
Definition: ena.h:16
#define ENOMEM
Not enough space.
Definition: errno.h:534
#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO1_OVRWR
Definition: vxge_reg.h:492
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:361
void * memcpy(void *dest, const void *src, size_t len) __nonnull
void vxge_hw_device_unmask_all(struct __vxge_hw_device *hldev)
vxge_hw_device_unmask_all - Unmask all device interrupts.
Definition: vxge_traffic.c:231
#define VXGE_HW_GENERAL_ERRORS_REG_STATSB_PIF_CHAIN_ERR
Definition: vxge_reg.h:508
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER
Definition: vxge_config.h:214
enum vxge_hw_status vxge_hw_vpath_poll_rx(struct __vxge_hw_ring *ring)
Definition: vxge_traffic.c:641
#define VXGE_HW_ASIC_NTWK_VP_ERR_REG_XMACJ_NTWK_REAFFIRMED_OK
Definition: vxge_reg.h:229
#define VXGE_HW_FIFO_TXD_BUFFER_SIZE(val)
Definition: vxge_config.h:226
void vxge_hw_fifo_txdl_buffer_set(struct __vxge_hw_fifo *fifo, struct vxge_hw_fifo_txd *txdp, struct io_buffer *iob)
vxge_hw_fifo_txdl_buffer_set - Set transmit buffer pointer in the descriptor.
Definition: vxge_traffic.c:374
void vxge_hw_fifo_txdl_post(struct __vxge_hw_fifo *fifo, struct vxge_hw_fifo_txd *txdp)
vxge_hw_fifo_txdl_post - Post descriptor on the fifo channel.
Definition: vxge_traffic.c:399
#define VXGE_HW_XGMAC_VP_INT_STATUS_ASIC_NTWK_VP_ERR_ASIC_NTWK_VP_INT
Definition: vxge_reg.h:217
#define VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_FLT
Definition: vxge_reg.h:221
u64 asic_ntwk_vp_err_reg
Definition: vxge_reg.h:4242
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:768
void vxge_hw_device_intr_enable(struct __vxge_hw_device *hldev)
vxge_hw_device_intr_enable - Enable interrupts.
Definition: vxge_traffic.c:250
#define VXGE_HW_FIFO_TXD_GATHER_CODE(val)
Definition: vxge_config.h:220
#define VXGE_HW_MAX_VIRTUAL_PATHS
Definition: vxge_traffic.h:30
#define VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO1_OVRFLOW
Definition: vxge_reg.h:506
uint64_t u64
Definition: stdint.h:25
FILE_LICENCE(GPL2_ONLY)
u32 tim_int_mask1[4]
Definition: vxge_config.h:512
__be32 out[4]
Definition: CIB_PRM.h:36
#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO1_POISON
Definition: vxge_reg.h:495
#define VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(val)
Definition: vxge_reg.h:116
struct __vxge_hw_ring_block * rxdl
Definition: vxge_config.h:370
#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO2_POISON
Definition: vxge_reg.h:496
#define VXGE_HW_RING_RXD_QWORDS_MODE_1
Definition: vxge_config.h:364
#define VXGE_LL_MAX_FRAME_SIZE(dev)
Definition: vxge_main.h:147
#define VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_FLT_OCCURR
Definition: vxge_reg.h:223
static void __vxge_hw_non_offload_db_post(struct __vxge_hw_fifo *fifo, u64 txdl_ptr, u32 num_txds)
__vxge_hw_non_offload_db_post - Post non offload doorbell
Definition: vxge_traffic.c:334
#define vxge_bVALn(bits, loc, n)
Definition: vxge_reg.h:35
u64 vpath_ppif_int_status
Definition: vxge_reg.h:4498
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:151
#define __iomem
Definition: igbvf_osdep.h:45
#define VXGE_HW_DEFAULT_32
Definition: vxge_traffic.h:36
#define VXGE_HW_PRC_ALARM_REG_PRC_RING_BUMP
Definition: vxge_reg.h:29
#define VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_OK_OCCURR
Definition: vxge_reg.h:225
u64 mrpcim_to_vpath_alarm_reg
Definition: vxge_reg.h:4542
#define VXGE_HW_VPATH_INTR_TX
Definition: vxge_traffic.h:130
Definition: sis900.h:30
#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO1_DMA_ERR
Definition: vxge_reg.h:498
#define VXGE_HW_NODBW_TYPE_NODBW
Definition: vxge_config.h:295
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:470
u64 srpcim_msg_to_vpath_mask
Definition: vxge_reg.h:4476
#define VXGE_HW_FIFO_TXD_T_CODE_GET(ctrl0)
Definition: vxge_config.h:216
Network device management.
#define __unused
Declare a variable or data structure as unused.
Definition: compiler.h:573
struct __vxge_hw_device - Hal device object @magic: Magic Number @bar0: BAR0 virtual address.
Definition: vxge_config.h:477
#define VXGE_HW_ASIC_NW_VP_ERR_REG_XMACJ_STN_OK
Definition: vxge_reg.h:222
#define VXGE_HW_PRC_RXD_DOORBELL_NEW_QW_CNT(val)
Definition: vxge_reg.h:77
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
enum vxge_hw_status vxge_hw_device_begin_irq(struct __vxge_hw_device *hldev)
vxge_hw_device_begin_irq - Begin IRQ processing.
Definition: vxge_traffic.c:554
uint32_t len
Length.
Definition: ena.h:14
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:397
#define VXGE_HW_ALL_FOXES
Definition: vxge_traffic.h:28
void * data
Start of data.
Definition: iobuf.h:44
static void vxge_hw_ring_rxd_1b_set(struct vxge_hw_ring_rxd_1 *rxdp, struct io_buffer *iob, u32 size)
vxge_hw_ring_rxd_1b_set - Prepare 1-buffer-mode descriptor.
Definition: vxge_config.h:597
enum vxge_hw_status vxge_hw_vpath_intr_disable(struct __vxge_hw_virtualpath *vpath)
Definition: vxge_traffic.c:149
vxge_hw_ring_tcode
enum vxge_hw_ring_tcode - Transfer codes returned by adapter @VXGE_HW_RING_T_CODE_OK: Transfer ok.
Definition: vxge_traffic.h:172
#define VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO2_OVRWR
Definition: vxge_reg.h:493
u64 vpath_general_int_mask
Definition: vxge_reg.h:4493
u64 srpcim_msg_to_vpath_reg
Definition: vxge_reg.h:4473
vxge_hw_status
Definition: vxge_config.h:70
#define VXGE_INTR
Definition: vxge_config.h:51
Definition: sis900.h:32
#define VXGE_HW_FIFO_TXD_INT_NUMBER(val)
Definition: vxge_config.h:237
static enum vxge_hw_status __vxge_hw_vpath_alarm_process(struct __vxge_hw_virtualpath *vpath)
Definition: vxge_traffic.c:417
#define VXGE_HW_TITAN_MASK_ALL_INT_TRAFFIC
Definition: vxge_reg.h:122
struct __vxge_hw_device * hldev
Definition: vxge_config.h:396
#define VXGE_HW_NODBW_LAST_TXD_NUMBER(val)
Definition: vxge_config.h:298
#define VXGE_HW_TITAN_MASK_ALL_INT_ALARM
Definition: vxge_reg.h:121
u64 vpath_pcipif_int_status
Definition: vxge_reg.h:4464
u64 vpath_general_int_status
Definition: vxge_reg.h:4488
struct vxge_hw_fifo_txd * txdl
Definition: vxge_config.h:328
#define VXGE_HW_VP_NOT_OPEN
Definition: vxge_config.h:393
enum vxge_hw_status vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, struct vxge_hw_fifo_txd *txdp, enum vxge_hw_fifo_tcode tcode)
Definition: vxge_main.c:65
u64 pci_config_errors_reg
Definition: vxge_reg.h:4536
u64 titan_general_int_status
Definition: vxge_reg.h:803
#define VXGE_HW_VPATH_GENERAL_INT_STATUS_WRDMA_INT
Definition: vxge_reg.h:469
struct vxge_hw_ring_rxd_1 rxd[VXGE_HW_MAX_RXDS_PER_BLOCK_1]
Definition: vxge_config.h:342
struct net_device * ndev
Definition: vxge_config.h:483
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
void writeq(uint64_t data, volatile uint64_t *io_addr)
Write 64-bit qword to memory-mapped device.
struct vxge_hw_ring_rxd_1 - One buffer mode RxD for ring
Definition: vxge_config.h:154
#define VXGE_HW_VPATH_GENERAL_INT_STATUS_PIC_INT
Definition: vxge_reg.h:467
u64 pci_config_errors_mask
Definition: vxge_reg.h:4540
uint32_t u32
Definition: stdint.h:23
#define VXGE_ERR
Definition: vxge_config.h:54
#define VXGE_HW_GENERAL_ERRORS_REG_STATSB_DROP_TIMEOUT_REQ
Definition: vxge_reg.h:509
void vxge_hw_device_mask_all(struct __vxge_hw_device *hldev)
vxge_hw_device_mask_all - Mask all device interrupts.
Definition: vxge_traffic.c:210
#define VXGE_HW_MAX_RXDS_PER_BLOCK_1
Definition: vxge_config.h:341
#define rxd
Definition: davicom.c:145
void vxge_hw_vpath_doorbell_rx(struct __vxge_hw_ring *ring)
vxge_hw_vpath_doorbell_rx - Indicates to hw the qwords of receive descriptors posted.
Definition: vxge_traffic.c:607
#define VXGE_HW_ASIC_NTWK_VP_ERR_REG_XMACJ_NTWK_REAFFIRMED_FAULT
Definition: vxge_reg.h:227
A persistent I/O buffer.
Definition: iobuf.h:32
void vxge_hw_device_clear_tx_rx(struct __vxge_hw_device *hldev)
vxge_hw_device_clear_tx_rx - Acknowledge (that is, clear) the condition that has caused the Tx and RX...
Definition: vxge_traffic.c:515