iPXE
Macros | Enumerations | Functions | Variables
vxge_traffic.h File Reference
#include <stdint.h>
#include <ipxe/if_ether.h>
#include <ipxe/iobuf.h>
#include "vxge_reg.h"
#include "vxge_version.h"

Go to the source code of this file.

Macros

#define VXGE_TRAFFIC_H
 
#define VXGE_HW_DTR_MAX_T_CODE   16
 
#define VXGE_HW_ALL_FOXES   0xFFFFFFFFFFFFFFFFULL
 
#define VXGE_HW_INTR_MASK_ALL   0xFFFFFFFFFFFFFFFFULL
 
#define VXGE_HW_MAX_VIRTUAL_PATHS   17
 
#define VXGE_HW_MAX_VIRTUAL_FUNCTIONS   8
 
#define VXGE_HW_MAC_MAX_MAC_PORT_ID   3
 
#define VXGE_HW_DEFAULT_32   0xffffffff
 
#define VXGE_HW_HEADER_802_2_SIZE   3
 
#define VXGE_HW_HEADER_SNAP_SIZE   5
 
#define VXGE_HW_HEADER_VLAN_SIZE   4
 
#define VXGE_HW_MAC_HEADER_MAX_SIZE
 
#define VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN   0x12
 
#define VXGE_HW_HEADER_802_2_SNAP_ALIGN   2
 
#define VXGE_HW_HEADER_802_2_ALIGN   3
 
#define VXGE_HW_HEADER_SNAP_ALIGN   1
 
#define VXGE_HW_L3_CKSUM_OK   0xFFFF
 
#define VXGE_HW_L4_CKSUM_OK   0xFFFF
 
#define TRUE   1
 
#define FALSE   0
 
#define VXGE_HW_EVENT_BASE   0
 
#define VXGE_LL_EVENT_BASE   100
 
#define VXGE_HW_MAX_INTR_PER_VP   4
 
#define VXGE_HW_VPATH_INTR_TX   0
 
#define VXGE_HW_VPATH_INTR_RX   1
 
#define VXGE_HW_VPATH_INTR_EINTA   2
 
#define VXGE_HW_VPATH_INTR_BMAP   3
 
#define VXGE_HW_BLOCK_SIZE   4096
 
#define VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL   17
 
#define VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL   18
 
#define VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_RX_AVE_NET_UTIL   19
 
#define VXGE_HW_TIM_UTIL_SEL_PER_VPATH   63
 

Enumerations

enum  vxge_hw_event {
  VXGE_HW_EVENT_UNKNOWN = 0, VXGE_HW_EVENT_RESET_START = VXGE_HW_EVENT_BASE + 1, VXGE_HW_EVENT_RESET_COMPLETE = VXGE_HW_EVENT_BASE + 2, VXGE_HW_EVENT_LINK_DOWN = VXGE_HW_EVENT_BASE + 3,
  VXGE_HW_EVENT_LINK_UP = VXGE_HW_EVENT_BASE + 4, VXGE_HW_EVENT_ALARM_CLEARED = VXGE_HW_EVENT_BASE + 5, VXGE_HW_EVENT_ECCERR = VXGE_HW_EVENT_BASE + 6, VXGE_HW_EVENT_MRPCIM_ECCERR = VXGE_HW_EVENT_BASE + 7,
  VXGE_HW_EVENT_FIFO_ERR = VXGE_HW_EVENT_BASE + 8, VXGE_HW_EVENT_VPATH_ERR = VXGE_HW_EVENT_BASE + 9, VXGE_HW_EVENT_CRITICAL_ERR = VXGE_HW_EVENT_BASE + 10, VXGE_HW_EVENT_SERR = VXGE_HW_EVENT_BASE + 11,
  VXGE_HW_EVENT_SRPCIM_SERR = VXGE_HW_EVENT_BASE + 12, VXGE_HW_EVENT_MRPCIM_SERR = VXGE_HW_EVENT_BASE + 13, VXGE_HW_EVENT_SLOT_FREEZE = VXGE_HW_EVENT_BASE + 14
}
 enum vxge_hw_event- Enumerates slow-path HW events. More...
 
enum  vxge_hw_ring_tcode {
  VXGE_HW_RING_T_CODE_OK = 0x0, VXGE_HW_RING_T_CODE_L3_CKSUM_MISMATCH = 0x1, VXGE_HW_RING_T_CODE_L4_CKSUM_MISMATCH = 0x2, VXGE_HW_RING_T_CODE_L3_L4_CKSUM_MISMATCH = 0x3,
  VXGE_HW_RING_T_CODE_L3_PKT_ERR = 0x5, VXGE_HW_RING_T_CODE_L2_FRM_ERR = 0x6, VXGE_HW_RING_T_CODE_BUF_SIZE_ERR = 0x7, VXGE_HW_RING_T_CODE_INT_ECC_ERR = 0x8,
  VXGE_HW_RING_T_CODE_BENIGN_OVFLOW = 0x9, VXGE_HW_RING_T_CODE_ZERO_LEN_BUFF = 0xA, VXGE_HW_RING_T_CODE_FRM_DROP = 0xC, VXGE_HW_RING_T_CODE_UNUSED = 0xE,
  VXGE_HW_RING_T_CODE_MULTI_ERR = 0xF
}
 enum vxge_hw_ring_tcode - Transfer codes returned by adapter @VXGE_HW_RING_T_CODE_OK: Transfer ok. More...
 
enum  vxge_hw_fifo_gather_code { VXGE_HW_FIFO_GATHER_CODE_FIRST = 0x2, VXGE_HW_FIFO_GATHER_CODE_MIDDLE = 0x0, VXGE_HW_FIFO_GATHER_CODE_LAST = 0x1, VXGE_HW_FIFO_GATHER_CODE_FIRST_LAST = 0x3 }
 enum enum vxge_hw_fifo_gather_code - Gather codes used in fifo TxD @VXGE_HW_FIFO_GATHER_CODE_FIRST: First TxDL @VXGE_HW_FIFO_GATHER_CODE_MIDDLE: Middle TxDL @VXGE_HW_FIFO_GATHER_CODE_LAST: Last TxDL @VXGE_HW_FIFO_GATHER_CODE_FIRST_LAST: First and Last TxDL. More...
 
enum  vxge_hw_fifo_tcode {
  VXGE_HW_FIFO_T_CODE_OK = 0x0, VXGE_HW_FIFO_T_CODE_PCI_READ_CORRUPT = 0x1, VXGE_HW_FIFO_T_CODE_PCI_READ_FAIL = 0x2, VXGE_HW_FIFO_T_CODE_INVALID_MSS = 0x3,
  VXGE_HW_FIFO_T_CODE_LSO_ERROR = 0x4, VXGE_HW_FIFO_T_CODE_UNUSED = 0x7, VXGE_HW_FIFO_T_CODE_MULTI_ERROR = 0x8
}
 enum enum vxge_hw_fifo_tcode - tcodes used in fifo @VXGE_HW_FIFO_T_CODE_OK: Transfer OK @VXGE_HW_FIFO_T_CODE_PCI_READ_CORRUPT: PCI read transaction (either TxD or frame data) returned with corrupt data. More...
 

Functions

 FILE_LICENCE (GPL2_ONLY)
 
enum vxge_hw_status vxge_hw_ring_replenish (struct __vxge_hw_ring *ring)
 
void vxge_hw_ring_rxd_post (struct __vxge_hw_ring *ring_handle, struct vxge_hw_ring_rxd_1 *rxdp)
 
void vxge_hw_fifo_txdl_buffer_set (struct __vxge_hw_fifo *fifo, struct vxge_hw_fifo_txd *txdp, struct io_buffer *iob)
 vxge_hw_fifo_txdl_buffer_set - Set transmit buffer pointer in the descriptor. More...
 
void vxge_hw_fifo_txdl_post (struct __vxge_hw_fifo *fifo, struct vxge_hw_fifo_txd *txdp)
 vxge_hw_fifo_txdl_post - Post descriptor on the fifo channel. More...
 
enum vxge_hw_status __vxge_hw_ring_create (struct __vxge_hw_virtualpath *vpath, struct __vxge_hw_ring *ring)
 
enum vxge_hw_status __vxge_hw_ring_delete (struct __vxge_hw_ring *ringh)
 
enum vxge_hw_status __vxge_hw_fifo_create (struct __vxge_hw_virtualpath *vpath, struct __vxge_hw_fifo *fifo)
 
enum vxge_hw_status __vxge_hw_fifo_delete (struct __vxge_hw_fifo *fifo)
 
enum vxge_hw_status __vxge_hw_vpath_reset (struct __vxge_hw_device *devh, u32 vp_id)
 
enum vxge_hw_status __vxge_hw_vpath_enable (struct __vxge_hw_device *devh, u32 vp_id)
 
void __vxge_hw_vpath_prc_configure (struct __vxge_hw_device *hldev)
 
enum vxge_hw_status __vxge_hw_vpath_kdfc_configure (struct __vxge_hw_device *devh, u32 vp_id)
 
enum vxge_hw_status __vxge_hw_vpath_mac_configure (struct __vxge_hw_device *devh)
 
enum vxge_hw_status __vxge_hw_vpath_tim_configure (struct __vxge_hw_device *devh, u32 vp_id)
 
enum vxge_hw_status __vxge_hw_vpath_initialize (struct __vxge_hw_device *devh, u32 vp_id)
 
enum vxge_hw_status __vxge_hw_vp_initialize (struct __vxge_hw_device *hldev, u32 vp_id, struct __vxge_hw_virtualpath *vpath)
 
void __vxge_hw_vp_terminate (struct __vxge_hw_device *hldev, struct __vxge_hw_virtualpath *vpath)
 
enum vxge_hw_status vxge_hw_device_begin_irq (struct __vxge_hw_device *hldev)
 vxge_hw_device_begin_irq - Begin IRQ processing. More...
 
void vxge_hw_device_intr_enable (struct __vxge_hw_device *hldev)
 vxge_hw_device_intr_enable - Enable interrupts. More...
 
void vxge_hw_device_intr_disable (struct __vxge_hw_device *hldev)
 vxge_hw_device_intr_disable - Disable Titan interrupts. More...
 
void vxge_hw_device_mask_all (struct __vxge_hw_device *hldev)
 vxge_hw_device_mask_all - Mask all device interrupts. More...
 
void vxge_hw_device_unmask_all (struct __vxge_hw_device *hldev)
 vxge_hw_device_unmask_all - Unmask all device interrupts. More...
 
void vxge_hw_vpath_doorbell_rx (struct __vxge_hw_ring *ringh)
 vxge_hw_vpath_doorbell_rx - Indicates to hw the qwords of receive descriptors posted. More...
 
enum vxge_hw_status vxge_hw_vpath_poll_rx (struct __vxge_hw_ring *ringh)
 
enum vxge_hw_status vxge_hw_vpath_poll_tx (struct __vxge_hw_fifo *fifo)
 vxge_hw_vpath_poll_tx - Poll Tx for completed descriptors and process the same. More...
 
struct vxge_hw_fifo_txdvxge_hw_fifo_free_txdl_get (struct __vxge_hw_fifo *fifo)
 vxge_hw_fifo_free_txdl_get: fetch next available txd in the fifo More...
 

Variables

enum vxge_hw_event __attribute
 

Macro Definition Documentation

◆ VXGE_TRAFFIC_H

#define VXGE_TRAFFIC_H

Definition at line 18 of file vxge_traffic.h.

◆ VXGE_HW_DTR_MAX_T_CODE

#define VXGE_HW_DTR_MAX_T_CODE   16

Definition at line 27 of file vxge_traffic.h.

◆ VXGE_HW_ALL_FOXES

#define VXGE_HW_ALL_FOXES   0xFFFFFFFFFFFFFFFFULL

Definition at line 28 of file vxge_traffic.h.

◆ VXGE_HW_INTR_MASK_ALL

#define VXGE_HW_INTR_MASK_ALL   0xFFFFFFFFFFFFFFFFULL

Definition at line 29 of file vxge_traffic.h.

◆ VXGE_HW_MAX_VIRTUAL_PATHS

#define VXGE_HW_MAX_VIRTUAL_PATHS   17

Definition at line 30 of file vxge_traffic.h.

◆ VXGE_HW_MAX_VIRTUAL_FUNCTIONS

#define VXGE_HW_MAX_VIRTUAL_FUNCTIONS   8

Definition at line 32 of file vxge_traffic.h.

◆ VXGE_HW_MAC_MAX_MAC_PORT_ID

#define VXGE_HW_MAC_MAX_MAC_PORT_ID   3

Definition at line 34 of file vxge_traffic.h.

◆ VXGE_HW_DEFAULT_32

#define VXGE_HW_DEFAULT_32   0xffffffff

Definition at line 36 of file vxge_traffic.h.

◆ VXGE_HW_HEADER_802_2_SIZE

#define VXGE_HW_HEADER_802_2_SIZE   3

Definition at line 38 of file vxge_traffic.h.

◆ VXGE_HW_HEADER_SNAP_SIZE

#define VXGE_HW_HEADER_SNAP_SIZE   5

Definition at line 39 of file vxge_traffic.h.

◆ VXGE_HW_HEADER_VLAN_SIZE

#define VXGE_HW_HEADER_VLAN_SIZE   4

Definition at line 40 of file vxge_traffic.h.

◆ VXGE_HW_MAC_HEADER_MAX_SIZE

#define VXGE_HW_MAC_HEADER_MAX_SIZE
Value:
VXGE_HW_HEADER_802_2_SIZE + \
VXGE_HW_HEADER_VLAN_SIZE + \
VXGE_HW_HEADER_SNAP_SIZE)
#define ETH_HLEN
Definition: if_ether.h:9

Definition at line 41 of file vxge_traffic.h.

◆ VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN

#define VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN   0x12

Definition at line 61 of file vxge_traffic.h.

◆ VXGE_HW_HEADER_802_2_SNAP_ALIGN

#define VXGE_HW_HEADER_802_2_SNAP_ALIGN   2

Definition at line 62 of file vxge_traffic.h.

◆ VXGE_HW_HEADER_802_2_ALIGN

#define VXGE_HW_HEADER_802_2_ALIGN   3

Definition at line 63 of file vxge_traffic.h.

◆ VXGE_HW_HEADER_SNAP_ALIGN

#define VXGE_HW_HEADER_SNAP_ALIGN   1

Definition at line 64 of file vxge_traffic.h.

◆ VXGE_HW_L3_CKSUM_OK

#define VXGE_HW_L3_CKSUM_OK   0xFFFF

Definition at line 66 of file vxge_traffic.h.

◆ VXGE_HW_L4_CKSUM_OK

#define VXGE_HW_L4_CKSUM_OK   0xFFFF

Definition at line 67 of file vxge_traffic.h.

◆ TRUE

#define TRUE   1

Definition at line 78 of file vxge_traffic.h.

◆ FALSE

#define FALSE   0

Definition at line 82 of file vxge_traffic.h.

◆ VXGE_HW_EVENT_BASE

#define VXGE_HW_EVENT_BASE   0

Definition at line 86 of file vxge_traffic.h.

◆ VXGE_LL_EVENT_BASE

#define VXGE_LL_EVENT_BASE   100

Definition at line 87 of file vxge_traffic.h.

◆ VXGE_HW_MAX_INTR_PER_VP

#define VXGE_HW_MAX_INTR_PER_VP   4

Definition at line 129 of file vxge_traffic.h.

◆ VXGE_HW_VPATH_INTR_TX

#define VXGE_HW_VPATH_INTR_TX   0

Definition at line 130 of file vxge_traffic.h.

◆ VXGE_HW_VPATH_INTR_RX

#define VXGE_HW_VPATH_INTR_RX   1

Definition at line 131 of file vxge_traffic.h.

◆ VXGE_HW_VPATH_INTR_EINTA

#define VXGE_HW_VPATH_INTR_EINTA   2

Definition at line 132 of file vxge_traffic.h.

◆ VXGE_HW_VPATH_INTR_BMAP

#define VXGE_HW_VPATH_INTR_BMAP   3

Definition at line 133 of file vxge_traffic.h.

◆ VXGE_HW_BLOCK_SIZE

#define VXGE_HW_BLOCK_SIZE   4096

Definition at line 135 of file vxge_traffic.h.

◆ VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL

#define VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL   17

Definition at line 137 of file vxge_traffic.h.

◆ VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL

#define VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL   18

Definition at line 138 of file vxge_traffic.h.

◆ VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_RX_AVE_NET_UTIL

#define VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_RX_AVE_NET_UTIL   19

Definition at line 139 of file vxge_traffic.h.

◆ VXGE_HW_TIM_UTIL_SEL_PER_VPATH

#define VXGE_HW_TIM_UTIL_SEL_PER_VPATH   63

Definition at line 140 of file vxge_traffic.h.

Enumeration Type Documentation

◆ vxge_hw_event

enum vxge_hw_event- Enumerates slow-path HW events.

@VXGE_HW_EVENT_UNKNOWN: Unknown (and invalid) event. @VXGE_HW_EVENT_SERR: Serious vpath hardware error event. @VXGE_HW_EVENT_ECCERR: vpath ECC error event. @VXGE_HW_EVENT_VPATH_ERR: Error local to the respective vpath @VXGE_HW_EVENT_FIFO_ERR: FIFO Doorbell fifo error. @VXGE_HW_EVENT_SRPCIM_SERR: srpcim hardware error event. @VXGE_HW_EVENT_MRPCIM_SERR: mrpcim hardware error event. @VXGE_HW_EVENT_MRPCIM_ECCERR: mrpcim ecc error event. @VXGE_HW_EVENT_RESET_START: Privileged entity is starting device reset @VXGE_HW_EVENT_RESET_COMPLETE: Device reset has been completed @VXGE_HW_EVENT_SLOT_FREEZE: Slot-freeze event. Driver tries to distinguish slot-freeze from the rest critical events (e.g. ECC) when it is impossible to PIO read "through" the bus, i.e. when getting all-foxes.

enum vxge_hw_event enumerates slow-path HW eventis.

See also: struct vxge_hw_uld_cbs{}, vxge_uld_link_up_f{}, vxge_uld_link_down_f{}.

Enumerator
VXGE_HW_EVENT_UNKNOWN 
VXGE_HW_EVENT_RESET_START 
VXGE_HW_EVENT_RESET_COMPLETE 
VXGE_HW_EVENT_LINK_DOWN 
VXGE_HW_EVENT_LINK_UP 
VXGE_HW_EVENT_ALARM_CLEARED 
VXGE_HW_EVENT_ECCERR 
VXGE_HW_EVENT_MRPCIM_ECCERR 
VXGE_HW_EVENT_FIFO_ERR 
VXGE_HW_EVENT_VPATH_ERR 
VXGE_HW_EVENT_CRITICAL_ERR 
VXGE_HW_EVENT_SERR 
VXGE_HW_EVENT_SRPCIM_SERR 
VXGE_HW_EVENT_MRPCIM_SERR 
VXGE_HW_EVENT_SLOT_FREEZE 

Definition at line 110 of file vxge_traffic.h.

110  {
112  /* HW events */
127 };
#define VXGE_HW_EVENT_BASE
Definition: vxge_traffic.h:86

◆ vxge_hw_ring_tcode

enum vxge_hw_ring_tcode - Transfer codes returned by adapter @VXGE_HW_RING_T_CODE_OK: Transfer ok.

@VXGE_HW_RING_T_CODE_L3_CKSUM_MISMATCH: Layer 3 checksum presentation configuration mismatch. @VXGE_HW_RING_T_CODE_L4_CKSUM_MISMATCH: Layer 4 checksum presentation configuration mismatch. @VXGE_HW_RING_T_CODE_L3_L4_CKSUM_MISMATCH: Layer 3 and Layer 4 checksum presentation configuration mismatch. @VXGE_HW_RING_T_CODE_L3_PKT_ERR: Layer 3 error unparseable packet, such as unknown IPv6 header. @VXGE_HW_RING_T_CODE_L2_FRM_ERR: Layer 2 error frame integrity error, such as FCS or ECC). @VXGE_HW_RING_T_CODE_BUF_SIZE_ERR: Buffer size error the RxD buffer( s) were not appropriately sized and data loss occurred. @VXGE_HW_RING_T_CODE_INT_ECC_ERR: Internal ECC error RxD corrupted. @VXGE_HW_RING_T_CODE_BENIGN_OVFLOW: Benign overflow the contents of Segment1 exceeded the capacity of Buffer1 and the remainder was placed in Buffer2. Segment2 now starts in Buffer3. No data loss or errors occurred. @VXGE_HW_RING_T_CODE_ZERO_LEN_BUFF: Buffer size 0 one of the RxDs assigned buffers has a size of 0 bytes. @VXGE_HW_RING_T_CODE_FRM_DROP: Frame dropped either due to VPath Reset or because of a VPIN mismatch. @VXGE_HW_RING_T_CODE_UNUSED: Unused @VXGE_HW_RING_T_CODE_MULTI_ERR: Multiple errors more than one transfer code condition occurred.

Transfer codes returned by adapter.

Enumerator
VXGE_HW_RING_T_CODE_OK 
VXGE_HW_RING_T_CODE_L3_CKSUM_MISMATCH 
VXGE_HW_RING_T_CODE_L4_CKSUM_MISMATCH 
VXGE_HW_RING_T_CODE_L3_L4_CKSUM_MISMATCH 
VXGE_HW_RING_T_CODE_L3_PKT_ERR 
VXGE_HW_RING_T_CODE_L2_FRM_ERR 
VXGE_HW_RING_T_CODE_BUF_SIZE_ERR 
VXGE_HW_RING_T_CODE_INT_ECC_ERR 
VXGE_HW_RING_T_CODE_BENIGN_OVFLOW 
VXGE_HW_RING_T_CODE_ZERO_LEN_BUFF 
VXGE_HW_RING_T_CODE_FRM_DROP 
VXGE_HW_RING_T_CODE_UNUSED 
VXGE_HW_RING_T_CODE_MULTI_ERR 

Definition at line 172 of file vxge_traffic.h.

◆ vxge_hw_fifo_gather_code

enum enum vxge_hw_fifo_gather_code - Gather codes used in fifo TxD @VXGE_HW_FIFO_GATHER_CODE_FIRST: First TxDL @VXGE_HW_FIFO_GATHER_CODE_MIDDLE: Middle TxDL @VXGE_HW_FIFO_GATHER_CODE_LAST: Last TxDL @VXGE_HW_FIFO_GATHER_CODE_FIRST_LAST: First and Last TxDL.

These gather codes are used to indicate the position of a TxD in a TxD list

Enumerator
VXGE_HW_FIFO_GATHER_CODE_FIRST 
VXGE_HW_FIFO_GATHER_CODE_MIDDLE 
VXGE_HW_FIFO_GATHER_CODE_LAST 
VXGE_HW_FIFO_GATHER_CODE_FIRST_LAST 

Definition at line 198 of file vxge_traffic.h.

◆ vxge_hw_fifo_tcode

enum enum vxge_hw_fifo_tcode - tcodes used in fifo @VXGE_HW_FIFO_T_CODE_OK: Transfer OK @VXGE_HW_FIFO_T_CODE_PCI_READ_CORRUPT: PCI read transaction (either TxD or frame data) returned with corrupt data.

@VXGE_HW_FIFO_T_CODE_PCI_READ_FAIL:PCI read transaction was returned with no data. @VXGE_HW_FIFO_T_CODE_INVALID_MSS: The host attempted to send either a frame or LSO MSS that was too long (>9800B). @VXGE_HW_FIFO_T_CODE_LSO_ERROR: Error detected during TCP/UDP Large Send Offload operation, due to improper header template, unsupported protocol, etc. @VXGE_HW_FIFO_T_CODE_UNUSED: Unused @VXGE_HW_FIFO_T_CODE_MULTI_ERROR: Set to 1 by the adapter if multiple data buffer transfer errors are encountered (see below). Otherwise it is set to 0.

These tcodes are returned in various API for TxD status

Enumerator
VXGE_HW_FIFO_T_CODE_OK 
VXGE_HW_FIFO_T_CODE_PCI_READ_CORRUPT 
VXGE_HW_FIFO_T_CODE_PCI_READ_FAIL 
VXGE_HW_FIFO_T_CODE_INVALID_MSS 
VXGE_HW_FIFO_T_CODE_LSO_ERROR 
VXGE_HW_FIFO_T_CODE_UNUSED 
VXGE_HW_FIFO_T_CODE_MULTI_ERROR 

Definition at line 224 of file vxge_traffic.h.

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_ONLY  )

◆ vxge_hw_ring_replenish()

enum vxge_hw_status vxge_hw_ring_replenish ( struct __vxge_hw_ring ring)

Definition at line 557 of file vxge_config.c.

558 {
559  struct __vxge_hw_device *hldev;
560  struct vxge_hw_ring_rxd_1 *rxd;
562  u8 offset = 0;
563  struct __vxge_hw_ring_block *block;
564  u8 i, iob_off;
565 
566  vxge_trace();
567 
568  hldev = ring->vpathh->hldev;
569  /*
570  * We allocate all the dma buffers first and then share the
571  * these buffers among the all rx descriptors in the block.
572  */
573  for (i = 0; i < ARRAY_SIZE(ring->iobuf); i++) {
574  ring->iobuf[i] = alloc_iob(VXGE_LL_MAX_FRAME_SIZE(hldev->vdev));
575  if (!ring->iobuf[i]) {
576  while (i) {
577  free_iob(ring->iobuf[--i]);
578  ring->iobuf[i] = NULL;
579  }
581  goto iobuf_err;
582  }
583  }
584 
586 
587  rxd = &ring->rxdl->rxd[offset];
589  iob_off = VXGE_HW_RING_BUF_PER_BLOCK;
590  else
591  iob_off = offset % ring->buf_per_block;
592 
593  rxd->control_0 = rxd->control_1 = 0;
594  vxge_hw_ring_rxd_1b_set(rxd, ring->iobuf[iob_off],
595  VXGE_LL_MAX_FRAME_SIZE(hldev->vdev));
596 
597  vxge_hw_ring_rxd_post(ring, rxd);
598  }
599  /* linking the block to itself as we use only one rx block*/
600  block = ring->rxdl;
601  block->reserved_2_pNext_RxD_block = (unsigned long) block;
602  block->pNext_RxD_Blk_physical = (u64)virt_to_bus(block);
603 
604  ring->rxd_offset = 0;
605 iobuf_err:
606  return status;
607 }
struct __vxge_hw_virtualpath * vpathh
Definition: vxge_config.h:379
void free_iob(struct io_buffer *iobuf)
Free I/O buffer.
Definition: iobuf.c:145
uint16_t block
Definition: tftp.h:12
void vxge_hw_ring_rxd_post(struct __vxge_hw_ring *ring __unused, struct vxge_hw_ring_rxd_1 *rxdp)
vxge_hw_ring_rxd_post - Post descriptor on the ring.
Definition: vxge_traffic.c:318
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:128
struct vxgedev * vdev
Definition: vxge_config.h:484
uint8_t status
Status.
Definition: ena.h:16
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
struct io_buffer * iobuf[VXGE_HW_RING_BUF_PER_BLOCK+1]
Definition: vxge_config.h:378
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
uint64_t u64
Definition: stdint.h:25
struct __vxge_hw_ring_block * rxdl
Definition: vxge_config.h:370
#define VXGE_LL_MAX_FRAME_SIZE(dev)
Definition: vxge_main.h:147
#define ARRAY_SIZE(x)
Definition: efx_common.h:43
struct __vxge_hw_device - Hal device object @magic: Magic Number @bar0: BAR0 virtual address.
Definition: vxge_config.h:477
static void vxge_hw_ring_rxd_1b_set(struct vxge_hw_ring_rxd_1 *rxdp, struct io_buffer *iob, u32 size)
vxge_hw_ring_rxd_1b_set - Prepare 1-buffer-mode descriptor.
Definition: vxge_config.h:597
#define VXGE_HW_RING_BUF_PER_BLOCK
Definition: vxge_config.h:371
#define vxge_trace()
Definition: vxge_config.h:767
vxge_hw_status
Definition: vxge_config.h:70
struct __vxge_hw_device * hldev
Definition: vxge_config.h:396
struct vxge_hw_ring_rxd_1 rxd[VXGE_HW_MAX_RXDS_PER_BLOCK_1]
Definition: vxge_config.h:342
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
struct vxge_hw_ring_rxd_1 - One buffer mode RxD for ring
Definition: vxge_config.h:154
uint8_t u8
Definition: stdint.h:19
#define VXGE_HW_MAX_RXDS_PER_BLOCK_1
Definition: vxge_config.h:341
#define rxd
Definition: davicom.c:145

References alloc_iob(), ARRAY_SIZE, block, __vxge_hw_ring::buf_per_block, free_iob(), __vxge_hw_virtualpath::hldev, __vxge_hw_ring::iobuf, NULL, offset, rxd, __vxge_hw_ring_block::rxd, __vxge_hw_ring::rxd_offset, __vxge_hw_ring::rxdl, status, __vxge_hw_device::vdev, virt_to_bus(), __vxge_hw_ring::vpathh, VXGE_HW_ERR_OUT_OF_MEMORY, VXGE_HW_MAX_RXDS_PER_BLOCK_1, VXGE_HW_OK, VXGE_HW_RING_BUF_PER_BLOCK, vxge_hw_ring_rxd_1b_set(), vxge_hw_ring_rxd_post(), VXGE_LL_MAX_FRAME_SIZE, and vxge_trace.

Referenced by __vxge_hw_ring_create().

◆ vxge_hw_ring_rxd_post()

void vxge_hw_ring_rxd_post ( struct __vxge_hw_ring ring_handle,
struct vxge_hw_ring_rxd_1 rxdp 
)

◆ vxge_hw_fifo_txdl_buffer_set()

void vxge_hw_fifo_txdl_buffer_set ( struct __vxge_hw_fifo fifo,
struct vxge_hw_fifo_txd txdp,
struct io_buffer iob 
)

vxge_hw_fifo_txdl_buffer_set - Set transmit buffer pointer in the descriptor.

@fifo: Handle to the fifo object used for non offload send @txdlh: Descriptor handle. @iob: data buffer.

Definition at line 374 of file vxge_traffic.c.

377 {
378  txdp->control_0 = VXGE_HW_FIFO_TXD_GATHER_CODE(
380  txdp->control_0 |= VXGE_HW_FIFO_TXD_BUFFER_SIZE(iob_len(iob));
381 
382  txdp->control_1 = VXGE_HW_FIFO_TXD_INT_NUMBER(fifo->tx_intr_num);
384 
385  txdp->host_control = (intptr_t)iob;
386  txdp->buffer_pointer = virt_to_bus(iob->data);
387 }
#define VXGE_HW_FIFO_TXD_INT_TYPE_PER_LIST
Definition: vxge_config.h:239
unsigned long intptr_t
Definition: stdint.h:21
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define VXGE_HW_FIFO_TXD_BUFFER_SIZE(val)
Definition: vxge_config.h:226
#define VXGE_HW_FIFO_TXD_GATHER_CODE(val)
Definition: vxge_config.h:220
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:151
Definition: sis900.h:30
void * data
Start of data.
Definition: iobuf.h:44
#define VXGE_HW_FIFO_TXD_INT_NUMBER(val)
Definition: vxge_config.h:237

References io_buffer::data, iob_len(), __vxge_hw_fifo::tx_intr_num, txdp, virt_to_bus(), VXGE_HW_FIFO_GATHER_CODE_FIRST_LAST, VXGE_HW_FIFO_TXD_BUFFER_SIZE, VXGE_HW_FIFO_TXD_GATHER_CODE, VXGE_HW_FIFO_TXD_INT_NUMBER, and VXGE_HW_FIFO_TXD_INT_TYPE_PER_LIST.

Referenced by vxge_xmit().

◆ vxge_hw_fifo_txdl_post()

void vxge_hw_fifo_txdl_post ( struct __vxge_hw_fifo fifo,
struct vxge_hw_fifo_txd txdp 
)

vxge_hw_fifo_txdl_post - Post descriptor on the fifo channel.

@fifo: Handle to the fifo object used for non offload send @txdp: Tx Descriptor

Post descriptor on the 'fifo' type channel for transmission. Prior to posting the descriptor should be filled in accordance with Host/Titan interface specification for a given service (LL, etc.).

Definition at line 399 of file vxge_traffic.c.

401 {
403 
405 
407 }
static void vxge_hw_fifo_txd_offset_up(u16 *offset)
Definition: vxge_config.h:576
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER
Definition: vxge_config.h:214
uint64_t u64
Definition: stdint.h:25
static void __vxge_hw_non_offload_db_post(struct __vxge_hw_fifo *fifo, u64 txdl_ptr, u32 num_txds)
__vxge_hw_non_offload_db_post - Post non offload doorbell
Definition: vxge_traffic.c:334
Definition: sis900.h:30

References __vxge_hw_non_offload_db_post(), __vxge_hw_fifo::sw_offset, txdp, virt_to_bus(), VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER, and vxge_hw_fifo_txd_offset_up().

Referenced by vxge_xmit().

◆ __vxge_hw_ring_create()

enum vxge_hw_status __vxge_hw_ring_create ( struct __vxge_hw_virtualpath vpath,
struct __vxge_hw_ring ring 
)

Definition at line 615 of file vxge_config.c.

617 {
619  struct __vxge_hw_device *hldev;
620  u32 vp_id;
621 
622  vxge_trace();
623 
624  hldev = vpath->hldev;
625  vp_id = vpath->vp_id;
626 
627  ring->rxdl = malloc_dma(sizeof(struct __vxge_hw_ring_block),
628  sizeof(struct __vxge_hw_ring_block));
629  if (!ring->rxdl) {
630  vxge_debug(VXGE_ERR, "%s:%d malloc_dma error\n",
631  __func__, __LINE__);
633  goto exit;
634  }
635  ring->rxd_offset = 0;
636  ring->vpathh = vpath;
639  ring->vp_id = vp_id;
640  ring->vp_reg = vpath->vp_reg;
641  ring->common_reg = hldev->common_reg;
642 
644 
646  if (status != VXGE_HW_OK) {
647  __vxge_hw_ring_delete(ring);
648  goto exit;
649  }
650 exit:
651  return status;
652 }
struct __vxge_hw_virtualpath * vpathh
Definition: vxge_config.h:379
enum vxge_hw_status __vxge_hw_ring_delete(struct __vxge_hw_ring *ring)
Definition: vxge_config.c:658
struct vxge_hw_common_reg * common_reg
Definition: vxge_config.h:497
#define vxge_debug(mask, fmt...)
Definition: vxge_config.h:762
uint8_t status
Status.
Definition: ena.h:16
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:361
struct vxge_hw_common_reg * common_reg
Definition: vxge_config.h:362
struct __vxge_hw_ring_block * rxdl
Definition: vxge_config.h:370
struct __vxge_hw_device - Hal device object @magic: Magic Number @bar0: BAR0 virtual address.
Definition: vxge_config.h:477
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:397
static void *__malloc malloc_dma(size_t size, size_t phys_align)
Allocate memory for DMA.
Definition: malloc.h:66
#define VXGE_HW_RING_BUF_PER_BLOCK
Definition: vxge_config.h:371
#define vxge_trace()
Definition: vxge_config.h:767
vxge_hw_status
Definition: vxge_config.h:70
struct __vxge_hw_device * hldev
Definition: vxge_config.h:396
#define VXGE_HW_RING_RXD_QWORD_LIMIT
Definition: vxge_config.h:367
enum vxge_hw_status vxge_hw_ring_replenish(struct __vxge_hw_ring *ring)
Definition: vxge_config.c:557
#define VXGE_HW_RING_RX_POLL_WEIGHT
Definition: vxge_config.h:375
uint32_t u32
Definition: stdint.h:23
#define VXGE_ERR
Definition: vxge_config.h:54

References __vxge_hw_ring_delete(), __vxge_hw_ring::buf_per_block, __vxge_hw_ring::common_reg, __vxge_hw_device::common_reg, __vxge_hw_virtualpath::hldev, malloc_dma(), __vxge_hw_ring::rx_poll_weight, __vxge_hw_ring::rxd_offset, __vxge_hw_ring::rxd_qword_limit, __vxge_hw_ring::rxdl, status, __vxge_hw_ring::vp_id, __vxge_hw_virtualpath::vp_id, __vxge_hw_ring::vp_reg, __vxge_hw_virtualpath::vp_reg, __vxge_hw_ring::vpathh, vxge_debug, VXGE_ERR, VXGE_HW_ERR_OUT_OF_MEMORY, VXGE_HW_OK, VXGE_HW_RING_BUF_PER_BLOCK, vxge_hw_ring_replenish(), VXGE_HW_RING_RX_POLL_WEIGHT, VXGE_HW_RING_RXD_QWORD_LIMIT, and vxge_trace.

Referenced by vxge_hw_vpath_open().

◆ __vxge_hw_ring_delete()

enum vxge_hw_status __vxge_hw_ring_delete ( struct __vxge_hw_ring ringh)

Definition at line 658 of file vxge_config.c.

659 {
660  u8 i;
661 
662  vxge_trace();
663 
664  for (i = 0; (i < ARRAY_SIZE(ring->iobuf)) && ring->iobuf[i]; i++) {
665  free_iob(ring->iobuf[i]);
666  ring->iobuf[i] = NULL;
667  }
668 
669  if (ring->rxdl) {
670  free_dma(ring->rxdl, sizeof(struct __vxge_hw_ring_block));
671  ring->rxdl = NULL;
672  }
673  ring->rxd_offset = 0;
674 
675  return VXGE_HW_OK;
676 }
void free_iob(struct io_buffer *iobuf)
Free I/O buffer.
Definition: iobuf.c:145
#define ARRAY_SIZE(x)
Definition: efx_common.h:43
#define vxge_trace()
Definition: vxge_config.h:767
static void free_dma(void *ptr, size_t size)
Free memory allocated with malloc_dma()
Definition: malloc.h:81
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
uint8_t u8
Definition: stdint.h:19

References ARRAY_SIZE, free_dma(), free_iob(), __vxge_hw_ring::iobuf, NULL, __vxge_hw_ring::rxd_offset, __vxge_hw_ring::rxdl, VXGE_HW_OK, and vxge_trace.

Referenced by __vxge_hw_ring_create(), and vxge_hw_vpath_close().

◆ __vxge_hw_fifo_create()

enum vxge_hw_status __vxge_hw_fifo_create ( struct __vxge_hw_virtualpath vpath,
struct __vxge_hw_fifo fifo 
)

Definition at line 813 of file vxge_config.c.

815 {
817 
818  vxge_trace();
819 
820  fifo->vpathh = vpath;
822  fifo->hw_offset = fifo->sw_offset = 0;
823  fifo->nofl_db = vpath->nofl_db;
824  fifo->vp_id = vpath->vp_id;
825  fifo->vp_reg = vpath->vp_reg;
826  fifo->tx_intr_num = (vpath->vp_id * VXGE_HW_MAX_INTR_PER_VP)
828 
829  fifo->txdl = malloc_dma(sizeof(struct vxge_hw_fifo_txd)
830  * fifo->depth, fifo->depth);
831  if (!fifo->txdl) {
832  vxge_debug(VXGE_ERR, "%s:%d malloc_dma error\n",
833  __func__, __LINE__);
835  }
836  memset(fifo->txdl, 0, sizeof(struct vxge_hw_fifo_txd) * fifo->depth);
837  return status;
838 }
#define VXGE_HW_FIFO_TXD_DEPTH
Definition: vxge_config.h:329
struct __vxge_hw_virtualpath * vpathh
Definition: vxge_config.h:334
struct vxge_hw_fifo_txd - Transmit Descriptor
Definition: vxge_config.h:212
struct __vxge_hw_non_offload_db_wrapper * nofl_db
Definition: vxge_config.h:324
#define vxge_debug(mask, fmt...)
Definition: vxge_config.h:762
uint8_t status
Status.
Definition: ena.h:16
#define VXGE_HW_MAX_INTR_PER_VP
Definition: vxge_traffic.h:129
#define VXGE_HW_VPATH_INTR_TX
Definition: vxge_traffic.h:130
struct __vxge_hw_non_offload_db_wrapper * nofl_db
Definition: vxge_config.h:399
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:397
static void *__malloc malloc_dma(size_t size, size_t phys_align)
Allocate memory for DMA.
Definition: malloc.h:66
#define vxge_trace()
Definition: vxge_config.h:767
vxge_hw_status
Definition: vxge_config.h:70
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:323
struct vxge_hw_fifo_txd * txdl
Definition: vxge_config.h:328
#define VXGE_ERR
Definition: vxge_config.h:54
void * memset(void *dest, int character, size_t len) __nonnull

References __vxge_hw_fifo::depth, __vxge_hw_fifo::hw_offset, malloc_dma(), memset(), __vxge_hw_fifo::nofl_db, __vxge_hw_virtualpath::nofl_db, status, __vxge_hw_fifo::sw_offset, __vxge_hw_fifo::tx_intr_num, __vxge_hw_fifo::txdl, __vxge_hw_fifo::vp_id, __vxge_hw_virtualpath::vp_id, __vxge_hw_fifo::vp_reg, __vxge_hw_virtualpath::vp_reg, __vxge_hw_fifo::vpathh, vxge_debug, VXGE_ERR, VXGE_HW_ERR_OUT_OF_MEMORY, VXGE_HW_FIFO_TXD_DEPTH, VXGE_HW_MAX_INTR_PER_VP, VXGE_HW_OK, VXGE_HW_VPATH_INTR_TX, and vxge_trace.

Referenced by vxge_hw_vpath_open().

◆ __vxge_hw_fifo_delete()

enum vxge_hw_status __vxge_hw_fifo_delete ( struct __vxge_hw_fifo fifo)

Definition at line 844 of file vxge_config.c.

845 {
846  vxge_trace();
847 
848  if (fifo->txdl)
849  free_dma(fifo->txdl,
850  sizeof(struct vxge_hw_fifo_txd) * fifo->depth);
851 
852  fifo->txdl = NULL;
853  fifo->hw_offset = fifo->sw_offset = 0;
854 
855  return VXGE_HW_OK;
856 }
struct vxge_hw_fifo_txd - Transmit Descriptor
Definition: vxge_config.h:212
#define vxge_trace()
Definition: vxge_config.h:767
struct vxge_hw_fifo_txd * txdl
Definition: vxge_config.h:328
static void free_dma(void *ptr, size_t size)
Free memory allocated with malloc_dma()
Definition: malloc.h:81
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362

References __vxge_hw_fifo::depth, free_dma(), __vxge_hw_fifo::hw_offset, NULL, __vxge_hw_fifo::sw_offset, __vxge_hw_fifo::txdl, VXGE_HW_OK, and vxge_trace.

Referenced by vxge_hw_vpath_close(), and vxge_hw_vpath_open().

◆ __vxge_hw_vpath_reset()

enum vxge_hw_status __vxge_hw_vpath_reset ( struct __vxge_hw_device devh,
u32  vp_id 
)

Definition at line 1269 of file vxge_config.c.

1270 {
1271  u64 val64;
1273 
1274  vxge_trace();
1275 
1276  val64 = VXGE_HW_CMN_RSTHDLR_CFG0_SW_RESET_VPATH(1 << (16 - vp_id));
1277 
1279  &hldev->common_reg->cmn_rsthdlr_cfg0);
1280 
1281  return status;
1282 }
static void __vxge_hw_pio_mem_write32_upper(u32 val, void __iomem *addr)
Definition: vxge_config.h:703
#define VXGE_HW_CMN_RSTHDLR_CFG0_SW_RESET_VPATH(val)
Definition: vxge_reg.h:72
uint8_t status
Status.
Definition: ena.h:16
uint64_t u64
Definition: stdint.h:25
#define vxge_bVALn(bits, loc, n)
Definition: vxge_reg.h:35
#define vxge_trace()
Definition: vxge_config.h:767
vxge_hw_status
Definition: vxge_config.h:70
uint32_t u32
Definition: stdint.h:23

References __vxge_hw_pio_mem_write32_upper(), vxge_hw_common_reg::cmn_rsthdlr_cfg0, __vxge_hw_device::common_reg, status, vxge_bVALn, VXGE_HW_CMN_RSTHDLR_CFG0_SW_RESET_VPATH, VXGE_HW_OK, and vxge_trace.

Referenced by __vxge_hw_vp_initialize(), and vxge_hw_vpath_reset().

◆ __vxge_hw_vpath_enable()

enum vxge_hw_status __vxge_hw_vpath_enable ( struct __vxge_hw_device devh,
u32  vp_id 
)

◆ __vxge_hw_vpath_prc_configure()

void __vxge_hw_vpath_prc_configure ( struct __vxge_hw_device hldev)

Definition at line 1290 of file vxge_config.c.

1291 {
1292  u64 val64;
1293  struct __vxge_hw_virtualpath *vpath;
1294  struct vxge_hw_vpath_reg __iomem *vp_reg;
1295 
1296  vxge_trace();
1297 
1298  vpath = &hldev->virtual_path;
1299  vp_reg = vpath->vp_reg;
1300 
1301  val64 = readq(&vp_reg->prc_cfg1);
1303  writeq(val64, &vp_reg->prc_cfg1);
1304 
1305  val64 = readq(&vpath->vp_reg->prc_cfg6);
1306  val64 &= ~VXGE_HW_PRC_CFG6_RXD_CRXDT(0x1ff);
1307  val64 &= ~VXGE_HW_PRC_CFG6_RXD_SPAT(0x1ff);
1309  val64 |= VXGE_HW_PRC_CFG6_RXD_CRXDT(0x3);
1310  val64 |= VXGE_HW_PRC_CFG6_RXD_SPAT(0xf);
1311  writeq(val64, &vpath->vp_reg->prc_cfg6);
1312 
1314  (u64)virt_to_bus(vpath->ringh.rxdl) >> 3),
1315  &vp_reg->prc_cfg5);
1316 
1317  val64 = readq(&vp_reg->prc_cfg4);
1318  val64 |= VXGE_HW_PRC_CFG4_IN_SVC;
1319  val64 &= ~VXGE_HW_PRC_CFG4_RING_MODE(0x3);
1320  val64 |= VXGE_HW_PRC_CFG4_RING_MODE(
1323 
1324  writeq(val64, &vp_reg->prc_cfg4);
1325  return;
1326 }
uint64_t readq(volatile uint64_t *io_addr)
Read 64-bit qword from memory-mapped device.
#define VXGE_HW_PRC_CFG6_RXD_CRXDT(val)
Definition: vxge_reg.h:63
struct __vxge_hw_virtualpath virtual_path
Definition: vxge_config.h:507
#define VXGE_HW_PRC_CFG4_RING_MODE(val)
Definition: vxge_reg.h:47
#define VXGE_HW_PRC_CFG1_RTI_TINT_DISABLE
Definition: vxge_reg.h:38
#define VXGE_HW_PRC_CFG5_RXD0_ADD(val)
Definition: vxge_reg.h:56
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
#define VXGE_HW_PRC_CFG6_DOORBELL_MODE_EN
Definition: vxge_reg.h:60
#define VXGE_HW_PRC_CFG4_RTH_DISABLE
Definition: vxge_reg.h:50
uint64_t u64
Definition: stdint.h:25
struct __vxge_hw_ring_block * rxdl
Definition: vxge_config.h:370
#define __iomem
Definition: igbvf_osdep.h:45
struct __vxge_hw_ring ringh
Definition: vxge_config.h:406
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:397
#define vxge_trace()
Definition: vxge_config.h:767
#define VXGE_HW_PRC_CFG4_IN_SVC
Definition: vxge_reg.h:46
#define VXGE_HW_PRC_CFG6_RXD_SPAT(val)
Definition: vxge_reg.h:65
void writeq(uint64_t data, volatile uint64_t *io_addr)
Write 64-bit qword to memory-mapped device.
#define VXGE_HW_PRC_CFG4_RING_MODE_ONE_BUFFER
Definition: vxge_reg.h:139

References __iomem, vxge_hw_vpath_reg::prc_cfg1, vxge_hw_vpath_reg::prc_cfg4, vxge_hw_vpath_reg::prc_cfg5, vxge_hw_vpath_reg::prc_cfg6, readq(), __vxge_hw_virtualpath::ringh, __vxge_hw_ring::rxdl, virt_to_bus(), __vxge_hw_device::virtual_path, __vxge_hw_virtualpath::vp_reg, VXGE_HW_PRC_CFG1_RTI_TINT_DISABLE, VXGE_HW_PRC_CFG4_IN_SVC, VXGE_HW_PRC_CFG4_RING_MODE, VXGE_HW_PRC_CFG4_RING_MODE_ONE_BUFFER, VXGE_HW_PRC_CFG4_RTH_DISABLE, VXGE_HW_PRC_CFG5_RXD0_ADD, VXGE_HW_PRC_CFG6_DOORBELL_MODE_EN, VXGE_HW_PRC_CFG6_RXD_CRXDT, VXGE_HW_PRC_CFG6_RXD_SPAT, vxge_trace, and writeq().

Referenced by vxge_hw_vpath_open(), and vxge_hw_vpath_recover_from_reset().

◆ __vxge_hw_vpath_kdfc_configure()

enum vxge_hw_status __vxge_hw_vpath_kdfc_configure ( struct __vxge_hw_device devh,
u32  vp_id 
)

Definition at line 1334 of file vxge_config.c.

1335 {
1336  u64 val64;
1337  u64 vpath_stride;
1339  struct __vxge_hw_virtualpath *vpath;
1340  struct vxge_hw_vpath_reg __iomem *vp_reg;
1341 
1342  vxge_trace();
1343 
1344  vpath = &hldev->virtual_path;
1345  vp_reg = vpath->vp_reg;
1346  status = __vxge_hw_kdfc_swapper_set(hldev->legacy_reg, vp_reg);
1347 
1348  if (status != VXGE_HW_OK)
1349  goto exit;
1350 
1351  val64 = readq(&vp_reg->kdfc_drbl_triplet_total);
1352 
1353  vpath->max_kdfc_db =
1355  val64+1)/2;
1356 
1357  vpath->max_nofl_db = vpath->max_kdfc_db;
1358 
1360  (vpath->max_nofl_db*2)-1);
1361 
1362  writeq(val64, &vp_reg->kdfc_fifo_trpl_partition);
1363 
1365  &vp_reg->kdfc_fifo_trpl_ctrl);
1366 
1367  val64 = readq(&vp_reg->kdfc_trpl_fifo_0_ctrl);
1368 
1369  val64 &= ~(VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE(0x3) |
1371 
1374 #if (__BYTE_ORDER != __BIG_ENDIAN)
1376 #endif
1378 
1379  writeq(val64, &vp_reg->kdfc_trpl_fifo_0_ctrl);
1380  writeq((u64)0, &vp_reg->kdfc_trpl_fifo_0_wb_address);
1381  wmb();
1382  vpath_stride = readq(&hldev->toc_reg->toc_kdfc_vpath_stride);
1383 
1384  vpath->nofl_db =
1386  (hldev->kdfc + (vp_id *
1388  vpath_stride)));
1389 exit:
1390  return status;
1391 }
wmb()
u64 kdfc_trpl_fifo_0_wb_address
Definition: vxge_reg.h:4157
uint64_t readq(volatile uint64_t *io_addr)
Read 64-bit qword from memory-mapped device.
#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE(val)
Definition: vxge_reg.h:101
u64 kdfc_fifo_trpl_partition
Definition: vxge_reg.h:4116
uint8_t status
Status.
Definition: ena.h:16
enum vxge_hw_status __vxge_hw_kdfc_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg, struct vxge_hw_vpath_reg __iomem *vpath_reg)
Definition: vxge_config.c:760
#define VXGE_HW_TOC_KDFC_VPATH_STRIDE_GET_TOC_KDFC_VPATH_STRIDE(bits)
Definition: vxge_reg.h:124
#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SELECT(val)
Definition: vxge_reg.h:109
#define VXGE_HW_KDFC_DRBL_TRIPLET_TOTAL_GET_KDFC_MAX_SIZE(bits)
Definition: vxge_reg.h:105
#define u32
Definition: vga.h:21
uint64_t u64
Definition: stdint.h:25
u64 kdfc_trpl_fifo_0_ctrl
Definition: vxge_reg.h:4122
#define VXGE_HW_KDFC_FIFO_TRPL_CTRL_TRIPLET_ENABLE
Definition: vxge_reg.h:99
#define __iomem
Definition: igbvf_osdep.h:45
#define VXGE_HW_KDFC_FIFO_TRPL_PARTITION_LENGTH_0(val)
Definition: vxge_reg.h:95
u64 kdfc_drbl_triplet_total
Definition: vxge_reg.h:4167
struct __vxge_hw_non_offload_db_wrapper * nofl_db
Definition: vxge_config.h:399
#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SWAP_EN
Definition: vxge_reg.h:103
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:397
#define vxge_trace()
Definition: vxge_config.h:767
vxge_hw_status
Definition: vxge_config.h:70
#define VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE_NON_OFFLOAD_ONLY
Definition: vxge_reg.h:109
void writeq(uint64_t data, volatile uint64_t *io_addr)
Write 64-bit qword to memory-mapped device.

References __iomem, __vxge_hw_kdfc_swapper_set(), __vxge_hw_device::kdfc, vxge_hw_vpath_reg::kdfc_drbl_triplet_total, vxge_hw_vpath_reg::kdfc_fifo_trpl_ctrl, vxge_hw_vpath_reg::kdfc_fifo_trpl_partition, vxge_hw_vpath_reg::kdfc_trpl_fifo_0_ctrl, vxge_hw_vpath_reg::kdfc_trpl_fifo_0_wb_address, __vxge_hw_device::legacy_reg, __vxge_hw_virtualpath::max_kdfc_db, __vxge_hw_virtualpath::max_nofl_db, __vxge_hw_virtualpath::nofl_db, readq(), status, vxge_hw_toc_reg::toc_kdfc_vpath_stride, __vxge_hw_device::toc_reg, u32, __vxge_hw_device::virtual_path, __vxge_hw_virtualpath::vp_reg, VXGE_HW_KDFC_DRBL_TRIPLET_TOTAL_GET_KDFC_MAX_SIZE, VXGE_HW_KDFC_FIFO_TRPL_CTRL_TRIPLET_ENABLE, VXGE_HW_KDFC_FIFO_TRPL_PARTITION_LENGTH_0, VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE, VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_MODE_NON_OFFLOAD_ONLY, VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SELECT, VXGE_HW_KDFC_TRPL_FIFO_0_CTRL_SWAP_EN, VXGE_HW_OK, VXGE_HW_TOC_KDFC_VPATH_STRIDE_GET_TOC_KDFC_VPATH_STRIDE, vxge_trace, wmb(), and writeq().

Referenced by __vxge_hw_vpath_initialize().

◆ __vxge_hw_vpath_mac_configure()

enum vxge_hw_status __vxge_hw_vpath_mac_configure ( struct __vxge_hw_device devh)

Definition at line 1398 of file vxge_config.c.

1399 {
1400  u64 val64;
1402  struct __vxge_hw_virtualpath *vpath;
1403  struct vxge_hw_vpath_reg __iomem *vp_reg;
1404 
1405  vxge_trace();
1406 
1407  vpath = &hldev->virtual_path;
1408  vp_reg = vpath->vp_reg;
1409 
1411  vpath->vsport_number), &vp_reg->xmac_vsport_choice);
1412 
1413  val64 = readq(&vp_reg->rxmac_vcfg1);
1414 
1417 
1418  writeq(val64, &vp_reg->rxmac_vcfg1);
1419  return status;
1420 }
uint64_t readq(volatile uint64_t *io_addr)
Read 64-bit qword from memory-mapped device.
uint8_t status
Status.
Definition: ena.h:16
#define VXGE_HW_RXMAC_VCFG1_RTS_RTH_MULTI_IT_BD_MODE(val)
Definition: vxge_reg.h:179
uint64_t u64
Definition: stdint.h:25
#define __iomem
Definition: igbvf_osdep.h:45
#define VXGE_HW_XMAC_VSPORT_CHOICE_VSPORT_NUMBER(val)
Definition: vxge_reg.h:202
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:397
#define vxge_trace()
Definition: vxge_config.h:767
vxge_hw_status
Definition: vxge_config.h:70
#define VXGE_HW_RXMAC_VCFG1_RTS_RTH_MULTI_IT_EN_MODE
Definition: vxge_reg.h:180
void writeq(uint64_t data, volatile uint64_t *io_addr)
Write 64-bit qword to memory-mapped device.

References __iomem, readq(), vxge_hw_vpath_reg::rxmac_vcfg1, status, __vxge_hw_device::virtual_path, __vxge_hw_virtualpath::vp_reg, __vxge_hw_virtualpath::vsport_number, VXGE_HW_OK, VXGE_HW_RXMAC_VCFG1_RTS_RTH_MULTI_IT_BD_MODE, VXGE_HW_RXMAC_VCFG1_RTS_RTH_MULTI_IT_EN_MODE, VXGE_HW_XMAC_VSPORT_CHOICE_VSPORT_NUMBER, vxge_trace, writeq(), and vxge_hw_vpath_reg::xmac_vsport_choice.

Referenced by __vxge_hw_vpath_initialize().

◆ __vxge_hw_vpath_tim_configure()

enum vxge_hw_status __vxge_hw_vpath_tim_configure ( struct __vxge_hw_device devh,
u32  vp_id 
)

Definition at line 1428 of file vxge_config.c.

1429 {
1430  u64 val64;
1432  struct __vxge_hw_virtualpath *vpath;
1433  struct vxge_hw_vpath_reg __iomem *vp_reg;
1434 
1435  vxge_trace();
1436 
1437  vpath = &hldev->virtual_path;
1438  vp_reg = vpath->vp_reg;
1439 
1440  writeq((u64)0, &vp_reg->tim_dest_addr);
1441  writeq((u64)0, &vp_reg->tim_vpath_map);
1442  writeq((u64)0, &vp_reg->tim_bitmap);
1443  writeq((u64)0, &vp_reg->tim_remap);
1444 
1446  (vp_id * VXGE_HW_MAX_INTR_PER_VP) +
1448 
1449  val64 = readq(&vp_reg->tim_pci_cfg);
1450  val64 |= VXGE_HW_TIM_PCI_CFG_ADD_PAD;
1451  writeq(val64, &vp_reg->tim_pci_cfg);
1452 
1453  /* TX configuration */
1455  (VXGE_TTI_BTIMER_VAL * 1000) / 272);
1462  writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);
1463 
1468  writeq(val64, &vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_TX]);
1469 
1473  (VXGE_TTI_LTIMER_VAL * 1000) / 272);
1474  writeq(val64, &vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]);
1475 
1476  /* RX configuration */
1478  (VXGE_RTI_BTIMER_VAL * 1000) / 272);
1483  writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]);
1484 
1489  writeq(val64, &vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_RX]);
1490 
1494  (VXGE_RTI_LTIMER_VAL * 1000) / 272);
1495  writeq(val64, &vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]);
1496 
1497  val64 = 0;
1504 
1505  return status;
1506 }
#define RTI_RX_UFC_A
Definition: vxge_main.h:118
#define VXGE_HW_TIM_CFG1_INT_NUM_URNG_A(val)
Definition: vxge_reg.h:271
#define VXGE_HW_TIM_CFG3_INT_NUM_LTIMER_VAL(val)
Definition: vxge_reg.h:284
#define TTI_TX_URANGE_C
Definition: vxge_main.h:95
u64 tim_cfg2_int_num[4]
Definition: vxge_reg.h:4296
uint64_t readq(volatile uint64_t *io_addr)
Read 64-bit qword from memory-mapped device.
#define VXGE_HW_VPATH_INTR_EINTA
Definition: vxge_traffic.h:132
#define TTI_TX_UFC_A
Definition: vxge_main.h:96
#define VXGE_HW_TIM_CFG2_INT_NUM_UEC_C(val)
Definition: vxge_reg.h:277
u64 tim_cfg3_int_num[4]
Definition: vxge_reg.h:4301
#define VXGE_HW_TIM_CFG2_INT_NUM_UEC_B(val)
Definition: vxge_reg.h:276
u64 tim_cfg1_int_num[4]
Definition: vxge_reg.h:4286
#define VXGE_HW_TIM_CFG2_INT_NUM_UEC_D(val)
Definition: vxge_reg.h:278
#define VXGE_HW_VPATH_INTR_RX
Definition: vxge_traffic.h:131
uint8_t status
Status.
Definition: ena.h:16
#define VXGE_TTI_BTIMER_VAL
Definition: vxge_main.h:73
#define RTI_RX_URANGE_A
Definition: vxge_main.h:112
#define VXGE_HW_MAX_INTR_PER_VP
Definition: vxge_traffic.h:129
uint64_t u64
Definition: stdint.h:25
#define VXGE_HW_TIM_CFG1_INT_NUM_URNG_C(val)
Definition: vxge_reg.h:273
#define TTI_TX_UFC_B
Definition: vxge_main.h:97
#define VXGE_HW_VPATH_INTR_BMAP
Definition: vxge_traffic.h:133
#define TTI_TX_URANGE_B
Definition: vxge_main.h:94
#define VXGE_HW_TIM_PCI_CFG_ADD_PAD
Definition: vxge_reg.h:306
#define __iomem
Definition: igbvf_osdep.h:45
#define RTI_RX_URANGE_C
Definition: vxge_main.h:114
#define VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL
Definition: vxge_traffic.h:138
#define VXGE_HW_TIM_CFG1_INT_NUM_BTIMER_VAL(val)
Definition: vxge_reg.h:265
#define VXGE_HW_TIM_CFG1_INT_NUM_TIMER_AC
Definition: vxge_reg.h:269
#define VXGE_HW_VPATH_INTR_TX
Definition: vxge_traffic.h:130
#define RTI_RX_UFC_B
Definition: vxge_main.h:119
#define RTI_RX_UFC_D
Definition: vxge_main.h:121
#define TTI_TX_UFC_D
Definition: vxge_main.h:99
#define RTI_RX_UFC_C
Definition: vxge_main.h:120
#define VXGE_HW_TIM_CFG1_INT_NUM_TXFRM_CNT_EN
Definition: vxge_reg.h:267
#define VXGE_HW_TIM_CFG1_INT_NUM_URNG_B(val)
Definition: vxge_reg.h:272
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:397
#define TTI_TX_URANGE_A
Definition: vxge_main.h:93
#define VXGE_RTI_BTIMER_VAL
Definition: vxge_main.h:79
#define vxge_trace()
Definition: vxge_config.h:767
vxge_hw_status
Definition: vxge_config.h:70
#define VXGE_HW_TIM_CFG3_INT_NUM_UTIL_SEL(val)
Definition: vxge_reg.h:283
#define TTI_TX_UFC_C
Definition: vxge_main.h:98
#define VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI
Definition: vxge_reg.h:270
#define VXGE_HW_TIM_CFG2_INT_NUM_UEC_A(val)
Definition: vxge_reg.h:275
#define VXGE_RTI_LTIMER_VAL
Definition: vxge_main.h:80
#define VXGE_TTI_LTIMER_VAL
Definition: vxge_main.h:77
#define VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL
Definition: vxge_traffic.h:137
#define VXGE_HW_TIM_RING_ASSN_INT_NUM(val)
Definition: vxge_reg.h:297
#define RTI_RX_URANGE_B
Definition: vxge_main.h:113
void writeq(uint64_t data, volatile uint64_t *io_addr)
Write 64-bit qword to memory-mapped device.

References __iomem, readq(), RTI_RX_UFC_A, RTI_RX_UFC_B, RTI_RX_UFC_C, RTI_RX_UFC_D, RTI_RX_URANGE_A, RTI_RX_URANGE_B, RTI_RX_URANGE_C, status, vxge_hw_vpath_reg::tim_bitmap, vxge_hw_vpath_reg::tim_cfg1_int_num, vxge_hw_vpath_reg::tim_cfg2_int_num, vxge_hw_vpath_reg::tim_cfg3_int_num, vxge_hw_vpath_reg::tim_dest_addr, vxge_hw_vpath_reg::tim_pci_cfg, vxge_hw_vpath_reg::tim_remap, vxge_hw_vpath_reg::tim_ring_assn, vxge_hw_vpath_reg::tim_vpath_map, TTI_TX_UFC_A, TTI_TX_UFC_B, TTI_TX_UFC_C, TTI_TX_UFC_D, TTI_TX_URANGE_A, TTI_TX_URANGE_B, TTI_TX_URANGE_C, __vxge_hw_device::virtual_path, __vxge_hw_virtualpath::vp_reg, VXGE_HW_MAX_INTR_PER_VP, VXGE_HW_OK, VXGE_HW_TIM_CFG1_INT_NUM_BTIMER_VAL, VXGE_HW_TIM_CFG1_INT_NUM_TIMER_AC, VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI, VXGE_HW_TIM_CFG1_INT_NUM_TXFRM_CNT_EN, VXGE_HW_TIM_CFG1_INT_NUM_URNG_A, VXGE_HW_TIM_CFG1_INT_NUM_URNG_B, VXGE_HW_TIM_CFG1_INT_NUM_URNG_C, VXGE_HW_TIM_CFG2_INT_NUM_UEC_A, VXGE_HW_TIM_CFG2_INT_NUM_UEC_B, VXGE_HW_TIM_CFG2_INT_NUM_UEC_C, VXGE_HW_TIM_CFG2_INT_NUM_UEC_D, VXGE_HW_TIM_CFG3_INT_NUM_LTIMER_VAL, VXGE_HW_TIM_CFG3_INT_NUM_UTIL_SEL, VXGE_HW_TIM_PCI_CFG_ADD_PAD, VXGE_HW_TIM_RING_ASSN_INT_NUM, VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL, VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL, VXGE_HW_VPATH_INTR_BMAP, VXGE_HW_VPATH_INTR_EINTA, VXGE_HW_VPATH_INTR_RX, VXGE_HW_VPATH_INTR_TX, VXGE_RTI_BTIMER_VAL, VXGE_RTI_LTIMER_VAL, vxge_trace, VXGE_TTI_BTIMER_VAL, VXGE_TTI_LTIMER_VAL, and writeq().

Referenced by __vxge_hw_vpath_initialize().

◆ __vxge_hw_vpath_initialize()

enum vxge_hw_status __vxge_hw_vpath_initialize ( struct __vxge_hw_device devh,
u32  vp_id 
)

Definition at line 1514 of file vxge_config.c.

1515 {
1516  u64 val64;
1517  u32 val32;
1518  int i;
1520  struct __vxge_hw_virtualpath *vpath;
1521  struct vxge_hw_vpath_reg *vp_reg;
1522 
1523  vxge_trace();
1524 
1525  vpath = &hldev->virtual_path;
1526 
1527  if (!(hldev->vpath_assignments & vxge_mBIT(vp_id))) {
1529  goto exit;
1530  }
1531  vp_reg = vpath->vp_reg;
1532  status = __vxge_hw_legacy_swapper_set(hldev->legacy_reg);
1533  if (status != VXGE_HW_OK)
1534  goto exit;
1535 
1537 
1538  if (status != VXGE_HW_OK)
1539  goto exit;
1540  val64 = readq(&vpath->vpmgmt_reg->xmac_vsport_choices_vp);
1541 
1542  for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
1543  if (val64 & vxge_mBIT(i))
1544  vpath->vsport_number = i;
1545  }
1546 
1548 
1549  if (status != VXGE_HW_OK)
1550  goto exit;
1551 
1552  status = __vxge_hw_vpath_kdfc_configure(hldev, vp_id);
1553 
1554  if (status != VXGE_HW_OK)
1555  goto exit;
1556 
1557  status = __vxge_hw_vpath_tim_configure(hldev, vp_id);
1558 
1559  if (status != VXGE_HW_OK)
1560  goto exit;
1561 
1562  val64 = readq(&vp_reg->rtdma_rd_optimization_ctrl);
1563 
1564  /* Get MRRS value from device control */
1565  status = __vxge_hw_vpath_pci_read(vpath, 1, 0x78, &val32);
1566 
1567  if (status == VXGE_HW_OK) {
1568  val32 = (val32 & VXGE_HW_PCI_EXP_DEVCTL_READRQ) >> 12;
1569  val64 &=
1571  val64 |=
1573 
1575  }
1576 
1578  val64 |=
1581 
1583  writeq(val64, &vp_reg->rtdma_rd_optimization_ctrl);
1584 
1585 exit:
1586  return status;
1587 }
#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_ADDR_BDRY(val)
Definition: vxge_reg.h:249
uint64_t readq(volatile uint64_t *io_addr)
Read 64-bit qword from memory-mapped device.
enum vxge_hw_status __vxge_hw_vpath_mac_configure(struct __vxge_hw_device *hldev)
Definition: vxge_config.c:1398
enum vxge_hw_status __vxge_hw_vpath_kdfc_configure(struct __vxge_hw_device *hldev, u32 vp_id)
Definition: vxge_config.c:1334
uint8_t status
Status.
Definition: ena.h:16
#define VXGE_HW_MAX_PAYLOAD_SIZE_512
Definition: vxge_config.h:68
#define VXGE_HW_MAX_VIRTUAL_PATHS
Definition: vxge_traffic.h:30
uint64_t u64
Definition: stdint.h:25
u64 xmac_vsport_choices_vp
Definition: vxge_reg.h:3946
#define VXGE_HW_PCI_EXP_DEVCTL_READRQ
Definition: vxge_reg.h:242
#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_ADDR_BDRY_EN
Definition: vxge_reg.h:248
#define vxge_mBIT(loc)
Definition: vxge_reg.h:24
struct vxge_hw_vpmgmt_reg * vpmgmt_reg
Definition: vxge_config.h:398
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:397
enum vxge_hw_status __vxge_hw_vpath_swapper_set(struct vxge_hw_vpath_reg __iomem *vpath_reg)
Definition: vxge_config.c:739
#define vxge_trace()
Definition: vxge_config.h:767
vxge_hw_status
Definition: vxge_config.h:70
enum vxge_hw_status __vxge_hw_legacy_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg)
Definition: vxge_config.c:683
#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_FILL_THRESH(val)
Definition: vxge_reg.h:243
#define VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_WAIT_FOR_SPACE
Definition: vxge_reg.h:241
enum vxge_hw_status __vxge_hw_vpath_pci_read(struct __vxge_hw_virtualpath *vpath, u32 phy_func_0, u32 offset, u32 *val)
Definition: vxge_config.c:864
enum vxge_hw_status __vxge_hw_vpath_tim_configure(struct __vxge_hw_device *hldev, u32 vp_id)
Definition: vxge_config.c:1428
u64 rtdma_rd_optimization_ctrl
Definition: vxge_reg.h:4259
void writeq(uint64_t data, volatile uint64_t *io_addr)
Write 64-bit qword to memory-mapped device.
uint32_t u32
Definition: stdint.h:23

References __vxge_hw_legacy_swapper_set(), __vxge_hw_vpath_kdfc_configure(), __vxge_hw_vpath_mac_configure(), __vxge_hw_vpath_pci_read(), __vxge_hw_vpath_swapper_set(), __vxge_hw_vpath_tim_configure(), __vxge_hw_device::legacy_reg, readq(), vxge_hw_vpath_reg::rtdma_rd_optimization_ctrl, status, __vxge_hw_device::virtual_path, __vxge_hw_virtualpath::vp_reg, __vxge_hw_device::vpath_assignments, __vxge_hw_virtualpath::vpmgmt_reg, __vxge_hw_virtualpath::vsport_number, VXGE_HW_ERR_VPATH_NOT_AVAILABLE, VXGE_HW_MAX_PAYLOAD_SIZE_512, VXGE_HW_MAX_VIRTUAL_PATHS, VXGE_HW_OK, VXGE_HW_PCI_EXP_DEVCTL_READRQ, VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_ADDR_BDRY, VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_ADDR_BDRY_EN, VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_FILL_THRESH, VXGE_HW_RTDMA_RD_OPTIMIZATION_CTRL_FB_WAIT_FOR_SPACE, vxge_mBIT, vxge_trace, writeq(), and vxge_hw_vpmgmt_reg::xmac_vsport_choices_vp.

Referenced by __vxge_hw_vp_initialize(), and vxge_hw_vpath_recover_from_reset().

◆ __vxge_hw_vp_initialize()

enum vxge_hw_status __vxge_hw_vp_initialize ( struct __vxge_hw_device hldev,
u32  vp_id,
struct __vxge_hw_virtualpath vpath 
)

Definition at line 1595 of file vxge_config.c.

1597 {
1599 
1600  vxge_trace();
1601 
1602  if (!(hldev->vpath_assignments & vxge_mBIT(vp_id))) {
1604  goto exit;
1605  }
1606 
1607  vpath->vp_id = vp_id;
1608  vpath->vp_open = VXGE_HW_VP_OPEN;
1609  vpath->hldev = hldev;
1610  vpath->vp_reg = hldev->vpath_reg[vp_id];
1611  vpath->vpmgmt_reg = hldev->vpmgmt_reg[vp_id];
1612 
1613  __vxge_hw_vpath_reset(hldev, vp_id);
1614 
1616  if (status != VXGE_HW_OK) {
1617  memset(vpath, 0, sizeof(struct __vxge_hw_virtualpath));
1618  goto exit;
1619  }
1620 
1622  hldev->tim_int_mask1, vp_id);
1623 
1624  status = __vxge_hw_vpath_initialize(hldev, vp_id);
1625 
1626  if (status != VXGE_HW_OK) {
1627  __vxge_hw_vp_terminate(hldev, vpath);
1628  goto exit;
1629  }
1630 
1632 exit:
1633  return status;
1634 }
u64 tim_int_mask0[4]
Definition: vxge_config.h:511
enum vxge_hw_status __vxge_hw_vpath_initialize(struct __vxge_hw_device *hldev, u32 vp_id)
Definition: vxge_config.c:1514
#define VXGE_HW_DEVICE_TIM_INT_MASK_SET(m0, m1, i)
Definition: vxge_config.h:519
static enum vxge_hw_status __vxge_hw_vpath_mgmt_read(struct __vxge_hw_virtualpath *vpath)
Definition: vxge_config.c:1212
uint8_t status
Status.
Definition: ena.h:16
enum vxge_hw_status __vxge_hw_vpath_reset(struct __vxge_hw_device *hldev, u32 vp_id)
Definition: vxge_config.c:1269
u32 tim_int_mask1[4]
Definition: vxge_config.h:512
struct vxge_hw_vpath_reg * vpath_reg[VXGE_HW_TITAN_VPATH_REG_SPACES]
Definition: vxge_config.h:503
enum vxge_hw_status __vxge_hw_vpath_reset_check(struct __vxge_hw_virtualpath *vpath)
Definition: vxge_config.c:1249
void __vxge_hw_vp_terminate(struct __vxge_hw_device *hldev, struct __vxge_hw_virtualpath *vpath)
Definition: vxge_config.c:1641
struct vxge_hw_vpmgmt_reg * vpmgmt_reg[VXGE_HW_TITAN_VPMGMT_REG_SPACES]
Definition: vxge_config.h:501
#define vxge_mBIT(loc)
Definition: vxge_reg.h:24
struct vxge_hw_vpmgmt_reg * vpmgmt_reg
Definition: vxge_config.h:398
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:397
#define vxge_trace()
Definition: vxge_config.h:767
vxge_hw_status
Definition: vxge_config.h:70
struct __vxge_hw_device * hldev
Definition: vxge_config.h:396
#define VXGE_HW_VP_OPEN
Definition: vxge_config.h:394
void * memset(void *dest, int character, size_t len) __nonnull

References __vxge_hw_vp_terminate(), __vxge_hw_vpath_initialize(), __vxge_hw_vpath_mgmt_read(), __vxge_hw_vpath_reset(), __vxge_hw_vpath_reset_check(), __vxge_hw_virtualpath::hldev, memset(), status, __vxge_hw_device::tim_int_mask0, __vxge_hw_device::tim_int_mask1, __vxge_hw_virtualpath::vp_id, __vxge_hw_virtualpath::vp_open, __vxge_hw_virtualpath::vp_reg, __vxge_hw_device::vpath_assignments, __vxge_hw_device::vpath_reg, __vxge_hw_virtualpath::vpmgmt_reg, __vxge_hw_device::vpmgmt_reg, VXGE_HW_DEVICE_TIM_INT_MASK_SET, VXGE_HW_ERR_VPATH_NOT_AVAILABLE, VXGE_HW_OK, VXGE_HW_VP_OPEN, vxge_mBIT, and vxge_trace.

Referenced by vxge_hw_vpath_open().

◆ __vxge_hw_vp_terminate()

void __vxge_hw_vp_terminate ( struct __vxge_hw_device hldev,
struct __vxge_hw_virtualpath vpath 
)

Definition at line 1641 of file vxge_config.c.

1643 {
1644  vxge_trace();
1645 
1646  if (vpath->vp_open == VXGE_HW_VP_NOT_OPEN)
1647  return;
1648 
1650  hldev->tim_int_mask1, vpath->vp_id);
1651 
1652  memset(vpath, 0, sizeof(struct __vxge_hw_virtualpath));
1653 }
u64 tim_int_mask0[4]
Definition: vxge_config.h:511
u32 tim_int_mask1[4]
Definition: vxge_config.h:512
#define VXGE_HW_DEVICE_TIM_INT_MASK_RESET(m0, m1, i)
Definition: vxge_config.h:530
#define vxge_trace()
Definition: vxge_config.h:767
#define VXGE_HW_VP_NOT_OPEN
Definition: vxge_config.h:393
void * memset(void *dest, int character, size_t len) __nonnull

References memset(), __vxge_hw_device::tim_int_mask0, __vxge_hw_device::tim_int_mask1, __vxge_hw_virtualpath::vp_id, __vxge_hw_virtualpath::vp_open, VXGE_HW_DEVICE_TIM_INT_MASK_RESET, VXGE_HW_VP_NOT_OPEN, and vxge_trace.

Referenced by __vxge_hw_vp_initialize(), vxge_hw_vpath_close(), and vxge_hw_vpath_open().

◆ vxge_hw_device_begin_irq()

enum vxge_hw_status vxge_hw_device_begin_irq ( struct __vxge_hw_device hldev)

vxge_hw_device_begin_irq - Begin IRQ processing.

@hldev: HW device handle.

The function performs two actions, It first checks whether (shared IRQ) the interrupt was raised by the device. Next, it masks the device interrupts.

Note: vxge_hw_device_begin_irq() does not flush MMIO writes through the bridge. Therefore, two back-to-back interrupts are potentially possible.

Returns: 0, if the interrupt is not "ours" (note that in this case the device remain enabled). Otherwise, vxge_hw_device_begin_irq() returns 64bit general adapter status.

Definition at line 554 of file vxge_traffic.c.

555 {
556  u64 val64;
558  u64 vpath_mask;
559  enum vxge_hw_status ret = VXGE_HW_OK;
560 
561  val64 = readq(&hldev->common_reg->titan_general_int_status);
562 
563  if (!val64) {
564  ret = VXGE_HW_ERR_WRONG_IRQ;
565  goto exit;
566  }
567 
568  if (val64 == VXGE_HW_ALL_FOXES) {
569 
571 
573 
574  vxge_debug(VXGE_ERR, "%s: %s:%d critical error "
575  "occurred\n", hldev->ndev->name,
576  __func__, __LINE__);
578  goto exit;
579  }
580  }
581 
582  vpath_mask = hldev->vpaths_deployed >>
585  vpath_mask))
587 
590 
591 exit:
592  return ret;
593 }
uint64_t readq(volatile uint64_t *io_addr)
Read 64-bit qword from memory-mapped device.
struct __vxge_hw_virtualpath virtual_path
Definition: vxge_config.h:507
u64 adapter_status
Definition: vxge_reg.h:137
struct vxge_hw_common_reg * common_reg
Definition: vxge_config.h:497
#define vxge_debug(mask, fmt...)
Definition: vxge_config.h:762
#define VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_ALARM_INT
Definition: vxge_reg.h:115
#define VXGE_HW_MAX_VIRTUAL_PATHS
Definition: vxge_traffic.h:30
uint64_t u64
Definition: stdint.h:25
#define VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(val)
Definition: vxge_reg.h:116
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
#define VXGE_HW_ALL_FOXES
Definition: vxge_traffic.h:28
vxge_hw_status
Definition: vxge_config.h:70
static enum vxge_hw_status __vxge_hw_vpath_alarm_process(struct __vxge_hw_virtualpath *vpath)
Definition: vxge_traffic.c:417
u64 titan_general_int_status
Definition: vxge_reg.h:803
struct net_device * ndev
Definition: vxge_config.h:483
#define VXGE_ERR
Definition: vxge_config.h:54
void vxge_hw_device_clear_tx_rx(struct __vxge_hw_device *hldev)
vxge_hw_device_clear_tx_rx - Acknowledge (that is, clear) the condition that has caused the Tx and RX...
Definition: vxge_traffic.c:515

References __vxge_hw_vpath_alarm_process(), adapter_status, vxge_hw_common_reg::adapter_status, __vxge_hw_device::common_reg, net_device::name, __vxge_hw_device::ndev, readq(), vxge_hw_common_reg::titan_general_int_status, __vxge_hw_device::virtual_path, __vxge_hw_device::vpaths_deployed, vxge_debug, VXGE_ERR, VXGE_HW_ALL_FOXES, vxge_hw_device_clear_tx_rx(), VXGE_HW_ERR_SLOT_FREEZE, VXGE_HW_ERR_WRONG_IRQ, VXGE_HW_MAX_VIRTUAL_PATHS, VXGE_HW_OK, VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_ALARM_INT, and VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT.

Referenced by vxge_poll().

◆ vxge_hw_device_intr_enable()

void vxge_hw_device_intr_enable ( struct __vxge_hw_device hldev)

vxge_hw_device_intr_enable - Enable interrupts.

@hldev: HW device handle.

Enable Titan interrupts. The function is to be executed the last in Titan initialization sequence.

See also: vxge_hw_device_intr_disable()

Definition at line 250 of file vxge_traffic.c.

251 {
252  u64 val64;
253  u32 val32;
254 
256 
258 
259  val64 = hldev->tim_int_mask0[VXGE_HW_VPATH_INTR_TX] |
261 
262  if (val64 != 0) {
263  writeq(val64, &hldev->common_reg->tim_int_status0);
264 
265  writeq(~val64, &hldev->common_reg->tim_int_mask0);
266  }
267 
268  val32 = hldev->tim_int_mask1[VXGE_HW_VPATH_INTR_TX] |
270 
271  if (val32 != 0) {
273  &hldev->common_reg->tim_int_status1);
274 
276  &hldev->common_reg->tim_int_mask1);
277  }
278 
279  val64 = readq(&hldev->common_reg->titan_general_int_status);
280 
281  /* We have not enabled the top level interrupt yet.
282  * This will be controlled from vxge_irq() entry api.
283  */
284  return;
285 }
u64 tim_int_mask0[4]
Definition: vxge_config.h:511
enum vxge_hw_status vxge_hw_vpath_intr_enable(struct __vxge_hw_virtualpath *vpath)
Definition: vxge_traffic.c:34
uint64_t readq(volatile uint64_t *io_addr)
Read 64-bit qword from memory-mapped device.
struct __vxge_hw_virtualpath virtual_path
Definition: vxge_config.h:507
struct vxge_hw_common_reg * common_reg
Definition: vxge_config.h:497
static void __vxge_hw_pio_mem_write32_upper(u32 val, void __iomem *addr)
Definition: vxge_config.h:703
#define VXGE_HW_VPATH_INTR_RX
Definition: vxge_traffic.h:131
uint64_t u64
Definition: stdint.h:25
u32 tim_int_mask1[4]
Definition: vxge_config.h:512
#define VXGE_HW_VPATH_INTR_TX
Definition: vxge_traffic.h:130
u64 titan_general_int_status
Definition: vxge_reg.h:803
void writeq(uint64_t data, volatile uint64_t *io_addr)
Write 64-bit qword to memory-mapped device.
uint32_t u32
Definition: stdint.h:23
void vxge_hw_device_mask_all(struct __vxge_hw_device *hldev)
vxge_hw_device_mask_all - Mask all device interrupts.
Definition: vxge_traffic.c:210

References __vxge_hw_pio_mem_write32_upper(), __vxge_hw_device::common_reg, readq(), __vxge_hw_device::tim_int_mask0, vxge_hw_common_reg::tim_int_mask0, __vxge_hw_device::tim_int_mask1, vxge_hw_common_reg::tim_int_mask1, vxge_hw_common_reg::tim_int_status0, vxge_hw_common_reg::tim_int_status1, vxge_hw_common_reg::titan_general_int_status, __vxge_hw_device::virtual_path, vxge_hw_device_mask_all(), vxge_hw_vpath_intr_enable(), VXGE_HW_VPATH_INTR_RX, VXGE_HW_VPATH_INTR_TX, and writeq().

Referenced by vxge_open().

◆ vxge_hw_device_intr_disable()

void vxge_hw_device_intr_disable ( struct __vxge_hw_device hldev)

vxge_hw_device_intr_disable - Disable Titan interrupts.

@hldev: HW device handle.

Disable Titan interrupts.

See also: vxge_hw_device_intr_enable()

Definition at line 295 of file vxge_traffic.c.

296 {
298 
299  /* mask all the tim interrupts */
302  &hldev->common_reg->tim_int_mask1);
303 
305 
306  return;
307 }
struct __vxge_hw_virtualpath virtual_path
Definition: vxge_config.h:507
struct vxge_hw_common_reg * common_reg
Definition: vxge_config.h:497
static void __vxge_hw_pio_mem_write32_upper(u32 val, void __iomem *addr)
Definition: vxge_config.h:703
#define VXGE_HW_INTR_MASK_ALL
Definition: vxge_traffic.h:29
#define VXGE_HW_DEFAULT_32
Definition: vxge_traffic.h:36
enum vxge_hw_status vxge_hw_vpath_intr_disable(struct __vxge_hw_virtualpath *vpath)
Definition: vxge_traffic.c:149
void writeq(uint64_t data, volatile uint64_t *io_addr)
Write 64-bit qword to memory-mapped device.
void vxge_hw_device_mask_all(struct __vxge_hw_device *hldev)
vxge_hw_device_mask_all - Mask all device interrupts.
Definition: vxge_traffic.c:210

References __vxge_hw_pio_mem_write32_upper(), __vxge_hw_device::common_reg, vxge_hw_common_reg::tim_int_mask0, vxge_hw_common_reg::tim_int_mask1, __vxge_hw_device::virtual_path, VXGE_HW_DEFAULT_32, vxge_hw_device_mask_all(), VXGE_HW_INTR_MASK_ALL, vxge_hw_vpath_intr_disable(), and writeq().

Referenced by vxge_close().

◆ vxge_hw_device_mask_all()

void vxge_hw_device_mask_all ( struct __vxge_hw_device hldev)

vxge_hw_device_mask_all - Mask all device interrupts.

@hldev: HW device handle.

Mask all device interrupts.

See also: vxge_hw_device_unmask_all()

Definition at line 210 of file vxge_traffic.c.

211 {
212  u64 val64;
213 
216 
218  &hldev->common_reg->titan_mask_all_int);
219 
220  return;
221 }
struct vxge_hw_common_reg * common_reg
Definition: vxge_config.h:497
static void __vxge_hw_pio_mem_write32_upper(u32 val, void __iomem *addr)
Definition: vxge_config.h:703
uint64_t u64
Definition: stdint.h:25
#define vxge_bVALn(bits, loc, n)
Definition: vxge_reg.h:35
#define VXGE_HW_TITAN_MASK_ALL_INT_TRAFFIC
Definition: vxge_reg.h:122
#define VXGE_HW_TITAN_MASK_ALL_INT_ALARM
Definition: vxge_reg.h:121
uint32_t u32
Definition: stdint.h:23

References __vxge_hw_pio_mem_write32_upper(), __vxge_hw_device::common_reg, vxge_hw_common_reg::titan_mask_all_int, vxge_bVALn, VXGE_HW_TITAN_MASK_ALL_INT_ALARM, and VXGE_HW_TITAN_MASK_ALL_INT_TRAFFIC.

Referenced by vxge_hw_device_intr_disable(), vxge_hw_device_intr_enable(), and vxge_irq().

◆ vxge_hw_device_unmask_all()

void vxge_hw_device_unmask_all ( struct __vxge_hw_device hldev)

vxge_hw_device_unmask_all - Unmask all device interrupts.

@hldev: HW device handle.

Unmask all device interrupts.

See also: vxge_hw_device_mask_all()

Definition at line 231 of file vxge_traffic.c.

232 {
234 
236  &hldev->common_reg->titan_mask_all_int);
237 
238  return;
239 }
struct vxge_hw_common_reg * common_reg
Definition: vxge_config.h:497
static void __vxge_hw_pio_mem_write32_upper(u32 val, void __iomem *addr)
Definition: vxge_config.h:703
uint64_t u64
Definition: stdint.h:25
#define vxge_bVALn(bits, loc, n)
Definition: vxge_reg.h:35
#define VXGE_HW_TITAN_MASK_ALL_INT_TRAFFIC
Definition: vxge_reg.h:122
uint32_t u32
Definition: stdint.h:23

References __vxge_hw_pio_mem_write32_upper(), __vxge_hw_device::common_reg, vxge_hw_common_reg::titan_mask_all_int, vxge_bVALn, and VXGE_HW_TITAN_MASK_ALL_INT_TRAFFIC.

Referenced by vxge_close(), and vxge_irq().

◆ vxge_hw_vpath_doorbell_rx()

void vxge_hw_vpath_doorbell_rx ( struct __vxge_hw_ring ring)

vxge_hw_vpath_doorbell_rx - Indicates to hw the qwords of receive descriptors posted.

@ring: Handle to the ring object used for receive

The function writes the number of qwords of rxds posted during replishment. Since the function is called frequently, a flush is not required to post the write transaction. At the very least, the previous write will be flushed once the subsequent write is made.

Returns: None.

Definition at line 607 of file vxge_traffic.c.

608 {
609  u32 rxds_qw_per_block = VXGE_HW_MAX_RXDS_PER_BLOCK_1 *
611 
613 
615 
616  if (ring->total_db_cnt >= rxds_qw_per_block) {
617  /* For each block add 4 more qwords */
619 
620  /* Reset total count */
621  ring->total_db_cnt -= rxds_qw_per_block;
622  }
623 
624  if (ring->doorbell_cnt >= ring->rxd_qword_limit) {
625  wmb();
627  ring->doorbell_cnt),
628  &ring->vp_reg->prc_rxd_doorbell);
629  ring->doorbell_cnt = 0;
630  }
631 }
wmb()
struct vxge_hw_vpath_reg * vp_reg
Definition: vxge_config.h:361
#define VXGE_HW_RING_RXD_QWORDS_MODE_1
Definition: vxge_config.h:364
#define VXGE_HW_PRC_RXD_DOORBELL_NEW_QW_CNT(val)
Definition: vxge_reg.h:77
void writeq(uint64_t data, volatile uint64_t *io_addr)
Write 64-bit qword to memory-mapped device.
uint32_t u32
Definition: stdint.h:23
#define VXGE_HW_MAX_RXDS_PER_BLOCK_1
Definition: vxge_config.h:341

References __vxge_hw_ring::doorbell_cnt, vxge_hw_vpath_reg::prc_rxd_doorbell, __vxge_hw_ring::rxd_qword_limit, __vxge_hw_ring::total_db_cnt, __vxge_hw_ring::vp_reg, VXGE_HW_MAX_RXDS_PER_BLOCK_1, VXGE_HW_PRC_RXD_DOORBELL_NEW_QW_CNT, VXGE_HW_RING_RXD_QWORDS_MODE_1, wmb(), and writeq().

Referenced by vxge_hw_vpath_poll_rx().

◆ vxge_hw_vpath_poll_rx()

enum vxge_hw_status vxge_hw_vpath_poll_rx ( struct __vxge_hw_ring ringh)

Definition at line 641 of file vxge_traffic.c.

642 {
643  struct __vxge_hw_device *hldev;
645  struct vxge_hw_ring_rxd_1 *rxd;
646  unsigned int len;
647  enum vxge_hw_ring_tcode tcode;
648  struct io_buffer *rx_iob, *iobuf = NULL;
649  u16 poll_count = 0;
650 
651  hldev = ring->vpathh->hldev;
652 
653  do {
654  rxd = &ring->rxdl->rxd[ring->rxd_offset];
655  tcode = VXGE_HW_RING_RXD_T_CODE_GET(rxd->control_0);
656 
657  /* if tcode is VXGE_HW_RING_T_CODE_FRM_DROP, it is
658  * possible the ownership bit still set to adapter
659  */
660  if ((rxd->control_0 & VXGE_HW_RING_RXD_LIST_OWN_ADAPTER)
661  && (tcode == VXGE_HW_RING_T_CODE_OK)) {
662 
664  goto err0;
665  }
666 
667  vxge_debug(VXGE_INFO, "%s: rx frame received at offset %d\n",
668  hldev->ndev->name, ring->rxd_offset);
669 
670  iobuf = (struct io_buffer *)(intptr_t)rxd->host_control;
671 
672  if (tcode != VXGE_HW_RING_T_CODE_OK) {
673  netdev_rx_err(hldev->ndev, NULL, -EINVAL);
674  vxge_debug(VXGE_ERR, "%s:%d, rx error tcode %d\n",
675  __func__, __LINE__, tcode);
677  goto err1;
678  }
679 
681  len -= ETH_FCS_LEN;
682 
683  rx_iob = alloc_iob(len);
684  if (!rx_iob) {
685  netdev_rx_err(hldev->ndev, NULL, -ENOMEM);
686  vxge_debug(VXGE_ERR, "%s:%d, alloc_iob error\n",
687  __func__, __LINE__);
689  goto err1;
690  }
691 
692  memcpy(iob_put(rx_iob, len), iobuf->data, len);
693  /* Add this packet to the receive queue. */
694  netdev_rx(hldev->ndev, rx_iob);
695 
696 err1:
697  /* repost the rxd */
698  rxd->control_0 = rxd->control_1 = 0;
700  VXGE_LL_MAX_FRAME_SIZE(hldev->vdev));
701  vxge_hw_ring_rxd_post(ring, rxd);
702 
703  /* repost the qword count for doorbell */
705 
706  /* increment the descriptor offset */
707  vxge_hw_ring_rxd_offset_up(&ring->rxd_offset);
708 
709  } while (++poll_count < ring->rx_poll_weight);
710 err0:
711  return status;
712 }
uint16_t u16
Definition: stdint.h:21
#define EINVAL
Invalid argument.
Definition: errno.h:428
#define iob_put(iobuf, len)
Definition: iobuf.h:116
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:501
#define VXGE_HW_RING_RXD_1_BUFFER0_SIZE_GET(ctrl1)
Definition: vxge_config.h:194
#define ETH_FCS_LEN
vxge_hw_vpath_poll_rx - Poll Rx Virtual Path for completed descriptors and process the same.
Definition: vxge_traffic.c:640
void vxge_hw_ring_rxd_post(struct __vxge_hw_ring *ring __unused, struct vxge_hw_ring_rxd_1 *rxdp)
vxge_hw_ring_rxd_post - Post descriptor on the ring.
Definition: vxge_traffic.c:318
static void vxge_hw_ring_rxd_offset_up(u16 *offset)
Definition: vxge_config.h:570
#define VXGE_HW_RING_RXD_T_CODE_GET(ctrl0)
Definition: vxge_config.h:167
unsigned long intptr_t
Definition: stdint.h:21
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:128
#define VXGE_INFO
Definition: vxge_config.h:50
#define vxge_debug(mask, fmt...)
Definition: vxge_config.h:762
#define VXGE_HW_RING_RXD_LIST_OWN_ADAPTER
Definition: vxge_config.h:159
struct vxgedev * vdev
Definition: vxge_config.h:484
uint8_t status
Status.
Definition: ena.h:16
#define ENOMEM
Not enough space.
Definition: errno.h:534
void * memcpy(void *dest, const void *src, size_t len) __nonnull
#define VXGE_LL_MAX_FRAME_SIZE(dev)
Definition: vxge_main.h:147
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:470
struct __vxge_hw_device - Hal device object @magic: Magic Number @bar0: BAR0 virtual address.
Definition: vxge_config.h:477
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:358
uint32_t len
Length.
Definition: ena.h:14
void * data
Start of data.
Definition: iobuf.h:44
static void vxge_hw_ring_rxd_1b_set(struct vxge_hw_ring_rxd_1 *rxdp, struct io_buffer *iob, u32 size)
vxge_hw_ring_rxd_1b_set - Prepare 1-buffer-mode descriptor.
Definition: vxge_config.h:597
vxge_hw_ring_tcode
enum vxge_hw_ring_tcode - Transfer codes returned by adapter @VXGE_HW_RING_T_CODE_OK: Transfer ok.
Definition: vxge_traffic.h:172
vxge_hw_status
Definition: vxge_config.h:70
struct net_device * ndev
Definition: vxge_config.h:483
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
struct vxge_hw_ring_rxd_1 - One buffer mode RxD for ring
Definition: vxge_config.h:154
#define VXGE_ERR
Definition: vxge_config.h:54
#define rxd
Definition: davicom.c:145
void vxge_hw_vpath_doorbell_rx(struct __vxge_hw_ring *ring)
vxge_hw_vpath_doorbell_rx - Indicates to hw the qwords of receive descriptors posted.
Definition: vxge_traffic.c:607
A persistent I/O buffer.
Definition: iobuf.h:32

References alloc_iob(), io_buffer::data, EINVAL, ENOMEM, ETH_FCS_LEN, __vxge_hw_virtualpath::hldev, iob_put, len, memcpy(), net_device::name, __vxge_hw_device::ndev, netdev_rx(), netdev_rx_err(), NULL, rxd, __vxge_hw_ring_block::rxd, __vxge_hw_ring::rxd_offset, __vxge_hw_ring::rxdl, status, __vxge_hw_device::vdev, __vxge_hw_ring::vpathh, vxge_debug, VXGE_ERR, VXGE_HW_ERR_OUT_OF_MEMORY, VXGE_HW_FAIL, VXGE_HW_INF_NO_MORE_COMPLETED_DESCRIPTORS, VXGE_HW_OK, VXGE_HW_RING_RXD_1_BUFFER0_SIZE_GET, vxge_hw_ring_rxd_1b_set(), VXGE_HW_RING_RXD_LIST_OWN_ADAPTER, vxge_hw_ring_rxd_offset_up(), vxge_hw_ring_rxd_post(), VXGE_HW_RING_RXD_T_CODE_GET, VXGE_HW_RING_T_CODE_OK, vxge_hw_vpath_doorbell_rx(), VXGE_INFO, and VXGE_LL_MAX_FRAME_SIZE.

Referenced by vxge_poll().

◆ vxge_hw_vpath_poll_tx()

enum vxge_hw_status vxge_hw_vpath_poll_tx ( struct __vxge_hw_fifo fifo)

vxge_hw_vpath_poll_tx - Poll Tx for completed descriptors and process the same.

@fifo: Handle to the fifo object used for non offload send

The function polls the Tx for the completed descriptors and calls the driver via supplied completion callback.

Definition at line 722 of file vxge_traffic.c.

723 {
725  struct vxge_hw_fifo_txd *txdp;
726 
727  txdp = fifo->txdl + fifo->hw_offset;
728  if (!(txdp->control_0 & VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER)
729  && (txdp->host_control)) {
730 
731  vxge_xmit_compl(fifo, txdp,
732  VXGE_HW_FIFO_TXD_T_CODE_GET(txdp->control_0));
733 
735  }
736 
737  return status;
738 }
struct vxge_hw_fifo_txd - Transmit Descriptor
Definition: vxge_config.h:212
static void vxge_hw_fifo_txd_offset_up(u16 *offset)
Definition: vxge_config.h:576
uint8_t status
Status.
Definition: ena.h:16
#define VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER
Definition: vxge_config.h:214
Definition: sis900.h:30
#define VXGE_HW_FIFO_TXD_T_CODE_GET(ctrl0)
Definition: vxge_config.h:216
vxge_hw_status
Definition: vxge_config.h:70
struct vxge_hw_fifo_txd * txdl
Definition: vxge_config.h:328
enum vxge_hw_status vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, struct vxge_hw_fifo_txd *txdp, enum vxge_hw_fifo_tcode tcode)
Definition: vxge_main.c:65

References __vxge_hw_fifo::hw_offset, status, __vxge_hw_fifo::txdl, txdp, VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER, vxge_hw_fifo_txd_offset_up(), VXGE_HW_FIFO_TXD_T_CODE_GET, VXGE_HW_OK, and vxge_xmit_compl().

Referenced by vxge_poll().

◆ vxge_hw_fifo_free_txdl_get()

struct vxge_hw_fifo_txd* vxge_hw_fifo_free_txdl_get ( struct __vxge_hw_fifo fifo)

vxge_hw_fifo_free_txdl_get: fetch next available txd in the fifo

@fifo: tx channel handle

Definition at line 354 of file vxge_traffic.c.

355 {
356  struct vxge_hw_fifo_txd *txdp;
357 
358  txdp = fifo->txdl + fifo->sw_offset;
359  if (txdp->control_0 & VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER) {
360  vxge_debug(VXGE_ERR, "%s:%d, error: txd(%d) owned by hw\n",
361  __func__, __LINE__, fifo->sw_offset);
362  return NULL;
363  }
364 
365  return txdp;
366 }
struct vxge_hw_fifo_txd - Transmit Descriptor
Definition: vxge_config.h:212
#define vxge_debug(mask, fmt...)
Definition: vxge_config.h:762
#define VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER
Definition: vxge_config.h:214
Definition: sis900.h:30
struct vxge_hw_fifo_txd * txdl
Definition: vxge_config.h:328
#define NULL
NULL pointer (VOID *)
Definition: Base.h:362
#define VXGE_ERR
Definition: vxge_config.h:54

References NULL, __vxge_hw_fifo::sw_offset, __vxge_hw_fifo::txdl, txdp, vxge_debug, VXGE_ERR, and VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER.

Referenced by vxge_xmit().

Variable Documentation

◆ __attribute

enum vxge_hw_event __attribute