iPXE
ath.h
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1 /*
2  * Copyright (c) 2008-2009 Atheros Communications Inc.
3  *
4  * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011
5  * Original from Linux kernel 3.0.1
6  *
7  * Permission to use, copy, modify, and/or distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #ifndef ATH_H
21 #define ATH_H
22 
23 FILE_LICENCE ( BSD2 );
24 
25 #include <unistd.h>
26 #include <ipxe/net80211.h>
27 
28 /* This block of functions are from kernel.h v3.0.1 */
29 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
30 #define BITS_PER_BYTE 8
31 #define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
32 #define BIT(nr) (1UL << (nr))
33 
34 #define min(x, y) ({ \
35  typeof(x) _min1 = (x); \
36  typeof(y) _min2 = (y); \
37  (void) (&_min1 == &_min2); \
38  _min1 < _min2 ? _min1 : _min2; })
39 #define max(x, y) ({ \
40  typeof(x) _max1 = (x); \
41  typeof(y) _max2 = (y); \
42  (void) (&_max1 == &_max2); \
43  _max1 > _max2 ? _max1 : _max2; })
44 #define abs(x) ({ \
45  long ret; \
46  if (sizeof(x) == sizeof(long)) { \
47  long __x = (x); \
48  ret = (__x < 0) ? -__x : __x; \
49  } else { \
50  int __x = (x); \
51  ret = (__x < 0) ? -__x : __x; \
52  } \
53  ret; \
54  })
55 
56 #define ___constant_swab16(x) ((uint16_t)( \
57  (((uint16_t)(x) & (uint16_t)0x00ffU) << 8) | \
58  (((uint16_t)(x) & (uint16_t)0xff00U) >> 8)))
59 #define ___constant_swab32(x) ((uint32_t)( \
60  (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
61  (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
62  (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
63  (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))
64 #define __swab16(x) ___constant_swab16(x)
65 #define __swab32(x) ___constant_swab32(x)
66 #define swab16 __swab16
67 #define swab32 __swab32
68 
70 {
71  uint8_t shift = 31 - index;
72  return (int32_t)(value << shift) >> shift;
73 }
74 
75 static inline u16 __get_unaligned_le16(const u8 *p)
76 {
77  return p[0] | p[1] << 8;
78 }
79 static inline u32 __get_unaligned_le32(const u8 *p)
80 {
81  return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24;
82 }
83 static inline u16 get_unaligned_le16(const void *p)
84 {
85  return __get_unaligned_le16((const u8 *)p);
86 }
87 static inline u32 get_unaligned_le32(const void *p)
88 {
89  return __get_unaligned_le32((const u8 *)p);
90 }
91 /* End Kernel Block */
92 
93 /*
94  * The key cache is used for h/w cipher state and also for
95  * tracking station state such as the current tx antenna.
96  * We also setup a mapping table between key cache slot indices
97  * and station state to short-circuit node lookups on rx.
98  * Different parts have different size key caches. We handle
99  * up to ATH_KEYMAX entries (could dynamically allocate state).
100  */
101 #define ATH_KEYMAX 128 /* max key cache size we handle */
102 
103 struct ath_ani {
104  int caldone;
105  unsigned int longcal_timer;
106  unsigned int shortcal_timer;
107  unsigned int resetcal_timer;
108  unsigned int checkani_timer;
109  int timer;
110 };
111 
117 };
118 
122 };
123 
128 };
129 
134 };
135 
137  char alpha2[2];
145 };
146 
150 };
151 
152 struct ath_keyval {
156  u8 kv_val[16]; /* TK */
157  u8 kv_mic[8]; /* Michael MIC key */
158  u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware
159  * supports both MIC keys in the same key cache entry;
160  * in that case, kv_mic is the RX key) */
161 };
162 
171 };
172 
173 /**
174  * struct ath_ops - Register read/write operations
175  *
176  * @read: Register read
177  * @multi_read: Multiple register read
178  * @write: Register write
179  * @enable_write_buffer: Enable multiple register writes
180  * @write_flush: flush buffered register writes and disable buffering
181  */
182 struct ath_ops {
183  unsigned int (*read)(void *, u32 reg_offset);
184  void (*multi_read)(void *, u32 *addr, u32 *val, u16 count);
185  void (*write)(void *, u32 val, u32 reg_offset);
186  void (*enable_write_buffer)(void *);
187  void (*write_flush) (void *);
188  u32 (*rmw)(void *, u32 reg_offset, u32 set, u32 clr);
189 };
190 
191 struct ath_common;
192 struct ath_bus_ops;
193 
194 struct ath_common {
195  void *ah;
196  void *priv;
200 
201  struct ath_ani ani;
202 
208 
211 
213 
216 
217  unsigned int clockrate;
218 
221 
223  const struct ath_ops *ops;
224  const struct ath_bus_ops *bus_ops;
225 
227 };
228 
233 
234 #endif /* ATH_H */
u8 kv_txmic[8]
Definition: ath.h:158
uint16_t u16
Definition: stdint.h:21
int ath_hw_keyreset(struct ath_common *common, u16 entry)
Definition: ath_key.c:41
void(* write)(void *, u32 val, u32 reg_offset)
Definition: ath.h:185
struct ath_regulatory regulatory
Definition: ath.h:222
u16 cachelsz
Definition: ath.h:203
struct reg_dmn_pair_mapping * regpair
Definition: ath.h:144
u8 kv_mic[8]
Definition: ath.h:157
void(* multi_read)(void *, u32 *addr, u32 *val, u16 count)
Definition: ath.h:184
struct option_descriptor set[0]
Definition: nvo_cmd.c:111
ath_bus_type
Definition: ath.h:124
int btcoex_enabled
Definition: ath.h:226
static u32 __get_unaligned_le32(const u8 *p)
Definition: ath.h:79
static int32_t sign_extend32(uint32_t value, int index)
Definition: ath.h:69
unsigned int checkani_timer
Definition: ath.h:108
void ath_hw_setbssidmask(struct ath_common *common)
ath_hw_set_bssid_mask - filter out bssids we listen
Definition: ath_hw.c:120
Definition: ath.h:125
enum ath_crypt_caps crypt_caps
Definition: ath.h:215
u16 country_code
Definition: ath.h:138
u16 kv_len
Definition: ath.h:155
struct ath_ops - Register read/write operations
Definition: ath.h:182
Definition: ath.h:126
static u32 get_unaligned_le32(const void *p)
Definition: ath.h:87
Definition: ath.h:127
ath_device_state
Definition: ath.h:119
void ath_hw_cycle_counters_update(struct ath_common *common)
ath_hw_cycle_counters_update - common function to update cycle counters
Definition: ath_hw.c:137
u16 current_rd_ext
Definition: ath.h:142
const struct ath_ops * ops
Definition: ath.h:223
int caldone
Definition: ath.h:104
u8 kv_pad
Definition: ath.h:154
#define u32
Definition: vga.h:21
enum ath_device_state state
Definition: ath.h:199
unsigned int longcal_timer
Definition: ath.h:105
u16 current_rd
Definition: ath.h:141
int16_t power_limit
Definition: ath.h:143
const struct ath_bus_ops * bus_ops
Definition: ath.h:224
pseudo_bit_t value[0x00020]
Definition: arbel.h:13
int timer
Definition: ath.h:109
static u16 get_unaligned_le16(const void *p)
Definition: ath.h:83
void * ah
Definition: ath.h:195
union aes_table_entry entry[256]
Table entries, indexed by S(N)
Definition: aes.c:26
The iPXE 802.11 MAC layer.
Structure encapsulating the complete state of an 802.11 device.
Definition: net80211.h:786
unsigned int resetcal_timer
Definition: ath.h:107
char alpha2[2]
Definition: ath.h:137
u8 tx_chainmask
Definition: ath.h:209
u32 addr
Definition: sky2.h:8
u32(* rmw)(void *, u32 reg_offset, u32 set, u32 clr)
Definition: ath.h:188
unsigned char uint8_t
Definition: stdint.h:10
ath_crypt_caps
Definition: ath.h:147
#define ETH_ALEN
Definition: if_ether.h:8
u32 keymax
Definition: ath.h:214
unsigned int uint32_t
Definition: stdint.h:12
struct ib_cm_common common
Definition: ib_mad.h:11
static u16 __get_unaligned_le16(const u8 *p)
Definition: ath.h:75
u16 curaid
Definition: ath.h:204
u8 rx_chainmask
Definition: ath.h:210
struct ath_cycle_counters cc_ani
Definition: ath.h:219
void __asmcall int val
Definition: setjmp.h:28
u8 curbssid[ETH_ALEN]
Definition: ath.h:206
int32_t ath_hw_get_listen_time(struct ath_common *common)
Definition: ath_hw.c:172
void(* write_flush)(void *)
Definition: ath.h:187
#define BIT(nr)
Definition: ath.h:32
FILE_LICENCE(BSD2)
signed int int32_t
Definition: stdint.h:17
u8 kv_type
Definition: ath.h:153
unsigned int clockrate
Definition: ath.h:217
struct ath_ani ani
Definition: ath.h:201
ath_cipher
Definition: ath.h:163
uint16_t count
Number of entries.
Definition: ena.h:22
Definition: ath.h:103
struct ath_cycle_counters cc_survey
Definition: ath.h:220
int debug_mask
Definition: ath.h:198
void(* enable_write_buffer)(void *)
Definition: ath.h:186
u8 bssidmask[ETH_ALEN]
Definition: ath.h:207
struct net80211_device * dev
Definition: ath.h:197
signed short int16_t
Definition: stdint.h:16
uint64_t index
Index of the first segment within the content.
Definition: pccrc.h:21
unsigned int shortcal_timer
Definition: ath.h:106
unsigned int(* read)(void *, u32 reg_offset)
Definition: ath.h:183
u8 macaddr[ETH_ALEN]
Definition: ath.h:205
u8 kv_val[16]
Definition: ath.h:156
void * priv
Definition: ath.h:196
u32 rx_bufsize
Definition: ath.h:212
uint8_t u8
Definition: stdint.h:19
u16 max_power_level
Definition: ath.h:139
uint32_t u32
Definition: stdint.h:23
u32 tp_scale
Definition: ath.h:140