iPXE
Data Structures | Macros | Enumerations | Functions
ath.h File Reference
#include <unistd.h>
#include <ipxe/net80211.h>

Go to the source code of this file.

Data Structures

struct  ath_ani
 
struct  ath_cycle_counters
 
struct  reg_dmn_pair_mapping
 
struct  ath_regulatory
 
struct  ath_keyval
 
struct  ath_ops
 struct ath_ops - Register read/write operations More...
 
struct  ath_common
 

Macros

#define DIV_ROUND_UP(n, d)   (((n) + (d) - 1) / (d))
 
#define BITS_PER_BYTE   8
 
#define BITS_TO_LONGS(nr)   DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
 
#define BIT(nr)   (1UL << (nr))
 
#define min(x, y)
 
#define max(x, y)
 
#define abs(x)
 
#define ___constant_swab16(x)
 
#define ___constant_swab32(x)
 
#define __swab16(x)   ___constant_swab16(x)
 
#define __swab32(x)   ___constant_swab32(x)
 
#define swab16   __swab16
 
#define swab32   __swab32
 
#define ATH_KEYMAX   128 /* max key cache size we handle */
 

Enumerations

enum  ath_device_state { ATH_HW_UNAVAILABLE, ATH_HW_INITIALIZED }
 
enum  ath_bus_type { ATH_PCI, ATH_AHB, ATH_USB }
 
enum  ath_crypt_caps { ATH_CRYPT_CAP_CIPHER_AESCCM = BIT(0), ATH_CRYPT_CAP_MIC_COMBINED = BIT(1) }
 
enum  ath_cipher {
  ATH_CIPHER_WEP = 0, ATH_CIPHER_AES_OCB = 1, ATH_CIPHER_AES_CCM = 2, ATH_CIPHER_CKIP = 3,
  ATH_CIPHER_TKIP = 4, ATH_CIPHER_CLR = 5, ATH_CIPHER_MIC = 127
}
 

Functions

 FILE_LICENCE (BSD2)
 
static int32_t sign_extend32 (uint32_t value, int index)
 
static u16 __get_unaligned_le16 (const u8 *p)
 
static u32 __get_unaligned_le32 (const u8 *p)
 
static u16 get_unaligned_le16 (const void *p)
 
static u32 get_unaligned_le32 (const void *p)
 
void ath_hw_setbssidmask (struct ath_common *common)
 ath_hw_set_bssid_mask - filter out bssids we listen More...
 
int ath_hw_keyreset (struct ath_common *common, u16 entry)
 
void ath_hw_cycle_counters_update (struct ath_common *common)
 ath_hw_cycle_counters_update - common function to update cycle counters More...
 
int32_t ath_hw_get_listen_time (struct ath_common *common)
 

Macro Definition Documentation

◆ DIV_ROUND_UP

#define DIV_ROUND_UP (   n,
 
)    (((n) + (d) - 1) / (d))

Definition at line 29 of file ath.h.

◆ BITS_PER_BYTE

#define BITS_PER_BYTE   8

Definition at line 30 of file ath.h.

◆ BITS_TO_LONGS

#define BITS_TO_LONGS (   nr)    DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))

Definition at line 31 of file ath.h.

◆ BIT

#define BIT (   nr)    (1UL << (nr))

Definition at line 32 of file ath.h.

◆ min

#define min (   x,
 
)
Value:
({ \
typeof(x) _min1 = (x); \
typeof(y) _min2 = (y); \
(void) (&_min1 == &_min2); \
_min1 < _min2 ? _min1 : _min2; })

Definition at line 34 of file ath.h.

◆ max

#define max (   x,
 
)
Value:
({ \
typeof(x) _max1 = (x); \
typeof(y) _max2 = (y); \
(void) (&_max1 == &_max2); \
_max1 > _max2 ? _max1 : _max2; })

Definition at line 39 of file ath.h.

◆ abs

#define abs (   x)
Value:
({ \
long ret; \
if (sizeof(x) == sizeof(long)) { \
long __x = (x); \
ret = (__x < 0) ? -__x : __x; \
} else { \
int __x = (x); \
ret = (__x < 0) ? -__x : __x; \
} \
ret; \
})

Definition at line 44 of file ath.h.

◆ ___constant_swab16

#define ___constant_swab16 (   x)
Value:
((uint16_t)( \
(((uint16_t)(x) & (uint16_t)0x00ffU) << 8) | \
(((uint16_t)(x) & (uint16_t)0xff00U) >> 8)))
unsigned short uint16_t
Definition: stdint.h:11

Definition at line 56 of file ath.h.

◆ ___constant_swab32

#define ___constant_swab32 (   x)
Value:
((uint32_t)( \
(((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
(((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
(((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
(((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))
unsigned int uint32_t
Definition: stdint.h:12

Definition at line 59 of file ath.h.

◆ __swab16

#define __swab16 (   x)    ___constant_swab16(x)

Definition at line 64 of file ath.h.

◆ __swab32

#define __swab32 (   x)    ___constant_swab32(x)

Definition at line 65 of file ath.h.

◆ swab16

#define swab16   __swab16

Definition at line 66 of file ath.h.

◆ swab32

#define swab32   __swab32

Definition at line 67 of file ath.h.

◆ ATH_KEYMAX

#define ATH_KEYMAX   128 /* max key cache size we handle */

Definition at line 101 of file ath.h.

Enumeration Type Documentation

◆ ath_device_state

Enumerator
ATH_HW_UNAVAILABLE 
ATH_HW_INITIALIZED 

Definition at line 119 of file ath.h.

◆ ath_bus_type

Enumerator
ATH_PCI 
ATH_AHB 
ATH_USB 

Definition at line 124 of file ath.h.

124  {
125  ATH_PCI,
126  ATH_AHB,
127  ATH_USB,
128 };
Definition: ath.h:125
Definition: ath.h:126
Definition: ath.h:127

◆ ath_crypt_caps

Enumerator
ATH_CRYPT_CAP_CIPHER_AESCCM 
ATH_CRYPT_CAP_MIC_COMBINED 

Definition at line 147 of file ath.h.

147  {
150 };
#define BIT(nr)
Definition: ath.h:32

◆ ath_cipher

enum ath_cipher
Enumerator
ATH_CIPHER_WEP 
ATH_CIPHER_AES_OCB 
ATH_CIPHER_AES_CCM 
ATH_CIPHER_CKIP 
ATH_CIPHER_TKIP 
ATH_CIPHER_CLR 
ATH_CIPHER_MIC 

Definition at line 163 of file ath.h.

163  {
164  ATH_CIPHER_WEP = 0,
165  ATH_CIPHER_AES_OCB = 1,
166  ATH_CIPHER_AES_CCM = 2,
167  ATH_CIPHER_CKIP = 3,
168  ATH_CIPHER_TKIP = 4,
169  ATH_CIPHER_CLR = 5,
170  ATH_CIPHER_MIC = 127
171 };

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( BSD2  )

◆ sign_extend32()

static int32_t sign_extend32 ( uint32_t  value,
int  index 
)
inlinestatic

Definition at line 69 of file ath.h.

70 {
71  uint8_t shift = 31 - index;
72  return (int32_t)(value << shift) >> shift;
73 }
unsigned char uint8_t
Definition: stdint.h:10
signed int int32_t
Definition: stdint.h:17
uint64_t index
Index of the first segment within the content.
Definition: pccrc.h:21

References index.

Referenced by ar5008_hw_do_getnf(), ar9002_hw_do_getnf(), and ar9003_hw_do_getnf().

◆ __get_unaligned_le16()

static u16 __get_unaligned_le16 ( const u8 p)
inlinestatic

Definition at line 75 of file ath.h.

76 {
77  return p[0] | p[1] << 8;
78 }

Referenced by get_unaligned_le16().

◆ __get_unaligned_le32()

static u32 __get_unaligned_le32 ( const u8 p)
inlinestatic

Definition at line 79 of file ath.h.

80 {
81  return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24;
82 }

Referenced by get_unaligned_le32().

◆ get_unaligned_le16()

static u16 get_unaligned_le16 ( const void *  p)
inlinestatic

Definition at line 83 of file ath.h.

84 {
85  return __get_unaligned_le16((const u8 *)p);
86 }
static u16 __get_unaligned_le16(const u8 *p)
Definition: ath.h:75
uint8_t u8
Definition: stdint.h:19

References __get_unaligned_le16().

Referenced by ath9k_hw_reset(), ath9k_hw_write_associd(), and ath_hw_setbssidmask().

◆ get_unaligned_le32()

static u32 get_unaligned_le32 ( const void *  p)
inlinestatic

Definition at line 87 of file ath.h.

88 {
89  return __get_unaligned_le32((const u8 *)p);
90 }
static u32 __get_unaligned_le32(const u8 *p)
Definition: ath.h:79
uint8_t u8
Definition: stdint.h:19

References __get_unaligned_le32().

Referenced by ath9k_hw_reset(), ath9k_hw_write_associd(), and ath_hw_setbssidmask().

◆ ath_hw_setbssidmask()

void ath_hw_setbssidmask ( struct ath_common common)

ath_hw_set_bssid_mask - filter out bssids we listen

@common: the ath_common struct for the device.

BSSID masking is a method used by AR5212 and newer hardware to inform PCU which bits of the interface's MAC address should be looked at when trying to decide which packets to ACK. In station mode and AP mode with a single BSS every bit matters since we lock to only one BSS. In AP mode with multiple BSSes (virtual interfaces) not every bit matters because hw must accept frames for all BSSes and so we tweak some bits of our mac address in order to have multiple BSSes.

NOTE: This is a simple filter and does not filter out all relevant frames. Some frames that are not for us might get ACKed from us by PCU because they just match the mask.

When handling multiple BSSes you can get the BSSID mask by computing the set of ~ ( MAC XOR BSSID ) for all bssids we handle.

When you do this you are essentially computing the common bits of all your BSSes. Later it is assumed the hardware will "and" (&) the BSSID mask with the MAC address to obtain the relevant bits and compare the result with (frame's BSSID & mask) to see if they match.

Simple example: on your card you have have two BSSes you have created with BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address. There is another BSSID-03 but you are not part of it. For simplicity's sake, assuming only 4 bits for a mac address and for BSSIDs you can then have:

             \

MAC: 0001 | BSSID-01: 0100 | --> Belongs to us BSSID-02: 1001 |

/

BSSID-03: 0110 | --> External

Our bssid_mask would then be:

        On loop iteration for BSSID-01:
        ~(0001 ^ 0100)  -> ~(0101)
                        ->   1010
        bssid_mask      =    1010

        On loop iteration for BSSID-02:
        bssid_mask &= ~(0001   ^   1001)
        bssid_mask =   (1010)  & ~(0001 ^ 1001)
        bssid_mask =   (1010)  & ~(1000)
        bssid_mask =   (1010)  &  (0111)
        bssid_mask =   0010

A bssid_mask of 0010 means "only pay attention to the second least significant bit". This is because its the only bit common amongst the MAC and all BSSIDs we support. To findout what the real common bit is we can simply "&" the bssid_mask now with any BSSID we have or our MAC address (we assume the hardware uses the MAC address).

Now, suppose there's an incoming frame for BSSID-03:

IFRAME-01: 0110

An easy eye-inspeciton of this already should tell you that this frame will not pass our check. This is because the bssid_mask tells the hardware to only look at the second least significant bit and the common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB as 1, which does not match 0.

So with IFRAME-01 we assume the hardware will do:

allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;

--> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0; --> allow = (0010) == 0000 ? 1 : 0; --> allow = 0

Lets now test a frame that should work:

IFRAME-02: 0001 (we should allow)

allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;

--> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0; --> allow = (0000) == (0000) --> allow = 1

Other examples:

IFRAME-03: 0100 --> allowed IFRAME-04: 1001 --> allowed IFRAME-05: 1101 --> allowed but its not for us!!!

Definition at line 120 of file ath_hw.c.

121 {
122  void *ah = common->ah;
123 
125  REG_WRITE(ah, get_unaligned_le16(common->bssidmask + 4), AR_BSSMSKU);
126 }
#define AR_BSSMSKL
Definition: reg.h:35
#define REG_WRITE
Definition: ath_hw.c:26
static u32 get_unaligned_le32(const void *p)
Definition: ath.h:87
static u16 get_unaligned_le16(const void *p)
Definition: ath.h:83
#define AR_BSSMSKU
Definition: reg.h:36
struct ib_cm_common common
Definition: ib_mad.h:11
uint8_t ah
Definition: registers.h:85

References ah, AR_BSSMSKL, AR_BSSMSKU, common, get_unaligned_le16(), get_unaligned_le32(), and REG_WRITE.

Referenced by ath9k_hw_reset(), and ath_opmode_init().

◆ ath_hw_keyreset()

int ath_hw_keyreset ( struct ath_common common,
u16  entry 
)

Definition at line 41 of file ath_key.c.

42 {
43  u32 keyType;
44  void *ah = common->ah;
45 
46  if (entry >= common->keymax) {
47  DBG("ath: keycache entry %d out of range\n", entry);
48  return 0;
49  }
50 
51  keyType = REG_READ(ah, AR_KEYTABLE_TYPE(entry));
52 
54 
63 
64  if (keyType == AR_KEYTABLE_TYPE_TKIP) {
65  u16 micentry = entry + 64;
66 
67  REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), 0);
68  REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);
69  REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), 0);
70  REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);
71  if (common->crypt_caps & ATH_CRYPT_CAP_MIC_COMBINED) {
72  REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0);
73  REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),
75  }
76 
77  }
78 
80 
81  return 1;
82 }
uint16_t u16
Definition: stdint.h:21
#define AR_KEYTABLE_KEY1(_n)
Definition: reg.h:1882
#define AR_KEYTABLE_TYPE(_n)
Definition: reg.h:1886
#define AR_KEYTABLE_KEY2(_n)
Definition: reg.h:1883
#define AR_KEYTABLE_TYPE_TKIP
Definition: reg.h:1875
#define REGWRITE_BUFFER_FLUSH(_ah)
Definition: ath_key.c:30
#define REG_READ
Definition: ath_key.c:24
#define REG_WRITE(_ah, _reg, _val)
Definition: ath_key.c:25
#define AR_KEYTABLE_MAC0(_n)
Definition: reg.h:1887
union aes_table_entry entry[256]
Table entries, indexed by S(N)
Definition: aes.c:26
#define AR_KEYTABLE_KEY0(_n)
Definition: reg.h:1881
struct ib_cm_common common
Definition: ib_mad.h:11
#define AR_KEYTABLE_MAC1(_n)
Definition: reg.h:1888
#define AR_KEYTABLE_TYPE_CLR
Definition: reg.h:1878
#define AR_KEYTABLE_KEY4(_n)
Definition: reg.h:1885
uint8_t ah
Definition: registers.h:85
#define DBG(...)
Print a debugging message.
Definition: compiler.h:498
#define ENABLE_REGWRITE_BUFFER(_ah)
Definition: ath_key.c:26
#define AR_KEYTABLE_KEY3(_n)
Definition: reg.h:1884
uint32_t u32
Definition: stdint.h:23

References ah, AR_KEYTABLE_KEY0, AR_KEYTABLE_KEY1, AR_KEYTABLE_KEY2, AR_KEYTABLE_KEY3, AR_KEYTABLE_KEY4, AR_KEYTABLE_MAC0, AR_KEYTABLE_MAC1, AR_KEYTABLE_TYPE, AR_KEYTABLE_TYPE_CLR, AR_KEYTABLE_TYPE_TKIP, ATH_CRYPT_CAP_MIC_COMBINED, common, DBG, ENABLE_REGWRITE_BUFFER, entry, REG_READ, REG_WRITE, and REGWRITE_BUFFER_FLUSH.

Referenced by ath9k_init_crypto().

◆ ath_hw_cycle_counters_update()

void ath_hw_cycle_counters_update ( struct ath_common common)

ath_hw_cycle_counters_update - common function to update cycle counters

@common: the ath_common struct for the device.

This function is used to update all cycle counters in one place. It has to be called while holding common->cc_lock!

Definition at line 137 of file ath_hw.c.

138 {
139  u32 cycles, busy, rx, tx;
140  void *ah = common->ah;
141 
142  /* freeze */
144 
145  /* read */
146  cycles = REG_READ(ah, AR_CCCNT);
147  busy = REG_READ(ah, AR_RCCNT);
148  rx = REG_READ(ah, AR_RFCNT);
149  tx = REG_READ(ah, AR_TFCNT);
150 
151  /* clear */
152  REG_WRITE(ah, 0, AR_CCCNT);
153  REG_WRITE(ah, 0, AR_RFCNT);
154  REG_WRITE(ah, 0, AR_RCCNT);
155  REG_WRITE(ah, 0, AR_TFCNT);
156 
157  /* unfreeze */
158  REG_WRITE(ah, 0, AR_MIBC);
159 
160  /* update all cycle counters here */
161  common->cc_ani.cycles += cycles;
162  common->cc_ani.rx_busy += busy;
163  common->cc_ani.rx_frame += rx;
164  common->cc_ani.tx_frame += tx;
165 
166  common->cc_survey.cycles += cycles;
167  common->cc_survey.rx_busy += busy;
168  common->cc_survey.rx_frame += rx;
169  common->cc_survey.tx_frame += tx;
170 }
#define AR_RCCNT
Definition: reg.h:40
#define REG_WRITE
Definition: ath_hw.c:26
#define REG_READ
Definition: ath_hw.c:25
#define AR_TFCNT
Definition: reg.h:38
uint32_t rx
Maximum number of receive queues.
Definition: intelvf.h:16
uint32_t tx
Maximum number of transmit queues.
Definition: intelvf.h:14
#define AR_CCCNT
Definition: reg.h:41
struct ib_cm_common common
Definition: ib_mad.h:11
uint8_t ah
Definition: registers.h:85
#define AR_MIBC
Definition: reg.h:25
#define AR_MIBC_FMC
Definition: reg.h:27
#define AR_RFCNT
Definition: reg.h:39
uint32_t u32
Definition: stdint.h:23

References ah, AR_CCCNT, AR_MIBC, AR_MIBC_FMC, AR_RCCNT, AR_RFCNT, AR_TFCNT, common, REG_READ, REG_WRITE, rx, and tx.

Referenced by ath9k_hw_ani_read_counters(), and ath_update_survey_stats().

◆ ath_hw_get_listen_time()

int32_t ath_hw_get_listen_time ( struct ath_common common)

Definition at line 172 of file ath_hw.c.

173 {
174  struct ath_cycle_counters *cc = &common->cc_ani;
175  int32_t listen_time;
176 
177  listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) /
178  (common->clockrate * 1000);
179 
180  memset(cc, 0, sizeof(*cc));
181 
182  return listen_time;
183 }
struct ib_cm_common common
Definition: ib_mad.h:11
signed int int32_t
Definition: stdint.h:17
void * memset(void *dest, int character, size_t len) __nonnull

References common, ath_cycle_counters::cycles, memset(), ath_cycle_counters::rx_frame, and ath_cycle_counters::tx_frame.

Referenced by ath9k_hw_ani_read_counters().