iPXE
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National Semiconductor "MacPhyter" network card driver. More...
Go to the source code of this file.
Data Structures | |
struct | natsemi_descriptor_32 |
A 32-bit packet descriptor. More... | |
struct | natsemi_descriptor_64 |
A 64-bit packet descriptor. More... | |
union | natsemi_descriptor |
A packet descriptor. More... | |
struct | natsemi_ring |
A National Semiconductor descriptor ring. More... | |
struct | natsemi_nic |
A National Semiconductor network card. More... | |
Macros | |
#define | NATSEMI_BAR_SIZE 0x100 |
BAR size. More... | |
#define | NATSEMI_DESC_SIZE_MASK 0xfff |
Descriptor buffer size mask. More... | |
#define | NATSEMI_CR 0x0000 |
Command Register. More... | |
#define | NATSEMI_CR_RST 0x00000100UL |
Reset. More... | |
#define | NATSEMI_CR_RXR 0x00000020UL |
Receiver reset. More... | |
#define | NATSEMI_CR_TXR 0x00000010UL |
Transmit reset. More... | |
#define | NATSEMI_CR_RXE 0x00000004UL |
Receiver enable. More... | |
#define | NATSEMI_CR_TXE 0x00000001UL |
Transmit enable. More... | |
#define | NATSEMI_RESET_MAX_WAIT_MS 100 |
Maximum time to wait for a reset, in milliseconds. More... | |
#define | NATSEMI_CFG 0x0004 |
Configuration and Media Status Register. More... | |
#define | NATSEMI_CFG_LNKSTS 0x80000000UL |
Link status. More... | |
#define | NATSEMI_CFG_SPDSTS1 0x40000000UL |
Speed status bit 1. More... | |
#define | NATSEMI_CFG_MODE_1000 0x00400000UL |
1000 Mb/s mode control More... | |
#define | NATSEMI_CFG_PCI64_DET 0x00002000UL |
PCI 64-bit bus detected. More... | |
#define | NATSEMI_CFG_DATA64_EN 0x00001000UL |
64-bit data enable More... | |
#define | NATSEMI_CFG_M64ADDR 0x00000800UL |
64-bit address enable More... | |
#define | NATSEMI_CFG_EXTSTS_EN 0x00000100UL |
Extended status enable. More... | |
#define | NATSEMI_MEAR 0x0008 |
EEPROM Access Register. More... | |
#define | NATSEMI_MEAR_EESEL 0x00000008UL |
EEPROM chip select. More... | |
#define | NATSEMI_MEAR_EECLK 0x00000004UL |
EEPROM serial clock. More... | |
#define | NATSEMI_MEAR_EEDO 0x00000002UL |
EEPROM data out. More... | |
#define | NATSEMI_MEAR_EEDI 0x00000001UL |
EEPROM data in. More... | |
#define | NATSEMI_EEPROM_SIZE 32 |
Size of EEPROM (in bytes) More... | |
#define | NATSEMI_EEPROM_MAC_SANE 0x0a |
Word offset of MAC address within sane EEPROM layout. More... | |
#define | NATSEMI_EEPROM_MAC_INSANE 0x06 |
Word offset of MAC address within insane EEPROM layout. More... | |
#define | NATSEMI_PTSCR 0x000c |
PCI Test Control Register. More... | |
#define | NATSEMI_PTSCR_EELOAD_EN 0x00000004UL |
Enable EEPROM load. More... | |
#define | NATSEMI_EELOAD_MAX_WAIT_MS 100 |
Maximum time to wait for a configuration reload, in milliseconds. More... | |
#define | NATSEMI_ISR 0x0010 |
Interrupt Status Register. More... | |
#define | NATSEMI_IRQ_TXDESC 0x00000080UL |
TX descriptor. More... | |
#define | NATSEMI_IRQ_RXDESC 0x00000002UL |
RX descriptor. More... | |
#define | NATSEMI_IMR 0x0014 |
Interrupt Mask Register. More... | |
#define | NATSEMI_IER 0x0018 |
Interrupt Enable Register. More... | |
#define | NATSEMI_IER_IE 0x00000001UL |
Interrupt enable. More... | |
#define | NATSEMI_TXDP 0x0020 |
Transmit Descriptor Pointer. More... | |
#define | NATSEMI_TXDP_HI_64 0x0024 |
Transmit Descriptor Pointer High Dword (64-bit) More... | |
#define | NATSEMI_NUM_TX_DESC 4 |
Number of transmit descriptors. More... | |
#define | NATSEMI_TXCFG_32 0x24 |
Transmit configuration register (32-bit) More... | |
#define | NATSEMI_TXCFG_64 0x28 |
Transmit configuration register (64-bit) More... | |
#define | NATSEMI_TXCFG_CSI 0x80000000UL |
Carrier sense ignore. More... | |
#define | NATSEMI_TXCFG_HBI 0x40000000UL |
Heartbeat ignore. More... | |
#define | NATSEMI_TXCFG_ATP 0x10000000UL |
Automatic padding. More... | |
#define | NATSEMI_TXCFG_ECRETRY 0x00800000UL |
Excess collision retry. More... | |
#define | NATSEMI_TXCFG_MXDMA(x) ( (x) << 20 ) |
Max DMA burst size. More... | |
#define | NATSEMI_TXCFG_FLTH(x) ( (x) << 8 ) |
Fill threshold. More... | |
#define | NATSEMI_TXCFG_DRTH(x) ( (x) << 0 ) |
Drain threshold. More... | |
#define | NATSEMI_TXCFG_MXDMA_DEFAULT NATSEMI_TXCFG_MXDMA ( 0x7 ) |
Max DMA burst size (encoded value) More... | |
#define | NATSEMI_TXCFG_FLTH_DEFAULT NATSEMI_TXCFG_FLTH ( 512 / 32 ) |
Fill threshold (in units of 32 bytes) More... | |
#define | NATSEMI_TXCFG_DRTH_DEFAULT NATSEMI_TXCFG_DRTH ( 1024 / 32 ) |
Drain threshold (in units of 32 bytes) More... | |
#define | NATSEMI_RXDP 0x0030 |
Receive Descriptor Pointer. More... | |
#define | NATSEMI_RXDP_HI_64 0x0034 |
Receive Descriptor Pointer High Dword (64-bit) More... | |
#define | NATSEMI_NUM_RX_DESC 4 |
Number of receive descriptors. More... | |
#define | NATSEMI_RX_MAX_LEN ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ ) |
Receive buffer length. More... | |
#define | NATSEMI_RXCFG_32 0x34 |
Receive configuration register (32-bit) More... | |
#define | NATSEMI_RXCFG_64 0x38 |
Receive configuration register (64-bit) More... | |
#define | NATSEMI_RXCFG_ARP 0x40000000UL |
Accept runt packets. More... | |
#define | NATSEMI_RXCFG_ATX 0x10000000UL |
Accept transmit packets. More... | |
#define | NATSEMI_RXCFG_ALP 0x08000000UL |
Accept long packets. More... | |
#define | NATSEMI_RXCFG_MXDMA(x) ( (x) << 20 ) |
Max DMA burst size. More... | |
#define | NATSEMI_RXCFG_DRTH(x) ( (x) << 1 ) |
Drain threshold. More... | |
#define | NATSEMI_RXCFG_MXDMA_DEFAULT NATSEMI_RXCFG_MXDMA ( 0x7 ) |
Max DMA burst size (encoded value) More... | |
#define | NATSEMI_RXCFG_DRTH_DEFAULT NATSEMI_RXCFG_DRTH ( 64 / 8 ) |
Drain threshold (in units of 8 bytes) More... | |
#define | NATSEMI_RFCR 0x0048 |
Receive Filter/Match Control Register. More... | |
#define | NATSEMI_RFCR_RFEN 0x80000000UL |
RX filter enable. More... | |
#define | NATSEMI_RFCR_AAB 0x40000000UL |
Accept all broadcast. More... | |
#define | NATSEMI_RFCR_AAM 0x20000000UL |
Accept all multicast. More... | |
#define | NATSEMI_RFCR_AAU 0x10000000UL |
Accept all unicast. More... | |
#define | NATSEMI_RFCR_RFADDR(addr) ( (addr) << 0 ) |
Extended address. More... | |
#define | NATSEMI_RFCR_RFADDR_MASK NATSEMI_RFCR_RFADDR ( 0x3ff ) |
#define | NATSEMI_RFADDR_PMATCH_BASE 0x000 |
Perfect match filter address base. More... | |
#define | NATSEMI_RFDR 0x004c |
Receive Filter/Match Data Register. More... | |
#define | NATSEMI_RFDR_BMASK 0x00030000UL |
Byte mask. More... | |
#define | NATSEMI_RFDR_DATA(value) ( (value) & 0xffff ) |
Filter data. More... | |
Enumerations | |
enum | natsemi_descriptor_flags { NATSEMI_DESC_OWN = 0x80000000UL, NATSEMI_DESC_INTR = 0x20000000UL, NATSEMI_DESC_OK = 0x08000000UL } |
Packet descriptor flags. More... | |
enum | natsemi_nic_flags { NATSEMI_EEPROM_LITTLE_ENDIAN = 0x0001, NATSEMI_EEPROM_INSANE = 0x0002, NATSEMI_64BIT = 0x0004, NATSEMI_1000 = 0x0008 } |
National Semiconductor network card flags. More... | |
Functions | |
FILE_LICENCE (GPL2_OR_LATER) | |
struct natsemi_descriptor_32 | __attribute__ ((packed)) |
static | __attribute__ ((always_inline)) void natsemi_init_ring(struct natsemi_ring *ring |
Initialise descriptor ring. More... | |
if (natsemi->flags &NATSEMI_64BIT) return 1 | |
if ((address &~0xffffffffULL)==0) return 1 | |
Variables | |
uint32_t | link |
Link to next descriptor. More... | |
uint32_t | cmdsts |
Command / status. More... | |
uint32_t | bufptr |
Buffer pointer. More... | |
uint32_t | extsts |
Extended status. More... | |
uint8_t | reserved_a [16] |
Reserved. More... | |
uint8_t | reserved_b [12] |
Reserved. More... | |
uint8_t | reserved [12] |
Reserved. More... | |
struct natsemi_descriptor_32 | d32 |
Descriptor. More... | |
union natsemi_descriptor | __attribute__ |
static unsigned int | count |
static unsigned int unsigned int | reg |
static physaddr_t | address |
return | |
National Semiconductor "MacPhyter" network card driver.
Definition in file natsemi.h.
#define NATSEMI_DESC_SIZE_MASK 0xfff |
#define NATSEMI_RESET_MAX_WAIT_MS 100 |
#define NATSEMI_CFG 0x0004 |
#define NATSEMI_CFG_SPDSTS1 0x40000000UL |
#define NATSEMI_CFG_MODE_1000 0x00400000UL |
#define NATSEMI_CFG_PCI64_DET 0x00002000UL |
#define NATSEMI_CFG_DATA64_EN 0x00001000UL |
#define NATSEMI_CFG_M64ADDR 0x00000800UL |
#define NATSEMI_CFG_EXTSTS_EN 0x00000100UL |
#define NATSEMI_MEAR_EESEL 0x00000008UL |
#define NATSEMI_MEAR_EECLK 0x00000004UL |
#define NATSEMI_EEPROM_MAC_SANE 0x0a |
#define NATSEMI_EEPROM_MAC_INSANE 0x06 |
#define NATSEMI_PTSCR_EELOAD_EN 0x00000004UL |
#define NATSEMI_EELOAD_MAX_WAIT_MS 100 |
#define NATSEMI_TXDP_HI_64 0x0024 |
#define NATSEMI_NUM_TX_DESC 4 |
#define NATSEMI_TXCFG_32 0x24 |
#define NATSEMI_TXCFG_64 0x28 |
#define NATSEMI_TXCFG_CSI 0x80000000UL |
#define NATSEMI_TXCFG_ECRETRY 0x00800000UL |
#define NATSEMI_TXCFG_MXDMA | ( | x | ) | ( (x) << 20 ) |
#define NATSEMI_TXCFG_FLTH | ( | x | ) | ( (x) << 8 ) |
#define NATSEMI_TXCFG_DRTH | ( | x | ) | ( (x) << 0 ) |
#define NATSEMI_TXCFG_MXDMA_DEFAULT NATSEMI_TXCFG_MXDMA ( 0x7 ) |
#define NATSEMI_TXCFG_FLTH_DEFAULT NATSEMI_TXCFG_FLTH ( 512 / 32 ) |
#define NATSEMI_TXCFG_DRTH_DEFAULT NATSEMI_TXCFG_DRTH ( 1024 / 32 ) |
Drain threshold (in units of 32 bytes)
Start transmission once we receive a conservative 1024 bytes, to avoid FIFO underrun errors. (83815 does not allow us to specify a value of 0 for "wait until whole packet is present".)
Fill threshold plus drain threshold must be less than the transmit FIFO size, which is 2kB on 83815 and 8kB on 83820.
#define NATSEMI_RXDP_HI_64 0x0034 |
#define NATSEMI_NUM_RX_DESC 4 |
#define NATSEMI_RX_MAX_LEN ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ ) |
#define NATSEMI_RXCFG_32 0x34 |
#define NATSEMI_RXCFG_64 0x38 |
#define NATSEMI_RXCFG_ARP 0x40000000UL |
#define NATSEMI_RXCFG_ATX 0x10000000UL |
#define NATSEMI_RXCFG_ALP 0x08000000UL |
#define NATSEMI_RXCFG_MXDMA | ( | x | ) | ( (x) << 20 ) |
#define NATSEMI_RXCFG_DRTH | ( | x | ) | ( (x) << 1 ) |
#define NATSEMI_RXCFG_MXDMA_DEFAULT NATSEMI_RXCFG_MXDMA ( 0x7 ) |
#define NATSEMI_RXCFG_DRTH_DEFAULT NATSEMI_RXCFG_DRTH ( 64 / 8 ) |
#define NATSEMI_RFCR 0x0048 |
#define NATSEMI_RFCR_AAB 0x40000000UL |
#define NATSEMI_RFCR_AAM 0x20000000UL |
#define NATSEMI_RFCR_RFADDR_MASK NATSEMI_RFCR_RFADDR ( 0x3ff ) |
#define NATSEMI_RFADDR_PMATCH_BASE 0x000 |
#define NATSEMI_RFDR 0x004c |
enum natsemi_nic_flags |
FILE_LICENCE | ( | GPL2_OR_LATER | ) |
struct natsemi_descriptor_32 __attribute__ | ( | (packed) | ) |
|
inlinestatic |
Initialise descriptor ring.
Check if card can access physical address.
ring | Descriptor ring |
count | Number of descriptors |
reg | Descriptor start address register |
natsemi | National Semiconductor device |
address | Physical address |
address_ok | Card can access physical address |
if | ( | natsemi->flags & | NATSEMI_64BIT | ) |
Referenced by ar9003_hw_proc_txdesc(), arbel_start(), ath5k_hw_get_isr(), ath9k_config(), ath9k_hw_4k_check_eeprom(), ath9k_hw_ar9300_fill_eeprom(), ath9k_hw_fill_cap_info(), ath9k_hw_get_legacy_target_powers(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_cal_table(), ath9k_hw_set_ar9287_power_per_rate_table(), ath9k_hw_set_def_power_cal_table(), ath9k_hw_set_def_power_per_rate_table(), ath_start_ani(), atl1e_clean_rx_ring(), atl1e_clean_tx_ring(), atl1e_configure_rx(), atl1e_configure_tx(), atl_poll_rx(), atl_poll_tx(), bnxt_get_vlan(), bnxt_hwrm_func_qcfg_req(), bnxt_hwrm_ver_get(), bnxt_rx_drop(), get_hw_packet_type(), hermon_start(), hunt_probe(), ibft_netdev_is_required(), igbvf_check_for_link_vf(), list_check_contents(), net80211_handle_auth(), net80211_probe_step(), rsn_pick_desc(), rtl818x_probe(), sec80211_detect(), sky2_autoneg_done(), t515_poll(), tftp_process_multicast(), tftp_rx(), tg3_get_eeprom_hw_cfg(), tg3_get_invariants(), tg3_test_dma(), tkip_decrypt(), and vxge_xmit().
if | ( | (address &~0xffffffffULL) | = =0 | ) |
uint32_t cmdsts |
uint64_t bufptr |
struct natsemi_descriptor_32 d32 |
ring reg |
physaddr_t address |
return |
Definition at line 326 of file natsemi.h.
Referenced by atl1e_get_rx_page(), and rsn_pick_desc().