National Semiconductor "MacPhyter" network card driver. More...

#include <stdint.h>
#include <ipxe/spi.h>
#include <ipxe/spi_bit.h>

Data Structures
struct	natsemi_descriptor_32
	A 32-bit packet descriptor. More...

struct	natsemi_descriptor_64
	A 64-bit packet descriptor. More...

union	natsemi_descriptor
	A packet descriptor. More...

struct	natsemi_ring
	A National Semiconductor descriptor ring. More...

struct	natsemi_nic
	A National Semiconductor network card. More...

Macros
#define	NATSEMI_BAR_SIZE 0x100
	BAR size. More...

#define	NATSEMI_DESC_SIZE_MASK 0xfff
	Descriptor buffer size mask. More...

#define	NATSEMI_CR 0x0000
	Command Register. More...

#define	NATSEMI_CR_RST 0x00000100UL
	Reset. More...

#define	NATSEMI_CR_RXR 0x00000020UL
	Receiver reset. More...

#define	NATSEMI_CR_TXR 0x00000010UL
	Transmit reset. More...

#define	NATSEMI_CR_RXE 0x00000004UL
	Receiver enable. More...

#define	NATSEMI_CR_TXE 0x00000001UL
	Transmit enable. More...

#define	NATSEMI_RESET_MAX_WAIT_MS 100
	Maximum time to wait for a reset, in milliseconds. More...

#define	NATSEMI_CFG 0x0004
	Configuration and Media Status Register. More...

#define	NATSEMI_CFG_LNKSTS 0x80000000UL
	Link status. More...

#define	NATSEMI_CFG_SPDSTS1 0x40000000UL
	Speed status bit 1. More...

#define	NATSEMI_CFG_MODE_1000 0x00400000UL
	1000 Mb/s mode control More...

#define	NATSEMI_CFG_PCI64_DET 0x00002000UL
	PCI 64-bit bus detected. More...

#define	NATSEMI_CFG_DATA64_EN 0x00001000UL
	64-bit data enable More...

#define	NATSEMI_CFG_M64ADDR 0x00000800UL
	64-bit address enable More...

#define	NATSEMI_CFG_EXTSTS_EN 0x00000100UL
	Extended status enable. More...

#define	NATSEMI_MEAR 0x0008
	EEPROM Access Register. More...

#define	NATSEMI_MEAR_EESEL 0x00000008UL
	EEPROM chip select. More...

#define	NATSEMI_MEAR_EECLK 0x00000004UL
	EEPROM serial clock. More...

#define	NATSEMI_MEAR_EEDO 0x00000002UL
	EEPROM data out. More...

#define	NATSEMI_MEAR_EEDI 0x00000001UL
	EEPROM data in. More...

#define	NATSEMI_EEPROM_SIZE 32
	Size of EEPROM (in bytes) More...

#define	NATSEMI_EEPROM_MAC_SANE 0x0a
	Word offset of MAC address within sane EEPROM layout. More...

#define	NATSEMI_EEPROM_MAC_INSANE 0x06
	Word offset of MAC address within insane EEPROM layout. More...

#define	NATSEMI_PTSCR 0x000c
	PCI Test Control Register. More...

#define	NATSEMI_PTSCR_EELOAD_EN 0x00000004UL
	Enable EEPROM load. More...

#define	NATSEMI_EELOAD_MAX_WAIT_MS 100
	Maximum time to wait for a configuration reload, in milliseconds. More...

#define	NATSEMI_ISR 0x0010
	Interrupt Status Register. More...

#define	NATSEMI_IRQ_TXDESC 0x00000080UL
	TX descriptor. More...

#define	NATSEMI_IRQ_RXDESC 0x00000002UL
	RX descriptor. More...

#define	NATSEMI_IMR 0x0014
	Interrupt Mask Register. More...

#define	NATSEMI_IER 0x0018
	Interrupt Enable Register. More...

#define	NATSEMI_IER_IE 0x00000001UL
	Interrupt enable. More...

#define	NATSEMI_TXDP 0x0020
	Transmit Descriptor Pointer. More...

#define	NATSEMI_TXDP_HI_64 0x0024
	Transmit Descriptor Pointer High Dword (64-bit) More...

#define	NATSEMI_NUM_TX_DESC 4
	Number of transmit descriptors. More...

#define	NATSEMI_TXCFG_32 0x24
	Transmit configuration register (32-bit) More...

#define	NATSEMI_TXCFG_64 0x28
	Transmit configuration register (64-bit) More...

#define	NATSEMI_TXCFG_CSI 0x80000000UL
	Carrier sense ignore. More...

#define	NATSEMI_TXCFG_HBI 0x40000000UL
	Heartbeat ignore. More...

#define	NATSEMI_TXCFG_ATP 0x10000000UL
	Automatic padding. More...

#define	NATSEMI_TXCFG_ECRETRY 0x00800000UL
	Excess collision retry. More...

#define	NATSEMI_TXCFG_MXDMA(x) ( (x) << 20 )
	Max DMA burst size. More...

#define	NATSEMI_TXCFG_FLTH(x) ( (x) << 8 )
	Fill threshold. More...

#define	NATSEMI_TXCFG_DRTH(x) ( (x) << 0 )
	Drain threshold. More...

#define	NATSEMI_TXCFG_MXDMA_DEFAULT NATSEMI_TXCFG_MXDMA ( 0x7 )
	Max DMA burst size (encoded value) More...

#define	NATSEMI_TXCFG_FLTH_DEFAULT NATSEMI_TXCFG_FLTH ( 512 / 32 )
	Fill threshold (in units of 32 bytes) More...

#define	NATSEMI_TXCFG_DRTH_DEFAULT NATSEMI_TXCFG_DRTH ( 1024 / 32 )
	Drain threshold (in units of 32 bytes) More...

#define	NATSEMI_RXDP 0x0030
	Receive Descriptor Pointer. More...

#define	NATSEMI_RXDP_HI_64 0x0034
	Receive Descriptor Pointer High Dword (64-bit) More...

#define	NATSEMI_NUM_RX_DESC 4
	Number of receive descriptors. More...

#define	NATSEMI_RX_MAX_LEN ( ETH_FRAME_LEN + 4 /* VLAN / + 4 / CRC */ )
	Receive buffer length. More...

#define	NATSEMI_RXCFG_32 0x34
	Receive configuration register (32-bit) More...

#define	NATSEMI_RXCFG_64 0x38
	Receive configuration register (64-bit) More...

#define	NATSEMI_RXCFG_ARP 0x40000000UL
	Accept runt packets. More...

#define	NATSEMI_RXCFG_ATX 0x10000000UL
	Accept transmit packets. More...

#define	NATSEMI_RXCFG_ALP 0x08000000UL
	Accept long packets. More...

#define	NATSEMI_RXCFG_MXDMA(x) ( (x) << 20 )
	Max DMA burst size. More...

#define	NATSEMI_RXCFG_DRTH(x) ( (x) << 1 )
	Drain threshold. More...

#define	NATSEMI_RXCFG_MXDMA_DEFAULT NATSEMI_RXCFG_MXDMA ( 0x7 )
	Max DMA burst size (encoded value) More...

#define	NATSEMI_RXCFG_DRTH_DEFAULT NATSEMI_RXCFG_DRTH ( 64 / 8 )
	Drain threshold (in units of 8 bytes) More...

#define	NATSEMI_RFCR 0x0048
	Receive Filter/Match Control Register. More...

#define	NATSEMI_RFCR_RFEN 0x80000000UL
	RX filter enable. More...

#define	NATSEMI_RFCR_AAB 0x40000000UL
	Accept all broadcast. More...

#define	NATSEMI_RFCR_AAM 0x20000000UL
	Accept all multicast. More...

#define	NATSEMI_RFCR_AAU 0x10000000UL
	Accept all unicast. More...

#define	NATSEMI_RFCR_RFADDR(addr) ( (addr) << 0 )
	Extended address. More...

#define	NATSEMI_RFCR_RFADDR_MASK NATSEMI_RFCR_RFADDR ( 0x3ff )

#define	NATSEMI_RFADDR_PMATCH_BASE 0x000
	Perfect match filter address base. More...

#define	NATSEMI_RFDR 0x004c
	Receive Filter/Match Data Register. More...

#define	NATSEMI_RFDR_BMASK 0x00030000UL
	Byte mask. More...

#define	NATSEMI_RFDR_DATA(value) ( (value) & 0xffff )
	Filter data. More...

Enumerations
enum	natsemi_descriptor_flags { NATSEMI_DESC_OWN = 0x80000000UL, NATSEMI_DESC_INTR = 0x20000000UL, NATSEMI_DESC_OK = 0x08000000UL }
	Packet descriptor flags. More...

enum	natsemi_nic_flags { NATSEMI_EEPROM_LITTLE_ENDIAN = 0x0001, NATSEMI_EEPROM_INSANE = 0x0002, NATSEMI_64BIT = 0x0004, NATSEMI_1000 = 0x0008 }
	National Semiconductor network card flags. More...

Functions
	FILE_LICENCE (GPL2_OR_LATER)

struct natsemi_descriptor_32	__attribute__ ((packed))

static	__attribute__ ((always_inline)) void natsemi_init_ring(struct natsemi_ring *ring
	Initialise descriptor ring. More...

	if (natsemi->flags &NATSEMI_64BIT) return 1

	if ((address &~0xffffffffULL)==0) return 1

Variables
uint32_t	link
	Link to next descriptor. More...

uint32_t	cmdsts
	Command / status. More...

uint32_t	bufptr
	Buffer pointer. More...

uint32_t	extsts
	Extended status. More...

uint8_t	reserved_a [16]
	Reserved. More...

uint8_t	reserved_b [12]
	Reserved. More...

uint8_t	reserved [12]
	Reserved. More...

struct natsemi_descriptor_32	d32
	Descriptor. More...

union natsemi_descriptor	__attribute__

static unsigned int	count

static unsigned int unsigned int	reg

static physaddr_t	address

	return

Detailed Description

National Semiconductor "MacPhyter" network card driver.

Definition in file natsemi.h.

Macro Definition Documentation

◆ NATSEMI_BAR_SIZE

#define NATSEMI_BAR_SIZE 0x100

BAR size.

Definition at line 17 of file natsemi.h.

◆ NATSEMI_DESC_SIZE_MASK

#define NATSEMI_DESC_SIZE_MASK 0xfff

Descriptor buffer size mask.

Definition at line 70 of file natsemi.h.

◆ NATSEMI_CR

#define NATSEMI_CR 0x0000

Command Register.

Definition at line 83 of file natsemi.h.

◆ NATSEMI_CR_RST

#define NATSEMI_CR_RST 0x00000100UL

Reset.

Definition at line 84 of file natsemi.h.

◆ NATSEMI_CR_RXR

#define NATSEMI_CR_RXR 0x00000020UL

Receiver reset.

Definition at line 85 of file natsemi.h.

◆ NATSEMI_CR_TXR

#define NATSEMI_CR_TXR 0x00000010UL

Transmit reset.

Definition at line 86 of file natsemi.h.

◆ NATSEMI_CR_RXE

#define NATSEMI_CR_RXE 0x00000004UL

Receiver enable.

Definition at line 87 of file natsemi.h.

◆ NATSEMI_CR_TXE

#define NATSEMI_CR_TXE 0x00000001UL

Transmit enable.

Definition at line 88 of file natsemi.h.

◆ NATSEMI_RESET_MAX_WAIT_MS

#define NATSEMI_RESET_MAX_WAIT_MS 100

Maximum time to wait for a reset, in milliseconds.

Definition at line 91 of file natsemi.h.

◆ NATSEMI_CFG

#define NATSEMI_CFG 0x0004

Configuration and Media Status Register.

Definition at line 94 of file natsemi.h.

◆ NATSEMI_CFG_LNKSTS

#define NATSEMI_CFG_LNKSTS 0x80000000UL

Link status.

Definition at line 95 of file natsemi.h.

◆ NATSEMI_CFG_SPDSTS1

#define NATSEMI_CFG_SPDSTS1 0x40000000UL

Speed status bit 1.

Definition at line 96 of file natsemi.h.

◆ NATSEMI_CFG_MODE_1000

#define NATSEMI_CFG_MODE_1000 0x00400000UL

1000 Mb/s mode control

Definition at line 97 of file natsemi.h.

◆ NATSEMI_CFG_PCI64_DET

#define NATSEMI_CFG_PCI64_DET 0x00002000UL

PCI 64-bit bus detected.

Definition at line 98 of file natsemi.h.

◆ NATSEMI_CFG_DATA64_EN

#define NATSEMI_CFG_DATA64_EN 0x00001000UL

64-bit data enable

Definition at line 99 of file natsemi.h.

◆ NATSEMI_CFG_M64ADDR

#define NATSEMI_CFG_M64ADDR 0x00000800UL

64-bit address enable

Definition at line 100 of file natsemi.h.

◆ NATSEMI_CFG_EXTSTS_EN

#define NATSEMI_CFG_EXTSTS_EN 0x00000100UL

Extended status enable.

Definition at line 101 of file natsemi.h.

◆ NATSEMI_MEAR

#define NATSEMI_MEAR 0x0008

EEPROM Access Register.

Definition at line 104 of file natsemi.h.

◆ NATSEMI_MEAR_EESEL

#define NATSEMI_MEAR_EESEL 0x00000008UL

EEPROM chip select.

Definition at line 105 of file natsemi.h.

◆ NATSEMI_MEAR_EECLK

#define NATSEMI_MEAR_EECLK 0x00000004UL

EEPROM serial clock.

Definition at line 106 of file natsemi.h.

◆ NATSEMI_MEAR_EEDO

#define NATSEMI_MEAR_EEDO 0x00000002UL

EEPROM data out.

Definition at line 107 of file natsemi.h.

◆ NATSEMI_MEAR_EEDI

#define NATSEMI_MEAR_EEDI 0x00000001UL

EEPROM data in.

Definition at line 108 of file natsemi.h.

◆ NATSEMI_EEPROM_SIZE

#define NATSEMI_EEPROM_SIZE 32

Size of EEPROM (in bytes)

Definition at line 111 of file natsemi.h.

◆ NATSEMI_EEPROM_MAC_SANE

#define NATSEMI_EEPROM_MAC_SANE 0x0a

Word offset of MAC address within sane EEPROM layout.

Definition at line 114 of file natsemi.h.

◆ NATSEMI_EEPROM_MAC_INSANE

#define NATSEMI_EEPROM_MAC_INSANE 0x06

Word offset of MAC address within insane EEPROM layout.

Definition at line 117 of file natsemi.h.

◆ NATSEMI_PTSCR

#define NATSEMI_PTSCR 0x000c

PCI Test Control Register.

Definition at line 120 of file natsemi.h.

◆ NATSEMI_PTSCR_EELOAD_EN

#define NATSEMI_PTSCR_EELOAD_EN 0x00000004UL

Enable EEPROM load.

Definition at line 121 of file natsemi.h.

◆ NATSEMI_EELOAD_MAX_WAIT_MS

#define NATSEMI_EELOAD_MAX_WAIT_MS 100

Maximum time to wait for a configuration reload, in milliseconds.

Definition at line 124 of file natsemi.h.

◆ NATSEMI_ISR

#define NATSEMI_ISR 0x0010

Interrupt Status Register.

Definition at line 127 of file natsemi.h.

◆ NATSEMI_IRQ_TXDESC

#define NATSEMI_IRQ_TXDESC 0x00000080UL

TX descriptor.

Definition at line 128 of file natsemi.h.

◆ NATSEMI_IRQ_RXDESC

#define NATSEMI_IRQ_RXDESC 0x00000002UL

RX descriptor.

Definition at line 129 of file natsemi.h.

◆ NATSEMI_IMR

#define NATSEMI_IMR 0x0014

Interrupt Mask Register.

Definition at line 132 of file natsemi.h.

◆ NATSEMI_IER

#define NATSEMI_IER 0x0018

Interrupt Enable Register.

Definition at line 135 of file natsemi.h.

◆ NATSEMI_IER_IE

#define NATSEMI_IER_IE 0x00000001UL

Interrupt enable.

Definition at line 136 of file natsemi.h.

◆ NATSEMI_TXDP

#define NATSEMI_TXDP 0x0020

Transmit Descriptor Pointer.

Definition at line 139 of file natsemi.h.

◆ NATSEMI_TXDP_HI_64

#define NATSEMI_TXDP_HI_64 0x0024

Transmit Descriptor Pointer High Dword (64-bit)

Definition at line 142 of file natsemi.h.

◆ NATSEMI_NUM_TX_DESC

#define NATSEMI_NUM_TX_DESC 4

Number of transmit descriptors.

Definition at line 145 of file natsemi.h.

◆ NATSEMI_TXCFG_32

#define NATSEMI_TXCFG_32 0x24

Transmit configuration register (32-bit)

Definition at line 148 of file natsemi.h.

◆ NATSEMI_TXCFG_64

#define NATSEMI_TXCFG_64 0x28

Transmit configuration register (64-bit)

Definition at line 151 of file natsemi.h.

◆ NATSEMI_TXCFG_CSI

#define NATSEMI_TXCFG_CSI 0x80000000UL

Carrier sense ignore.

Definition at line 152 of file natsemi.h.

◆ NATSEMI_TXCFG_HBI

#define NATSEMI_TXCFG_HBI 0x40000000UL

Heartbeat ignore.

Definition at line 153 of file natsemi.h.

◆ NATSEMI_TXCFG_ATP

#define NATSEMI_TXCFG_ATP 0x10000000UL

Automatic padding.

Definition at line 154 of file natsemi.h.

◆ NATSEMI_TXCFG_ECRETRY

#define NATSEMI_TXCFG_ECRETRY 0x00800000UL

Excess collision retry.

Definition at line 155 of file natsemi.h.

◆ NATSEMI_TXCFG_MXDMA

#define NATSEMI_TXCFG_MXDMA ( x ) ( (x) << 20 )

Max DMA burst size.

Definition at line 156 of file natsemi.h.

◆ NATSEMI_TXCFG_FLTH

#define NATSEMI_TXCFG_FLTH ( x ) ( (x) << 8 )

Fill threshold.

Definition at line 157 of file natsemi.h.

◆ NATSEMI_TXCFG_DRTH

#define NATSEMI_TXCFG_DRTH ( x ) ( (x) << 0 )

Drain threshold.

Definition at line 158 of file natsemi.h.

◆ NATSEMI_TXCFG_MXDMA_DEFAULT

#define NATSEMI_TXCFG_MXDMA_DEFAULT NATSEMI_TXCFG_MXDMA ( 0x7 )

Max DMA burst size (encoded value)

This represents 256-byte bursts on 83815 controllers and 512-byte bursts on 83820 controllers.

Definition at line 165 of file natsemi.h.

◆ NATSEMI_TXCFG_FLTH_DEFAULT

#define NATSEMI_TXCFG_FLTH_DEFAULT NATSEMI_TXCFG_FLTH ( 512 / 32 )

Fill threshold (in units of 32 bytes)

Must be at least as large as the max DMA burst size, so use a value of 512 bytes.

Definition at line 172 of file natsemi.h.

◆ NATSEMI_TXCFG_DRTH_DEFAULT

#define NATSEMI_TXCFG_DRTH_DEFAULT NATSEMI_TXCFG_DRTH ( 1024 / 32 )

Drain threshold (in units of 32 bytes)

Start transmission once we receive a conservative 1024 bytes, to avoid FIFO underrun errors. (83815 does not allow us to specify a value of 0 for "wait until whole packet is present".)

Fill threshold plus drain threshold must be less than the transmit FIFO size, which is 2kB on 83815 and 8kB on 83820.

Definition at line 183 of file natsemi.h.

◆ NATSEMI_RXDP

#define NATSEMI_RXDP 0x0030

Receive Descriptor Pointer.

Definition at line 186 of file natsemi.h.

◆ NATSEMI_RXDP_HI_64

#define NATSEMI_RXDP_HI_64 0x0034

Receive Descriptor Pointer High Dword (64-bit)

Definition at line 189 of file natsemi.h.

◆ NATSEMI_NUM_RX_DESC

#define NATSEMI_NUM_RX_DESC 4

Number of receive descriptors.

Definition at line 192 of file natsemi.h.

◆ NATSEMI_RX_MAX_LEN

#define NATSEMI_RX_MAX_LEN ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )

Receive buffer length.

Definition at line 195 of file natsemi.h.

◆ NATSEMI_RXCFG_32

#define NATSEMI_RXCFG_32 0x34

Receive configuration register (32-bit)

Definition at line 198 of file natsemi.h.

◆ NATSEMI_RXCFG_64

#define NATSEMI_RXCFG_64 0x38

Receive configuration register (64-bit)

Definition at line 201 of file natsemi.h.

◆ NATSEMI_RXCFG_ARP

#define NATSEMI_RXCFG_ARP 0x40000000UL

Accept runt packets.

Definition at line 202 of file natsemi.h.

◆ NATSEMI_RXCFG_ATX

#define NATSEMI_RXCFG_ATX 0x10000000UL

Accept transmit packets.

Definition at line 203 of file natsemi.h.

◆ NATSEMI_RXCFG_ALP

#define NATSEMI_RXCFG_ALP 0x08000000UL

Accept long packets.

Definition at line 204 of file natsemi.h.

◆ NATSEMI_RXCFG_MXDMA

#define NATSEMI_RXCFG_MXDMA ( x ) ( (x) << 20 )

Max DMA burst size.

Definition at line 205 of file natsemi.h.

◆ NATSEMI_RXCFG_DRTH

#define NATSEMI_RXCFG_DRTH ( x ) ( (x) << 1 )

Drain threshold.

Definition at line 206 of file natsemi.h.

◆ NATSEMI_RXCFG_MXDMA_DEFAULT

#define NATSEMI_RXCFG_MXDMA_DEFAULT NATSEMI_RXCFG_MXDMA ( 0x7 )

Max DMA burst size (encoded value)

This represents 256-byte bursts on 83815 controllers and 512-byte bursts on 83820 controllers.

Definition at line 213 of file natsemi.h.

◆ NATSEMI_RXCFG_DRTH_DEFAULT

#define NATSEMI_RXCFG_DRTH_DEFAULT NATSEMI_RXCFG_DRTH ( 64 / 8 )

Drain threshold (in units of 8 bytes)

Start draining after 64 bytes.

Must be large enough to allow packet's accept/reject status to be determined before draining begins.

Definition at line 222 of file natsemi.h.

◆ NATSEMI_RFCR

#define NATSEMI_RFCR 0x0048

Receive Filter/Match Control Register.

Definition at line 225 of file natsemi.h.

◆ NATSEMI_RFCR_RFEN

#define NATSEMI_RFCR_RFEN 0x80000000UL

RX filter enable.

Definition at line 226 of file natsemi.h.

◆ NATSEMI_RFCR_AAB

#define NATSEMI_RFCR_AAB 0x40000000UL

Accept all broadcast.

Definition at line 227 of file natsemi.h.

◆ NATSEMI_RFCR_AAM

#define NATSEMI_RFCR_AAM 0x20000000UL

Accept all multicast.

Definition at line 228 of file natsemi.h.

◆ NATSEMI_RFCR_AAU

#define NATSEMI_RFCR_AAU 0x10000000UL

Accept all unicast.

Definition at line 229 of file natsemi.h.

◆ NATSEMI_RFCR_RFADDR

#define NATSEMI_RFCR_RFADDR ( addr ) ( (addr) << 0 )

Extended address.

Definition at line 230 of file natsemi.h.

◆ NATSEMI_RFCR_RFADDR_MASK

#define NATSEMI_RFCR_RFADDR_MASK NATSEMI_RFCR_RFADDR ( 0x3ff )

Definition at line 231 of file natsemi.h.

◆ NATSEMI_RFADDR_PMATCH_BASE

#define NATSEMI_RFADDR_PMATCH_BASE 0x000

Perfect match filter address base.

Definition at line 234 of file natsemi.h.

◆ NATSEMI_RFDR

#define NATSEMI_RFDR 0x004c

Receive Filter/Match Data Register.

Definition at line 237 of file natsemi.h.

◆ NATSEMI_RFDR_BMASK

#define NATSEMI_RFDR_BMASK 0x00030000UL

Byte mask.

Definition at line 238 of file natsemi.h.

◆ NATSEMI_RFDR_DATA

#define NATSEMI_RFDR_DATA ( value ) ( (value) & 0xffff )

Filter data.

Definition at line 239 of file natsemi.h.

Enumeration Type Documentation

◆ natsemi_descriptor_flags

enum natsemi_descriptor_flags

Packet descriptor flags.

Enumerator
NATSEMI_DESC_OWN	Descriptor is owned by NIC.
NATSEMI_DESC_INTR	Request descriptor interrupt.
NATSEMI_DESC_OK	Packet OK.

Definition at line 73 of file natsemi.h.

                               {
         /** Descriptor is owned by NIC */
         NATSEMI_DESC_OWN = 0x80000000UL,
         /** Request descriptor interrupt */
         NATSEMI_DESC_INTR = 0x20000000UL,
         /** Packet OK */
         NATSEMI_DESC_OK = 0x08000000UL,
 };

◆ natsemi_nic_flags

enum natsemi_nic_flags

National Semiconductor network card flags.

Enumerator
NATSEMI_EEPROM_LITTLE_ENDIAN	EEPROM is little-endian.
NATSEMI_EEPROM_INSANE	EEPROM layout is insane.
NATSEMI_64BIT	Card supports 64-bit operation.
NATSEMI_1000	Card supports 1000Mbps link.

Definition at line 242 of file natsemi.h.

                        {
         /** EEPROM is little-endian */
         NATSEMI_EEPROM_LITTLE_ENDIAN = 0x0001,
         /** EEPROM layout is insane */
         NATSEMI_EEPROM_INSANE = 0x0002,
         /** Card supports 64-bit operation */
         NATSEMI_64BIT = 0x0004,
         /** Card supports 1000Mbps link */
         NATSEMI_1000 = 0x0008,
 };

Function Documentation

◆ FILE_LICENCE()

FILE_LICENCE ( GPL2_OR_LATER )

◆ attribute() [1/2]

struct natsemi_descriptor_32 __attribute__ ( (packed) )

◆ attribute() [2/2]

static __attribute__ ( (always_inline) )

inlinestatic

Initialise descriptor ring.

Check if card can access physical address.

Parameters

ring	Descriptor ring
count	Number of descriptors
reg	Descriptor start address register
natsemi	National Semiconductor device
address	Physical address
address_ok	Card can access physical address

◆ if() [1/2]

if ( natsemi->flags & NATSEMI_64BIT )

Referenced by ar9003_hw_proc_txdesc(), arbel_start(), ath5k_hw_get_isr(), ath9k_config(), ath9k_hw_4k_check_eeprom(), ath9k_hw_ar9300_fill_eeprom(), ath9k_hw_fill_cap_info(), ath9k_hw_get_legacy_target_powers(), ath9k_hw_set_4k_power_per_rate_table(), ath9k_hw_set_ar9287_power_cal_table(), ath9k_hw_set_ar9287_power_per_rate_table(), ath9k_hw_set_def_power_cal_table(), ath9k_hw_set_def_power_per_rate_table(), ath_start_ani(), atl1e_clean_rx_ring(), atl1e_clean_tx_ring(), atl1e_configure_rx(), atl1e_configure_tx(), bnxt_get_vlan(), bnxt_hwrm_func_qcfg_req(), bnxt_hwrm_ver_get(), bnxt_rx_drop(), get_hw_packet_type(), hermon_start(), hunt_probe(), ibft_netdev_is_required(), igbvf_check_for_link_vf(), list_check_contents(), net80211_handle_auth(), net80211_probe_step(), rsn_pick_desc(), rtl818x_probe(), sec80211_detect(), sky2_autoneg_done(), t515_poll(), tftp_process_multicast(), tftp_rx(), tg3_get_eeprom_hw_cfg(), tg3_get_invariants(), tg3_test_dma(), tkip_decrypt(), and vxge_xmit().

◆ if() [2/2]

if ( (address &~0xffffffffULL) = =0 )

Variable Documentation

◆ link

uint64_t link

Link to next descriptor.

Definition at line 12 of file natsemi.h.

◆ cmdsts

uint32_t cmdsts

Command / status.

Definition at line 14 of file natsemi.h.

Referenced by sis900_init_rxd().

◆ bufptr

uint64_t bufptr

Buffer pointer.

Definition at line 16 of file natsemi.h.

Referenced by sis900_init_rxd().

◆ extsts

uint32_t extsts

Extended status.

Definition at line 18 of file natsemi.h.

◆ reserved_a

uint8_t reserved_a[16]

Reserved.

Definition at line 20 of file natsemi.h.

◆ reserved_b

uint8_t reserved_b[12]

Reserved.

Definition at line 24 of file natsemi.h.

◆ reserved

uint8_t reserved[12]

Reserved.

Definition at line 20 of file natsemi.h.

◆ d32

struct natsemi_descriptor_32 d32

Descriptor.

Definition at line 22 of file natsemi.h.

Referenced by natsemi_create_ring().

◆ attribute

union natsemi_descriptor __attribute__

◆ count

unsigned int count

Definition at line 276 of file natsemi.h.

◆ reg

ring reg

Initial value:

{

ring->count = count

count

static unsigned int count

Definition: natsemi.h:276

Definition at line 277 of file natsemi.h.

◆ address

physaddr_t address

Initial value:

{
        
        if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
                return 1

Definition at line 312 of file natsemi.h.

◆ return

return

Definition at line 326 of file natsemi.h.

Referenced by atl1e_get_rx_page(), and rsn_pick_desc().

Data Structures

Macros

Enumerations

Functions

Variables

Detailed Description

Macro Definition Documentation

◆ NATSEMI_BAR_SIZE

◆ NATSEMI_DESC_SIZE_MASK

◆ NATSEMI_CR

◆ NATSEMI_CR_RST

◆ NATSEMI_CR_RXR

◆ NATSEMI_CR_TXR

◆ NATSEMI_CR_RXE

◆ NATSEMI_CR_TXE

◆ NATSEMI_RESET_MAX_WAIT_MS

◆ NATSEMI_CFG

◆ NATSEMI_CFG_LNKSTS

◆ NATSEMI_CFG_SPDSTS1

◆ NATSEMI_CFG_MODE_1000

◆ NATSEMI_CFG_PCI64_DET

◆ NATSEMI_CFG_DATA64_EN

◆ NATSEMI_CFG_M64ADDR

◆ NATSEMI_CFG_EXTSTS_EN

◆ NATSEMI_MEAR

◆ NATSEMI_MEAR_EESEL

◆ NATSEMI_MEAR_EECLK

◆ NATSEMI_MEAR_EEDO

◆ NATSEMI_MEAR_EEDI

◆ NATSEMI_EEPROM_SIZE

◆ NATSEMI_EEPROM_MAC_SANE

◆ NATSEMI_EEPROM_MAC_INSANE

◆ NATSEMI_PTSCR

◆ NATSEMI_PTSCR_EELOAD_EN

◆ NATSEMI_EELOAD_MAX_WAIT_MS

◆ NATSEMI_ISR

◆ NATSEMI_IRQ_TXDESC

◆ NATSEMI_IRQ_RXDESC

◆ NATSEMI_IMR

◆ NATSEMI_IER

◆ NATSEMI_IER_IE

◆ NATSEMI_TXDP

◆ NATSEMI_TXDP_HI_64

◆ NATSEMI_NUM_TX_DESC

◆ NATSEMI_TXCFG_32

◆ NATSEMI_TXCFG_64

◆ NATSEMI_TXCFG_CSI

◆ NATSEMI_TXCFG_HBI

◆ NATSEMI_TXCFG_ATP

◆ NATSEMI_TXCFG_ECRETRY

◆ NATSEMI_TXCFG_MXDMA

◆ NATSEMI_TXCFG_FLTH

◆ NATSEMI_TXCFG_DRTH

◆ NATSEMI_TXCFG_MXDMA_DEFAULT

◆ NATSEMI_TXCFG_FLTH_DEFAULT

◆ NATSEMI_TXCFG_DRTH_DEFAULT

◆ NATSEMI_RXDP

◆ NATSEMI_RXDP_HI_64

◆ NATSEMI_NUM_RX_DESC

◆ NATSEMI_RX_MAX_LEN

◆ NATSEMI_RXCFG_32

◆ NATSEMI_RXCFG_64

◆ NATSEMI_RXCFG_ARP

◆ NATSEMI_RXCFG_ATX

◆ NATSEMI_RXCFG_ALP

◆ NATSEMI_RXCFG_MXDMA

◆ NATSEMI_RXCFG_DRTH

◆ NATSEMI_RXCFG_MXDMA_DEFAULT

◆ NATSEMI_RXCFG_DRTH_DEFAULT

◆ NATSEMI_RFCR

◆ NATSEMI_RFCR_RFEN

◆ NATSEMI_RFCR_AAB

◆ NATSEMI_RFCR_AAM

◆ NATSEMI_RFCR_AAU

◆ NATSEMI_RFCR_RFADDR

◆ NATSEMI_RFCR_RFADDR_MASK

◆ NATSEMI_RFADDR_PMATCH_BASE

◆ NATSEMI_RFDR

◆ NATSEMI_RFDR_BMASK

◆ NATSEMI_RFDR_DATA

◆ attribute() [1/2]

◆ attribute() [2/2]

◆ attribute