49 default:
return "<UNKNOWN>";
78 DBGC ( msix,
"MSI-X %p %s could not find BAR%d\n",
83 DBGC ( msix,
"MSI-X %p %s at %#08lx (BAR%d+%#lx)\n",
89 DBGC ( msix,
"MSI-X %p %s could not map %#08lx\n",
111 DBGC ( msix,
"MSI-X %p found no MSI-X capability in " 120 DBGC ( msix,
"MSI-X %p has %d vectors for " PCI_FMT "\n",
125 if ( ! msix->
table ) {
247 DBGC ( msix,
"MSI-X %p vector %d %#08x => %#08lx%s%s\n",
250 ( ( pba & ( 1 <<
vector ) ) ?
" (pending)" :
"" ) );
struct arbelprm_rc_send_wqe rc
void pci_msix_disable(struct pci_device *pci, struct pci_msix *msix)
Disable MSI-X interrupts.
uint32_t vector
MSI-X vector.
uint64_t address
Base address.
int pci_write_config_word(struct pci_device *pci, unsigned int where, uint16_t value)
Write 16-bit word to PCI configuration space.
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
uint64_t desc
Microcode descriptor list physical address.
#define ENOENT
No such file or directory.
unsigned long long uint64_t
#define PCI_MSIX_CONTROL
MSI-X vector control.
int pci_read_config_word(struct pci_device *pci, unsigned int where, uint16_t *value)
Read 16-bit word from PCI configuration space.
#define PCI_MSIX_DESC_BIR(x)
BAR index.
#define PCI_BASE_ADDRESS(n)
PCI base address registers.
uint32_t start
Starting offset.
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
int pci_read_config_dword(struct pci_device *pci, unsigned int where, uint32_t *value)
Read 32-bit dword from PCI configuration space.
void pci_msix_control(struct pci_msix *msix, unsigned int vector, uint32_t mask)
Control MSI-X interrupt vector.
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
#define PCI_MSIX_CTRL
MSI-X interrupts.
uint16_t count
Number of entries.
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
unsigned int cap
Capability offset.
#define PCI_MSIX_VECTOR(n)
MSI-X vector offset.
#define PCI_MSIX_CTRL_SIZE(x)
Table size.
#define PCI_MSIX_CTRL_MASK
Mask all interrupts.
#define PCI_FMT
PCI device debug message format.
#define PCI_MSIX_LEN
MSI-X BAR mapped length.
#define PCI_MSIX_ADDRESS_LO
MSI-X vector address low 32 bits.
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
static void * pci_msix_ioremap(struct pci_device *pci, struct pci_msix *msix, unsigned int cfg)
Map MSI-X BAR portion.
void pci_msix_dump(struct pci_msix *msix, unsigned int vector)
Dump MSI-X interrupt state (for debugging)
#define PCI_CAP_ID_MSIX
MSI-X.
#define PCI_MSIX_DATA
MSI-X vector data.
int pci_msix_enable(struct pci_device *pci, struct pci_msix *msix)
Enable MSI-X interrupts.
#define PCI_MSIX_DESC_OFFSET(x)
BAR offset.
#define PCI_MSIX_CONTROL_MASK
Vector is masked.
#define PCI_ARGS(pci)
PCI device debug message arguments.
void iounmap(volatile const void *io_addr)
Unmap I/O address.
uint8_t data[48]
Additional event data.
#define PCI_MSIX_CTRL_ENABLE
Enable MSI-X.
uint16_t offset
Offset to command line.
void pci_msix_map(struct pci_msix *msix, unsigned int vector, physaddr_t address, uint32_t data)
Map MSI-X interrupt vector.
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.
static const char * pci_msix_name(unsigned int cfg)
Get MSI-X descriptor name (for debugging)
#define PCI_MSIX_ADDRESS_HI
MSI-X vector address high 32 bits.
#define PCI_MSIX_DESC_PBA
#define NULL
NULL pointer (VOID *)
void * pba
Pending bit array.
unsigned int count
Number of vectors.
#define PCI_MSIX_DESC_TABLE