35 defined(DEBUG_DRV) || \
36 defined(DEBUG_PCI) || \
37 defined(DEBUG_CHIP) || \
38 defined(DEBUG_MEMORY) || \
39 defined(DEBUG_LINK) || \
40 defined(DEBUG_FAIL) || \
41 defined(DEBUG_HWRM_CMDS) || \
42 defined(DEBUG_HWRM_DUMP) || \
43 defined(DEBUG_CQ) || \
44 defined(DEBUG_CQ_DUMP) || \
45 defined(DEBUG_TX) || \
46 defined(DEBUG_TX_DUMP) || \
47 defined(DEBUG_RX) || \
48 defined(DEBUG_RX_DUMP)
51#if defined(DEBUG_DEFAULT)
63#define MAX_CHAR_SIZE(a) (u32)((1 << (a)) - 1)
75 for (jj = 0; jj < 16; jj++) {
76 if (!(jj & MAX_CHAR_SIZE(
flag)))
82 if ((jj & 0xF) == 0xF) {
84 for (i = 0; i < 16; i++) {
87 if (c >= 0x20 && c < 0x7F)
100 u32 length16, remlen, jj;
102 length16 =
length & 0xFFFFFFF0;
104 for (jj = 0; jj < length16; jj += 16)
108 if (length16 || remlen)
115#if defined(DEBUG_PCI)
123 dbg_prn(
" Device id : %04X (%cF)\n",
124 pdev->
device, (
bp->vf) ?
'V' :
'P');
126 dbg_prn(
" PCI Command Reg : %04X\n", cmd_reg);
127 dbg_prn(
" Sub Vendor id : %04X\n",
bp->subsystem_vendor);
128 dbg_prn(
" Sub Device id : %04X\n",
bp->subsystem_device);
129 dbg_prn(
" PF Number : %X\n",
bp->pf_num);
140#define dbg_pci(bp, func, creg)
143#if defined(DEBUG_MEMORY)
150 dbg_prn(
" bp->hwrm_req_addr : %p",
bp->hwrm_addr_req);
152 dbg_prn(
" phy %lx\n",
bp->req_addr_mapping);
153 dbg_prn(
" bp->hwrm_resp_addr : %p",
bp->hwrm_addr_resp);
155 dbg_prn(
" phy %lx\n",
bp->resp_addr_mapping);
156 dbg_prn(
" bp->dma_addr : %p",
bp->hwrm_addr_dma);
158 dbg_prn(
" phy %lx\n",
bp->dma_addr_mapping);
159 dbg_prn(
" bp->tx.bd_virt : %p",
bp->tx.bd_virt);
162 dbg_prn(
" bp->rx.bd_virt : %p",
bp->rx.bd_virt);
165 dbg_prn(
" bp->cq.bd_virt : %p",
bp->cq.bd_virt);
168 dbg_prn(
" bp->nq.bd_virt : %p",
bp->nq.bd_virt);
175#define dbg_mem(bp, func) (func = func)
178#if defined(DEBUG_CHIP)
182 dbg_prn(
" HWRM interface %d.%d.%d is older than 1.0.0.\n",
185 dbg_prn(
" Update FW with HWRM interface 1.0.0 or newer.\n");
187 dbg_prn(
" FW Version : %d.%d.%d.%d\n",
190 dbg_prn(
" cmd timeout : %d\n", tmo);
202 dbg_prn(
" SHORT_CMD_SUPPORTED\n");
208 dbg_prn(
" min_hw_ring_grps : %d\n",
bp->min_hw_ring_grps);
209 dbg_prn(
" max_hw_ring_grps : %d\n",
bp->max_hw_ring_grps);
211 dbg_prn(
" min_tx_rings : %d\n",
bp->min_tx_rings);
212 dbg_prn(
" max_tx_rings : %d\n",
bp->max_tx_rings);
214 dbg_prn(
" min_rx_rings : %d\n",
bp->min_rx_rings);
215 dbg_prn(
" max_rx_rings : %d\n",
bp->max_rx_rings);
217 dbg_prn(
" min_cq_rings : %d\n",
bp->min_cp_rings);
218 dbg_prn(
" max_cq_rings : %d\n",
bp->max_cp_rings);
220 dbg_prn(
" min_stat_ctxs : %d\n",
bp->min_stat_ctxs);
221 dbg_prn(
" max_stat_ctxs : %d\n",
bp->max_stat_ctxs);
226 dbg_prn(
" Port Number : %d\n",
bp->port_idx);
228 dbg_prn(
" PF MAC : %02x:%02x:%02x:%02x:%02x:%02x\n",
239 dbg_prn(
" ordinal_value : %d\n",
bp->ordinal_value);
240 dbg_prn(
" stat_ctx_id : %x\n",
bp->stat_ctx_id);
287 dbg_prn(
" NQ Ring Id : %d\n",
bp->nq_ring_id);
289 dbg_prn(
" Grp ID : %d\n",
bp->ring_grp_id);
290 dbg_prn(
" Stat Ctx ID : %d\n",
bp->stat_ctx_id);
291 dbg_prn(
" CQ Ring Id : %d\n",
bp->cq_ring_id);
292 dbg_prn(
" Tx Ring Id : %d\n",
bp->tx_ring_id);
293 dbg_prn(
" Rx ring Id : %d\n",
bp->rx_ring_id);
300 dbg_prn(
" num_cmpl_rings : %d\n",
bp->num_cmpl_rings);
301 dbg_prn(
" num_tx_rings : %d\n",
bp->num_tx_rings);
302 dbg_prn(
" num_rx_rings : %d\n",
bp->num_rx_rings);
303 dbg_prn(
" num_ring_grps : %d\n",
bp->num_hw_ring_grps);
304 dbg_prn(
" num_stat_ctxs : %d\n",
bp->num_stat_ctxs);
319#define dbg_fw_ver(resp, tmo)
320#define dbg_func_resource_qcaps(bp)
321#define dbg_func_qcaps(bp)
322#define dbg_func_qcfg(bp)
323#define prn_set_speed(speed)
324#define dbg_chip_info(bp)
325#define dbg_num_rings(bp)
326#define dbg_flags(func, flags)
327#define dbg_bnxt_pause()
330#if defined(DEBUG_HWRM_CMDS) || defined(DEBUG_FAIL)
333 dbg_prn(
"- %s(0x%04x) cmd_len %d cmd_tmo %d",
334 func, (
u16)((
struct input *)
bp->hwrm_addr_req)->req_type,
336#if defined(DEBUG_HWRM_DUMP)
337 dump_mem((
u8 *)
bp->hwrm_addr_req,
len, DISP_U8);
343void debug_resp(
struct bnxt *
bp,
const char *func,
u32 resp_len,
u16 err)
346 func, (
u16)((
struct input *)
bp->hwrm_addr_req)->req_type);
350 dbg_prn(
"Fail err 0x%04x", err);
353#if defined(DEBUG_HWRM_DUMP)
355 dump_mem((
u8 *)
bp->hwrm_addr_resp, resp_len, DISP_U8);
366 const char *func,
u16 cmd_len,
369#if !defined(DEBUG_HWRM_CMDS)
373 dump_hwrm_req(
bp, func, cmd_len, cmd_tmo);
374 debug_resp(
bp, func, resp_len, err);
378#define dbg_hw_cmd(bp, func, cmd_len, resp_len, cmd_tmo, err) (func = func)
381#if defined(DEBUG_HWRM_CMDS)
387 dbg_prn(
"- %s(0x%04x) short_cmd_len %d",
391#if defined(DEBUG_HWRM_DUMP)
392 dump_mem((
u8 *)sreq,
len, DISP_U8);
398#define dbg_short_cmd(sreq, func, len)
406 dbg_prn(
" RX desc_idx %d PktLen %d\n", desc_idx, rx_cmp->
len);
408#if defined(DEBUG_RX_DUMP)
414#if defined(DEBUG_RX_DUMP)
423 dbg_prn(
" Rx alloc_iob (%d) %p bd_virt (%d)\n",
429 dbg_prn(
"- RX old cid %d new cid %d\n", idx, cid);
434 dbg_prn(
" Rx alloc_iob (%d) ", iob_idx);
435 dbg_prn(
"failed for cons_id %d\n", cons_id);
447#if defined(DEBUG_RX_DUMP)
448 dump_mem(iob, (
u32)rx_len, DISP_U8);
456 dbg_prn(
"- RX Stat Total %d Good %d Drop err %d LB %d\n",
457 bp->rx.cnt,
bp->rx.good,
458 bp->rx.drop_err,
bp->rx.drop_lb);
461#define dump_rx_bd(rx_cmp, rx_cmp_hi, desc_idx)
462#define dbg_alloc_rx_iob(iob, id, cid)
463#define dbg_rx_cid(idx, cid)
464#define dbg_alloc_rx_iob_fail(iob_idx, cons_id)
465#define dbg_rxp(iob, rx_len, drop)
466#define dbg_rx_stat(bp)
490 dbg_prn(
" cid %d, tog %d", cid, toggle);
491#if defined(DEBUG_CQ_DUMP)
501#if defined(DEBUG_CQ_DUMP)
502 dump_mem((
u8 *)nqp, (
u32)
sizeof(
struct nq_base), DISP_U8);
508#define dump_cq(cq, id, toggle)
509#define dump_nq(nq, id)
515 dbg_prn(
"- Tx BD %d Avail %d Use %d pid %d cid %d\n",
524 dbg_prn(
"- Tx VLAN PKT %d MBA %d",
bp->vlan_tx,
bp->vlan_id);
529 dbg_prn(
" old len %d new len %d\n", plen,
len);
534 dbg_prn(
" TX stats cnt %d req_cnt %d",
bp->tx.cnt,
bp->tx.cnt_req);
535 dbg_prn(
" prod_id %d cons_id %d\n",
bp->tx.prod_id,
bp->tx.cons_id);
541#if defined(DEBUG_TX_DUMP)
542 dump_mem(pkt, (
u32)
len, DISP_U8);
551#if defined(DEBUG_TX_DUMP)
563#define dbg_tx_avail(bp, a, u)
564#define dbg_tx_vlan(bp, src, plen, len)
565#define dbg_tx_pad(plen, len)
566#define dump_tx_stat(bp)
567#define dump_tx_pkt(pkt, len, idx)
568#define dump_tx_bd(prod_bd, len, idx)
569#define dbg_tx_done(pkt, len, idx)
572#if defined(DEBUG_LINK)
591 dbg_prn(
"- %cQ Type (ae) cid %d", c, cid);
592 dump_mem(cmp,
size, DISP_U8);
598 switch (
bp->current_link_speed) {
639 dbg_prn(
" media_detect : %x\n",
bp->media_detect);
644 dbg_prn(
" Port(%d) : Link",
bp->port_idx);
656 dbg_prn(
" Link wait time : %d ms", tmo);
660#define dump_evt(cq, ty, id, ring)
661#define dbg_link_status(bp)
662#define dbg_link_info(bp)
663#define dbg_link_state(bp, tmo)
uint32_t flag
Flag number.
#define LINK_SPEED_DRV_1G
#define CMPL_BASE_TYPE_TX_L2
#define TX_RING_BUFFER_SIZE
#define SHORT_CMD_SUPPORTED
#define STATUS_LINK_ACTIVE
#define LINK_SPEED_DRV_SHIFT
#define RX_RING_BUFFER_SIZE
#define NQ_RING_BUFFER_SIZE
#define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT
#define CMPL_BASE_TYPE_MASK
#define LINK_SPEED_DRV_25G
#define LINK_SPEED_DRV_200G
#define LINK_SPEED_DRV_10G
#define CMPL_BASE_TYPE_RX_L2
#define LINK_SPEED_DRV_100G
#define SHORT_CMD_REQUIRED
#define LINK_SPEED_DRV_MASK
#define LINK_SPEED_DRV_40G
#define CQ_RING_BUFFER_SIZE
#define LINK_SPEED_DRV_50G
#define CMPL_BASE_TYPE_STAT_EJECT
#define LINK_SPEED_DRV_AUTONEG
#define dbg_rx_cid(idx, cid)
#define dump_evt(cq, ty, id, ring)
#define dbg_alloc_rx_iob_fail(iob_idx, cons_id)
#define dump_tx_bd(prod_bd, len, idx)
#define dbg_hw_cmd(bp, func, cmd_len, resp_len, cmd_tmo, err)
#define dbg_pci(bp, func, creg)
#define dbg_alloc_rx_iob(iob, id, cid)
#define dbg_tx_avail(bp, a, u)
#define dbg_tx_done(pkt, len, idx)
#define dbg_fw_ver(resp, tmo)
#define dbg_func_qcaps(bp)
#define dump_cq(cq, id, toggle)
#define dbg_link_state(bp, tmo)
#define dbg_tx_vlan(bp, src, plen, len)
#define dbg_func_qcfg(bp)
#define prn_set_speed(speed)
#define dbg_mem(bp, func)
#define dbg_rxp(iob, rx_len, drop)
#define dbg_link_info(bp)
#define dbg_flags(func, flags)
#define dbg_func_resource_qcaps(bp)
#define dbg_short_cmd(sreq, func, len)
#define dbg_link_status(bp)
#define dbg_num_rings(bp)
#define dump_tx_pkt(pkt, len, idx)
#define dump_rx_bd(rx_cmp, rx_cmp_hi, desc_idx)
#define dbg_chip_info(bp)
#define PORT_PHY_QCFG_RESP_LINK_SPEED_1GB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_200GB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_2_5GB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_25GB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_20GB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_100MB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_100GB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_40GB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_10MB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_2GB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_10GB
#define PORT_PHY_QCFG_RESP_LINK_SPEED_50GB
int getchar(void)
Read a single character from any console.
uint32_t type
Operating system type.
uint16_t size
Buffer size.
uint32_t buffer
Buffer index (or NETVSC_RNDIS_NO_BUFFER)
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
#define PCI_BASE_ADDRESS_2
#define PCI_BASE_ADDRESS_0
#define PCI_BASE_ADDRESS_4
void * data
Start of data.
uint32_t busdevfn
Segment, bus, device, and function (bus:dev.fn) number.
uint8_t irq
Interrupt number.
uint16_t vendor
Vendor ID.
uint16_t device
Device ID.
unsigned int sleep(unsigned int secs)
Sleep (interruptibly) for a fixed number of seconds.