iPXE
exanic.c
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1 /*
2  * Copyright (C) 2017 Michael Brown <mbrown@fensystems.co.uk>.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of the
7  * License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17  * 02110-1301, USA.
18  *
19  * You can also choose to distribute this program under the terms of
20  * the Unmodified Binary Distribution Licence (as given in the file
21  * COPYING.UBDL), provided that you have satisfied its requirements.
22  */
23 
24 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25 
26 #include <stdint.h>
27 #include <string.h>
28 #include <strings.h>
29 #include <unistd.h>
30 #include <errno.h>
31 #include <byteswap.h>
32 #include <ipxe/netdevice.h>
33 #include <ipxe/ethernet.h>
34 #include <ipxe/if_ether.h>
35 #include <ipxe/iobuf.h>
36 #include <ipxe/malloc.h>
37 #include <ipxe/umalloc.h>
38 #include <ipxe/pci.h>
39 #include "exanic.h"
40 
41 /** @file
42  *
43  * Exablaze ExaNIC driver
44  *
45  */
46 
47 /* Disambiguate the various error causes */
48 #define EIO_ABORTED __einfo_error ( EINFO_EIO_ABORTED )
49 #define EINFO_EIO_ABORTED \
50  __einfo_uniqify ( EINFO_EIO, 0x01, "Frame aborted" )
51 #define EIO_CORRUPT __einfo_error ( EINFO_EIO_CORRUPT )
52 #define EINFO_EIO_CORRUPT \
53  __einfo_uniqify ( EINFO_EIO, 0x02, "CRC incorrect" )
54 #define EIO_HWOVFL __einfo_error ( EINFO_EIO_HWOVFL )
55 #define EINFO_EIO_HWOVFL \
56  __einfo_uniqify ( EINFO_EIO, 0x03, "Hardware overflow" )
57 #define EIO_STATUS( status ) \
58  EUNIQ ( EINFO_EIO, ( (status) & EXANIC_STATUS_ERROR_MASK ), \
59  EIO_ABORTED, EIO_CORRUPT, EIO_HWOVFL )
60 
61 /**
62  * Write DMA base address register
63  *
64  * @v addr DMA base address
65  * @v reg Register
66  */
67 static void exanic_write_base ( physaddr_t addr, void *reg ) {
68  uint32_t lo;
69  uint32_t hi;
70 
71  /* Write high and low registers, setting flags as appropriate */
72  lo = addr;
73  if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
74  /* 64-bit build; may be a 32-bit or 64-bit address */
75  hi = ( ( ( uint64_t ) addr ) >> 32 );
76  if ( ! hi )
77  lo |= EXANIC_DMA_32_BIT;
78  } else {
79  /* 32-bit build; always a 32-bit address */
80  hi = 0;
81  lo |= EXANIC_DMA_32_BIT;
82  }
83  writel ( hi, ( reg + 0 ) );
84  writel ( lo, ( reg + 4 ) );
85 }
86 
87 /**
88  * Clear DMA base address register
89  *
90  * @v reg Register
91  */
92 static inline void exanic_clear_base ( void *reg ) {
93 
94  /* Clear both high and low registers */
95  writel ( 0, ( reg + 0 ) );
96  writel ( 0, ( reg + 4 ) );
97 }
98 
99 /******************************************************************************
100  *
101  * Device reset
102  *
103  ******************************************************************************
104  */
105 
106 /**
107  * Reset hardware
108  *
109  * @v exanic ExaNIC device
110  */
111 static void exanic_reset ( struct exanic *exanic ) {
112  void *port_regs;
113  unsigned int i;
114 
115  /* Disable all possible ports */
116  for ( i = 0 ; i < EXANIC_MAX_PORTS ; i++ ) {
117  port_regs = ( exanic->regs + EXANIC_PORT_REGS ( i ) );
118  writel ( 0, ( port_regs + EXANIC_PORT_ENABLE ) );
119  writel ( 0, ( port_regs + EXANIC_PORT_IRQ ) );
120  exanic_clear_base ( port_regs + EXANIC_PORT_RX_BASE );
121  }
122 
123  /* Disable transmit feedback */
125 }
126 
127 /******************************************************************************
128  *
129  * MAC address
130  *
131  ******************************************************************************
132  */
133 
134 /**
135  * Read I2C line status
136  *
137  * @v basher Bit-bashing interface
138  * @v bit_id Bit number
139  * @ret zero Input is a logic 0
140  * @ret non-zero Input is a logic 1
141  */
142 static int exanic_i2c_read_bit ( struct bit_basher *basher,
143  unsigned int bit_id ) {
144  struct exanic *exanic =
145  container_of ( basher, struct exanic, basher.basher );
146  unsigned int shift;
147  uint32_t i2c;
148 
149  /* Identify bit */
150  assert ( bit_id == I2C_BIT_SDA );
151  shift = exanic->i2cfg.getsda;
152 
153  /* Read I2C register */
155  i2c = readl ( exanic->regs + EXANIC_I2C );
156  DBG_ENABLE ( DBGLVL_IO );
157  return ( ( i2c >> shift ) & 1 );
158 }
159 
160 /**
161  * Write I2C line status
162  *
163  * @v basher Bit-bashing interface
164  * @v bit_id Bit number
165  * @v data Value to write
166  */
167 static void exanic_i2c_write_bit ( struct bit_basher *basher,
168  unsigned int bit_id, unsigned long data ) {
169  struct exanic *exanic =
170  container_of ( basher, struct exanic, basher.basher );
171  unsigned int shift;
172  uint32_t mask;
173  uint32_t i2c;
174 
175  /* Identify shift */
176  assert ( ( bit_id == I2C_BIT_SCL ) || ( bit_id == I2C_BIT_SDA ) );
177  shift = ( ( bit_id == I2C_BIT_SCL ) ?
179  mask = ( 1UL << shift );
180 
181  /* Modify I2C register */
183  i2c = readl ( exanic->regs + EXANIC_I2C );
184  i2c &= ~mask;
185  if ( ! data )
186  i2c |= mask;
187  writel ( i2c, ( exanic->regs + EXANIC_I2C ) );
188  DBG_ENABLE ( DBGLVL_IO );
189 }
190 
191 /** I2C bit-bashing interface operations */
194  .write = exanic_i2c_write_bit,
195 };
196 
197 /** Possible I2C bus configurations */
198 static struct exanic_i2c_config exanic_i2cfgs[] = {
199  /* X2/X10 */
200  { .setscl = 7, .setsda = 4, .getsda = 12 },
201  /* X4 */
202  { .setscl = 7, .setsda = 5, .getsda = 13 },
203 };
204 
205 /**
206  * Initialise EEPROM
207  *
208  * @v exanic ExaNIC device
209  * @v i2cfg I2C bus configuration
210  * @ret rc Return status code
211  */
212 static int exanic_try_init_eeprom ( struct exanic *exanic,
213  struct exanic_i2c_config *i2cfg ) {
214  int rc;
215 
216  /* Configure I2C bus */
217  memcpy ( &exanic->i2cfg, i2cfg, sizeof ( exanic->i2cfg ) );
218 
219  /* Initialise I2C bus */
220  if ( ( rc = init_i2c_bit_basher ( &exanic->basher,
221  &exanic_i2c_basher_ops ) ) != 0 ) {
222  DBGC2 ( exanic, "EXANIC %p found no I2C bus via %d/%d/%d\n",
225  return rc;
226  }
227 
228  /* Check for EEPROM presence */
230  if ( ( rc = i2c_check_presence ( &exanic->basher.i2c,
231  &exanic->eeprom ) ) != 0 ) {
232  DBGC2 ( exanic, "EXANIC %p found no EEPROM via %d/%d/%d\n",
235  return rc;
236  }
237 
238  DBGC ( exanic, "EXANIC %p found EEPROM via %d/%d/%d\n",
241  return 0;
242 }
243 
244 /**
245  * Initialise EEPROM
246  *
247  * @v exanic ExaNIC device
248  * @ret rc Return status code
249  */
250 static int exanic_init_eeprom ( struct exanic *exanic ) {
251  struct exanic_i2c_config *i2cfg;
252  unsigned int i;
253  int rc;
254 
255  /* Try all possible bus configurations */
256  for ( i = 0 ; i < ( sizeof ( exanic_i2cfgs ) /
257  sizeof ( exanic_i2cfgs[0] ) ) ; i++ ) {
258  i2cfg = &exanic_i2cfgs[i];
259  if ( ( rc = exanic_try_init_eeprom ( exanic, i2cfg ) ) == 0 )
260  return 0;
261  }
262 
263  DBGC ( exanic, "EXANIC %p found no EEPROM\n", exanic );
264  return -ENODEV;
265 }
266 
267 /**
268  * Fetch base MAC address
269  *
270  * @v exanic ExaNIC device
271  * @ret rc Return status code
272  */
273 static int exanic_fetch_mac ( struct exanic *exanic ) {
274  struct i2c_interface *i2c = &exanic->basher.i2c;
275  int rc;
276 
277  /* Initialise EEPROM */
278  if ( ( rc = exanic_init_eeprom ( exanic ) ) != 0 )
279  return rc;
280 
281  /* Fetch base MAC address */
282  if ( ( rc = i2c->read ( i2c, &exanic->eeprom, 0, exanic->mac,
283  sizeof ( exanic->mac ) ) ) != 0 ) {
284  DBGC ( exanic, "EXANIC %p could not read MAC address: %s\n",
285  exanic, strerror ( rc ) );
286  return rc;
287  }
288 
289  return 0;
290 }
291 
292 /******************************************************************************
293  *
294  * Link state
295  *
296  ******************************************************************************
297  */
298 
299 /**
300  * Check link state
301  *
302  * @v netdev Network device
303  */
304 static void exanic_check_link ( struct net_device *netdev ) {
305  struct exanic_port *port = netdev->priv;
307  uint32_t speed;
308 
309  /* Report port status changes */
310  status = readl ( port->regs + EXANIC_PORT_STATUS );
311  speed = readl ( port->regs + EXANIC_PORT_SPEED );
312  if ( status != port->status ) {
313  DBGC ( port, "EXANIC %s port status %#08x speed %dMbps\n",
314  netdev->name, status, speed );
317  } else {
319  }
320  port->status = status;
321  }
322 }
323 
324 /**
325  * Check link state periodically
326  *
327  * @v retry Link state check timer
328  * @v over Failure indicator
329  */
330 static void exanic_expired ( struct retry_timer *timer, int over __unused ) {
331  struct exanic_port *port =
332  container_of ( timer, struct exanic_port, timer );
333  struct net_device *netdev = port->netdev;
334  static const uint32_t speeds[] = {
335  100, 1000, 10000, 40000, 100000,
336  };
337  unsigned int index;
338 
339  /* Restart timer */
341 
342  /* Check link state */
344 
345  /* Do nothing further if link is already up */
346  if ( netdev_link_ok ( netdev ) )
347  return;
348 
349  /* Do nothing further unless we have a valid list of supported speeds */
350  if ( ! port->speeds )
351  return;
352 
353  /* Autonegotiation is not supported; try manually selecting
354  * the next supported link speed.
355  */
356  do {
357  if ( ! port->speed )
358  port->speed = ( 8 * sizeof ( port->speeds ) );
359  port->speed--;
360  } while ( ! ( ( 1UL << port->speed ) & port->speeds ) );
361  index = ( port->speed - ( ffs ( EXANIC_CAPS_SPEED_MASK ) - 1 ) );
362  assert ( index < ( sizeof ( speeds ) / sizeof ( speeds[0] ) ) );
363 
364  /* Attempt the selected speed */
365  DBGC ( netdev, "EXANIC %s attempting %dMbps\n",
366  netdev->name, speeds[index] );
367  writel ( speeds[index], ( port->regs + EXANIC_PORT_SPEED ) );
368 }
369 
370 /******************************************************************************
371  *
372  * Network device interface
373  *
374  ******************************************************************************
375  */
376 
377 /**
378  * Open network device
379  *
380  * @v netdev Network device
381  * @ret rc Return status code
382  */
383 static int exanic_open ( struct net_device *netdev ) {
384  struct exanic_port *port = netdev->priv;
385  struct exanic_tx_chunk *tx;
386  unsigned int i;
387 
388  /* Reset transmit region contents */
389  for ( i = 0 ; i < port->tx_count ; i++ ) {
390  tx = ( port->tx + ( i * sizeof ( *tx ) ) );
391  writew ( port->txf_slot, &tx->desc.txf_slot );
392  writeb ( EXANIC_TYPE_RAW, &tx->desc.type );
393  writeb ( 0, &tx->desc.flags );
394  writew ( 0, &tx->pad );
395  }
396 
397  /* Reset receive region contents */
398  memset_user ( port->rx, 0, 0xff, EXANIC_RX_LEN );
399 
400  /* Reset transmit feedback region */
401  *(port->txf) = 0;
402 
403  /* Reset counters */
404  port->tx_prod = 0;
405  port->tx_cons = 0;
406  port->rx_cons = 0;
407 
408  /* Map receive region */
410  ( port->regs + EXANIC_PORT_RX_BASE ) );
411 
412  /* Enable promiscuous mode */
414  ( port->regs + EXANIC_PORT_FLAGS ) );
415 
416  /* Reset to default speed and clear cached status */
417  writel ( port->default_speed, ( port->regs + EXANIC_PORT_SPEED ) );
418  port->speed = 0;
419  port->status = 0;
420 
421  /* Enable port */
422  wmb();
424  ( port->regs + EXANIC_PORT_ENABLE ) );
425 
426  /* Start link state timer */
428 
429  return 0;
430 }
431 
432 /**
433  * Close network device
434  *
435  * @v netdev Network device
436  */
437 static void exanic_close ( struct net_device *netdev ) {
438  struct exanic_port *port = netdev->priv;
439 
440  /* Stop link state timer */
441  stop_timer ( &port->timer );
442 
443  /* Disable port */
444  writel ( 0, ( port->regs + EXANIC_PORT_ENABLE ) );
445  wmb();
446 
447  /* Clear receive region */
449 
450  /* Discard any in-progress receive */
451  if ( port->rx_iobuf ) {
452  netdev_rx_err ( netdev, port->rx_iobuf, -ECANCELED );
453  port->rx_iobuf = NULL;
454  }
455 }
456 
457 /**
458  * Transmit packet
459  *
460  * @v netdev Network device
461  * @v iobuf I/O buffer
462  * @ret rc Return status code
463  */
464 static int exanic_transmit ( struct net_device *netdev,
465  struct io_buffer *iobuf ) {
466  struct exanic_port *port = netdev->priv;
467  struct exanic_tx_chunk *tx;
468  unsigned int tx_fill;
469  unsigned int tx_index;
470  size_t offset;
471  size_t len;
472  uint8_t *src;
473  uint8_t *dst;
474 
475  /* Sanity check */
476  len = iob_len ( iobuf );
477  if ( len > sizeof ( tx->data ) ) {
478  DBGC ( port, "EXANIC %s transmit too large\n", netdev->name );
479  return -ENOTSUP;
480  }
481 
482  /* Get next transmit descriptor */
483  tx_fill = ( port->tx_prod - port->tx_cons );
484  if ( tx_fill >= port->tx_count ) {
485  DBGC ( port, "EXANIC %s out of transmit descriptors\n",
486  netdev->name );
487  return -ENOBUFS;
488  }
489  tx_index = ( port->tx_prod & ( port->tx_count - 1 ) );
490  offset = ( tx_index * sizeof ( *tx ) );
491  tx = ( port->tx + offset );
492  DBGC2 ( port, "EXANIC %s TX %04x at [%05zx,%05zx)\n",
493  netdev->name, port->tx_prod, ( port->tx_offset + offset ),
494  ( port->tx_offset + offset +
495  offsetof ( typeof ( *tx ), data ) + len ) );
496  port->tx_prod++;
497 
498  /* Populate transmit descriptor */
499  writew ( port->tx_prod, &tx->desc.txf_id );
500  writew ( ( sizeof ( tx->pad ) + len ), &tx->desc.len );
501 
502  /* Copy data to transmit region. There is no DMA on the
503  * transmit data path.
504  */
505  src = iobuf->data;
506  dst = tx->data;
507  while ( len-- )
508  writeb ( *(src++), dst++ );
509 
510  /* Send transmit command */
511  wmb();
512  writel ( ( port->tx_offset + offset ),
513  ( port->regs + EXANIC_PORT_TX_COMMAND ) );
514 
515  return 0;
516 }
517 
518 /**
519  * Poll for completed packets
520  *
521  * @v netdev Network device
522  */
523 static void exanic_poll_tx ( struct net_device *netdev ) {
524  struct exanic_port *port = netdev->priv;
525 
526  /* Report any completed packets */
527  while ( port->tx_cons != *(port->txf) ) {
528  DBGC2 ( port, "EXANIC %s TX %04x complete\n",
529  netdev->name, port->tx_cons );
531  port->tx_cons++;
532  }
533 }
534 
535 /**
536  * Poll for received packets
537  *
538  * @v netdev Network device
539  */
540 static void exanic_poll_rx ( struct net_device *netdev ) {
541  struct exanic_port *port = netdev->priv;
542  struct exanic_rx_chunk *rx;
543  struct exanic_rx_descriptor desc;
544  uint8_t current;
545  uint8_t previous;
546  size_t offset;
547  size_t len;
548 
549  for ( ; ; port->rx_cons++ ) {
550 
551  /* Fetch descriptor */
552  offset = ( ( port->rx_cons * sizeof ( *rx ) ) % EXANIC_RX_LEN );
553  copy_from_user ( &desc, port->rx,
554  ( offset + offsetof ( typeof ( *rx ), desc ) ),
555  sizeof ( desc ) );
556 
557  /* Calculate generation */
558  current = ( port->rx_cons / ( EXANIC_RX_LEN / sizeof ( *rx ) ));
559  previous = ( current - 1 );
560 
561  /* Do nothing if no chunk is ready */
562  if ( desc.generation == previous )
563  break;
564 
565  /* Allocate I/O buffer if needed */
566  if ( ! port->rx_iobuf ) {
567  port->rx_iobuf = alloc_iob ( EXANIC_MAX_RX_LEN );
568  if ( ! port->rx_iobuf ) {
569  /* Wait for next poll */
570  break;
571  }
572  port->rx_rc = 0;
573  }
574 
575  /* Calculate chunk length */
576  len = ( desc.len ? desc.len : sizeof ( rx->data ) );
577 
578  /* Append data to I/O buffer */
579  if ( len <= iob_tailroom ( port->rx_iobuf ) ) {
580  copy_from_user ( iob_put ( port->rx_iobuf, len ),
581  port->rx,
582  ( offset + offsetof ( typeof ( *rx ),
583  data ) ), len );
584  } else {
585  DBGC ( port, "EXANIC %s RX too large\n",
586  netdev->name );
587  port->rx_rc = -ERANGE;
588  }
589 
590  /* Check for overrun */
591  rmb();
592  copy_from_user ( &desc.generation, port->rx,
593  ( offset + offsetof ( typeof ( *rx ),
594  desc.generation ) ),
595  sizeof ( desc.generation ) );
596  if ( desc.generation != current ) {
597  DBGC ( port, "EXANIC %s RX overrun\n", netdev->name );
598  port->rx_rc = -ENOBUFS;
599  continue;
600  }
601 
602  /* Wait for end of packet */
603  if ( ! desc.len )
604  continue;
605 
606  /* Check for receive errors */
607  if ( desc.status & EXANIC_STATUS_ERROR_MASK ) {
608  port->rx_rc = -EIO_STATUS ( desc.status );
609  DBGC ( port, "EXANIC %s RX %04x error: %s\n",
610  netdev->name, port->rx_cons,
611  strerror ( port->rx_rc ) );
612  } else {
613  DBGC2 ( port, "EXANIC %s RX %04x\n",
614  netdev->name, port->rx_cons );
615  }
616 
617  /* Hand off to network stack */
618  if ( port->rx_rc ) {
619  netdev_rx_err ( netdev, port->rx_iobuf, port->rx_rc );
620  } else {
621  iob_unput ( port->rx_iobuf, 4 /* strip CRC */ );
622  netdev_rx ( netdev, port->rx_iobuf );
623  }
624  port->rx_iobuf = NULL;
625  }
626 }
627 
628 /**
629  * Poll for completed and received packets
630  *
631  * @v netdev Network device
632  */
633 static void exanic_poll ( struct net_device *netdev ) {
634 
635  /* Poll for completed packets */
637 
638  /* Poll for received packets */
640 }
641 
642 /** ExaNIC network device operations */
644  .open = exanic_open,
645  .close = exanic_close,
646  .transmit = exanic_transmit,
647  .poll = exanic_poll,
648 };
649 
650 /******************************************************************************
651  *
652  * PCI interface
653  *
654  ******************************************************************************
655  */
656 
657 /**
658  * Probe port
659  *
660  * @v exanic ExaNIC device
661  * @v dev Parent device
662  * @v index Port number
663  * @ret rc Return status code
664  */
665 static int exanic_probe_port ( struct exanic *exanic, struct device *dev,
666  unsigned int index ) {
667  struct net_device *netdev;
668  struct exanic_port *port;
669  void *port_regs;
671  size_t tx_len;
672  int rc;
673 
674  /* Do nothing if port is not physically present */
675  port_regs = ( exanic->regs + EXANIC_PORT_REGS ( index ) );
676  status = readl ( port_regs + EXANIC_PORT_STATUS );
677  tx_len = readl ( port_regs + EXANIC_PORT_TX_LEN );
678  if ( ( status & EXANIC_PORT_STATUS_ABSENT ) || ( tx_len == 0 ) ) {
679  rc = 0;
680  goto absent;
681  }
682 
683  /* Allocate network device */
684  netdev = alloc_etherdev ( sizeof ( *port ) );
685  if ( ! netdev ) {
686  rc = -ENOMEM;
687  goto err_alloc_netdev;
688  }
690  netdev->dev = dev;
691  port = netdev->priv;
692  memset ( port, 0, sizeof ( *port ) );
693  exanic->port[index] = port;
694  port->netdev = netdev;
695  port->regs = port_regs;
696  timer_init ( &port->timer, exanic_expired, &netdev->refcnt );
697 
698  /* Identify transmit region */
699  port->tx_offset = readl ( port->regs + EXANIC_PORT_TX_OFFSET );
700  if ( tx_len > EXANIC_MAX_TX_LEN )
701  tx_len = EXANIC_MAX_TX_LEN;
702  assert ( ! ( tx_len & ( tx_len - 1 ) ) );
703  port->tx = ( exanic->tx + port->tx_offset );
704  port->tx_count = ( tx_len / sizeof ( struct exanic_tx_chunk ) );
705 
706  /* Identify transmit feedback region */
707  port->txf_slot = EXANIC_TXF_SLOT ( index );
708  port->txf = ( exanic->txf +
709  ( port->txf_slot * sizeof ( *(port->txf) ) ) );
710 
711  /* Allocate receive region (via umalloc()) */
712  port->rx = umalloc ( EXANIC_RX_LEN );
713  if ( ! port->rx ) {
714  rc = -ENOMEM;
715  goto err_alloc_rx;
716  }
717 
718  /* Set MAC address */
720  netdev->hw_addr[ ETH_ALEN - 1 ] += index;
721 
722  /* Record default link speed and supported speeds */
723  port->default_speed = readl ( port->regs + EXANIC_PORT_SPEED );
724  port->speeds = ( exanic->caps & EXANIC_CAPS_SPEED_MASK );
725 
726  /* Register network device */
727  if ( ( rc = register_netdev ( netdev ) ) != 0 )
728  goto err_register_netdev;
729  DBGC ( port, "EXANIC %s port %d TX [%#05zx,%#05zx) TXF %#02x RX "
730  "[%#lx,%#lx)\n", netdev->name, index, port->tx_offset,
731  ( port->tx_offset + tx_len ), port->txf_slot,
732  user_to_phys ( port->rx, 0 ),
733  user_to_phys ( port->rx, EXANIC_RX_LEN ) );
734 
735  /* Set initial link state */
737 
738  return 0;
739 
741  err_register_netdev:
742  ufree ( port->rx );
743  err_alloc_rx:
745  netdev_put ( netdev );
746  err_alloc_netdev:
747  absent:
748  return rc;
749 }
750 
751 /**
752  * Probe port
753  *
754  * @v exanic ExaNIC device
755  * @v index Port number
756  */
757 static void exanic_remove_port ( struct exanic *exanic, unsigned int index ) {
758  struct exanic_port *port;
759 
760  /* Do nothing if port is not physically present */
761  port = exanic->port[index];
762  if ( ! port )
763  return;
764 
765  /* Unregister network device */
766  unregister_netdev ( port->netdev );
767 
768  /* Free receive region */
769  ufree ( port->rx );
770 
771  /* Free network device */
772  netdev_nullify ( port->netdev );
773  netdev_put ( port->netdev );
774 }
775 
776 /**
777  * Probe PCI device
778  *
779  * @v pci PCI device
780  * @ret rc Return status code
781  */
782 static int exanic_probe ( struct pci_device *pci ) {
783  struct exanic *exanic;
784  unsigned long regs_bar_start;
785  unsigned long tx_bar_start;
786  size_t tx_bar_len;
787  int i;
788  int rc;
789 
790  /* Allocate and initialise structure */
791  exanic = zalloc ( sizeof ( *exanic ) );
792  if ( ! exanic ) {
793  rc = -ENOMEM;
794  goto err_alloc;
795  }
796  pci_set_drvdata ( pci, exanic );
797 
798  /* Fix up PCI device */
799  adjust_pci_device ( pci );
800 
801  /* Map registers */
802  regs_bar_start = pci_bar_start ( pci, EXANIC_REGS_BAR );
803  exanic->regs = pci_ioremap ( pci, regs_bar_start, EXANIC_REGS_LEN );
804  if ( ! exanic->regs ) {
805  rc = -ENODEV;
806  goto err_ioremap_regs;
807  }
808 
809  /* Reset device */
810  exanic_reset ( exanic );
811 
812  /* Read capabilities */
814 
815  /* Power up PHYs */
817 
818  /* Fetch base MAC address */
819  if ( ( rc = exanic_fetch_mac ( exanic ) ) != 0 )
820  goto err_fetch_mac;
821  DBGC ( exanic, "EXANIC %p capabilities %#08x base MAC %s\n",
822  exanic, exanic->caps, eth_ntoa ( exanic->mac ) );
823 
824  /* Map transmit region */
825  tx_bar_start = pci_bar_start ( pci, EXANIC_TX_BAR );
826  tx_bar_len = pci_bar_size ( pci, EXANIC_TX_BAR );
827  exanic->tx = pci_ioremap ( pci, tx_bar_start, tx_bar_len );
828  if ( ! exanic->tx ) {
829  rc = -ENODEV;
830  goto err_ioremap_tx;
831  }
832 
833  /* Allocate transmit feedback region (shared between all ports) */
835  if ( ! exanic->txf ) {
836  rc = -ENOMEM;
837  goto err_alloc_txf;
838  }
839  memset ( exanic->txf, 0, EXANIC_TXF_LEN );
841  ( exanic->regs + EXANIC_TXF_BASE ) );
842 
843  /* Allocate and initialise per-port network devices */
844  for ( i = 0 ; i < EXANIC_MAX_PORTS ; i++ ) {
845  if ( ( rc = exanic_probe_port ( exanic, &pci->dev, i ) ) != 0 )
846  goto err_probe_port;
847  }
848 
849  return 0;
850 
851  i = EXANIC_MAX_PORTS;
852  err_probe_port:
853  for ( i-- ; i >= 0 ; i-- )
854  exanic_remove_port ( exanic, i );
855  exanic_reset ( exanic );
857  err_alloc_txf:
858  iounmap ( exanic->tx );
859  err_ioremap_tx:
860  iounmap ( exanic->regs );
861  err_fetch_mac:
862  err_ioremap_regs:
863  free ( exanic );
864  err_alloc:
865  return rc;
866 }
867 
868 /**
869  * Remove PCI device
870  *
871  * @v pci PCI device
872  */
873 static void exanic_remove ( struct pci_device *pci ) {
874  struct exanic *exanic = pci_get_drvdata ( pci );
875  unsigned int i;
876 
877  /* Remove all ports */
878  for ( i = 0 ; i < EXANIC_MAX_PORTS ; i++ )
879  exanic_remove_port ( exanic, i );
880 
881  /* Reset device */
882  exanic_reset ( exanic );
883 
884  /* Free transmit feedback region */
886 
887  /* Unmap transmit region */
888  iounmap ( exanic->tx );
889 
890  /* Unmap registers */
891  iounmap ( exanic->regs );
892 
893  /* Free device */
894  free ( exanic );
895 }
896 
897 /** ExaNIC PCI device IDs */
898 static struct pci_device_id exanic_ids[] = {
899  PCI_ROM ( 0x10ee, 0x2b00, "exanic-old", "ExaNIC (old)", 0 ),
900  PCI_ROM ( 0x1ce4, 0x0001, "exanic-x4", "ExaNIC X4", 0 ),
901  PCI_ROM ( 0x1ce4, 0x0002, "exanic-x2", "ExaNIC X2", 0 ),
902  PCI_ROM ( 0x1ce4, 0x0003, "exanic-x10", "ExaNIC X10", 0 ),
903  PCI_ROM ( 0x1ce4, 0x0004, "exanic-x10gm", "ExaNIC X10 GM", 0 ),
904  PCI_ROM ( 0x1ce4, 0x0005, "exanic-x40", "ExaNIC X40", 0 ),
905  PCI_ROM ( 0x1ce4, 0x0006, "exanic-x10hpt", "ExaNIC X10 HPT", 0 ),
906  PCI_ROM ( 0x1ce4, 0x0007, "exanic-x40g", "ExaNIC X40", 0 ),
907 };
908 
909 /** ExaNIC PCI driver */
910 struct pci_driver exanic_driver __pci_driver = {
911  .ids = exanic_ids,
912  .id_count = ( sizeof ( exanic_ids ) / sizeof ( exanic_ids[0] ) ),
913  .probe = exanic_probe,
915 };
struct arbelprm_rc_send_wqe rc
Definition: arbel.h:14
wmb()
#define EXANIC_PORT_ENABLE_ENABLED
Port is enabled.
Definition: exanic.h:74
#define iob_put(iobuf, len)
Definition: iobuf.h:120
void netdev_rx_err(struct net_device *netdev, struct io_buffer *iobuf, int rc)
Discard received packet.
Definition: netdevice.c:586
A PCI driver.
Definition: pci.h:247
#define DBGLVL_IO
Definition: compiler.h:322
uint8_t getsda
GPIO bit for reading SDA.
Definition: exanic.h:168
static unsigned int unsigned int reg
Definition: myson.h:162
struct exanic_i2c_config i2cfg
I2C bus configuration.
Definition: exanic.h:227
int(* open)(struct net_device *netdev)
Open network device.
Definition: netdevice.h:222
void * tx
Transmit region.
Definition: exanic.h:222
static int exanic_i2c_read_bit(struct bit_basher *basher, unsigned int bit_id)
Read I2C line status.
Definition: exanic.c:142
Error codes.
static void exanic_close(struct net_device *netdev)
Close network device.
Definition: exanic.c:437
Bit-bashing operations.
Definition: bitbash.h:15
uint8_t setscl
GPIO bit for pulling SCL low.
Definition: exanic.h:164
static void exanic_poll(struct net_device *netdev)
Poll for completed and received packets.
Definition: exanic.c:633
#define EXANIC_LINK_INTERVAL
Interval between link state checks.
Definition: exanic.h:259
static void netdev_tx_complete_next(struct net_device *netdev)
Complete network transmission.
Definition: netdevice.h:764
I/O buffers.
static int i2c_check_presence(struct i2c_interface *i2c, struct i2c_device *i2cdev)
Check presence of I2C device.
Definition: i2c.h:135
#define DBG_ENABLE(level)
Definition: compiler.h:313
static void const void void * dst
Definition: crypto.h:244
struct pci_device_id * ids
PCI ID table.
Definition: pci.h:249
FILE_LICENCE(GPL2_OR_LATER_OR_UBDL)
static struct bit_basher_operations exanic_i2c_basher_ops
I2C bit-bashing interface operations.
Definition: exanic.c:192
static __always_inline void copy_from_user(void *dest, userptr_t src, off_t src_off, size_t len)
Copy data from user buffer.
Definition: uaccess.h:337
static void const void * src
Definition: crypto.h:244
#define EXANIC_I2C
I2C GPIO register.
Definition: exanic.h:63
#define EXANIC_POWER
Power control register.
Definition: exanic.h:66
uint32_t readl(volatile uint32_t *io_addr)
Read 32-bit dword from memory-mapped device.
unsigned long user_to_phys(userptr_t userptr, off_t offset)
Convert user pointer to physical address.
uint64_t desc
Microcode descriptor list physical address.
Definition: ucode.h:12
#define DBGC(...)
Definition: compiler.h:505
A retry timer.
Definition: retry.h:21
unsigned long long uint64_t
Definition: stdint.h:13
#define DBG_DISABLE(level)
Definition: compiler.h:312
static void *__malloc malloc_phys(size_t size, size_t phys_align)
Allocate memory with specified physical alignment.
Definition: malloc.h:62
#define EXANIC_PORT_FLAGS_PROMISC
Promiscuous mode.
Definition: exanic.h:89
void netdev_link_down(struct net_device *netdev)
Mark network device as having link down.
Definition: netdevice.c:230
#define EXANIC_DMA_32_BIT
Flag for 32-bit DMA addresses.
Definition: exanic.h:33
An I2C interface.
Definition: i2c.h:57
static int exanic_probe_port(struct exanic *exanic, struct device *dev, unsigned int index)
Probe port.
Definition: exanic.c:665
#define offsetof(type, field)
Get offset of a field within a structure.
Definition: stddef.h:24
struct exanic_port * port[EXANIC_MAX_PORTS]
Ports.
Definition: exanic.h:239
Serial clock.
Definition: i2c.h:114
An ExaNIC receive chunk.
Definition: exanic.h:151
void adjust_pci_device(struct pci_device *pci)
Enable PCI device.
Definition: pci.c:154
struct io_buffer * alloc_iob(size_t len)
Allocate I/O buffer.
Definition: iobuf.c:129
#define EXANIC_EEPROM_ADDRESS
EEPROM address.
Definition: exanic.h:172
#define EXANIC_TX_BAR
Transmit region BAR.
Definition: exanic.h:27
An ExaNIC transmit chunk.
Definition: exanic.h:124
struct device dev
Generic device.
Definition: pci.h:208
#define EXANIC_TXF_BASE
Transmit feedback base address register.
Definition: exanic.h:51
void writeb(uint8_t data, volatile uint8_t *io_addr)
Write byte to memory-mapped device.
#define ECANCELED
Operation canceled.
Definition: errno.h:343
#define ENOTSUP
Operation not supported.
Definition: errno.h:589
Serial data.
Definition: i2c.h:116
Dynamic memory allocation.
#define EXANIC_REGS_BAR
Register BAR.
Definition: exanic.h:24
static int exanic_probe(struct pci_device *pci)
Probe PCI device.
Definition: exanic.c:782
A timer.
Definition: timer.h:28
static void exanic_poll_rx(struct net_device *netdev)
Poll for received packets.
Definition: exanic.c:540
static void exanic_expired(struct retry_timer *timer, int over __unused)
Check link state periodically.
Definition: exanic.c:330
#define EXANIC_TXF_LEN
Transmit feedback region length.
Definition: exanic.h:39
uint8_t status
Status.
Definition: ena.h:16
static void netdev_init(struct net_device *netdev, struct net_device_operations *op)
Initialise a network device.
Definition: netdevice.h:515
void memset_user(userptr_t userptr, off_t offset, int c, size_t len)
Fill user buffer with a constant byte.
#define EXANIC_PORT_REGS(index)
Port register offset.
Definition: exanic.h:70
uint8_t setsda
GPIO bit for pulling SDA low.
Definition: exanic.h:166
static void pci_set_drvdata(struct pci_device *pci, void *priv)
Set PCI driver-private data.
Definition: pci.h:359
static __always_inline void init_i2c_eeprom(struct i2c_device *i2cdev, unsigned int dev_addr)
Initialise generic I2C EEPROM device.
Definition: i2c.h:149
#define rmb()
Definition: io.h:484
static void exanic_remove_port(struct exanic *exanic, unsigned int index)
Probe port.
Definition: exanic.c:757
#define ENOMEM
Not enough space.
Definition: errno.h:534
A hardware device.
Definition: device.h:73
An ExaNIC.
Definition: exanic.h:218
void * memcpy(void *dest, const void *src, size_t len) __nonnull
An ExaNIC port.
Definition: exanic.h:175
u8 port
Port number.
Definition: CIB_PRM.h:31
static __always_inline unsigned long virt_to_bus(volatile const void *addr)
Convert virtual address to a bus address.
Definition: io.h:183
void * txf
Transmit feedback region.
Definition: exanic.h:224
#define EXANIC_PORT_TX_OFFSET
Port transmit region offset register.
Definition: exanic.h:98
assert((readw(&hdr->flags) &(GTF_reading|GTF_writing))==0)
struct i2c_device eeprom
I2C serial EEPROM.
Definition: exanic.h:231
static void exanic_remove(struct pci_device *pci)
Remove PCI device.
Definition: exanic.c:873
static void netdev_put(struct net_device *netdev)
Drop reference to network device.
Definition: netdevice.h:572
#define container_of(ptr, type, field)
Get containing structure.
Definition: stddef.h:35
Ethernet protocol.
static int exanic_fetch_mac(struct exanic *exanic)
Fetch base MAC address.
Definition: exanic.c:273
struct i2c_interface i2c
I2C interface.
Definition: i2c.h:93
void * priv
Driver private data.
Definition: netdevice.h:431
#define EXANIC_PORT_FLAGS
Port flags register.
Definition: exanic.h:88
Exablaze ExaNIC driver.
An ExaNIC receive chunk descriptor.
Definition: exanic.h:137
static void netdev_link_up(struct net_device *netdev)
Mark network device as having link up.
Definition: netdevice.h:774
void writel(uint32_t data, volatile uint32_t *io_addr)
Write 32-bit dword to memory-mapped device.
static struct exanic_i2c_config exanic_i2cfgs[]
Possible I2C bus configurations.
Definition: exanic.c:198
#define EXANIC_STATUS_ERROR_MASK
Receive status error mask.
Definition: exanic.h:159
static int netdev_link_ok(struct net_device *netdev)
Check link state of network device.
Definition: netdevice.h:636
static userptr_t size_t offset
Offset of the first segment within the content.
Definition: deflate.h:259
static struct net_device * netdev
Definition: gdbudp.c:52
unsigned long pci_bar_start(struct pci_device *pci, unsigned int reg)
Find the start of a PCI BAR.
Definition: pci.c:96
#define EXANIC_TYPE_RAW
Raw Ethernet frame type.
Definition: exanic.h:134
static int exanic_transmit(struct net_device *netdev, struct io_buffer *iobuf)
Transmit packet.
Definition: exanic.c:464
void unregister_netdev(struct net_device *netdev)
Unregister network device.
Definition: netdevice.c:941
struct bit_basher basher
Bit-bashing interface.
Definition: i2c.h:95
#define EXANIC_PORT_TX_LEN
Port transmit region length register.
Definition: exanic.h:101
int(* read)(struct bit_basher *basher, unsigned int bit_id)
Read input bit.
Definition: bitbash.h:51
uint32_t caps
Capabilities.
Definition: exanic.h:234
#define iob_unput(iobuf, len)
Definition: iobuf.h:135
A bit-bashing interface.
Definition: bitbash.h:55
#define ERANGE
Result too large.
Definition: errno.h:639
char * strerror(int errno)
Retrieve string representation of error number.
Definition: strerror.c:78
static void(* free)(struct refcnt *refcnt))
Definition: refcnt.h:54
struct refcnt refcnt
Reference counter.
Definition: netdevice.h:354
void * zalloc(size_t size)
Allocate cleared memory.
Definition: malloc.c:624
static void exanic_reset(struct exanic *exanic)
Reset hardware.
Definition: exanic.c:111
unsigned long pci_bar_size(struct pci_device *pci, unsigned int reg)
Find the size of a PCI BAR.
Definition: pciextra.c:92
PCI bus.
A PCI device.
Definition: pci.h:206
int register_netdev(struct net_device *netdev)
Register network device.
Definition: netdevice.c:759
static size_t iob_len(struct io_buffer *iobuf)
Calculate length of data in an I/O buffer.
Definition: iobuf.h:155
const char * eth_ntoa(const void *ll_addr)
Transcribe Ethernet address.
Definition: ethernet.c:175
static void exanic_check_link(struct net_device *netdev)
Check link state.
Definition: exanic.c:304
#define EIO_STATUS(status)
Definition: exanic.c:57
User memory allocation.
unsigned int speed
Current attempted link speed (as a capability bit index)
Definition: exanic.h:212
A network device.
Definition: netdevice.h:352
static size_t iob_tailroom(struct io_buffer *iobuf)
Calculate available space at end of an I/O buffer.
Definition: iobuf.h:175
#define ENODEV
No such device.
Definition: errno.h:509
static void netdev_nullify(struct net_device *netdev)
Stop using a network device.
Definition: netdevice.h:528
u32 addr
Definition: sky2.h:8
unsigned char uint8_t
Definition: stdint.h:10
static void exanic_i2c_write_bit(struct bit_basher *basher, unsigned int bit_id, unsigned long data)
Write I2C line status.
Definition: exanic.c:167
#define ETH_ALEN
Definition: if_ether.h:8
A PCI device ID list entry.
Definition: pci.h:170
int(* read)(struct i2c_interface *i2c, struct i2c_device *i2cdev, unsigned int offset, uint8_t *data, unsigned int len)
Read data from I2C device.
Definition: i2c.h:68
unsigned int uint32_t
Definition: stdint.h:12
unsigned long phys_to_bus(unsigned long phys_addr)
Convert physical address to a bus address.
#define ffs(x)
Find first (i.e.
Definition: strings.h:140
static struct xen_remove_from_physmap * remove
Definition: xenmem.h:39
#define EXANIC_PORT_SPEED
Port speed register.
Definition: exanic.h:77
Network device operations.
Definition: netdevice.h:213
void netdev_rx(struct net_device *netdev, struct io_buffer *iobuf)
Add packet to receive queue.
Definition: netdevice.c:548
struct device * dev
Underlying hardware device.
Definition: netdevice.h:364
#define EXANIC_MAX_PORTS
Maximum number of ports.
Definition: exanic.h:21
struct pci_driver exanic_driver __pci_driver
ExaNIC PCI driver.
Definition: exanic.c:910
Network device management.
void start_timer_fixed(struct retry_timer *timer, unsigned long timeout)
Start timer with a specified timeout.
Definition: retry.c:64
unsigned long physaddr_t
Definition: stdint.h:20
#define __unused
Declare a variable or data structure as unused.
Definition: compiler.h:573
static void * pci_get_drvdata(struct pci_device *pci)
Get PCI driver-private data.
Definition: pci.h:369
void stop_timer(struct retry_timer *timer)
Stop timer.
Definition: retry.c:117
#define EXANIC_MAX_TX_LEN
Maximum used length of transmit region.
Definition: exanic.h:247
char name[NETDEV_NAME_LEN]
Name of this network device.
Definition: netdevice.h:362
static __always_inline void ufree(userptr_t userptr)
Free external memory.
Definition: umalloc.h:65
uint32_t len
Length.
Definition: ena.h:14
static __always_inline userptr_t umalloc(size_t size)
Allocate external memory.
Definition: umalloc.h:54
#define ENOBUFS
No buffer space available.
Definition: errno.h:498
#define DBGC2(...)
Definition: compiler.h:522
#define EXANIC_PORT_STATUS
Port status register.
Definition: exanic.h:80
static int exanic_init_eeprom(struct exanic *exanic)
Initialise EEPROM.
Definition: exanic.c:250
int(* probe)(struct pci_device *pci)
Probe device.
Definition: pci.h:260
#define writew
Definition: w89c840.c:159
void * data
Start of data.
Definition: iobuf.h:48
#define EXANIC_PORT_TX_COMMAND
Port transmit command register.
Definition: exanic.h:95
#define EXANIC_CAPS_SPEED_MASK
Supported speeds mask.
Definition: exanic.h:60
struct net_device * alloc_etherdev(size_t priv_size)
Allocate Ethernet device.
Definition: ethernet.c:264
u8 rx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets from the AP.
Definition: wpa.h:234
#define EXANIC_POWER_ON
Power on PHYs.
Definition: exanic.h:67
void iounmap(volatile const void *io_addr)
Unmap I/O address.
uint8_t data[48]
Additional event data.
Definition: ena.h:22
static void exanic_clear_base(void *reg)
Clear DMA base address register.
Definition: exanic.c:92
static struct net_device_operations exanic_operations
ExaNIC network device operations.
Definition: exanic.c:643
static void exanic_poll_tx(struct net_device *netdev)
Poll for completed packets.
Definition: exanic.c:523
struct i2c_bit_basher basher
I2C bit-bashing interface.
Definition: exanic.h:229
static void free_phys(void *ptr, size_t size)
Free memory allocated with malloc_phys()
Definition: malloc.h:77
#define EXANIC_REGS_LEN
Register set length.
Definition: exanic.h:36
#define EXANIC_PORT_IRQ
Port interrupt configuration register.
Definition: exanic.h:107
typeof(acpi_finder=acpi_find)
ACPI table finder.
Definition: acpi.c:45
#define EXANIC_PORT_ENABLE
Port enable register.
Definition: exanic.h:73
uint64_t index
Index of the first segment within the content.
Definition: pccrc.h:21
#define EXANIC_PORT_STATUS_LINK
Link is up.
Definition: exanic.h:81
void * regs
Registers.
Definition: exanic.h:220
static int exanic_open(struct net_device *netdev)
Open network device.
Definition: exanic.c:383
void * pci_ioremap(struct pci_device *pci, unsigned long bus_addr, size_t len)
Map PCI bus address as an I/O address.
uint8_t mac[ETH_ALEN]
Base MAC address.
Definition: exanic.h:236
int init_i2c_bit_basher(struct i2c_bit_basher *i2cbit, struct bit_basher_operations *bash_op)
Initialise I2C bit-bashing interface.
Definition: i2c_bit.c:387
uint8_t hw_addr[MAX_HW_ADDR_LEN]
Hardware address.
Definition: netdevice.h:381
#define NULL
NULL pointer (VOID *)
Definition: Base.h:321
String functions.
#define PCI_ROM(_vendor, _device, _name, _description, _data)
Definition: pci.h:303
#define EXANIC_MAX_RX_LEN
Maximum length of received packet.
Definition: exanic.h:253
#define EXANIC_PORT_STATUS_ABSENT
Port is not present.
Definition: exanic.h:82
#define EXANIC_ALIGN
Alignment for DMA regions.
Definition: exanic.h:30
static int exanic_try_init_eeprom(struct exanic *exanic, struct exanic_i2c_config *i2cfg)
Initialise EEPROM.
Definition: exanic.c:212
#define EXANIC_RX_LEN
Receive region length.
Definition: exanic.h:48
static void exanic_write_base(physaddr_t addr, void *reg)
Write DMA base address register.
Definition: exanic.c:67
An ExaNIC I2C bus configuration.
Definition: exanic.h:162
#define EXANIC_TXF_SLOT(index)
Transmit feedback slot.
Definition: exanic.h:45
static struct pci_device_id exanic_ids[]
ExaNIC PCI device IDs.
Definition: exanic.c:898
u8 tx[WPA_TKIP_MIC_KEY_LEN]
MIC key for packets to the AP.
Definition: wpa.h:237
String functions.
#define EXANIC_PORT_RX_BASE
Port receive chunk base address register.
Definition: exanic.h:92
void * memset(void *dest, int character, size_t len) __nonnull
A persistent I/O buffer.
Definition: iobuf.h:33
#define EXANIC_CAPS
Capabilities register.
Definition: exanic.h:54